Temperature drift characteristic correction method for VFC circuit scale factor

Abstract

The invention relates to a temperature drift characteristic correction method for a VFC circuit scale factor, and the method comprises the following steps: 1, enabling a VFC circuit to be connected to a system, putting the VFC circuit into a temperature test box, and measuring the positive and negative scale factors of the VFC circuit at different working environment temperatures; 2, comparing the positive and negative scale factors at the fixed temperature, and determining the mathematical relationship between the positive and negative scale factors and the corresponding positive and negative constant current source connection times N < + > and N <->; step 3, determining a smaller voltage value of the constant current source, which needs to be compensated through a DAC (Digital-to-Analog Converter), through a successive approximation iteration method by utilizing the obtained relation between the scale factor and the number of times of connection of the constant current source; and step 4, determining a DAC compensation voltage value corresponding to the scale factor under each environment temperature, thereby performing real-time correction on the VFC output under the full working temperature domain. According to the invention, the temperature drift characteristic and asymmetry of the VFC circuit scale factor can be improved, so that the signal conversion precision is improved.

Description

Technical Field

[0001] The invention belongs to the technical field of data processing for converting analog signals into digital signals, and relates to a method for correcting temperature drift characteristics, in particular to a method for correcting temperature drift characteristics of a VFC circuit scale factor. Background Art

[0002] The VFC circuit can continuously convert the analog current signal output by the accelerometer into an analog voltage signal and integrate it, and then convert it into a digital pulse frequency signal that is linearly proportional to the analog current signal, thereby realizing the digitization of the analog information. The output pulse frequency corresponding to each milliampere input current is defined as the scale factor of the VFC circuit. Since the component parameters of the VFC circuit have certain temperature drift characteristics, and the positive and negative constant current sources are asymmetric, it is necessary to compensate and correct the temperature drift characteristics and asymmetry of the scale factor.

[0003] In the past, the correction methods for the temperature drift characteristics of the VFC circuit scale factor were divided into two categories. One is to perform quantitative hardware correction on the current output of the feedback constant current source through a three-terminal adjustable current source with temperature-sensitive characteristics; the other is to traverse the VFC data conversion at various temperatures, calculate the compensation parameters such as bias, first-order terms, and second-order terms at each temperature, and then perform quantitative software correction. The first method is overly dependent on hardware accuracy, and the related components occupy about 1 / 5 of the area of ​​the printed circuit board, which is not conducive to the miniaturization of the VFC circuit; the second method is overly dependent on algorithm calculations, the correction process is redundant and complex, and the resource and time overhead of the FPGA is increased. In addition, the compensation parameters are not constant, and the cost of re-setting the compensation parameters is huge.

[0004] Therefore, the present invention proposes a method for correcting the temperature drift characteristic of the scale factor of a VFC circuit.

[0005] After searching, no public documents of the prior art identical or similar to the present invention were found. Summary of the invention

[0006] The purpose of the present invention is to overcome the shortcomings of the prior art and propose a method for correcting the temperature drift characteristics of the scale factor of a VFC circuit. The method can convert the analog current signal output by the accelerometer of a fiber optic inertial navigation device into a digital pulse frequency signal in real time. By using the DAC in the VFC (voltage / frequency conversion) circuit, the positive and negative constant current sources are compensated in real time with the cooperation of a digital correction algorithm to improve the temperature drift characteristics and asymmetry of the scale factor of the VFC circuit, thereby improving the signal conversion accuracy.

[0007] The present invention solves the practical problem by adopting the following technical solutions:

[0008] A method for correcting the temperature drift characteristic of a VFC circuit scale factor comprises the following steps:

[0009] Step 1: Connect the VFC circuit to the system and put it into the temperature test box to work, and measure the positive and negative scale factors of the VFC at different working environment temperatures;

[0010] Step 2: Compare the positive and negative scale factors at a fixed temperature to determine the positive and negative scale factors and the corresponding positive and negative constant current source switching times (N + and N - )

[0011] Step 3, using the relationship between the obtained scale factor and the number of times the constant current source is turned on, through a successive approximation iteration method, determine the voltage value that the smaller constant current source needs to be compensated by the DAC;

[0012] Step 4: Determine the DAC compensation voltage value corresponding to the scale factor at each ambient temperature, so as to perform real-time correction on the VFC output over the entire operating temperature range.

[0013] Moreover, the specific method of step 1 is:

[0014] The temperature interval for measuring the scale factor can be selected as 1 degree Celsius. The temperature test chamber is adjusted, and the ambient temperature value increases from low to high. Each jump of one degree Celsius is maintained for a sufficiently long time, and the positive and negative scale factors are measured multiple times to take the average value; finally, the positive and negative scale factors of each integer temperature value in the entire operating temperature range are measured and summarized.

[0015] Moreover, the specific method of step 2 is:

[0016] The scale factor is the output pulse frequency corresponding to each mA input current, so the scale factor can be determined by determining the mathematical relationship between positive and negative 1 mA and the corresponding positive and negative constant current source connection times:

[0017]

[0018] Among them I + or I - Respectively represent the input positive 1 mA and negative 1 mA current, which are converted into analog voltage after passing through resistor R2. t1 to t2 represent the two moments of current signal input, q q To quantify the unit charge, N + and N - Respectively represent the number of times the positive and negative constant current sources are turned on during the time period from t1 to t2, t q represents the quantized single-time on-time, σ represents the 1 LSB voltage value of the DAC, k represents the coefficient of the number of LSB voltage values ​​that the DAC needs to compensate, V ref+ and V ref- for Figure 2The reference voltage at the terminals of R9 and R11, δ represents a very small error parameter.

[0019] Moreover, the specific method of step 3 is:

[0020] N + Greater than N - For example, the coefficient k + Starting from the integer 1, it increases upwards. + (n) -N - <0 and N + (n+1) -N - >0, the approximation is complete, k + (n) That is the coefficient obtained by successive approximation, k + (n) σ is the voltage value that the DAC needs to compensate for the positive constant current source, refer to equations (3) and (4) below:

[0021]

[0022] Moreover, the specific method of step 4 is:

[0023] Determine the k coefficient of the DAC compensation voltage value corresponding to the scale factor at each ambient temperature and store these coefficients in the FPGA. The subsequent VFC circuit will retrieve the k coefficient at the corresponding temperature from the FPGA through the temperature value provided by the thermistor. If the temperature value is an integer, the k coefficient is directly used for calculation. If the temperature is not an integer (set to T M ), then refer to the two adjacent integer temperature values ​​on the left and right (set as T L With T R ) corresponding to the k coefficient (set to k L With k R ), establish a new k coefficient (set to k M ) is used for calculation. Based on the above two situations, the real-time correction of the VFC output in the full operating temperature range is completed.

[0024] Advantages and beneficial effects of the present invention:

[0025] 1. The present invention proposes a method for correcting the temperature drift characteristics of the scale factor of a VFC circuit. The method is a digital correction algorithm that cooperates with DAC to compensate the positive and negative constant current sources in real time to improve the temperature drift characteristics and asymmetry of the scale factor of the VFC circuit, thereby solving the problem that the traditional VFC circuit has extremely high hardware or software resource overhead and low correction accuracy.

[0026] 2. The method for correcting the temperature drift characteristic of the VFC scale factor described in the present invention can use an FPGA and a DAC in specific applications to compensate the constant current source of the VFC at different temperatures to achieve output data correction, with a simple structure and high real-time performance.

[0027] 3. The temperature drift characteristic correction method for the scale factor of the VFC described in the present invention abandons a large number of debugging devices such as temperature-sensitive current sources and precision resistors, significantly reduces the area and weight of the circuit board, and is conducive to the miniaturization and lightweight of the VFC.

[0028] 4. The temperature drift characteristic correction method for the scale factor of the VFC described in the present invention has a simple and efficient calculation process and does not require the storage of a large number of complex compensation parameters in advance, thereby reducing the resource overhead and time overhead of the FPGA. BRIEF DESCRIPTION OF THE DRAWINGS

[0029] Figure 1 It is a block diagram of the overall design scheme of the VFC circuit of the present invention;

[0030] Figure 2 This is the core circuit diagram of the VFC circuit of the present invention. DETAILED DESCRIPTION

[0031] The embodiments of the present invention are further described in detail below with reference to the accompanying drawings:

[0032] A method for correcting the temperature drift characteristic of a VFC circuit scale factor comprises the following steps:

[0033] Step 1: Connect the VFC circuit to the system and put it into the temperature test box to work, and measure the positive and negative scale factors of the VFC at different working environment temperatures;

[0034] The specific method of step 1 is:

[0035] The temperature interval for measuring the scale factor can be selected as 1 degree Celsius. The temperature test chamber is adjusted, and the ambient temperature value increases from low to high. Each jump of one degree Celsius is maintained for a sufficiently long time, and the positive and negative scale factors are measured multiple times to take the average value; finally, the positive and negative scale factors of each integer temperature value in the entire operating temperature range are measured and summarized.

[0036] Step 2: Compare the positive and negative scale factors at a fixed temperature to determine the positive and negative scale factors and the corresponding positive and negative constant current source switching times (N + and N - )

[0037] The specific method of step 2 is:

[0038] The scale factor is the output pulse frequency corresponding to each mA input current, so the scale factor can be determined by determining the mathematical relationship between positive and negative 1 mA and the corresponding positive and negative constant current source connection times:

[0039]

[0040] Among them I + or I - Respectively represent the input positive 1 mA and negative 1 mA current, which are converted into analog voltage after passing through resistor R2. t1 to t2 represent the two moments of current signal input, q q To quantify the unit charge, N + and N - Respectively represent the number of times the positive and negative constant current sources are turned on during the time period from t1 to t2, t q represents the quantized single-time on-time, σ represents the 1 LSB voltage value of the DAC, k represents the coefficient of the number of LSB voltage values ​​that the DAC needs to compensate, V ref+ and V ref- for Figure 2 The reference voltage at the terminals of R9 and R11, δ represents a very small error parameter.

[0041] Step 3, using the relationship between the obtained scale factor and the number of times the constant current source is turned on, through a successive approximation iteration method, determine the voltage value that the smaller constant current source needs to be compensated by the DAC;

[0042] The specific method of step 3 is:

[0043] N + Greater than N - For example, the coefficient k + Starting from the integer 1, it increases upwards. + (n) -N - <0 and N + (n+1) -N - >0, the approximation is complete, k + (n) That is the coefficient obtained by successive approximation, k + (n) σ is the voltage value that the DAC needs to compensate for the positive constant current source, refer to equations (3) and (4) below:

[0044]

[0045] Step 4: Determine the DAC compensation voltage value corresponding to the scale factor at each ambient temperature, so as to perform real-time correction on the VFC output over the entire operating temperature range.

[0046] The specific method of step 4 is:

[0047] Determine the k coefficient of the DAC compensation voltage value corresponding to the scale factor at each ambient temperature and store these coefficients in the FPGA. The subsequent VFC circuit will retrieve the k coefficient at the corresponding temperature from the FPGA through the temperature value provided by the thermistor. If the temperature value is an integer, the k coefficient is directly used for calculation. If the temperature is not an integer (set to T M ), then refer to the two adjacent integer temperature values ​​on the left and right (set as T L With T R ) corresponding to the k coefficient (set to k L With k R ), establish a new k coefficient (set to k M ) is used for calculation. Based on the above two situations, the real-time correction of the VFC output in the full operating temperature range is completed.

[0048] like Figure 1 As shown, the VFC circuit includes six parts: integrator, constant current source, comparator, FPGA (Field Programmable Gate Array), DAC (Digital-to-Analog Converter), and switch circuit.

[0049] System workflow: The analog current signal is input to the integrator, which converts the current into a voltage signal and inputs it into the comparator. The comparator compares the voltage signal with the threshold voltage and outputs the signal to the FPGA. The FPGA controls the positive and negative constant current sources to couple to the integrator through switches. Finally, the FPGA converts the analog current signal into a digital signal by judging the number of on-time pulses of the corresponding switches that control the positive and negative constant current sources.

[0050] like Figure 2As shown in the figure, the working process of the VFC core circuit is as follows: the integrator is composed of a capacitor C1 with a small leakage current and an operational amplifier U1 with a high impedance. Assume that the initial value of the integrated voltage U_OUT is 0, the positive and negative constant current sources are connected to GND through the switch U3, and the IFC circuit has no pulse output. From a certain moment on, the input current I_INPUT is constant and not zero, then U_OUT changes linearly; if I_INPUT<0, U_OUT increases linearly, and when it exceeds 2V, OUTA (COMP-) of comparator U2 outputs a high level, and OUTB (COMP+) outputs a low level, the FPGA controls I_Switch+ to be high, and switch U3 turns on the positive constant current source until U_OUT falls back to the [-2V, 2V] threshold voltage range; if I_INPUT>0, U_OUT decreases linearly, and when it is lower than -2V, OUTB (COMP+) of comparator U2 outputs a high level, and OUTA (COMP-) outputs a low level, the FPGA controls I_Switch- to be high, and switch U3 turns on the negative constant current source until U_OUT falls back to the [-2V, 2V] threshold voltage range.

[0051] The following is a further description of the invention content of the embodiment of the present invention:

[0052] Assume that from time t1 to time t2 (for example, the time difference from t1 to t2 is 1s), the input current remains constant and becomes an analog voltage after passing through resistor R2. The total input charge is Q INPUT The number of times the constant current source is turned on is N, and the unit time of a single turn-on is t q (unit time is 1ms), quantized unit charge is q q , we can get the number of times the constant current source is turned on N and the input charge Q INPUT , the relationship between the change in charge on capacitor C1 (5):

[0053]

[0054] When Q INPUT Much larger than ΔQ C1 (t2, t1) (in actual design, ΔQ C1 (t2,t1) is not greater than q q ), N is approximately proportional to Q INPUT , the digital quantization of the accelerometer output current can be realized. Transforming the above formula, we can obtain the direct relationship between the current and the number of times the constant current source is turned on, and ΔQ C1 The parameter related to (t2, t1) is represented by δ (this parameter is extremely small). It is thus obtained that at a certain temperature, the input current is positive one mA or negative one mA (I + or I - Indicated by the absolute value of the current), the number of times the corresponding negative constant current source or positive constant current source is connected (indicated by N- or N + Represents the expression between:

[0055]

[0056] σ represents 1 LSB voltage value of DAC, k represents the coefficient of LSB voltage value that DAC needs to compensate, V ref+ and V ref- for Figure 2 The reference voltage at the R9 and R11 terminals, δ represents a very small error parameter. + Greater than N - (Indicates that the output of the positive constant current source is smaller than the negative constant current source, and the positive constant current source needs to be compensated by DAC), then let k - is zero, and the simplified equation (9) is obtained by combining the above two equations (δ' is the simplified δ parameter term):

[0057]

[0058] Refer to equations (10) and (11) to initialize the coefficient k in the FPGA. + Substitute it into the equation so that the coefficient k + Starting from the integer 1, k increases upwards. + Each time an integer 1 is added, N + Will shrink to a new value and gradually approach N - . This cycle iterates and determines when N + (n) -N - <0 and N + (n+1) -N - >0, the termination condition is reached and the loop is exited, and the successive approximation process is completed. + (n) This is the obtained coefficient, k + (n) σ is the voltage value that the DAC needs to compensate for the positive constant current source.

[0059]

[0060] If N + Less than N - (It means that the output of the positive constant current source is greater than the negative constant current source, and the negative constant current source needs to be compensated by DAC), then let k + is zero. Similarly, refer to formulas (8), (9), (10), and (11) to change the relevant parameters and initialize the coefficient k in the FPGA. - Substitute it into the equation so that the coefficient k - Starting from the integer 1, k increases upwards. - Each time an integer 1 is added, N -Will shrink to a new value and gradually approach N + . This cycle iterates and determines when N - (n) -N + <0 and N - (n+1) -N + >0, the termination condition is reached and the loop is exited, and the successive approximation process is completed. - (n) This is the obtained coefficient, k - (n) σ is the voltage value that the DAC needs to compensate for the negative constant current source.

[0061] Through the above steps, the DAC compensation voltage value k coefficient corresponding to the scale factor at each integer ambient temperature is determined in the temperature test box, and these coefficients are stored in the FPGA.

[0062]

[0063] The subsequent VFC circuit will use the temperature value provided by the thermistor to retrieve the k coefficient at the corresponding temperature from the FPGA. If the temperature value is an integer, the k coefficient is directly used for calculation; if the temperature is not an integer (set to T M ), then refer to the two adjacent integer temperature values ​​on the left and right (set as T L With T R ) corresponding to the k coefficient (set to k L With k R ), establish a new k M The coefficient is used to calculate if k L With k R The coefficients correspond to the same polarity constant current source, so calculate k M Refer to formula (12); if k L With k R If the coefficients do not correspond to the same polarity constant current source, then calculate k M Formula reference (13) (the obtained k M If the coefficient is not an integer, it should be rounded off to an integer for calculation). Based on the above two situations, the real-time correction of the VFC output in the full operating temperature range is completed.

[0064] It should be emphasized that the embodiments of the present invention are illustrative rather than restrictive. Therefore, the present invention includes but is not limited to the embodiments described in the specific implementation modes. Any other implementation modes derived by those skilled in the art based on the technical solutions of the present invention also fall within the scope of protection of the present invention.

Claims

1. A method for correcting the temperature drift characteristic of a VFC circuit scale factor, characterized in that: The following steps are involved: Step 1: Connect the VFC circuit to the system and put it into the temperature test box to work, and measure the positive and negative scale factors of the VFC at different working environment temperatures; Step 2: Compare the positive and negative scale factors at a fixed temperature to determine the positive and negative scale factors and the corresponding positive and negative constant current source connection times N. + and N - The mathematical relationship between Step 3, using the relationship between the obtained scale factor and the number of times the constant current source is turned on, through a successive approximation iteration method, determine the voltage value that the smaller constant current source needs to be compensated by the DAC; Step 4: Determine the DAC compensation voltage value corresponding to the scale factor at each ambient temperature, so as to perform real-time correction on the VFC output over the entire operating temperature range.

2. The method for correcting the temperature drift characteristic of the VFC circuit scale factor according to claim 1, characterized in that: The specific method of step 1 is: The temperature interval for measuring the scale factor can be selected as 1 degree Celsius. The temperature test chamber is adjusted, and the ambient temperature value increases from low to high. Each jump of one degree Celsius is maintained for a sufficiently long time, and the positive and negative scale factors are measured multiple times to take the average value; finally, the positive and negative scale factors of each integer temperature value in the entire operating temperature range are measured and summarized.

3. The method for correcting the temperature drift characteristic of the VFC circuit scale factor according to claim 1, characterized in that: The specific method of step 2 is: The scale factor is the output pulse frequency corresponding to each mA input current, so the scale factor can be determined by determining the mathematical relationship between positive and negative 1 mA and the corresponding positive and negative constant current source connection times: Among them I + or I - Respectively represent the input positive 1 mA and negative 1 mA current, which are converted into analog voltage after passing through resistor R2. t1 to t2 represent the two moments of current signal input, q q To quantify the unit charge, N + and N - Respectively represent the number of times the positive and negative constant current sources are turned on during the time period from t1 to t2, t q represents the quantized single-time on-time, σ represents the 1 LSB voltage value of the DAC, k represents the coefficient of the number of LSB voltage values ​​that the DAC needs to compensate, V ref+ and V ref- is the reference voltage at the terminals of R9 and R11 in FIG. 2 , and δ represents a very small error parameter.

4. The method for correcting the temperature drift characteristic of the VFC circuit scale factor according to claim 1, characterized in that: The specific method of step 3 is: N + Greater than N - For example, the coefficient k + Starting from the integer 1, it increases upwards. + (n) -N - <0 and N + (n+1) -N - >0, the approximation is complete, k + (n) That is the coefficient obtained by successive approximation, k + (n) σ is the voltage value that the DAC needs to compensate for the positive constant current source, refer to equations (3) and (4) below:

5. The method for correcting the temperature drift characteristic of the VFC circuit scale factor according to claim 1, characterized in that: The specific method of step 4 is: Determine the k coefficient of the DAC compensation voltage value corresponding to the scale factor at each ambient temperature and store these coefficients in the FPGA; the subsequent VFC circuit will retrieve the k coefficient at the corresponding temperature from the FPGA through the temperature value provided by the thermistor. If the temperature value is exactly an integer, the k coefficient is directly used for calculation; if the temperature is not an integer, it is set to T M , then refer to the two adjacent integer temperature values ​​on the left and right, set as T L With T R , the corresponding k coefficient is set to k L With k R , establish a new k coefficient, set as k M , used for calculation; based on the above two situations, the real-time correction of the VFC output in the full operating temperature range is completed.

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