Read interference processing method and device, computer storage medium and terminal

Abstract

The invention discloses a read interference processing method and device, a computer storage medium and a terminal, according to the embodiment of the invention, after a first read-write related parameter is acquired in real time, self-adaptive real-time adjustment of read voltage of a storage unit is realized according to a second read-write related parameter in the first read-write related parameter; training learning is carried out by utilizing the third read-write related parameters in the preset duration and the read voltage of each read-write operation, and the high-risk interference storage unit is determined, so that migration processing of data contained in the high-risk interference storage unit is realized; according to the method, the dependence on ECC and refreshing operation is reduced, the power consumption of the SSD is reduced, the service life of the SSD is prolonged, the data accuracy is improved, the processing quality of the read interference problem is improved, the calculation burden is reduced while the hardware complexity is reduced, and the overall performance of the system is improved.

Description

Technical Field

[0001] This article relates to data storage technology, and in particular to a method, device, computer storage medium and terminal for read disturbance processing. Background Art

[0002] In a solid-state drive (SSD), a read operation may cause the charge state of adjacent storage cells to change, thereby causing a read disturb problem. Read disturb may cause data read errors and affect the performance and reliability of the SSD.

[0003] Currently, the common methods to solve the read disturbance problem are to add error correction codes (error correction code (ECC) and low-density parity check code (LDPC)) and refresh operations, but these methods will increase latency and power consumption.

[0004] In summary, the related technologies for dealing with the read interference problem mainly rely on adding error correction codes and refresh operations, which not only increases the hardware complexity but also reduces the system performance. In addition, the effectiveness of adding error correction codes is still limited under high interference conditions. How to effectively deal with the read interference problem has become a problem to be solved. Summary of the invention

[0005] The present application provides a method for read disturbance processing, including: Acquire the first read-write related parameters of each storage unit read-write operation in real time; Adjusting the read voltage of the read / write operation storage unit according to the second read / write related parameter of the storage unit of the most recent preset value read / write operation; Determine the memory cell with high risk interference by reading and writing the memory cell's read voltage and the third read-write related parameter within a preset time period; For storage units identified as high-risk interference, data migration is performed; Among them, the first read-write related parameter includes the number of erases and writes, the number of error bits, the error bits and the block position of the read and write, the second read-write related parameter is the parameter associated with the read voltage in the first read-write related parameter, and the third read-write related parameter is the parameter associated with the read interference in the first read-write related parameter; the storage unit with high risk interference is determined based on a pre-set maximum error correction percentage threshold.

[0006] On the other hand, an embodiment of the present application further provides a computer storage medium, wherein the computer storage medium stores a computer program, and when the computer program is executed by a processor, the above-mentioned read disturbance processing method is implemented.

[0007] On the other hand, an embodiment of the present application further provides a terminal, comprising: a memory and a processor, wherein the memory stores a computer program; wherein: The processor is configured to execute the computer program in the memory; When the computer program is executed by the processor, the method for handling read disturbance as described above is implemented.

[0008] In another aspect, the embodiment of the present application further provides a device for read disturbance processing, comprising: a reading unit, an adjustment unit, a determination unit and a processing unit; wherein: The reading unit is configured to: obtain the first reading and writing related parameters of each storage unit reading and writing operation in real time; The adjustment unit is configured to adjust the read voltage of the read / write operation storage unit according to the second read / write related parameter of the read / write operation storage unit of the most recent preset value; The determination unit is configured to: determine the storage unit with high risk interference by reading the read voltage of the storage unit and the third read-write related parameter during the read-write operation within a preset time period; The processing unit is configured to: perform data migration processing on the storage unit determined to be a high-risk interference; Among them, the first read-write related parameter includes the number of erases, the number of error bits, the error bits and the block position of the read-write, the second read-write related parameter is a parameter associated with the read voltage in the first read-write related parameter, and the third read-write related parameter is a parameter associated with the read interference in the first read-write related parameter; the storage unit with high risk interference is determined based on a preset maximum error correction percentage threshold. After the first read-write related parameter is acquired in real time in the embodiment of the present disclosure, the adaptive real-time adjustment of the read voltage of the storage unit is realized according to the second read-write related parameter; the third read-write related parameter within a preset time length and the read voltage of each read-write operation are used for training and learning to determine the storage unit with high risk interference, and the data migration processing contained in the storage unit with high risk interference is realized; the dependence on ECC and refresh operations is reduced, the power consumption of the SSD is reduced, the service life of the SSD is extended, the data accuracy is improved, the processing quality of the read interference problem is improved, the calculation burden is reduced while the hardware complexity is reduced, and the overall performance of the system is improved.

[0009] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by implementing the present application. Other advantages of the present application can be realized and obtained by the schemes described in the description and the drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The accompanying drawings are used to provide an understanding of the technical solution of the present application and constitute a part of the specification. Together with the embodiments of the present application, they are used to explain the technical solution of the present application and do not constitute a limitation on the technical solution of the present application.

[0011] Figure 1 A flowchart of a method for read disturbance processing according to an embodiment of the present disclosure; Figure 2 The present invention is a structural block diagram of a device for read disturbance processing according to an embodiment of the present invention. DETAILED DESCRIPTION

[0012] The present application describes multiple embodiments, but the description is exemplary rather than restrictive, and it is obvious to those skilled in the art that there may be more embodiments and implementations within the scope of the embodiments described in the present application. Although many possible feature combinations are shown in the drawings and discussed in the specific embodiments, many other combinations of the disclosed features are also possible. Unless specifically limited, any feature or element of any embodiment may be used in combination with any other feature or element in any other embodiment, or may replace any other feature or element in any other embodiment.

[0013] The present application includes and contemplates combinations of features and elements known to those of ordinary skill in the art. The embodiments, features and elements disclosed in the present application may also be combined with any conventional features or elements to form a unique invention scheme. Any features or elements of any embodiment may also be combined with features or elements from other invention schemes to form another unique invention scheme. Therefore, it should be understood that any feature shown and / or discussed in the present application may be implemented individually or in any appropriate combination. Therefore, except for the limitations made according to the attached claims and their equivalents, the embodiments are not subject to other restrictions. In addition, various modifications and changes may be made within the scope of protection of the attached claims.

[0014] In addition, when describing representative embodiments, the specification may have presented the method and / or process as a specific sequence of steps. However, to the extent that the method or process does not rely on the specific order of the steps described herein, the method or process should not be limited to the steps of the specific order described. As will be understood by those of ordinary skill in the art, other sequences of steps are also possible. Therefore, the specific sequence of the steps set forth in the specification should not be interpreted as a limitation to the claims. In addition, the claims for the method and / or process should not be limited to the steps of performing them in the order written, and those skilled in the art can easily understand that these sequences can be changed and still remain within the spirit and scope of the embodiments of the present application.

[0015] Figure 1 Flow chart of the method for read disturbance processing according to an embodiment of the present disclosure. Figure 1 As shown, including: Step 101, obtaining first read-write related parameters of each storage unit read-write operation in real time; Step 102, adjusting the read voltage of the read / write operation storage unit according to the second read / write related parameter of the read / write operation storage unit of the most recent preset value; Step 103, determining a memory cell with a high risk of interference by reading and writing a memory cell within a preset time period and a third read-write related parameter; Step 104: Perform data migration processing on the storage unit determined to be at high risk of interference; Among them, the first read-write related parameter includes the number of erases and writes, the number of error bits, the error bits and the block position of the read and write, the second read-write related parameter is a parameter associated with the read voltage in the first read-write related parameter, and the third read-write related parameter is a parameter associated with the read interference in the first read-write related parameter; the storage unit with high risk interference is determined based on a pre-set maximum error correction percentage threshold.

[0016] After the first read-write related parameter is acquired in real time, the embodiment of the present disclosure realizes adaptive real-time adjustment of the read voltage of the storage unit according to the second read-write related parameter; the third read-write related parameter within a preset time period and the read voltage of each read-write operation are used for training and learning to determine the storage units with high risk of interference, and realize data migration processing contained in the storage units with high risk of interference; the dependence on ECC and refresh operations is reduced, the power consumption of the SSD is reduced, the service life of the SSD is extended, the data accuracy is improved, the processing quality of the read interference problem is improved, the computational burden is reduced while reducing the hardware complexity, and the overall performance of the system is improved.

[0017] In an exemplary embodiment, the second read-write related parameter in the embodiment of the present disclosure may include: the number of erase and write times and the number of error bits.

[0018] In an exemplary embodiment, the third read-write related parameter in the embodiment of the present disclosure may include: the number of erase and write times, the block position of the read and write, and the error bit.

[0019] In an exemplary embodiment, the embodiment of the present disclosure may implement monitoring of the first read-write related parameter of the read-write operation storage unit through firmware; the firmware in the embodiment of the present disclosure may be existing firmware in the related art, and the embodiment of the present disclosure does not limit this.

[0020] In an exemplary embodiment, the embodiment of the present disclosure adjusts the read voltage of the read / write operation storage unit according to the second read / write related parameter of the most recent read / write operation storage unit of a preset value, which may include: The read voltage of the read / write operation storage unit is adjusted according to the second read / write related parameter of the storage unit of the most recent read / write operation according to the preset value and the parameter file of the particle included in the SSD.

[0021] The embodiments of the present disclosure can reduce the influence of the current memory cell on the adjacent memory cell by adjusting the read voltage of the memory cell during the read and write operations.

[0022] In an exemplary embodiment, the embodiment of the present disclosure determines a memory cell with a high risk of interference by reading and writing a memory cell during a preset time period and a third read-write related parameter, including: The machine learning model is trained by using the third read / write related parameters within a preset time and the read voltage of the storage unit in each read / write operation, and the storage unit with high risk interference is determined according to the training results; The storage unit with high risk interference is a storage unit with the number of error bits higher than the maximum error correction percentage threshold.

[0023] In an exemplary embodiment, the method of the embodiment of the present disclosure further includes: using lightweight ECC to check storage cells other than storage cells with high risk interference; For a storage cell with an error in the verification result, adjusting the read voltage to the read voltage at the time of initialization and triggering a re-reading of data based on the read voltage at the time of initialization; When the data re-read based on the read voltage at the time of initialization is verified to be wrong, the reading and writing of the storage unit is stopped; Among them, lightweight ECC includes: ECC using Hamming code.

[0024] The lightweight ECC in the embodiment of the present disclosure may also be other ECC known to those skilled in the art.

[0025] The method of the embodiment of the present disclosure has been tested and shown that, compared with the related technology using a fixed voltage value for data reading and writing, the read interference error rate of the embodiment of the present disclosure is reduced by about 30%, and the system performance is improved by about 15%; under high load conditions, data migration processing is efficiently performed on storage units with high risk of interference, rather than passive error correction and sole reliance on ECC, which improves the accuracy and stability of data reading, and reduces the energy consumption of the SSD by about 10% by reducing unnecessary refresh operations, providing technical support for improving the user experience of using the SSD.

[0026] The embodiment of the present disclosure further provides a computer storage medium, in which a computer program is stored. When the computer program is executed by a processor, the above-mentioned read disturbance processing method is implemented.

[0027] The embodiment of the present disclosure further provides a terminal, comprising: a memory and a processor, wherein a computer program is stored in the memory; The processor is configured to execute the computer program in the memory; When the computer program is executed by a processor, the above-mentioned read disturbance processing method is implemented.

[0028] Figure 2 FIG. 1 is a structural block diagram of a device for read disturbance processing according to an embodiment of the present disclosure. Figure 2 As shown, it includes: a reading unit, an adjustment unit, a determination unit and a processing unit; wherein, The reading unit is configured to: obtain the first reading and writing related parameters of each storage unit reading and writing operation in real time; The adjustment unit is configured to adjust the read voltage of the read / write operation storage unit according to the second read / write related parameter of the read / write operation storage unit of the most recent preset value; The determination unit is configured to: determine the storage unit with high risk interference by reading the read voltage of the storage unit and the third read-write related parameter during the read-write operation within a preset time period; The processing unit is configured to: perform data migration processing on the storage unit determined to be a high-risk interference; Among them, the first read-write related parameter includes the number of erases and writes, the number of error bits, the error bits and the block position of the read and write, the second read-write related parameter is a parameter associated with the read voltage in the first read-write related parameter, and the third read-write related parameter is a parameter associated with the read interference in the first read-write related parameter; the storage unit with high risk interference is determined based on a pre-set maximum error correction percentage threshold.

[0029] After the first read-write related parameter is acquired in real time, the embodiment of the present disclosure realizes adaptive real-time adjustment of the read voltage of the storage unit according to the second read-write related parameter; the third read-write related parameter within a preset time period and the read voltage of each read-write operation are used for training and learning to determine the storage units with high risk of interference, and realize data migration processing contained in the storage units with high risk of interference; the dependence on ECC and refresh operations is reduced, the power consumption of the SSD is reduced, the service life of the SSD is extended, the data accuracy is improved, the processing quality of the read interference problem is improved, the computational burden is reduced while reducing the hardware complexity, and the overall performance of the system is improved.

[0030] In an exemplary embodiment, the second read-write related parameter in the embodiment of the present disclosure may include: the number of erase and write times and the number of error bits.

[0031] In an exemplary embodiment, the third read-write related parameter in the embodiment of the present disclosure may include: the number of erase and write times, the block position of the read and write, and the error bit.

[0032] In an exemplary embodiment, the reading unit of the embodiment of the present disclosure is configured to: implement monitoring of the first read-write related parameter of the read-write operation storage unit through firmware; the firmware in the embodiment of the present disclosure may be existing firmware in the related art, and the embodiment of the present disclosure does not limit this.

[0033] In an exemplary embodiment, the adjustment unit of the embodiment of the present disclosure is configured as follows: The read voltage of the read / write operation storage unit is adjusted according to the second read / write related parameter of the storage unit of the most recent read / write operation according to the preset value and the parameter file of the particle included in the SSD.

[0034] The embodiments of the present disclosure can reduce the influence of the current memory cell on the adjacent memory cell by adjusting the read voltage of the memory cell during the read and write operations.

[0035] In an exemplary embodiment, the determination unit of the embodiment of the present disclosure is configured as follows: The machine learning model is trained by using the third read / write related parameters within a preset time and the read voltage of the storage unit in each read / write operation, and the storage unit with high risk interference is determined according to the training results; The storage unit with high risk interference is a storage unit with the number of error bits higher than the maximum error correction percentage threshold.

[0036] In an exemplary embodiment, the processing unit of the embodiment of the present disclosure is further configured to: For storage cells other than those with high risk of interference, lightweight ECC is used for verification; For a storage cell with an error in the verification result, adjusting the read voltage to the read voltage at the time of initialization and triggering a re-reading of data based on the read voltage at the time of initialization; When the data re-read based on the read voltage at the time of initialization is verified to be wrong, the reading and writing of the storage unit is stopped; Among them, lightweight ECC includes: ECC using Hamming code.

[0037] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In hardware implementations, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all components may be implemented as software executed by a processor, such as a digital signal processor or a microprocessor, or implemented as hardware, or implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable medium, which may include a computer storage medium (or non-transitory medium) and a communication medium (or transient medium). As is known to those skilled in the art, the term "computer storage medium" includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store the desired information and can be accessed by a computer. In addition, it is well known to those skilled in the art that communication media typically contain computer-readable instructions, data structures, program modules, or other data in a modulated data signal such as a carrier wave or other transport mechanism, and may include any information delivery media.

Claims

1. A method for read disturbance processing, characterized in that: include: Acquire the first read-write related parameters of each storage unit read-write operation in real time; Adjusting the read voltage of the read / write operation storage unit according to the second read / write related parameter of the storage unit of the most recent preset value read / write operation; Determine the memory cell with high risk interference by reading and writing the read voltage of the memory cell during the preset time and the third read-write related parameter; For storage units identified as high-risk interference, data migration is performed; The first read-write related parameter includes the number of erase and write times, the number of error bits, the error bits and the block position of the read and write; the second read-write related parameter is a parameter associated with the read voltage in the first read-write related parameter; and the third read-write related parameter is a parameter associated with the read interference in the first read-write related parameter; The memory cells with high risk of interference are determined based on a preset maximum error correction percentage threshold.

2. The method according to claim 1, characterized in that The second read-write related parameters include: the number of erase and write times and the number of error bits.

3. The method according to claim 1, characterized in that The third read-write related parameters include: the number of erase and write times, the block position of the read and write, and the error bit.

4. The method according to claim 1, characterized in that: The real-time acquisition of the first read-write related parameter of each storage unit read-write operation includes: The monitoring and acquisition of the first read-write related parameter of the read-write operation storage unit is realized through firmware.

5. The method according to any one of claims 1 to 4, characterized in that: The step of adjusting the read voltage of the read / write operation storage unit according to the second read / write related parameter of the read / write operation storage unit of the most recent preset value comprises: The read voltage of the read / write operation storage unit is adjusted according to the second read / write related parameter of the storage unit of the most recent read / write operation according to the preset value and the parameter file of the particle included in the SSD.

6. The method according to any one of claims 1 to 4, characterized in that: The step of determining a storage unit with a high risk of interference by reading and writing a storage unit within a preset time period and a third read-write related parameter includes: Training is performed through a third read-write related parameter within a preset time length of the machine learning model and a read voltage of the storage unit during each read-write operation, and determining the storage unit with a high risk of interference according to the training result; The storage unit with high risk interference is a storage unit with the number of error bits higher than the maximum error correction percentage threshold.

7. The method according to claim 6, characterized in that After determining the storage unit with a high risk of interference, the method further includes: For storage units other than the storage units with high risk of interference, a lightweight ECC is used to perform verification; For a storage cell with an error in the verification result, adjusting the read voltage to the read voltage at the time of initialization and triggering a re-reading of data based on the read voltage at the time of initialization; When the data re-read based on the read voltage at the time of initialization is verified to be wrong, the reading and writing of the storage unit is stopped; The lightweight ECC includes: ECC using Hamming code. 8 . A computer storage medium storing a computer program, wherein the computer storage medium stores a computer program, and when the computer program is executed by a processor, the method for read disturbance processing according to claim 1 is implemented.

9. A terminal, comprising: A memory and a processor, wherein the memory stores a computer program; wherein, The processor is configured to execute the computer program in the memory; When the computer program is executed by the processor, the method for read disturbance processing according to any one of claims 1 to 7 is implemented.

10. A read disturbance processing device, comprising: A reading unit, an adjustment unit, a determination unit and a processing unit; wherein, The reading unit is configured to: obtain the first reading and writing related parameters of each storage unit reading and writing operation in real time; The adjustment unit is configured to adjust the read voltage of the read / write operation storage unit according to the second read / write related parameter of the read / write operation storage unit of the most recent preset value; The determination unit is configured to: determine the storage unit with high risk interference by reading the read voltage of the storage unit and the third read-write related parameter during the read-write operation within a preset time period; The processing unit is configured to: perform data migration processing on the storage unit determined to be a high-risk interference; Among them, the first read-write related parameter includes the number of erases and writes, the number of error bits, the error bits and the block position of the read and write, the second read-write related parameter is the parameter associated with the read voltage in the first read-write related parameter, and the third read-write related parameter is the parameter associated with the read interference in the first read-write related parameter; the storage unit with high risk interference is determined based on a pre-set maximum error correction percentage threshold.

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