Radio frequency transmit-receive front end packaging structure

Abstract

The embodiment of the invention discloses a radio frequency transceiving front-end packaging structure. A first shell of the structure comprises a first opening and a metal heat sink, the metal heat sink penetrates through the top of the first shell, the first opening is formed in one side of the bottom of the first shell, and a first chip bonded with the metal heat sink is arranged in the first shell; the first cover plate covers the first opening to form a first closed cavity; the second shell comprises a second opening, the second opening is formed in one side of the top of the second shell, and a second chip and a third chip are arranged on the substrate in the second shell; the second cover plate covers the second opening to form a second closed cavity; the first solder ball array is welded between the bottom of the first shell and the top of the second shell, and the first solder ball array is used for realizing electrical interconnection between the first shell and the second shell; and the second solder ball array is welded at the bottom of the second shell and is used for realizing electrical interconnection between the second shell and the outside.

Description

Technical Field

[0001] The present disclosure relates to the field of radio frequency packaging technology, and more specifically, to a radio frequency transceiver front-end packaging structure. Background Art

[0002] As an important part of the radar transceiver system, the RF transceiver front end greatly affects the overall performance and size of the radar. The design and manufacture of miniaturized, low-cost and high-performance RF front ends are of great significance to the development of radar transceiver systems. System in Package (SIP), as a three-dimensional packaging form, can integrate different chips in one package, improve the system's integration, and is an effective way to achieve miniaturized RF transceiver front ends.

[0003] On the other hand, in the face of diverse indicator requirements, it is necessary to design the RF transceiver front end in a spectrum and modular manner, which can greatly shorten the design time and significantly improve the design quality. Therefore, under the premise of ensuring reliability, it is of great application value to develop a highly integrated modular RF transceiver front end packaging structure. Summary of the invention

[0004] The purpose of the present disclosure is to provide a radio frequency transceiver front-end packaging structure to solve at least one of the problems existing in the prior art.

[0005] In order to achieve the above objectives, the present invention adopts the following technical solutions:

[0006] The first aspect of the present disclosure provides a radio frequency transceiver front-end packaging structure, comprising a first housing, a first cover plate, a second housing, a second cover plate, a first solder ball array and a second solder ball array;

[0007] The first housing comprises a first opening and a metal heat sink, wherein the metal heat sink passes through the top of the first housing, the first opening is arranged at one side of the bottom of the first housing, and a first chip bonded to the metal heat sink is arranged in the first housing;

[0008] The first cover plate covers the first opening to form a first closed cavity;

[0009] The second housing comprises a second opening, the second opening is arranged at one side of the top of the second housing, and a second chip and a third chip are arranged on a substrate in the second housing;

[0010] The second cover plate covers the second opening to form a second closed cavity;

[0011] The first solder ball array is welded between the bottom of the first shell and the top of the second shell, the orthographic projection of the first solder ball array on the top of the first shell does not overlap with the orthographic projection of the first cover plate on the top of the first shell, the orthographic projection of the first solder ball array on the bottom of the second shell does not overlap with the orthographic projection of the second cover plate on the bottom of the second shell, and the first solder ball array is used to realize electrical interconnection between the first shell and the second shell;

[0012] The second solder ball array is welded to the bottom of the second housing to realize electrical interconnection between the second housing and the outside.

[0013] Optionally, the material of the first shell and the material of the second shell are aluminum oxide ceramics, aluminum nitride ceramics, silicon or plastic.

[0014] Optionally, the material of the metal heat sink is molybdenum copper, tungsten copper or diamond copper.

[0015] Optionally, the first chip is a driver amplifier, a power amplifier, a switch chip or a limiting low noise amplifier.

[0016] Optionally, the second chip is an amplitude and phase multifunctional chip, a filter, a mixer or a delay device.

[0017] Optionally, the third chip is a gate voltage modulation chip, a drain voltage modulation chip, a PMOS chip, a PMOS driver chip, a switch driver chip or a wave control chip.

[0018] Optionally, the first shell and the second shell are multi-layer dielectric substrates including an internal cavity, and the multi-layer dielectric substrates include metal interconnection lines and metal vias, and the metal interconnection lines and the metal vias are used to achieve electrical interconnection.

[0019] Optionally, the first chip is located in an internal cavity of the first shell, and the first chip is electrically interconnected with the first shell via a key and a gold wire.

[0020] Optionally, the second chip and the third chip are located in an internal cavity of the second shell, and the second chip and the third chip are electrically interconnected with the second shell via keys and gold wires.

[0021] Optionally, the material of the first cover plate and the material of the second cover plate are iron-nickel alloy.

[0022] The beneficial effects of the present disclosure are as follows:

[0023] The technical solution of the present disclosure places a high-power transceiver chip in a first shell with a metal heat sink, and effectively solves the heat dissipation demand of the high-power transceiver chip by top heat dissipation; placing chips such as amplitude and phase control and power modulation that do not require heat dissipation in a second shell can reduce mutual interference with the transceiver chip, ensure good electromagnetic shielding, and improve system reliability; the first shell and the second shell are stacked and interconnected through a solder ball array, which significantly improves the integration of the system; the present disclosure adopts a modular design, and can meet diverse application requirements by combining different first shells and second shells, providing technical support for the development of highly integrated and modular new RF transceiver systems. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The specific implementation methods of the present disclosure are further described in detail below with reference to the accompanying drawings.

[0025] Figure 1 A schematic diagram of a radio frequency transceiver front-end packaging structure provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION

[0026] In the description of the present invention, it should be noted that the terms "upper", "lower", etc. indicate positions or positional relationships based on the positions or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific position, be constructed and operated in a specific position, and therefore cannot be understood as a limitation on the present invention. Unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be a connection between the two elements. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to the specific circumstances.

[0027] It should also be noted that, in the description of the present invention, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the statement "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0028] In the prior art, the RF transceiver front-end packaging structure has problems such as poor heat dissipation of high-power transceiver chips, mutual interference between transceiver chips, poor electromagnetic shielding capability, low system reliability, low system integration, and failure to meet diverse application requirements. Therefore, under the premise of ensuring reliability, it is of great application value to develop a highly integrated modular RF transceiver front-end packaging structure.

[0029] In view of this, an embodiment of the present disclosure discloses a radio frequency transceiver front-end packaging structure, including a first shell, a first cover plate, a second shell, a second cover plate, a first solder ball array and a second solder ball array; wherein the first shell includes a first opening and a metal heat sink, the metal heat sink passes through the top of the first shell, the first opening is arranged on the bottom side of the first shell, and a first chip bonded to the metal heat sink is arranged in the first shell; the first cover plate covers the first opening to form a first closed cavity; the second shell includes a second opening, the second opening is arranged on the top side of the second shell, and a second chip and a third chip; the second cover plate covers the second opening to form a second closed cavity; the first solder ball array is welded between the bottom of the first shell and the top of the second shell, the orthographic projection of the first solder ball array on the top of the first shell does not overlap with the orthographic projection of the first cover plate on the top of the first shell, the orthographic projection of the first solder ball array on the bottom of the second shell does not overlap with the orthographic projection of the second cover plate on the bottom of the second shell, the first solder ball array is used to realize electrical interconnection between the first shell and the second shell; the second solder ball array is welded at the bottom of the second shell to realize electrical interconnection between the second shell and the outside world.

[0030] In a specific example, Figure 1 As shown, the packaging structure includes a first shell 1; a second shell 2; a first chip 3; a metal heat sink 4; a solder ball array 5, including a first solder ball array and a second solder ball array; a cover plate 6, including a first cover plate and a second cover plate; a second chip 7; and a third chip 8.

[0031] In a specific example, Figure 1 As shown, a metal heat sink is arranged on the top of the first shell; a first chip is inverted and pasted under the metal heat sink, wherein the metal heat sink is used to dissipate heat for the first chip; a second chip is arranged on the substrate of the second shell; a third chip is arranged on the substrate of the second shell; the first shell is located above the second shell, and the first shell and the second shell are electrically interconnected through a first solder ball array; the second shell is electrically interconnected with the outside through a second solder ball array at the bottom; a cover plate is respectively matched with the first shell or the second shell, and the shell and the cover plate form a closed cavity.

[0032] In a specific example, Figure 1 As shown, the packaging forms of the first housing 1 and the second housing 2 are both ball grid array packaging. In this embodiment, a large number of signals can be led out, and the layout is convenient.

[0033] In a specific example, Figure 1 As shown, the metal heat sink 4 can be effectively welded on the ceramic substrate by being configured to be narrow at the top and wide at the bottom, thereby increasing the welding contact area with the ceramic substrate.

[0034] In this embodiment, a high-power transceiver chip is placed in a first housing with a metal heat sink, and the heat dissipation requirement of the high-power transceiver chip is effectively solved by top heat dissipation; chips such as amplitude and phase control and power modulation that do not require heat dissipation are placed in the second housing, which can reduce mutual interference with the transceiver chip, ensure good electromagnetic shielding, and improve system reliability; the first housing and the second housing are stacked and interconnected through a solder ball array, which significantly improves the integration of the system; the present disclosure adopts a modular design, and can meet diverse application requirements by combining different first housings with second housings, providing technical support for the development of new radio frequency transceiver systems with high integration and modularity.

[0035] In a possible implementation manner, the material of the first shell and the material of the second shell are aluminum oxide ceramics, aluminum nitride ceramics, silicon or plastic.

[0036] The material of this embodiment is a common packaging material, which has stable physical and chemical properties and excellent radio frequency performance.

[0037] In a possible implementation, the material of the metal heat sink is molybdenum copper, tungsten copper or diamond copper.

[0038] In a specific example, Figure 1 As shown, the top of the first housing 1 is a metal heat sink 4, which is welded to the first housing 1 and is made of molybdenum copper, tungsten copper or diamond copper. This embodiment has excellent thermal conductivity and matches the thermal expansion coefficient of the packaging material.

[0039] In a possible implementation manner, the first chip is a driver amplifier, a power amplifier, a switch chip, or a limiting low noise amplifier.

[0040] In a specific example, Figure 1 As shown, the first chip 3 is usually a high-power transceiver chip, which has certain heat dissipation requirements. Therefore, the first chip 3 is inverted and pasted under the metal heat sink 4. The metal heat sink 4 is used to dissipate heat for the first chip 3. The first chip 3 includes at least one of a driving amplifier, a power amplifier, a switching chip, and a limiting low-noise amplifier.

[0041] Further, such as Figure 1 As shown, the first chip 3 is usually a high-power radio frequency chip, generally used for amplifying microwave signals or selecting channels.

[0042] In a possible implementation manner, the second chip is an amplitude and phase multifunctional chip, a filter, a mixer or a delay device.

[0043] In a specific example, Figure 1 As shown, the second chip 7 and the third chip 8 are radio frequency chips without heat dissipation requirements and are pasted on the multi-layer dielectric substrate of the second housing 2 .

[0044] In a possible implementation, the third chip is a gate voltage modulation chip, a drain voltage modulation chip, a PMOS chip, a PMOS driver chip, a switch driver chip or a wave control chip.

[0045] In a specific example, Figure 1 As shown, the third chip 8 is used to perform voltage regulation on the first chip 3 and the second chip 7, and includes at least one of a gate voltage modulation chip, a drain voltage modulation chip, a PMOS chip, a PMOS driver chip, a switch driver chip, and a wave control chip.

[0046] In a possible implementation, the first shell and the second shell are multilayer dielectric substrates including an internal cavity, and the multilayer dielectric substrates include metal interconnection lines and metal vias, and the metal interconnection lines and the metal vias are used to achieve electrical interconnection.

[0047] In a specific example, Figure 1 As shown, the first shell 1 and the second shell 2 are multi-layer dielectric substrates including an internal cavity. The multi-layer dielectric substrates include metal interconnection lines and metal vias to achieve electrical interconnection inside the substrate, that is, to achieve signal interconnection between multiple chips.

[0048] In a possible implementation manner, the first chip is located in an internal cavity of the first shell, and the first chip is electrically interconnected with the first shell through a key and a gold wire.

[0049] In a possible implementation manner, the second chip and the third chip are located in an internal cavity of the second shell, and the second chip and the third chip are electrically interconnected with the second shell through a key and a gold wire.

[0050] In a specific example, Figure 1As shown, the first chip 3 is located in the internal cavity of the first shell 1, and is electrically interconnected with the first shell 1 through keys and gold wires; the second chip 7 and the third chip 8 are located in the internal cavity of the second shell 2, and are electrically interconnected with the second shell 2 through keys and gold wires.

[0051] In a possible implementation manner, the material of the first cover plate and the material of the second cover plate are iron-nickel alloy.

[0052] In a specific example, Figure 1 As shown, the first housing 1 or the second housing 2 is combined with the cover plate 6 to form a closed cavity, wherein the cover plate 6 is made of an iron-nickel alloy. This embodiment matches the thermal expansion coefficient of the packaging material and has good weldability.

[0053] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not limitations on the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is impossible to list all the embodiments here. All obvious changes or modifications derived from the technical solution of the present invention are still within the protection scope of the present invention.

Claims

1. A radio frequency transceiver front-end packaging structure, characterized in that: It includes a first housing, a first cover plate, a second housing, a second cover plate, a first solder ball array and a second solder ball array; in The first housing comprises a first opening and a metal heat sink, wherein the metal heat sink passes through the top of the first housing, the first opening is arranged at one side of the bottom of the first housing, and a first chip bonded to the metal heat sink is arranged in the first housing; The first cover plate covers the first opening to form a first closed cavity; The second housing comprises a second opening, the second opening is arranged at one side of the top of the second housing, and a second chip and a third chip are arranged on a substrate in the second housing; The second cover plate covers the second opening to form a second closed cavity; The first solder ball array is welded between the bottom of the first shell and the top of the second shell, the orthographic projection of the first solder ball array on the top of the first shell does not overlap with the orthographic projection of the first cover plate on the top of the first shell, the orthographic projection of the first solder ball array on the bottom of the second shell does not overlap with the orthographic projection of the second cover plate on the bottom of the second shell, and the first solder ball array is used to realize electrical interconnection between the first shell and the second shell; The second solder ball array is welded to the bottom of the second housing to realize electrical interconnection between the second housing and the outside.

2. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The material of the first shell and the material of the second shell are aluminum oxide ceramics, aluminum nitride ceramics, silicon or plastic.

3. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The material of the metal heat sink is molybdenum copper, tungsten copper or diamond copper.

4. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The first chip is a driver amplifier, a power amplifier, a switch chip or a limiting low noise amplifier.

5. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The second chip is an amplitude and phase multifunctional chip, a filter, a mixer or a delay device.

6. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The third chip is a gate voltage modulation chip, a drain voltage modulation chip, a PMOS chip, a PMOS driver chip, a switch driver chip or a wave control chip.

7. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The first shell and the second shell are multi-layer dielectric substrates including an internal cavity. The multi-layer dielectric substrates include metal interconnection lines and metal vias. The metal interconnection lines and the metal vias are used to achieve electrical interconnection.

8. The RF transceiver front-end packaging structure according to claim 7, characterized in that: The first chip is located in the inner cavity of the first shell, and the first chip is electrically interconnected with the first shell through a key and a gold wire.

9. The RF transceiver front-end packaging structure according to claim 7, characterized in that: The second chip and the third chip are located in the inner cavity of the second shell, and the second chip and the third chip are electrically interconnected with the second shell through keys and gold wires.

10. The RF transceiver front-end packaging structure according to claim 1, characterized in that: The material of the first cover plate and the material of the second cover plate are iron-nickel alloy.

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