Processing device of power supply system, power supply system and control method of power supply system

Abstract

The invention discloses a power supply system and a processing device and a control method thereof, and the device comprises a filtering unit which carries out the filtering of a DC power supply, and obtains a first DC power supply; the activation unit is used for generating an activation enable signal under the condition that the level of the external activation signal is a preset effective level; the enabling unit comprises two MOS (Metal Oxide Semiconductor) tubes; the enabling unit is used for controlling the on-off of the two MOS tubes under the action of an activation enabling signal, so that conversion is carried out based on the first direct-current power supply under the condition that the two MOS tubes are conducted, and a second direct-current power supply is obtained; and the track power supply unit is used for generating a power supply track signal based on the second direct-current power supply under the action of the default enable signal, and is used for supplying power, so that the power-on of the processing device of the power supply system is completed. According to the scheme, the two MOS tubes are arranged in the enabling unit to cooperatively control on and off of the direct-current power source input externally, the size is small, reverse connection can be prevented, and meanwhile diode power loss does not exist.

Description

Technical Field

[0001] The present invention belongs to the technical field of power supply systems, and specifically relates to a processing device of a power supply system, a power supply system and a control method thereof, and more particularly to an activation and input system of a multi-rail power supply circuit, a multi-rail power supply having the activation and input system of the multi-rail power supply circuit, and a control method of the multi-rail power supply. Background Art

[0002] Power systems (such as multi-rail power supplies) are designed to meet the different power requirements of different components in electronic systems. Especially in complex electronic devices, multiple power rails may be required, each rail providing different power for different types of components. For example, some ICs (i.e. chips) may work with 5V alone, while the input and output interfaces may require 5V and 3.3V, and the internal logic part may use 2.5V or even 1.8V in low power mode. These different voltage requirements are met through the design of multi-rail power supplies, ensuring the normal operation and performance of electronic devices.

[0003] The design of a multi-rail power supply includes the input design of the multi-rail power supply. In the related scheme, for the input design of the multi-rail power supply, a relay is used as a switch to control the on and off of the external power supply, but the relay is large in size, which affects the overall design of the printed circuit board (PCB) and is not conducive to the optimization of the overall layout of the multi-rail power supply.

[0004] The above contents are only used to assist in understanding the technical solution of the present invention and do not constitute an admission that the above contents are prior art. Summary of the invention

[0005] The object of the present invention is to provide a processing device of a power supply system, a power supply system and a control method thereof, so as to solve the problem that a relay is used as a switch to control the on and off of an external power supply in an input design of a power supply system (such as a multi-rail power supply), but the relay is large in size, which affects the overall design of a PCB and is not conducive to the optimization of the overall layout of the multi-rail power supply. By arranging two MOS tubes in a power supply enabling circuit to cooperate in controlling the on and off of the external power supply, the volume is small, which is conducive to the optimization of the overall layout of the multi-rail power supply, and the external power supply can be prevented from being reversely connected without diode power loss.

[0006] The present invention provides a processing device of a power supply system, comprising: a filtering unit, an activation unit, an enabling unit, and a track power supply unit; wherein the filtering unit is used to filter an externally input direct current power supply to obtain a first direct current power supply; the activation unit is used to generate an activation enabling signal when the level of an external activation signal input externally is a preset effective level; wherein the number of external activation signals is more than one; the enabling unit comprises: two MOS tubes; the enabling unit is used to control the on and off of the two MOS tubes under the action of the activation enabling signal, so as to convert based on the first direct current power supply when the two MOS tubes are turned on to obtain a second direct current power supply; the track power supply unit is used to generate a power supply track signal based on the second direct current power supply under the action of a preset default enabling signal, so as to supply power to an external power-consuming unit, thereby completing the power-on of the processing device of the power supply system; wherein the number of the power supply track signals is more than one.

[0007] In some embodiments, for more than one power rail signals generated by the track power supply unit, the first power rail signal among the more than one power rail signals is a self-activation signal of the processing device of the power supply system; the activation unit is also used to generate an activation enable signal when the level of any activation signal among the self-activation signal of the processing device of the power supply system and the external activation signal input externally is a preset valid level.

[0008] In some embodiments, the filtering unit includes: a TVS tube module and a combined filtering module; wherein the filtering unit filters the external input DC power supply to obtain the first DC power supply, including: the TVS tube module, which is used to perform bidirectional voltage stabilization processing on the external input DC power supply to obtain the first processed power supply; the combined filtering module is used to perform combined filtering on the first processed power supply to obtain the first DC power supply; wherein the combined filtering module includes: at least two of a differential mode filtering module, a common mode filtering module, and a π-type filtering module; wherein, in the case where the combined filtering module includes a differential mode filtering module, a common mode filtering module, and a π-type filtering module, the combined filtering module performs combined filtering on the first processed power supply to obtain the first DC power supply, including: the differential mode filtering module, which is used to perform differential mode filtering processing on the first processed power supply to obtain the second processed power supply; the common mode filtering module, which is used to perform common mode filtering processing on the second processed power supply to obtain the third processed power supply; the π-type filtering module is used to perform common mode filtering processing on the third processed power supply to obtain the first DC power supply.

[0009] In some embodiments, the differential mode filter module includes: a common mode inductor module, an X capacitor module and an inductor module; the X capacitor module includes: a first X capacitor and / or a second X capacitor; the X capacitor module also includes: a third X capacitor; the inductor module includes: a first inductor and a second inductor; wherein the first X capacitor, the common mode inductor module, the second X capacitor, and the third X capacitor are sequentially arranged on the output side of the TVS tube module, and the first inductor and the second inductor are arranged between the second X capacitor and the third X capacitor, so that the first X capacitor, the common mode inductor module, the first inductor, the second inductor and the third X capacitor form a first differential mode filter circuit, and / or the second X capacitor, the common mode inductor module, the first inductor, the second inductor and the third X capacitor form a second differential mode filter circuit; and / or , the common-mode filtering module includes: a first Y capacitor and a second Y capacitor; and / or, the common-mode filtering module also includes: a third Y capacitor and a fourth Y capacitor; wherein, the first Y capacitor and the second Y capacitor are arranged at the output side of the common-mode inductor module in the differential-mode filtering module, so that the first Y capacitor, the second Y capacitor and the common-mode inductor module form a first common-mode filtering circuit; the third Y capacitor and the fourth Y capacitor are arranged at the output side of the first inductor and the second inductor in the differential-mode filtering module, so that the third Y capacitor, the fourth Y capacitor and the first inductor and the second inductor form a second common-mode filtering circuit; and / or, the π-type filtering module includes: a first capacitor, a second capacitor, and a magnetic bead module; wherein, the first capacitor, the magnetic bead module and the second capacitor are arranged in sequence at the output side of the common-mode filtering module to form a π-type filtering circuit.

[0010] In some embodiments, the two MOS transistors in the enabling unit include: a first MOS transistor and a second MOS transistor; the enabling unit further includes: a third MOS transistor and a conversion module; the connection terminal of the activation enable signal is connected to the gate of the third MOS transistor; the positive electrode of the connection terminal of the first DC power supply is connected to the drain of the first MOS transistor; the negative electrode of the connection terminal of the first DC power supply is connected to the source of the third MOS transistor; the drain of the third MOS transistor can simultaneously control the gate of the first MOS transistor and the gate of the second MOS transistor after passing through the conversion module; the source of the first MOS transistor is connected to the source of the second MOS transistor; the drain of the second MOS transistor, as the output end of the enabling unit, can output the second DC power supply; wherein, the enabling unit, under the action of the activation enable signal, controls the two MOS transistors The invention relates to a method for switching on and off the first DC power supply to obtain a second DC power supply by converting the first DC power supply when the two MOS tubes are turned on, comprising: when the level of the activation enable signal is a preset effective level, the third MOS tube is turned on to control the first MOS tube and the second MOS tube to be turned on; when the first MOS tube and the second MOS tube are both turned on, the first DC power supply is converted by the conversion module to obtain the second DC power supply; wherein, when the level of the activation enable signal is a preset invalid level, the third MOS tube is turned off to control the first MOS tube and the second MOS tube to be turned off; when the first MOS tube and the second MOS tube are both turned off, the first MOS tube is used to prevent the first DC power supply from being reversely connected, and the second MOS tube is used to control the first DC power supply to be disconnected from the second DC power supply.

[0011] In some embodiments, the conversion module includes: a first voltage stabilizing diode module, a second voltage stabilizing diode module, and a transistor module; the conversion module also includes: a voltage setting module, and / or a voltage stabilizing and filtering module; wherein the cathode of the first voltage stabilizing diode module is connected to the source of the first MOS transistor; the anode of the first voltage stabilizing diode module is connected to the gate of the first MOS transistor; the cathode of the second voltage stabilizing diode module is connected to the base of the transistor module; the collector of the transistor module is connected to the source of the second MOS transistor; the anode of the second voltage stabilizing diode module is respectively connected to the emitter of the transistor module and the gate of the second MOS transistor; the voltage setting module is respectively arranged with the first voltage stabilizing diode module, the second voltage stabilizing diode module, and the transistor module to provide a voltage with a preset voltage division ratio and / or a bias voltage; the voltage stabilizing and filtering module is arranged at the drain of the second MOS transistor to perform voltage stabilization and filtering before the second DC power supply is output.

[0012] In some embodiments, the activation unit includes: a self-activation diode module, an external activation diode module, a third voltage-regulating diode module, a voltage-dividing resistor module, and an output filtering module; the voltage-dividing resistor module includes: a first resistor and a second resistor; wherein the connection terminal of the external activation signal is connected to the anode of the external activation diode module; the cathode of the external activation diode module is connected to the cathode of the third voltage-regulating diode module after passing through the first resistor; the number of the external activation diode modules is the same as the number of the external activation signals; the connection terminal of the self-activation signal of the processing device of the power supply system is connected to the anode of the self-activation diode module; the cathode of the self-activation diode module is connected to the cathode of the third voltage-regulating diode module; the anode of the third voltage-regulating diode module is grounded; the second resistor and the output filtering module are connected in parallel at both ends of the third voltage-regulating diode module; the common end of the cathode of the self-activation diode module, the third voltage-regulating diode module, the second resistor, and the output filtering module serves as the output end of the activation unit for outputting the activation enable signal.

[0013] In some embodiments, it also includes: a signal processing module, a single-chip microcomputer system, and a track power enabling module; wherein the signal processing module is used to process the external activation signal input externally and the feedback power track signal to obtain a processed signal when the track power supply unit has generated the power track signal; and output the processed signal to the single-chip microcomputer system; the single-chip microcomputer system is used to detect the external activation signal input externally and the feedback power track signal based on the processed signal; wherein the single-chip microcomputer system detects the external activation signal input externally and the level of the feedback power track signal When both are at the preset invalid level, a delay is made for a period of time to save the data before shutdown, and a track power enable signal is generated until the preset power-off condition is met; the track power enable module is used to generate a shutdown control signal under the action of the track power enable signal; the track power unit is used to stop working under the control of the shutdown control signal, so that the level of the self-activation signal of the processing device of the power supply system is the preset invalid level, and then the enabling unit disconnects the connection between the first DC power supply and the second DC power supply to stop supplying power to the external power unit, thereby completing the power-off of the processing device of the power supply system.

[0014] Matching the above-mentioned device, the present invention further provides a power supply system on the other hand, including: the processing device of the power supply system mentioned above.

[0015] Matching the above-mentioned power supply system, the present invention provides a control method for a power supply system on another aspect, comprising: generating an activation enable signal through the activation unit when the level of an external activation signal input externally is a preset effective level; wherein the number of external activation signals is more than one; controlling the on and off of the two MOS tubes through the enable unit under the action of the activation enable signal, so as to convert based on the first DC power supply when the two MOS tubes are turned on to obtain a second DC power supply; generating a power rail signal based on the second DC power supply under the action of a preset default enable signal through the track power supply unit, so as to supply power to an external power-consuming unit, thereby completing the power-on of the processing device of the power supply system; wherein the number of the power rail signal is more than one; after the track power supply unit has generated the power rail In the case of a signal, an external activation signal of an external input and the power rail signal of the feedback are obtained; the external activation signal of the external input and the power rail signal of the feedback are detected, and when it is detected that the levels of the external activation signal of the external input and the power rail signal of the feedback are both preset invalid levels, a delay period is made to perform data preservation work before shutdown, until the preset power-off condition is met, and a track power enable signal is generated; under the action of the track power enable signal, a shutdown control signal is generated; under the control of the shutdown control signal, the work is stopped, so that the level of the self-activation signal of the processing device of the power supply system is a preset invalid level, and then the enabling unit disconnects the connection between the first DC power supply and the second DC power supply to stop supplying power to the external power-consuming unit, so as to complete the power-off of the processing device of the power supply system.

[0016] Therefore, the scheme of the present invention is to set a power filter protection circuit, an activation circuit, a power enable circuit, and a single-chip sampling and power track generation circuit, and the single-chip sampling and power track generation circuit includes a signal processing module, a single-chip system, an IC enable signal processing module and a track power IC system; wherein the power filter protection circuit is used to perform combined filtering based on an external DC power supply and output a first DC power supply (such as a signal VCC_1); an activation circuit is set to generate an enable signal (such as a signal Activated2) under the action of a self-activation signal (such as a signal Track_outVCC0) or an externally input activation signal (such as a signal Activated1_1 to a signal Activated1_n); the power enable circuit is used to process based on the first DC power supply (such as a signal VCC_1) under the action of an enable signal (such as a signal Activated2) to obtain a second DC power supply (such as a signal VCC_2); the track power IC system is used to generate each power rail based on the second DC power supply (such as a signal VCC_2) under the action of a preset default enable signal The signal of the track (such as Track_outVCC0 to Track_outVCCm) is used to complete the low-voltage power supply and power-up of the multi-rail power supply circuit; the signal processing module performs voltage conversion based on the activation signal of the external input (such as the signal Activated1_1 to the signal Activated1_n) and the signal of each power track (such as Track_outVCC0 to Track_outVCCm), and the single-chip computer system monitors the status of each activation signal and the signal of the power track: when the activation signal of the external input (such as the signal Activated1_1 to the signal Activated1_n) is invalid, after a delay period of time, the track power IC system is stopped by controlling the IC enable signal processing module, and then Track_outVCC0 is invalid, so that the power enable circuit is disconnected, and the low-voltage power-down of the multi-rail power supply is completed; thus, by setting two MOS tubes in the power enable circuit to cooperate with the control of the external power supply to be turned on and off, the volume is small, which is conducive to the optimization of the overall layout of the multi-rail power supply, and can prevent the external power supply from being reversed without diode power loss.

[0017] Other features and advantages of the present invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the present invention.

[0018] The technical solution of the present invention is further described in detail below through the accompanying drawings and embodiments. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 is a structural schematic diagram of an embodiment of a processing device of a power supply system of the present invention;

[0020] Figure 2 A schematic diagram of the activation and input system of a multi-rail power supply circuit;

[0021] Figure 3 It is a structural diagram of the power supply filter protection circuit;

[0022] Figure 4 is a schematic diagram of the structure of a power enabling circuit;

[0023] Figure 5 is a schematic diagram of the structure of the activation circuit;

[0024] Figure 6 A schematic diagram of the circuit for sampling and generating power rails for the microcontroller;

[0025] Figure 7 FIG. 1 is a flow chart of an embodiment of a method for controlling a power supply system of the present invention. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the specific embodiments of the present invention and the corresponding drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0027] Considering that the design of multi-rail power supply involves selecting appropriate power supply topology, such as switching power supply, linear power supply, etc., as well as selecting appropriate power input design such as filtering and protection in the power supply topology to ensure the safety, stability and purity of the power supply. The board-level low-voltage power supply system with multi-rail power supply as the core includes three parts: activation circuit, filter enable circuit of power supply external input, and track power supply module circuit.

[0028] In some solutions, when external power is input, the relay acts as an on-off switch. The relay of this design is large in size, which affects the overall design of the PCB, and the relay is easily damaged, which can easily cause equipment failure. In addition, the anti-reverse connection function is implemented by a diode, which is always working during the entire power supply operation cycle, reducing the input voltage drop and increasing circuit losses. In other solutions, when the on-board 24V power supply is input to the DC step-down circuit, there is no protection or filtering, which can easily cause circuit damage. In some other solutions, in the power-on and power-off control module, the IO signal of the main control module is used as the enable signal of the drive activation circuit. The self-locking response speed is slow, and the use of surge protection chips leads to high costs.

[0029] Therefore, the solution of the present invention proposes a processing device for a power supply system, specifically an activation and input system for a multi-rail power supply circuit, which uses two MOS tubes (such as two PMOS tubes) to cooperate to realize power input, can prevent the external power supply from being reversed and has no diode power loss; uses the output of the multi-rail power supply as the activation input to improve the response speed of the circuit self-locking, and at the same time reduces the damage to the subsequent circuit caused by the rapid abnormal change of the activation signal; designs an effective filtering protection circuit for the external input, which can filter out clutter or disturbance and increase system stability. Among them, in the related scheme, the enable signal of the main control module is used as the driving activation circuit, and the self-locking response speed is slow. In the scheme of the present invention, the output power signal produced by the multi-rail power supply chip is used as the enable signal for control, which is faster than the response speed of using the IO signal of the main control module as the enable signal.

[0030] According to an embodiment of the present invention, a processing device for a power supply system is provided. Figure 1 The schematic diagram of the structure of an embodiment of the device of the present invention is shown. The processing device of the power system may include: a filtering unit (such as a power filtering circuit), an activation unit (such as an activation circuit), an enabling unit (such as a power enabling circuit), and a track power unit (such as a track power IC system).

[0031] The filtering unit is used to filter the external input DC power supply to obtain the first DC power supply. The external input DC power supply is such as signals +VCC_0 and -VCC_0, and the first DC power supply is such as signals VCC_1 and GND.

[0032] The activation unit is used to generate an activation enable signal when the level of the external activation signal inputted from the outside is a preset effective level; wherein the number of the external activation signals is more than one. The external activation signals inputted from the outside are such as signals Activated1_1 to Activated1_n, and the enable signal is such as signal Activated2.

[0033] The enabling unit is used to convert based on the first DC power supply to obtain a second DC power supply under the action of the activation enable signal; specifically, the enabling unit includes: two MOS transistors; the enabling unit is used to control the on and off of the two MOS transistors under the action of the activation enable signal, so as to convert based on the first DC power supply to obtain a second DC power supply when the two MOS transistors are turned on. The second DC power supply is such as signals VCC_2 and GND.

[0034] The track power supply unit is used to generate a power track signal (such as m power track signals, m is a positive integer) based on the second DC power supply under the action of a preset default enable signal, so as to power the external power-consuming unit, thereby completing the power-on of the processing device of the power supply system; wherein the number of the power track signals is more than one.

[0035] Figure 2 The schematic diagram of the activation and input system of the multi-rail power supply circuit is shown in Figure 2. Figure 2 In the example shown, the input of the processing circuit module is an external DC power supply and an external activation signal, and the positive and negative electrodes of the input terminals of the external DC power supply are as follows: Figure 3 The +VCC_0 terminal and the -VCC_0 terminal shown in FIG. 1 are external activation signals such as activation signal 1 to activation signal n (n is a positive integer), wherein the access terminal of activation signal 1 is as shown in FIG. Figure 5 The Activated_1 terminal in the figure, the access terminal of the activation signal 2 is as follows Figure 5 Activated_4 terminal in.

[0036] exist Figure 2 In the example shown, the output of the processing circuit module is various power rails, the various power rails do not affect each other, and the various power rails can be the same output power or different output power; the various power rails are such as output power rail 0, output power rail 1 to output power rail m (m is a positive integer), and output power rail 0 is such as Figure 6 Track_outVCC0 in the output power rail 1 to the output power rail m as shown in Figure 6 Track_outVCC1, Track_outVCC2 to Track_outVCCm in.

[0037] The solution of the present invention is aimed at a direct current power supply, and an activation and power input solution is designed on a PCB. Two MOS tubes (such as two PMOS tubes) are used in a switch circuit for controlling the on and off of an external power supply to achieve power input, which can prevent the external power supply from being reversely connected without diode power loss; an effective filtering protection circuit is designed for the external input, which can filter out clutter or disturbance and increase system stability.

[0038] In some embodiments, for the one or more power rail signals generated by the track power supply unit, the first power rail signal among the one or more power rail signals is a self-activation signal of the processing device of the power system, such as signal Track_outVCC0.

[0039] The activation unit is further configured to generate an activation enable signal when the level of any activation signal of the self-activation signal of the processing device of the power system and the external activation signal inputted from the outside is a preset effective level. The self-activation signal of the processing device of the power system is such as the signal Track_outVCC0, the external activation signal inputted from the outside is such as the signal Activated1_1 to the signal Activated1_n, and the enable signal is such as the signal Activated2.

[0040] The scheme of the present invention designs an activation and power input scheme, in which two MOS tubes (such as two PMOS tubes) are used in a switch circuit for controlling the on and off of an external power supply to cooperate to realize power input, and reverse connection of the external power supply can be prevented without diode power loss; the output of a multi-rail power supply is used as the activation input to improve the response speed of the circuit self-locking, and at the same time reduce the damage to the subsequent circuit caused by the rapid abnormal change of the activation signal; an effective filtering protection circuit is designed for the external input, which can filter out clutter or disturbance and increase system stability.

[0041] In the related schemes, the track power supply scheme is generally locked and controlled through the pins of the main control chip; in the scheme of the present invention, the self-locking scheme after the track power supply is activated is to let the track power supply output self-lock its own input. The multi-rail power supply self-locking scheme is faster than the main control chip locking scheme, and can reduce the damage to the entire circuit system caused by frequent switching. In this way, by using the output of the multi-rail power supply as the activation input, the speed of power input activation self-locking can be increased, and the damage to the entire circuit system caused by frequent switching can be reduced.

[0042] In some embodiments, the filtering unit includes: a TVS tube module (such as TVS tube 11), and a combined filtering module. The filtering unit filters the external input DC power supply to obtain the first DC power supply, including:

[0043] The TVS tube module is used to perform bidirectional voltage stabilization on an externally input direct current power supply to obtain a first processed power supply;

[0044] The combined filtering module is used to perform combined filtering on the first processed power supply to obtain the first DC power supply.

[0045] In the scheme of the present invention, a filtering unit such as a power supply filtering protection circuit is provided, the main function of which is to filter an external DC power supply with interference (i.e., an external DC power supply) into a relatively pure DC power supply; in this way, the purity of the input current is improved by increasing the protection and filtering effect of the circuit.

[0046] Preferably, the combined filtering module includes at least two of a differential mode filtering module, a common mode filtering module, and a π-type filtering module. Wherein, when the combined filtering module includes a differential mode filtering module, a common mode filtering module, and a π-type filtering module, the combined filtering module performs combined filtering on the first processed power supply to obtain the first DC power supply, including:

[0047] The differential mode filtering module is used to perform differential mode filtering on the first processed power to obtain a second processed power.

[0048] The common-mode filtering module is used to perform common-mode filtering on the second processed power to obtain a third processed power.

[0049] The π-type filtering module is used to perform common-mode filtering on the third processed power supply to obtain the first DC power supply.

[0050] In the solution of the present invention, an effective filtering protection circuit is designed for the external input, which can filter out clutter or disturbance, effectively protect the circuit and generate a relatively pure power input, thereby increasing the stability of the system.

[0051] In some embodiments, the differential mode filtering module includes: a common mode inductor module (such as common mode inductor Lc11), an X capacitor module and an inductor module; the X capacitor module includes: a first X capacitor (such as capacitor C11) and / or a second X capacitor (such as capacitor C13); the X capacitor module also includes: a third X capacitor (such as capacitor C16); the inductor module includes: a first inductor (such as inductor L11) and a second inductor (such as inductor L12).

[0052] Wherein, in the case where the X capacitor module includes a first X capacitor and a second X capacitor, the first X capacitor, the common mode inductor module, the second X capacitor, and the third X capacitor are sequentially arranged at the output side of the TVS tube module, and the first inductor and the second inductor are arranged between the second X capacitor and the third X capacitor, so that the first X capacitor, the common mode inductor module, the first inductor, the second inductor and the third X capacitor form a first differential mode filter circuit, and / or the second X capacitor, the common mode inductor module, the first inductor, the second inductor and the third X capacitor form a second differential mode filter circuit;

[0053] In the solution of the present invention, the differential mode interference can be filtered out by the differential mode filtering module, thereby improving the purity of the first DC power supply output to the enabling unit.

[0054] In some embodiments, the common-mode filtering module includes: a first Y capacitor (such as capacitor C12), a second Y capacitor (such as capacitor C14); and / or, the common-mode filtering module also includes: a third Y capacitor (such as capacitor C15) and a fourth Y capacitor (such as capacitor C17).

[0055] Among them, the first Y capacitor and the second Y capacitor are arranged on the output side of the common mode inductor module in the differential mode filter module, so that the first Y capacitor, the second Y capacitor and the common mode inductor module form a first common mode filter circuit; the third Y capacitor and the fourth Y capacitor are arranged on the output side of the first inductor and the second inductor in the differential mode filter module, so that the third Y capacitor, the fourth Y capacitor and the first inductor and the second inductor form a second common mode filter circuit.

[0056] In the solution of the present invention, the common-mode filtering module can filter out common-mode interference, thereby further improving the purity of the first DC power supply output to the enabling unit.

[0057] In some embodiments, the π-type filter module includes: a first capacitor (such as capacitor C18), a second capacitor (such as capacitor C19), and a magnetic bead module (such as magnetic bead FB11); wherein the first capacitor, the magnetic bead module and the second capacitor are sequentially arranged on the output side of the common mode filter module to form a π-type filter circuit.

[0058] In the solution of the present invention, further filtering can be performed by the π-type filtering module, thereby further improving the purity of the first DC power supply output to the enabling unit.

[0059] Figure 3 Figure 1 is a schematic diagram of the structure of the power supply filter protection circuit. Figure 3As shown, the power supply filter protection circuit includes: TVS tube T11, capacitor C11, capacitor C12, capacitor C13, capacitor C14, capacitor C15, capacitor C16, capacitor C17, capacitor C18, capacitor C19, common mode inductor Lc11, inductor L11, inductor L12, and magnetic bead FB11. Among them, the +VCC_0 terminal is connected to the 4th pin of the common mode inductor Lc11, the -VCC_0 terminal is connected to the 1st pin of the common mode inductor Lc11, and the TVS tube T11 and the capacitor C11 are connected in parallel between the +VCC_0 terminal and the VCC_0 terminal. The 3rd pin of the common mode inductor Lc11 is connected to the VCC_1 terminal after passing through the inductor L11 and the magnetic bead FB11. The 2nd pin of the common mode inductor Lc11 is grounded GND after passing through the inductor L12. Capacitor C13 is connected between the third pin of common mode inductor Lc11 and the second pin of common mode inductor Lc11. The third pin of common mode inductor Lc11 is connected to the ground PE through capacitor C12, and the second pin of common mode inductor Lc11 is connected to the ground PE through capacitor C14. Capacitor C16 and capacitor C18 are connected in parallel and connected between the common end between inductor L11 and magnetic bead FB11, and the common end between inductor L12 and ground GND. The common end of inductor L11 and capacitor C16 is connected to the ground PE through capacitor C15; the common end of inductor L12 and capacitor C16 is connected to the ground PE through capacitor C17. Capacitor C19 is connected between VCC_1 terminal and ground GND. The common end of the inductor L11, the capacitor C15, the capacitor C16, and the capacitor C18 is the VCC_1A terminal, and the common end of the inductor L12, the capacitor C16, the capacitor C17, and the capacitor C18 is the GND_A terminal.

[0060] exist Figure 3 In the example shown, signals +VCC_0 and -VCC_0 are the positive and negative poles of the external input DC power supply, respectively. Capacitors C11, C13, and C16 are X capacitors, and capacitors C12, C14, C15, and C17 are Y capacitors. Signals VCC_1A and GND_A are the positive and negative poles of the DC power supply after filtering, and are output to the modules in the system that require +VCC level power supply. Signals VCC_1 and GND are the positive and negative poles of the DC power supply after filtering and isolation, and are output to Figure 4 The power enabling circuit shown avoids interference caused by the loops where signals VCC_1A and GND_A are located. In the solution of the present invention, the multi-rail power supply system is part of a PCB board-level system, and the entire circuit board (i.e., PCB board) also has functional modules, such as driving fans, relays, etc., which require +VCC level power supply, while communication chips and MCU chips require multi-rail power supply to be stepped down before they can be powered.

[0061] exist Figure 3In the example shown, the functions of the circuit components are as follows: TVS tube T11 prevents large voltage shocks. When the signals +VCC_0 and -VCC_0 suddenly generate large voltage interference, TVS tube T11 can be turned on in a very short time, thereby preventing the large voltage from damaging the subsequent circuit components; the combination of capacitor C11, common mode inductor Lc11, inductor L11, inductor L12 and C16, and the combination of capacitor C13, inductor L11, inductor L12 and capacitor C16 can filter out differential mode interference alone or together; the combination of common mode inductor Lc11, capacitor C12, capacitor C14, and the combination of inductor L11, inductor L12, capacitor C15, and capacitor C17 can filter out common mode interference alone or together. Capacitor C18, magnetic bead FB11, and capacitor C19 form a π-type filter part, isolating the signal VCC_1A and GND_A loop interference.

[0062] In the solution of the present invention, a combined filtering method is adopted for the input of the track power supply. The circuit is efficient and simple, and has the functions of preventing surge breakdown and suppressing common-mode and differential-mode interference, so that the purity of the input to the track power supply is better.

[0063] In some embodiments, the two MOS transistors in the enabling unit include: a first MOS transistor (such as MOS transistor U21) and a second MOS transistor (MOS transistor U22); the enabling unit also includes: a third MOS transistor (such as MOS transistor U23) and a conversion module; the connection terminal for activating the enable signal is connected to the gate of the third MOS transistor; the positive electrode of the connection terminal of the first DC power supply is connected to the drain of the first MOS transistor; the negative electrode of the connection terminal of the first DC power supply is connected to the source of the third MOS transistor; the drain of the third MOS transistor, after passing through the conversion module, can simultaneously control the gate of the first MOS transistor and the gate of the second MOS transistor; the source of the first MOS transistor is connected to the source of the second MOS transistor; the drain of the second MOS transistor, as the output end of the enabling unit, can output the second DC power supply.

[0064] Wherein, the enabling unit, under the action of the activation enable signal, controls the on and off of the two MOS tubes, so as to convert based on the first DC power supply when the two MOS tubes are turned on to obtain the second DC power supply, including: when the level of the activation enable signal is a preset effective level, the third MOS tube is turned on to control the first MOS tube and the second MOS tube to be turned on; wherein the preset effective level is such as a high level; when the first MOS tube and the second MOS tube are both turned on, the first DC power supply is converted by the conversion module to obtain the second DC power supply.

[0065] Wherein, when the level of the activation enable signal is a preset invalid level, the third MOS tube is turned off to control the first MOS tube and the second MOS tube to be turned off; when the first MOS tube and the second MOS tube are both turned off, the first MOS tube is used to prevent the first DC power supply from being reversely connected, and the second MOS tube is used to control the disconnection between the first DC power supply and the second DC power supply.

[0066] In the solution of the present invention, two MOS tubes (such as two PMOS tubes) are used to realize power input, replacing the solution of using a combination of relays and diodes or using a diode alone in the related solution. It also has the function of preventing reverse connection, and after the MOS is turned on, the diode fails to achieve the function of reducing circuit loss. In this way, by maintaining the anti-reverse function while increasing the input voltage drop of the power supply, the invalid power consumption is reduced. In the field of multi-rail power supply, it can prevent the external power supply from being reversed without diode power loss (generally, it is reverse-connected, but there is loss).

[0067] In some embodiments, the conversion module includes: a first voltage regulator diode module (such as voltage regulator diode ZD21), a second voltage regulator diode module (such as voltage regulator diode ZD22), and a transistor module (such as transistor Q21); the conversion module also includes: a voltage setting module (such as resistor R1, resistor R22, resistor R23, resistor R24), and / or a voltage stabilization and filtering module (such as capacitor C21, capacitor C22).

[0068] The cathode of the first voltage stabilizing diode module is connected to the source of the first MOS tube; the anode of the first voltage stabilizing diode module is connected to the gate of the first MOS tube. The cathode of the second voltage stabilizing diode module is connected to the base of the triode module; the collector of the triode module is connected to the source of the second MOS tube; the anode of the second voltage stabilizing diode module is respectively connected to the emitter of the triode module and the gate of the second MOS tube.

[0069] The voltage setting module is respectively configured in cooperation with the first voltage stabilizing diode module, the second voltage stabilizing diode module, and the transistor module to provide a voltage with a preset voltage division ratio and / or a bias voltage.

[0070] The voltage stabilization and filtering module is arranged at the drain of the second MOS tube, and is used for performing voltage stabilization and filtering before the second DC power supply is output.

[0071] Figure 4 Figure 1 is a schematic diagram of the structure of the power enabling circuit. Figure 4 The power enabling circuit shown mainly acts as a switch. Figure 5After the activation signal of the activation circuit shown is enabled, Figure 4 The power enable circuit shown is used to Figure 3 The input signal VCC_1 after filtering by the power supply filtering protection circuit shown is output as a signal VCC_2 through the MOS transistor U21 and the MOS transistor U22.

[0072] like Figure 4 As shown, the power enabling circuit includes: MOS tube U21, MOS tube U22, MOS tube U23, transistor Q21, voltage regulator diode ZD21, voltage regulator diode ZD22, resistor R21, resistor R22, resistor R23, resistor R24, capacitor C21, capacitor C22. Among them, the VCC_1 terminal is connected to the drain of the MOS tube U21; the source of the MOS tube U21 is respectively connected to the cathode of the voltage regulator diode ZD21, the first connection end of the resistor R1, the first connection end of the resistor R22, the collector of the transistor Q21, and the source of the MOS tube U22; the gate of the MOS tube U21 is respectively connected to the anode of the voltage regulator diode ZD21, the second connection end of the resistor R1, the anode of the voltage regulator diode ZD22, the emitter of the transistor Q21, and the gate of the MOS tube U22. The second connection end of the resistor R22 is respectively connected to the first connection end of the resistor R23, the cathode of the voltage stabilizing diode ZD22, and the base of the transistor Q21; the second connection end of the resistor R23 is respectively connected to the drain of the MOS tube U23 and the first connection end of the resistor R24. The second connection end of the resistor R24 ​​is connected to the emitter of the transistor Q21. The terminal Activated2 is connected to the gate of the MOS tube U23; the source of the MOS tube U23 is grounded GND. The drain of the MOS tube U22 is grounded GND after the capacitors C21 and C22 are connected in parallel. The drain of the MOS tube U22 is also connected to the terminal VCC_2.

[0073] exist Figure 4 In the example shown, the signal Activated2 is Figure 4 The activation circuit shown outputs an activation enable signal, signal VCC_2, which is output to the track power chip. Transistor Q21 is an NPN transistor.

[0074] exist Figure 4In the example shown, the functions of the various components of the circuit are as follows: in MOS tube U21, MOS tube U22, and MOS tube U23, when both MOS tube U21 and MOS tube U22 are not turned on, the signal VCC_1 can be turned on through the freewheeling diode inside the MOS tube U21, and at this time, the MOS tube U21 plays a role in preventing reverse connection, and when the MOS tube U22 is not turned on, the entire circuit is equivalent to a short circuit. When both MOS tube U21 and MOS tube U22 are turned on, the freewheeling diode inside the MOS tube U21 is short-circuited to prevent power consumption; when the MOS tube U22 is turned on, the level of the signal VCC_1 is transmitted to the signal VCC_2. MOS tube U23 controls whether to conduct MOS tube U21 and MOS tube U22. When the signal Activated2 is at a high level, MOS tube U23 is conducted, so that MOS tube U21 and MOS tube U22 are conducted; when the signal Activated2 is at a low level, MOS tube U23 is not conducted, so that MOS tube U21 and MOS tube U22 are not conducted. Zener diode ZD21 and Zener diode ZD22 both play a voltage stabilizing role, and their main role is to prevent the gate-source voltage drop Vgs of MOS tube U21 and MOS tube U22 from being too large and damaging the MOS tube; Zener diode ZD22 also plays a diode role, specifically, the current flows from pin 2 of ZD22 to pin 1. This situation only occurs after the resistor R22 is disconnected. In this case, the circuit can work. In this case, the Zener diode ZD22 acts as a diode as a redundant setting. Resistors R21, R22, R23, and R24 all provide a suitable voltage division ratio or bias voltage for the realization of circuit functions. Transistor Q21 plays a role of redundant protection. Specifically, when any one of resistor R23, resistor R24, and voltage stabilizing diode ZD22 is disconnected, the circuit can still work normally due to the existence of transistor Q21. Capacitors C21 and C22 are used for voltage stabilization and filtering.

[0075] In the solution of the present invention, two MOS tubes are used, specifically a circuit combination of two P-type MOS tubes, which solves the problem of additional power loss caused by using diodes to prevent reverse connection, broadens the working power supply range of the system, reduces power supply heating, and reduces power consumption.

[0076] In the solution of the present invention, the external power supply is first filtered through a filtering protection circuit to become a relatively pure power supply; then, through a switching circuit with two MOS tubes as the core, it can prevent the power supply from being reversed and reduce the input voltage drop loss; thereafter, after the track power supply generates a signal of the output power track, a self-activation signal is immediately generated to reduce the loss caused by frequent switching due to unexpected situations such as poor activation contact.

[0077] In some embodiments, the activation unit includes: a self-activation diode module (such as diode D31), an external activation diode module (such as diode D32, at least one diode from diode D33 to diode D3n), a third voltage-regulating diode module (such as voltage-regulating diode ZD31), a voltage-dividing resistor module (such as resistor R31 and resistor R32), and an output filtering module (such as capacitor C31); the voltage-dividing resistor module includes: a first resistor and a second resistor, the first resistor is such as resistor R31, and the second resistor is such as resistor R32.

[0078] Among them, the connection terminal of the external activation signal is connected to the anode of the external activation diode module; the cathode of the external activation diode module is connected to the cathode of the third voltage zener diode module after passing through the first resistor; the number of the external activation diode modules is the same as the number of external activation signals. The connection terminal of the self-activation signal of the processing device of the power system is connected to the anode of the self-activation diode module; the cathode of the self-activation diode module is connected to the cathode of the third voltage zener diode module; the anode of the third voltage zener diode module is grounded; the second resistor and the output filter module are connected in parallel to the two ends of the third voltage zener diode module; the common end of the self-activation diode module, the third voltage zener diode module, the second resistor, and the cathode of the output filter module serves as the output end of the activation unit, which is used to output the activation enable signal.

[0079] Figure 5 Figure 1 is a schematic diagram of the activation circuit. Figure 5 The activation circuit shown is used to output a signal Actived2, and the level of the signal Actived2 is high or low to control the Figure 4 The MOS transistor U23 in the power enabling circuit shown in the figure is turned on or off. The MOS transistor U23 can be an NMOS transistor.

[0080] like Figure 5As shown, the activation circuit includes: diode D31, diode D32, diode D33 to diode D3n, n is a positive integer; voltage regulator diode ZD31, resistor R31, resistor R32, capacitor C31. Among them, terminal Track_outVCC0 is connected to the anode of diode D31, terminal Activated1_1 is connected to the anode of diode D32, terminal Activated1_2 is connected to the anode of diode D33, and so on, terminal Activated1_n is connected to the anode of diode D3n. The cathode of diode D31 is connected to the cathode of voltage regulator diode ZD31; the cathode of diode D32, the cathode of diode D33 to the cathode of diode D3n are all connected to the cathode of voltage regulator diode ZD31 after passing through resistor R31. The resistor R32 and the capacitor C31 are located at the output side of the Zener diode ZD31 and are respectively connected in parallel with the Zener diode ZD31 between the cathode of the diode D31 and the ground GND. The anode of the Zener diode ZD31 is grounded GND. The cathode of the Zener diode ZD31, the resistor R32, and the common end of the capacitor C31 are connected to the terminal Actived2.

[0081] exist Figure 5 In the example shown, the signal Track_outVCC0 is the output of a certain track power supply. Figure 5 The self-activation signal of the activation circuit shown. In the scheme of the present invention, the output power rail of the track power output chip is used as the self-activation input, so that the self-activation response speed is fast and the system stability is increased. Signals Activated1_1 to Activated1_n are activation signals of external inputs, and the relationship between the self-activation signal and the external input activation signal is a parallel relationship, that is, an "or" relationship; wherein, the value of n in signals Activated1_1 to Activated1_n depends on the system design, how many external input signals there are, such as button activation start, key activation start, timing module activation start, remote module activation start, etc.; in addition, the value of n in signals Activated1_1 to Activated1_n also depends on the capability of the track power IC (i.e., the track power chip), specifically, how many power rail signals the track power chip can output. Signal Activated2 is as follows Figure 5 The activation circuit shown outputs an activation enable signal.

[0082] exist Figure 5In the example shown, the functions of the circuit components are as follows: diodes D31 to D3n are used to prevent reverse connection of the activation circuit. Resistors R31 and R32 are used to provide a suitable voltage division ratio to convert any activation signal from the activation signal Track_outVCC0 and the signal Activated1_1 to the signal Activated1_n into a signal Activated2 suitable for level driving the MOS tube U23. The voltage regulator diode ZD31 is used to prevent the Vgs voltage of the MOS tube U23 from being too large to damage the MOS tube, and the capacitor C31 is used for voltage stabilization and filtering. When any one of the external input signals Track_outVCC0 and the signal Activated1_1 to the signal Activated1_n is at a high level, the output signal Activated2 is at a high level; only when all the activation signals from the signal Track_outVCC0 and the signal Activated1_1 to the signal Activated1_n are at a low level, the output signal Activated2 is at a low level.

[0083] In the solution of the present invention, the output of a multi-rail power supply is used as the activation input, replacing the output of a main control chip (such as MUC) used in related solutions as the activation input, thereby improving the response speed of the circuit self-locking and reducing the damage to the subsequent circuit caused by rapid and abnormal changes in the activation signal.

[0084] In some embodiments, in the solution of the present invention, the processing device of the power supply system further includes: a signal processing module, a single chip computer system, and a track power supply enabling module (such as an IC enabling signal processing module).

[0085] Wherein, the signal processing module is used to process the external activation signal input externally and the feedback power rail signal to obtain a processed signal when the track power supply unit has generated the power rail signal; and output the processed signal to the single-chip computer system.

[0086] The single-chip microcomputer system is used to detect the external activation signal input externally and the power rail signal fed back based on the processing signal; wherein, when the single-chip microcomputer system detects that the levels of the external activation signal input externally and the power rail signal fed back are both preset invalid levels, a delay is made for a period of time to perform data preservation work before shutdown, and a track power enable signal is generated until the preset power-off condition is met.

[0087] The track power supply enabling module is used to generate a shutdown control signal under the action of the track power supply enabling signal.

[0088] The track power supply unit is used to stop working under the control of the shutdown control signal, so that the level of the self-activation signal of the processing device of the power system is a preset invalid level, and then the enabling unit disconnects the connection between the first DC power supply and the second DC power supply to stop supplying power to the external power-consuming unit, thereby completing the power-off of the processing device of the power system. Wherein, making the enabling unit disconnect the connection between the first DC power supply and the second DC power supply specifically means: disconnecting the third MOS tube, and then disconnecting the first MOS tube and the second MOS tube.

[0089] like Figure 2 As shown, the activation and input system of the multi-rail power supply circuit includes: a processing circuit module. The processing circuit module includes: a power supply filter protection circuit, a power supply enable circuit, an activation circuit, and a single-chip microcomputer sampling and power supply track generation circuit. In the scheme of the present invention, the external DC power supply is first filtered by the power supply filter protection circuit, and then the power supply enable circuit (such as a switch circuit with two MOS tubes as the core) is used to prevent the power supply from being reversed while reducing the input voltage drop loss; thereafter, through the activation circuit, and the single-chip microcomputer sampling and power supply track generation circuit, after the track power supply generates a signal of the output power supply track, the output of the multi-rail power supply is used as the activation input, and a self-activation signal is immediately generated, thereby improving the response speed of the circuit self-locking and reducing the damage to the subsequent circuit caused by the rapid abnormal change of the activation signal.

[0090] Figure 6 The schematic diagram of the circuit for sampling and generating power rails for the microcontroller is shown in Figure 2. Figure 6 As shown, the single-chip microcomputer sampling and power rail generation circuit includes: a signal processing module, a single-chip microcomputer system, an IC enable signal processing module, and a rail power IC system connected in sequence.

[0091] Among them, the signal processing module is mainly used for the different voltages of the activation signals and the signals of the power rails of each output, and after the internal circuits, after the voltage division, filtering, overvoltage protection and other processing, it is input to the AD port or IO port of the single-chip system; for example, the signal processing module can use a voltage conversion circuit. In other words, the signal processing module: mainly plays the role of voltage division and filtering, converting the larger voltage of the external input into a smaller voltage and then giving it to the single-chip chip in the single-chip system for processing.

[0092] The single-chip microcomputer system is mainly used to detect activation signals and generated power rail signals. Among them, the single-chip microcomputer system: that is, the smallest single-chip microcomputer system, is the core of the entire circuit board function, and is used to detect input signals, process according to program logic, and control output signals. Among them, by detecting the activation signal, it can be clear that a certain activation signal has activated the circuit, for example, whether the activation signal comes from a key or an external charging signal, or whether the activation signal comes from an RTC timing activation signal after power failure, so as to perform further logic processing; by detecting the generated power rail signal, it can be detected whether the generated power rail signal is abnormal and whether it can generate a preset level of voltage to ensure the accuracy of the generated power rail signal itself.

[0093] IC enable signal processing module: converts the control signal level 0-3.3V or 0-5.0V output by the single-chip system into the enable and disable levels acceptable to the track power IC system, and the track power IC system is generally enabled by default. Specifically, the IC enable signal processing module is mainly used to control the start or stop of the track power IC system through the single-chip system. It is enabled by default here, that is, when there is an external activation signal and power input, and the single-chip system is not started, the IC enable signal processing module outputs a start signal to the track power IC system, so that the track power IC system can work normally; the input of the IC enable signal processing module is the high (or low) level of the IO port of the single-chip system, and the output of the IC enable signal processing module is an enable (or disable) signal; the main core of the IC enable signal processing module is the collector of the transistor (or the source of the NMOS tube) with a pull-up resistor or an equivalent circuit of the two circuits, and the collector of the transistor (or the source of the NMOS tube) is connected to the enable pin of the track power IC system. Among them, the IC enables the signal processing module and uses the signal processing of transistors and MOS tubes at the same time.

[0094] Track power IC system: It is a module composed of track power chip as the core and peripheral components such as capacitors and resistors to achieve normal operation. It is generally a reference circuit provided by the track power chip manufacturer and does not require user design. Specifically, the track power IC system is used to generate signals for each power track, such as signal Track_outVCC0, signal Track_outVCC1, signal Track_outVCC2 to signal Track_outVCCm.

[0095] See also Figures 2 to 6 The example shown is the overall start and stop logic of the multi-rail power supply, including:

[0096] Step 1. First, see Figure 2In the example shown, the multi-rail power supply circuit is activated and the external input power (i.e., external DC power) +VCC_0 and -VCC_0 of the input system are valid. Then the external DC power +VCC_0 passes through Figure 3 The power supply filter protection circuit shown in the figure performs combined filtering to obtain a relatively pure DC power supply VCC_1. Figure 5 In the example shown, when there is a valid high-level input activation signal, for example, any one or more of the signals Activated1_1 to Activated1_n are high-level signals.

[0097] See also Figure 4 In the example shown, if the activation signal is valid (i.e., any one or more of the signals Activated1_1 to Activated1_n are high-level signals), the signal Activated2 can be made high-level, thereby turning on the MOS tube U23. After the MOS tube U23 is turned on, the MOS tube U21 and the MOS tube U22 are turned on, wherein the freewheeling diode in the MOS tube U21 is protected against reverse connection before the MOS tube U21 is turned on, and the voltage drop of the freewheeling diode in the MOS tube U21 is eliminated after the MOS tube U21 is turned on, thereby making VCC_2≈VCC_1.

[0098] See also Figure 6 In the example shown, after the signal VCC_2 is input into the track power IC system, and because the track power IC system is enabled by default, the track power IC system can generate various power rails Track_outVCC0 to Track_outVCCm for other system modules, and the low-voltage power supply is completed. Among them, Track_outVCC0 is used as an internal self-activation input, which can self-activate faster than the self-activation signal from the microcontroller system. The track power system is only the power supply part of a complete PCB board-level system. A fully functional PCB board-level system includes a track power system, as well as modules such as communication, level conversion, sampling, high and low side drivers, and each module requires power. The source of power for each module is the track power signal Track_outVCC0 to Track_outVCCm generated by the track power system.

[0099] Step 2, the external activation signals Activated1_1 to Activated1_n and the power rails Track_outVCC0 to Track_outVCCm are input to the signal processing module and output to the single chip microcomputer system, so that the single chip microcomputer system can monitor the status of each activation signal and power rail.

[0100] When the single-chip microcomputer system detects that the external activation signals Activated1_1 to Activated1_n are all invalid, a delay can be made for a period of time according to the program logic, and the single-chip microcomputer system performs preparations before shutdown, such as saving data before power failure; when the internal low-voltage power-off conditions of the program are met, the track power IC system stops working by controlling the IC enable signal processing module, and then Track_outVCC0 is invalid, thereby disconnecting the MOS tube U23, and then the MOS tube U21 and the MOS tube U22 are disconnected, and the low-voltage power-off is completed.

[0101] In the scheme of the present invention, the filtering scheme is a hybrid filtering scheme, the self-activation scheme is that the activation signal comes from the track power supply, and the enabling scheme of the input power supply is to use two PMOS tubes to realize the anti-reverse connection function. The circuit protection is perfect, the self-activation speed is fast, and the circuit damage caused by some rapid power on and off can be avoided. Among them, the external power supply is first filtered by an efficient and concise combined filtering protection circuit to become a relatively pure power supply, and then through a switching circuit with two MOS tubes as the core, it can prevent the power supply from being reversed while reducing the input voltage drop loss. After the track power supply generates a signal of the output power supply track, it immediately generates a self-activation signal to reduce the loss caused by frequent switching due to unexpected situations such as poor activation contact.

[0102] According to the technical solution of the present invention, a power filter protection circuit, an activation circuit, a power enable circuit, and a single-chip microcomputer sampling and power track generation circuit are provided, wherein the single-chip microcomputer sampling and power track generation circuit includes a signal processing module, a single-chip microcomputer system, an IC enable signal processing module, and a track power IC system; wherein the power filter protection circuit is used to perform combined filtering based on an external DC power supply and output a first DC power supply (such as a signal VCC_1); an activation circuit is provided to generate an enable signal (such as a signal Activated2) under the action of a self-activation signal (such as a signal Track_outVCC0) or an externally input activation signal (such as a signal Activated1_1 to a signal Activated1_n); the power enable circuit is used to process based on the first DC power supply (such as a signal VCC_1) under the action of an enable signal (such as a signal Activated2) to obtain a second DC power supply (such as a signal VCC_2); the track power IC system is used to generate each power rail based on the second DC power supply (such as a signal VCC_2) under the action of a preset default enable signal. The signal of the track (such as Track_outVCC0 to Track_outVCCm) is used to complete the low-voltage power supply and power-up of the multi-rail power supply circuit; the signal processing module performs voltage conversion based on the activation signal of the external input (such as the signal Activated1_1 to the signal Activated1_n) and the signal of each power track (such as Track_outVCC0 to Track_outVCCm), and the single-chip computer system monitors the status of each activation signal and the signal of the power track: when the activation signal of the external input (such as the signal Activated1_1 to the signal Activated1_n) is invalid, after a delay period of time, the track power IC system is stopped by controlling the IC enable signal processing module, and then Track_outVCC0 is invalid, so that the power enable circuit is disconnected, and the low-voltage power-down of the multi-rail power supply is completed; thus, by setting two MOS tubes in the power enable circuit to cooperate with the control of the external power supply to be turned on and off, the volume is small, which is conducive to the optimization of the overall layout of the multi-rail power supply, and can prevent the external power supply from being reversed without diode power loss.

[0103] According to an embodiment of the present invention, a power supply system corresponding to the processing device of the power supply system is also provided. The power supply system may include: the processing device of the power supply system described above.

[0104] Since the processing and functions implemented by the power supply system of this embodiment basically correspond to the embodiments, principles and examples of the device, for the details not described in this embodiment, please refer to the relevant descriptions in the aforementioned embodiments and will not be repeated here.

[0105] According to an embodiment of the present invention, a control method for a power supply system corresponding to the power supply system is also provided, such as Figure 7 The flowchart of an embodiment of the method of the present invention is shown in FIG. The control method of the power supply system may include: steps S110 to S170.

[0106] At step S110, the activation unit generates an activation enable signal when the level of the external activation signal inputted from the outside is a preset effective level, wherein the number of the external activation signals is more than one. The external activation signals inputted from the outside are such as signals Activated1_1 to Activated1_n, and the enable signal is such as signal Activated2.

[0107] At step S120, the enabling unit controls the on and off of the two MOS transistors under the action of the activation enable signal, so as to convert the first DC power supply to obtain a second DC power supply when the two MOS transistors are turned on. The second DC power supply is such as signals VCC_2 and GND.

[0108] At step S130, through the track power supply unit, under the action of a preset default enable signal, based on the second DC power supply, a power rail signal (such as m power rail signals, m is a positive integer) is generated to power the external power-consuming unit, thereby completing the power-on of the processing device of the power supply system; wherein, the number of the power rail signals is more than one.

[0109] At step S140 , when the rail power supply unit has generated the power rail signal, an external activation signal input from outside and the fed-back power rail signal are acquired.

[0110] At step S150, the external activation signal of the external input and the power rail signal of the feedback are detected. When it is detected that the levels of the external activation signal of the external input and the power rail signal of the feedback are both preset invalid levels, a delay is made for a period of time to perform data preservation work before shutdown, and a track power enable signal is generated until the preset power-off condition is met.

[0111] In step S160, a shutdown control signal is generated under the action of the track power enable signal.

[0112] At step S170, the operation is stopped under the control of the shutdown control signal, so that the level of the self-activation signal of the processing device of the power system is a preset invalid level, and then the enabling unit disconnects the connection between the first DC power supply and the second DC power supply to stop supplying power to the external power-consuming unit, and the power-off of the processing device of the power system is completed. Wherein, the enabling unit disconnects the connection between the first DC power supply and the second DC power supply, specifically: disconnects the third MOS transistor, and then disconnects the first MOS transistor and the second MOS transistor.

[0113] In the solution of the present invention, the overall start and stop logic of the multi-rail power supply includes: first, see Figure 2 In the example shown, the multi-rail power supply circuit is activated and the external input power (i.e., external DC power) +VCC_0 and -VCC_0 of the input system are valid. Then the external DC power +VCC_0 passes through Figure 3 The power supply filter protection circuit shown in the figure performs combined filtering to obtain a relatively pure DC power supply VCC_1; and see Figure 5 In the example shown, when there is a valid high-level input activation signal, for example, any one or more of the signals Activated1_1 to Activated1_n are high-level signals. Figure 4 In the example shown, if the activation signal is valid (i.e., any one or more of the signals Activated1_1 to Activated1_n are high level signals), the signal Activated2 can be high level, thereby turning on the MOS transistor U23. After the MOS transistor U23 is turned on, the MOS transistors U21 and U22 are turned on. Before the MOS transistor U21 is turned on, the freewheeling diode in the MOS transistor U21 is reverse connected. After the MOS transistor U21 is turned on, the voltage drop of the freewheeling diode in the MOS transistor U21 is removed, thereby making VCC_2≈VCC_1. See Figure 6 In the example shown, after the signal VCC_2 is input into the track power IC system, and since the track power IC system is enabled by default, the track power IC system can generate various power rails Track_outVCC0 to Track_outVCCm for other system modules, and the low-voltage power supply is completed. Among them, Track_outVCC0 is used as an internal self-activation input, which can be self-activated faster than the self-activation signal from the microcontroller system.

[0114] Afterwards, the external activation signals Activated1_1 to Activated1_n and the power rails Track_outVCC0 to Track_outVCCm are input to the signal processing module and output to the single-chip microcomputer system, so that the single-chip microcomputer system can monitor the status of each activation signal and the power rail. When the single-chip microcomputer system detects that the external activation signals Activated1_1 to Activated1_n are all invalid, it can be delayed for a period of time according to the program logic, and the single-chip microcomputer system performs preparations before shutdown, such as saving data before power failure; when the internal low-voltage power-off conditions of the program are met, the track power IC system stops working by controlling the IC enable signal processing module, and then Track_outVCC0 is invalid, so that the MOS tube U23 is disconnected, and then the MOS tube U21 and MOS tube U22 are disconnected, and the low-voltage power-off is completed.

[0115] In the scheme of the present invention, the filtering scheme is a hybrid filtering scheme, the self-activation scheme is that the activation signal comes from the track power supply, and the enabling scheme of the input power supply is to use two PMOS tubes to realize the anti-reverse connection function. The circuit protection is perfect, the self-activation speed is fast, and the circuit damage caused by some rapid power on and off can be avoided. Among them, the external power supply is first filtered by an efficient and concise combined filtering protection circuit to become a relatively pure power supply, and then through a switching circuit with two MOS tubes as the core, it can prevent the power supply from being reversed while reducing the input voltage drop loss. After the track power supply generates a signal of the output power supply track, it immediately generates a self-activation signal to reduce the loss caused by frequent switching due to unexpected situations such as poor activation contact.

[0116] Since the processing and functions implemented by the method of this embodiment basically correspond to the embodiments, principles and examples of the aforementioned power supply system, for the details not fully described in this embodiment, please refer to the relevant descriptions in the aforementioned embodiments and will not be repeated here.

[0117] In summary, it is easy for those skilled in the art to understand that, under the premise of no conflict, the above-mentioned advantageous methods can be freely combined and superimposed.

[0118] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention shall be included in the scope of the claims of the present invention.

Claims

1. A processing device for a power supply system, characterized in that: include: A filtering unit, an activation unit, an enabling unit, and a track power supply unit; wherein, The filtering unit is used to filter the external input DC power supply to obtain a first DC power supply; The activation unit is used to generate an activation enable signal when the level of the external activation signal input from the outside is a preset effective level; wherein the number of the external activation signal is more than one; The enabling unit comprises: two MOS tubes; the enabling unit is used to control the on and off of the two MOS tubes under the action of the activation enabling signal, so as to convert the first DC power supply to obtain the second DC power supply when the two MOS tubes are turned on; The track power supply unit is used to generate a power track signal based on the second DC power supply under the action of a preset default enable signal, so as to power an external power-consuming unit, thereby completing the power-on of the processing device of the power supply system; wherein the number of the power track signals is more than one.

2. The processing device of the power supply system according to claim 1, characterized in that: For one or more power rail signals generated by the rail power supply unit, a first power rail signal of the one or more power rail signals is a self-activation signal of a processing device of the power supply system; The activation unit is further configured to generate an activation enable signal when the level of any one of the self-activation signal of the processing device of the power supply system and the external activation signal input externally is a preset effective level.

3. The processing device of the power supply system according to claim 1 or 2, characterized in that: The filtering unit includes: a TVS tube module and a combined filtering module; wherein, The filtering unit filters the external input DC power supply to obtain the first DC power supply, including: The TVS tube module is used to perform bidirectional voltage stabilization on an externally input direct current power supply to obtain a first processed power supply; The combined filtering module is used to perform combined filtering on the first processed power supply to obtain the first DC power supply; The combined filter module includes at least two of a differential mode filter module, a common mode filter module, and a π-type filter module; In the case where the combined filtering module includes a differential mode filtering module, a common mode filtering module, and a π-type filtering module, the combined filtering module performs combined filtering on the first processed power supply to obtain the first DC power supply, including: The differential mode filtering module is used to perform differential mode filtering on the first processed power to obtain a second processed power; The common mode filtering module is used to perform common mode filtering on the second processed power to obtain a third processed power; The π-type filtering module is used to perform common-mode filtering on the third processed power supply to obtain the first DC power supply.

4. The processing device of the power supply system according to claim 3, characterized in that: in, The differential mode filter module includes: a common mode inductor module, an X capacitor module and an inductor module; the X capacitor module includes: a first X capacitor and / or a second X capacitor; the X capacitor module also includes: a third X capacitor; the inductor module includes: a first inductor and a second inductor; wherein, The first X capacitor, the common mode inductor module, the second X capacitor, and the third X capacitor are sequentially arranged at the output side of the TVS tube module, and the first inductor and the second inductor are arranged between the second X capacitor and the third X capacitor, so that the first X capacitor, the common mode inductor module, the first inductor, the second inductor and the third X capacitor form a first differential mode filter circuit, and / or the second X capacitor, the common mode inductor module, the first inductor, the second inductor and the third X capacitor form a second differential mode filter circuit; and / or, The common mode filtering module includes: a first Y capacitor and a second Y capacitor; and / or, the common mode filtering module further includes: a third Y capacitor and a fourth Y capacitor; wherein, The first Y capacitor and the second Y capacitor are arranged at the output side of the common mode inductor module in the differential mode filter module, so that the first Y capacitor, the second Y capacitor and the common mode inductor module form a first common mode filter circuit; the third Y capacitor and the fourth Y capacitor are arranged at the output side of the first inductor and the second inductor in the differential mode filter module, so that the third Y capacitor, the fourth Y capacitor and the first inductor and the second inductor form a second common mode filter circuit; and / or, The π-type filter module includes: a first capacitor, a second capacitor, and a magnetic bead module; wherein, The first capacitor, the magnetic bead module and the second capacitor are sequentially arranged at the output side of the common mode filter module to form a π-type filter circuit.

5. The processing device of the power supply system according to any one of claims 1 to 4, characterized in that: The two MOS tubes in the enabling unit include: a first MOS tube and a second MOS tube; the enabling unit further includes: a third MOS tube and a conversion module; the connection terminal for activating the enabling signal is connected to the gate of the third MOS tube; the positive electrode of the connection terminal of the first DC power supply is connected to the drain of the first MOS tube; the negative electrode of the connection terminal of the first DC power supply is connected to the source of the third MOS tube; the drain of the third MOS tube can simultaneously control the gate of the first MOS tube and the gate of the second MOS tube after passing through the conversion module; the source of the first MOS tube is connected to the source of the second MOS tube; the drain of the second MOS tube, as the output end of the enabling unit, can output the second DC power; wherein, The enabling unit, under the action of the activation enabling signal, controls the on and off of the two MOS transistors, so as to convert based on the first DC power supply when the two MOS transistors are turned on to obtain a second DC power supply, including: When the level of the activation enable signal is a preset effective level, the third MOS transistor is turned on to control both the first MOS transistor and the second MOS transistor to be turned on; When both the first MOS transistor and the second MOS transistor are turned on, the first DC power supply is converted by the conversion module to obtain the second DC power supply; Wherein, when the level of the activation enable signal is a preset invalid level, the third MOS tube is turned off to control the first MOS tube and the second MOS tube to be turned off; when the first MOS tube and the second MOS tube are both turned off, the first MOS tube is used to prevent the first DC power supply from being reversely connected, and the second MOS tube is used to control the disconnection between the first DC power supply and the second DC power supply.

6. The processing device of the power supply system according to claim 5, characterized in that: The conversion module includes: a first voltage stabilizing diode module, a second voltage stabilizing diode module, and a triode module; the conversion module also includes: a voltage setting module, and / or a voltage stabilizing and filtering module; wherein, The cathode of the first voltage stabilizing diode module is connected to the source of the first MOS tube; the anode of the first voltage stabilizing diode module is connected to the gate of the first MOS tube; The cathode of the second voltage stabilizing diode module is connected to the base of the triode module; the collector of the triode module is connected to the source of the second MOS tube; the anode of the second voltage stabilizing diode module is respectively connected to the emitter of the triode module and the gate of the second MOS tube; The voltage setting module is respectively configured in cooperation with the first voltage zener diode module, the second voltage zener diode module, and the transistor module, and is used to provide a voltage with a preset voltage division ratio and / or a bias voltage; The voltage stabilization and filtering module is arranged at the drain of the second MOS tube, and is used for performing voltage stabilization and filtering before the second DC power supply is output.

7. The processing device of the power supply system according to any one of claims 1 to 6, characterized in that: The activation unit includes: a self-activation diode module, an external activation diode module, a third voltage-stabilizing diode module, a voltage-dividing resistor module, and an output filtering module; the voltage-dividing resistor module includes: a first resistor and a second resistor; wherein, The connection terminal of the external activation signal is connected to the anode of the external activation diode module; the cathode of the external activation diode module is connected to the cathode of the third voltage regulator diode module after passing through the first resistor; the number of the external activation diode modules is the same as the number of external activation signals; The connection terminal of the self-activation signal of the processing device of the power system is connected to the anode of the self-activation diode module; the cathode of the self-activation diode module is connected to the cathode of the third voltage zener diode module; the anode of the third voltage zener diode module is grounded; The second resistor and the output filter module are connected in parallel at both ends of the third voltage-stabilizing diode module; the common end of the cathode of the self-activating diode module, the third voltage-stabilizing diode module, the second resistor, and the output filter module serves as the output end of the activation unit, and is used to output the activation enable signal.

8. The processing device of the power supply system according to any one of claims 1 to 7, characterized in that: Also includes: Signal processing module, single chip microcomputer system, and track power enabling module; among them, The signal processing module is used for processing the external activation signal input from the outside and the power rail signal fed back to obtain a processing signal when the rail power supply unit has generated the power rail signal; and outputting the processing signal to the single chip computer system; The single-chip microcomputer system is used to detect the external activation signal input externally and the power rail signal fed back based on the processing signal; wherein, when the single-chip microcomputer system detects that the levels of the external activation signal input externally and the power rail signal fed back are both preset invalid levels, a delay is made for a period of time to perform data preservation work before shutdown, and a track power enable signal is generated when a preset power-off condition is met; The track power supply enabling module is used to generate a shutdown control signal under the action of the track power supply enabling signal; The track power supply unit is used to stop working under the control of the shutdown control signal, so that the level of the self-activation signal of the processing device of the power supply system is a preset invalid level, and then the enabling unit disconnects the connection between the first DC power supply and the second DC power supply to stop supplying power to the external power unit, thereby completing the power-off of the processing device of the power supply system.

9. A power supply system, characterized in that: include: The processing device of the power supply system according to any one of claims 1 to 8.

10. A control method for a power supply system as claimed in claim 9, characterized in that: include: By means of the activation unit, when the level of the external activation signal inputted from the outside is a preset effective level, an activation enable signal is generated; wherein the number of the external activation signals is more than one; By means of the enabling unit, under the action of the activation enabling signal, the on and off of the two MOS transistors are controlled, so that when the two MOS transistors are turned on, conversion is performed based on the first DC power supply to obtain a second DC power supply; By means of the track power supply unit, under the effect of a preset default enable signal, based on the second DC power supply, a power track signal is generated to supply power to an external power-consuming unit, thereby completing the power-on of the processing device of the power supply system; wherein the number of the power track signal is more than one; When the track power supply unit has generated the power track signal, acquiring an external activation signal input from outside and the power track signal fed back; Detecting an external activation signal input from outside and the power rail signal fed back, and when it is detected that the levels of the external activation signal input from outside and the power rail signal fed back are both preset invalid levels, delaying for a period of time to save data before shutdown, until a preset power-off condition is met, generating a rail power enable signal; Under the action of the track power supply enable signal, a shutdown control signal is generated; The operation is stopped under the control of the shutdown control signal, so that the level of the self-activation signal of the processing device of the power supply system is a preset invalid level, and then the enabling unit disconnects the connection between the first DC power supply and the second DC power supply to stop supplying power to the external power-consuming unit, thereby completing the power-off of the processing device of the power supply system.

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