Power module and design method thereof
By optimizing the packaging design of the non-semiconductor chip area in the power module, using technical means such as metal-covered ceramic substrate, micro-nano-metal layer and needle-wing-shaped heat dissipation column, the thermal resistance and overheating in the packaging design of medium and high-voltage high-power modules is solved. Failure problem achieves more efficient flow and heat dissipation performance.
Patent Information
- Application Number
- CN202411502153.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-10-25
- Publication Date
- 2025-02-18
AI Technical Summary
The existing technology faces problems such as excessive semiconductor chip area, thermal resistance increase, overheating failure in packaging design of medium and high voltage high power modules, and there are bottlenecks in packaging technology.
By optimizing the packaging design of the non-semiconductor chip area, technical means such as metal-covered ceramic substrate, micro-nano-metal layer and needle-wing-shaped heat dissipation column are used to improve the flow and heat dissipation capabilities of the power module.
It shortens the design cycle and reduces costs, improves the current output capability and heat dissipation performance of the power module, and solves the problem of overheating failure.
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Figure CN119486240A_ABST
Abstract
Description
Technical Field
[0001] The present invention belongs to the technical field of power modules, and in particular relates to a power module and a design method thereof. Background Art
[0002] In the actual application of MVD and SVG, in order to meet the high current supply mode of the whole machine, multiple power modules are usually selected in parallel. Therefore, in order to solve the problem of current sharing in parallel with power modules and reduce the cost of use, high-power and small number of modules are used as much as possible in actual applications to reduce the parallel error between power modules and reduce the probability of current sharing failure.
[0003] However, the prior art has the following defects and deficiencies:
[0004] 1) In the packaging design of medium- and high-voltage high-power modules, the semiconductor chip area in the power module accounts for about 60% of the effective design area of the module. The remaining 40% of the effective area also needs to consider the prevention of short circuits between the gate, collector, and emitter, the design size required for current output on the copper-clad ceramic substrate, the spacing of ceramic etching grooves, etc. The above issues pose huge challenges to the design of medium- and high-voltage high-power modules;
[0005] 2) Some technologies have begun to optimize the chip area, reducing the ratio of semiconductor chip area to the effective design area of the power module to about 35%. While increasing the current density, it is necessary to consider the design and processing accuracy of raw materials such as substrates and epitaxy, resulting in a semiconductor chip development cycle of more than one to two years. At the same time, even if enough margin is left for the packaging design of the power module, the chip thermal resistance is nearly doubled when the semiconductor chip area is halved. Problems such as overheating and failure of the power module caused by thermal stress concentration and the bottleneck of packaging technology are gradually exposed. Summary of the invention
[0006] The purpose of the present invention is to solve the defects and shortcomings in the prior art and to provide a power module and a design method thereof, which can improve the current flow and heat dissipation capacity of the power module by optimizing the packaging design of the non-semiconductor chip area, thereby improving the output power of the device.
[0007] To achieve the above object, the technical solution adopted by the present invention is: a power module, comprising:
[0008] A metal-clad ceramic substrate, wherein an upper bridge arm and a lower bridge arm are arranged on the upper surface of the metal-clad ceramic substrate;
[0009] A micro-nano metal layer, wherein the micro-nano metal layer is disposed in a flow bottleneck region of the metal-coated ceramic substrate;
[0010] A heat dissipation substrate, wherein the heat dissipation substrate is connected to the lower surface of the metal-clad ceramic substrate, and a plurality of pin-fin-shaped heat dissipation columns are arranged on a side of the heat dissipation substrate away from the metal-clad ceramic substrate, wherein the plurality of pin-fin-shaped heat dissipation columns include circular heat dissipation pin columns and heterosexual thread heat dissipation pin columns;
[0011] The external shell is sealed and connected to the heat dissipation substrate, and forms a closed loop with the metal-clad ceramic substrate through an interconnecting conductor.
[0012] Preferably, the metal-clad ceramic substrate comprises an insulating ceramic layer, and a front metal layer and a back metal layer respectively disposed on the upper surface and the lower surface of the insulating ceramic layer.
[0013] Preferably, the upper bridge arm includes an upper bridge semiconductor power chip and an upper bridge anti-parallel diode chip, and the lower bridge arm includes a lower bridge semiconductor power chip and a lower bridge anti-parallel diode chip.
[0014] Preferably, the micro-nano metal layer comprises micro-nano metal solder and a metal sheet which are sequentially arranged on the metal-clad ceramic substrate.
[0015] Preferably, the heat dissipation substrate includes a metal base plate, which has a welding surface and a heat dissipation surface that are relatively arranged, the welding surface is used for welding with the metal-clad ceramic substrate, and the heat dissipation surface is used to connect one end of a plurality of pin-fin-shaped heat dissipation columns, and the other ends of the plurality of pin-fin-shaped heat dissipation columns extend in a direction away from the heat dissipation surface.
[0016] Preferably, the circular heat dissipation needle column corresponds to the water inlet of the radiator and the area between the upper bridge arm and the lower bridge arm, the anisotropic thread heat dissipation needle column corresponds to the area where the upper bridge arm and the lower bridge arm are located, and the surface of the anisotropic thread heat dissipation needle column has a spiral flow channel arranged along its length direction.
[0017] Preferably, the heterogeneous threaded heat dissipation pins include a first layer of threaded heat dissipation pins and a second layer of threaded heat dissipation pins that are spaced apart, and both the first layer of threaded heat dissipation pins and the second layer of threaded heat dissipation pins include two designs with spiral flow channels facing in opposite directions.
[0018] A design method for the power module includes the following steps:
[0019] S1, determining the flow bottleneck area of the metal-clad ceramic substrate, and sintering the micro-nano metal layer on the metal-clad ceramic substrate;
[0020] S2, soldering the semiconductor power chip and the diode chip onto the metal-clad ceramic substrate using solder;
[0021] S3, soldering the metal-clad ceramic substrate onto the heat dissipation substrate using solder;
[0022] S4, bonding the external housing to the heat dissipation substrate through a sealant;
[0023] S5, interconnecting the external housing terminals, the metal-clad ceramic substrate, and the semiconductor chip in pairs using interconnection conductors;
[0024] S6, filling the outer shell with potting glue;
[0025] S7. Install the cover.
[0026] Preferably, in step S1, the thickness of the micro-nano metal layer is 0.3-0.4 mm, wherein the thickness of the micro-nano metal solder is 0.2-0.3 mm, and the thickness of the metal sheet is 0.1 mm.
[0027] After adopting the above technical solution, a power module and a design method thereof provided by the present invention have the following beneficial effects:
[0028] 1) Based on the half-bridge topology package, the present invention does not change the chip characteristics of the semiconductor chip, adopts package optimization design for the non-chip area, improves the internal design of the power module by selecting high thermal conductivity packaging materials, and shortens the design cycle and time cost of the high-power module;
[0029] 2) The present invention obtains the current flow bottleneck area inside the module through the inherent flow capacity of the material, and densely combines the micro-nano metal particles with the upper surface of the metal-coated ceramic substrate under a certain pressure and temperature, thereby improving the actual output capacity of the power module current;
[0030] 3) The heat dissipation substrate of the present invention is designed with bidirectional pin-wing-shaped anisotropic thread heat dissipation columns, which can increase the heat dissipation area while changing the water flow rate, thereby increasing the current output capacity of the power module by about 1 / 3;
[0031] 4) The present invention is also applicable to modules with compact layout, high utilization rate and high output power. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] Figure 1 It is a structural schematic diagram of a power module of the present invention;
[0033] Figure 2 It is a schematic diagram of the connection structure between the metal-layer-coated ceramic substrate and the micro-nano metal layer in the present invention;
[0034] Figure 3 It is a schematic diagram of the front area of the metal-clad ceramic substrate of the present invention;
[0035] Figure 4 Schematic diagram of heat transfer mode of the chip in the present invention;
[0036] Figure 5A bottom view of the heat dissipation substrate of the present invention;
[0037] Figure 6 is a side view of the heat dissipation substrate of the present invention;
[0038] Figure 7 The present invention is a flow chart of a design method for a power module.
[0039] Among them: positive power terminal 1, negative power terminal 2, AC power terminal 3, upper bridge collector signal terminal 4, upper bridge emitter signal terminal 5, upper bridge gate signal terminal 6, lower bridge gate signal terminal 7, lower bridge emitter signal terminal 8, upper bridge semiconductor power chip 9-1 / 9-2 / 9-3, upper bridge anti-parallel diode chip 10-1 / 10-2 / 10-3, lower bridge semiconductor power chip 11-1 / 11-2 / 11-3, lower bridge anti-parallel diode chip 12-1 / 12-2 / 12-3, interconnect conductor 13, external shell 14, metal-clad ceramic substrate 15, front metal layer 1 5-1, chip design area 15-1-1, other designable areas 15-1-2, temperature-sensitive resistor design area 15-1-3, first signal design area 15-1-4 second signal design area 15-1-5 flow bottleneck area 15-1-6, insulating ceramic layer 15-2, back metal layer 15-3, micro-nano metal layer 16, micro-nano metal solder 16-1, metal sheet 16-2, heat dissipation substrate 17, metal base plate 17-1, circular heat dissipation pin column 17-2, anisotropic threaded heat dissipation pin column 17-3, first layer threaded heat dissipation pin column 17-3-1, second layer threaded heat dissipation pin column 17-3-2. DETAILED DESCRIPTION
[0040] The present invention is further described clearly and completely below in conjunction with the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all the embodiments. The following description of at least one exemplary embodiment is actually only illustrative and is by no means intended to limit the present invention and its application or use. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.
[0041] It should be noted that the terms used herein are only for describing specific embodiments and are not intended to limit the exemplary embodiments according to the present application. As used herein, unless the context clearly indicates otherwise, the singular form is also intended to include the plural form. In addition, it should be understood that when the terms "comprise" and / or "include" are used in this specification, it indicates the presence of features, steps, operations, devices, components and / or combinations thereof.
[0042] Unless otherwise specifically stated, the relative arrangement of the parts and steps described in these embodiments, numerical expressions and numerical values do not limit the scope of the present invention. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to ordinary technicians in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be regarded as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.
[0043] In the description of the present invention, it is necessary to understand that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings. They are only for the convenience of describing the present invention and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the devices or elements referred to must have a specific direction or be constructed and operated in a specific direction. Therefore, they cannot be understood as limiting the scope of protection of the present invention. The directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.
[0044] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.
[0045] In addition, it should be noted that the use of terms such as "first" and "second" to limit components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above terms have no special meaning and therefore cannot be understood as limiting the scope of protection of the present invention.
[0046] like Figure 1-6As shown, a power module provided by the present invention includes a positive power terminal 1, a negative power terminal 2, an AC power terminal 3, an upper bridge collector signal terminal 4, an upper bridge emitter signal terminal 5, an upper bridge gate signal terminal 6, a lower bridge gate signal terminal 7, a lower bridge emitter signal terminal 8, an upper bridge arm, a lower bridge arm, an external shell 14, a metal-coated ceramic substrate 15, a micro-nano metal layer 16 and a heat dissipation substrate 17 directly connected to a heat dissipation water channel.
[0047] The metal-clad ceramic substrate 15 includes an insulating ceramic layer 15-2, and a front metal layer 15-1 and a back metal layer 15-3 respectively arranged on the upper surface and the lower surface of the insulating ceramic layer 15-2, the upper bridge arm and the lower bridge arm are sintered on the front metal layer 15-1 by solder, the upper bridge arm includes an upper bridge semiconductor power chip 9-1 / 9-2 / 9-3 and an upper bridge anti-parallel diode chip 10-1 / 10-2 / 10-3, the lower bridge arm includes a lower bridge semiconductor power chip 11-1 / 11-2 / 11-3 and a lower bridge anti-parallel diode chip 12-1 / 12-2 / 12-3, and the selection of the above chip materials is not limited to silicon Si, germanium Ge, gallium arsenide GaAs and gallium phosphide GaP.
[0048] Furthermore, the thickness of the front metal layer 15-1 of the metal-clad ceramic substrate 15 is limited by the processing technology, and the thickness of the front metal layer is always kept consistent, so there must be a flow bottleneck in the flow design. Therefore, the front metal layer 15-1 is divided into a chip design area 15-1-1, other designable areas 15-1-2, a temperature-sensitive resistor design area 15-1-3, a first signal design area 15-1-4, a second signal design area 15-1-5 and a flow bottleneck area 15-1-6 for the designer.
[0049] The micro-nano metal layer 16 is arranged in the flow bottleneck area of the metal-clad ceramic substrate 15. Specifically, the micro-nano metal layer 16 includes a micro-nano metal solder 16-1 and a metal sheet 16-2 which are arranged in sequence above the front metal layer 15-1. When the flow bottleneck involves the connection area with the external shell 14, the micro-nano metal solder 16-1 is made on the front metal layer 15-1 of the metal-clad ceramic substrate. The porosity of the solder layer cannot meet the connection requirements between the interconnected conductors 13. The metal sheet 16-2 needs to be sintered on the micro-nano metal solder 16-1 so that the surface roughness meets the connection requirements between the interconnected conductors 13, and the interconnection between the external shell 14 of the power module and the internal designable area can be completed. For the weak flow area, the size design of the micro-nano metal solder 16-1 and the metal sheet 16-2 can be changed according to actual needs and the flow capacity of the metal per unit area.
[0050] The heat dissipation substrate 17 includes a metal bottom plate 17-1, and the metal bottom plate 17-1 has a welding surface and a heat dissipation surface that are arranged oppositely. The welding surface is used to be welded with the lower surface of the metal-clad ceramic substrate 15, that is, welded with the back metal layer 15-3. The heat dissipation surface is used to connect one end of a plurality of pin-fin-shaped heat dissipation columns, and the other ends of the plurality of pin-fin-shaped heat dissipation columns extend in a direction away from the heat dissipation surface. In the actual working process, the semiconductor chip on the metal-clad ceramic substrate 15 has a heat source and a heat transfer form. The structure of the central area The temperature of the inner node is higher than that of the outer node. The main heat transfer trend is that the semiconductor chip node transfers heat vertically downward. Therefore, the plurality of pin-fin heat dissipation columns in this embodiment specifically include a circular heat dissipation pin column 17-2 and anisotropic thread heat dissipation pin column 17-3. The circular heat dissipation pin column 17-2 corresponds to the water inlet of the radiator and the regional distribution between the upper bridge arm and the lower bridge arm, which can effectively average the water inlet flow rate of the radiator water tank, so that the flow rate flowing into the heat dissipation pin columns is as consistent as possible. The anisotropic thread heat dissipation pin column 17-3 is The heat dissipation needle column 17-3 should be distributed in the area where the upper bridge arm and the lower bridge arm are located, and the surface of the heterosexual thread heat dissipation needle column 17-3 has a spiral flow channel arranged along its length direction. Further, the heterosexual thread heat dissipation needle column 17-3 includes a first layer of thread heat dissipation needle columns 17-3-1 and a second layer of thread heat dissipation needle columns 17-3-2 distributed at intervals, and the first layer of thread heat dissipation needle columns 17-3-1 and the second layer of thread heat dissipation needle columns 17-3-2 both include two designs with spiral flow channels in opposite directions. When the fluid flows into the chip distribution area, the fluid can be directed by the two bidirectional heterosexual threaded needle columns. The fluid accelerates to flow through the chip junction temperature, taking away more heat, and the fluid with low flow rate is discharged through the thread to the chip periphery or the chip-free area for heat dissipation through the circular heat dissipation pin 17-2. Since the junction temperature in the center area is higher than that in the chip edge area, the internal node temperature is higher than the external node temperature. Therefore, the use of circular heat dissipation pin 17-2 at the edge can also meet the power module design requirements, and designing two bidirectional anisotropic threaded pins for the chip design area can effectively improve the overall heat dissipation performance of the power module. In summary, the heat dissipation effect can be improved while controlling costs.
[0051] Furthermore, the heterogeneous threaded heat dissipation pin 17-3 can not only control the flow rate of the heat dissipation fluid flowing through the chips, but also has certain advantages in the heat dissipation area. With each additional thread, the heat dissipation area will increase by a certain proportion, and is positively correlated with the number of threads. In the implementation of this patent, on each heterogeneous threaded heat dissipation pin 17-3, three threads with a depth of R=0.73mm are opened, which can reduce the thermal resistance of the heat dissipation substrate 17 by 5%. Therefore, while ensuring the strength of the pin, the number of threaded pins can be appropriately increased, the thread spacing can be reduced, and the overall heat dissipation characteristics of the power module can be improved.
[0052] The external shell 14 is sealed and connected to the heat dissipation substrate 17 by sealant, and forms a closed loop through the interconnection conductor 13 and the front metal layer 15-1 of the metal-clad ceramic substrate 15. The interconnection conductor 13 is not limited to copper wire, aluminum wire, copper tape, aluminum tape, flexible connecting wire, etc. The material of the external shell 14 is not limited to any one of polyamide PA, polyethylene terephthalate PET, polybutylene terephthalate PBT, polyphthalamide PPA, polyphenylene sulfide PPS, polyethylene PE, polyetheretherketone PEEK, etc.
[0053] like Figure 7 As shown, the present invention provides a design method for the above power module, comprising the following steps:
[0054] S1. Determine the flow bottleneck area of the metal-clad ceramic substrate 15 through the metal flow design specification, connect the micro-nano metal layer 16 to the front metal layer 15-1 of the metal-clad ceramic substrate 15, and perform pressure sintering to form a dense interconnected metal layer;
[0055] S2, soldering the semiconductor power chip and the diode chip onto the front metal layer 15-1 of the metal-clad ceramic substrate 15 using solder;
[0056] S3, soldering the back metal layer 15-3 of the metal-clad ceramic substrate 15 onto the heat dissipation substrate 17 using solder;
[0057] S4, bonding the outer housing 14 to the heat dissipation substrate 17 by means of a sealant;
[0058] S5, interconnecting the external housing terminals, the metal-clad ceramic substrate 15, and the semiconductor chips in pairs using the interconnection conductors 13;
[0059] S6, filling the outer shell 14 with potting glue to ensure a certain amount of glue;
[0060] S7. Install the cover plate to complete the power module design.
[0061] Furthermore, in step S1 , the thickness of the micro-nano metal layer 16 is 0.3-0.4 mm, the thickness of the micro-nano metal solder 16 - 1 is 0.2-0.3 mm, and the thickness of the metal sheet 16 - 2 is 0.1 mm, which can overcome the flow design bottleneck inside the power module.
[0062] It should be noted that the melting point of the micro-nano metal layer 16 is much higher than the melting point of the solder selected between the chip and the metal-clad ceramic substrate 15. Therefore, the interconnection must strictly follow the order of step S1 and step S2 to prevent the secondary melting of the solder between the chip and the metal-clad ceramic substrate 15 from causing voids.
[0063] To sum up, the power module and design method provided by the present invention can increase the flow area by designing a sintered layer of a certain thickness at the flow bottleneck while ensuring that the design margin of the chip area remains unchanged, thereby achieving the purpose of preventing thermal stress concentration. At the same time, through the design of the pin-wing-shaped special-shaped threaded heat dissipation pin column on the heat dissipation substrate, the fluid flow rate can be changed in the heating area of the semiconductor chip, the heat dissipation area of the pin column can be increased, and the heat dissipation capacity of the module can be improved.
[0064] The above description is only a preferred specific implementation manner of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can make equivalent replacements or changes according to the technical scheme and inventive concept of the present invention within the technical scope disclosed by the present invention, which should be covered by the protection scope of the present invention.
Claims
1. A power module, characterized in that: include: A metal-clad ceramic substrate (15), wherein an upper bridge arm and a lower bridge arm are arranged on the upper surface of the metal-clad ceramic substrate (15); A micro-nano metal layer (16), wherein the micro-nano metal layer (16) is arranged in a flow bottleneck region of the metal-layer-coated ceramic substrate (15); A heat dissipation substrate (17), the heat dissipation substrate (17) being connected to the lower surface of the metal-clad ceramic substrate (15), and a plurality of pin-fin-shaped heat dissipation columns being arranged on a side of the heat dissipation substrate (17) away from the metal-clad ceramic substrate (15), the plurality of pin-fin-shaped heat dissipation columns comprising a circular heat dissipation pin column (17-2) and anisotropic thread heat dissipation pin columns (17-3); An external shell (14) is sealedly connected to a heat dissipation substrate (17) and forms a closed loop with a metal-clad ceramic substrate (15) through an interconnecting conductor (13).
2. A power module according to claim 1, characterized in that: The metal-clad ceramic substrate (15) comprises an insulating ceramic layer (15-2), and a front metal layer (15-1) and a back metal layer (15-3) respectively arranged on the upper surface and the lower surface of the insulating ceramic layer (15-2).
3. A power module according to claim 1, characterized in that: The upper bridge arm includes an upper bridge semiconductor power chip (9-1 / 9-2 / 9-3) and an upper bridge anti-parallel diode chip (10-1 / 10-2 / 10-3), and the lower bridge arm includes a lower bridge semiconductor power chip (11-1 / 11-2 / 11-3) and a lower bridge anti-parallel diode chip (12-1 / 12-2 / 12-3).
4. A power module according to claim 1, characterized in that: The micro-nano metal layer (16) comprises a micro-nano metal solder (16-1) and a metal sheet (16-2) which are sequentially arranged on the metal-clad ceramic substrate (15).
5. A power module according to claim 1, characterized in that: The heat dissipation substrate (17) comprises a metal bottom plate (17-1), the metal bottom plate (17-1) having a welding surface and a heat dissipation surface arranged opposite to each other, the welding surface being used for welding with the metal-clad ceramic substrate (15), the heat dissipation surface being used for connecting one end of a plurality of pin-fin-shaped heat dissipation columns, and the other ends of the plurality of pin-fin-shaped heat dissipation columns extending in a direction away from the heat dissipation surface.
6. A power module according to claim 1, characterized in that: The circular heat dissipation needle column (17-2) corresponds to the water inlet of the radiator and the area between the upper bridge arm and the lower bridge arm, the heterogeneous thread heat dissipation needle column (17-3) corresponds to the area where the upper bridge arm and the lower bridge arm are located, and the surface of the heterogeneous thread heat dissipation needle column (17-3) has a spiral flow channel arranged along its length direction.
7. A power module according to claim 6, characterized in that: The heterogeneous threaded heat dissipation pins (17-3) comprise a first layer of threaded heat dissipation pins (17-3-1) and a second layer of threaded heat dissipation pins (17-3-2) which are distributed at intervals, and both the first layer of threaded heat dissipation pins (17-3-1) and the second layer of threaded heat dissipation pins (17-3-2) comprise two designs in which the spiral flow channels are oriented in opposite directions.
8. A method for designing a power module according to any one of claims 1 to 7, characterized in that: The following steps are involved: S1, determining a flow bottleneck area of a metal-clad ceramic substrate (15), and sintering a micro-nano metal layer (16) on the metal-clad ceramic substrate (15); S2, soldering the semiconductor power chip and the diode chip onto the metal-clad ceramic substrate (15) using solder; S3, soldering the metal-clad ceramic substrate (15) onto the heat dissipation substrate (17) using solder; S4, bonding the outer shell (14) to the heat dissipation substrate (17) by means of a sealant; S5, interconnecting the external housing terminals, the metal-clad ceramic substrate (15), and the semiconductor chip in pairs using interconnection conductors (13); S6, filling the outer shell (14) with potting glue; S7. Install the cover.
9. The method for designing a power module according to claim 8, characterized in that: In step S1, the thickness of the micro-nano metal layer (16) is 0.3-0.4 mm, wherein the thickness of the micro-nano metal solder (16-1) is 0.2-0.3 mm, and the thickness of the metal sheet (16-2) is 0.1 mm.