Current charging and discharging TSV (Through Silicon Via) pre-bonding detection method based on equivalent modeling

Abstract

The invention discloses a current charging and discharging TSV (Through Silicon Via) before-bonding detection method based on equivalent modeling, which comprises the following steps of: respectively carrying out mathematical modeling of an equivalent electrical model in a charging stage and a discharging stage in a TSV before-bonding detection circuit, and introducing an open-circuit fault and a leakage fault into corresponding mathematical modeling equations in a variable form; obtaining a conversion relational expression between the time required by the charging and discharging stage and the fault; a fault detection tool constructed based on a conversion relation in MATLAB is used for processing the time needed by the charging and discharging stage, detailed information of the open-circuit fault normalization position and the leakage resistance size of the TSV to be detected is obtained, and accurate and detailed detection of a single open-circuit fault, a single leakage fault and coexistence of the two faults is achieved. The TSV defect mechanism and the fault analysis are enabled to be comprehensive and accurate as far as possible, so that valuable information is provided for design and manufacturing, support is provided for process improvement, and improvement of the yield is facilitated.

Description

Technical Field

[0001] The invention belongs to the field of chip detection, and in particular relates to a current charging and discharging TSV pre-bonding detection method based on equivalent modeling. Background Art

[0002] With the development of advanced processes, Moore's Law is facing more and more challenges, and it is difficult to improve chip performance through scaling technology of traditional two-dimensional integrated circuits. Three-dimensional integrated circuit technology based on TSV (Through Silicon Via) connects multiple chips vertically to increase chip density and reduce power consumption. TSV provides a vertical conductive path for devices on different layers, shortening the interconnection length while reducing transmission delay. However, TSV is prone to defects in the actual manufacturing process, and how to detect TSV defects is an important issue in the commercialization of three-dimensional integrated circuits. With the increase in TSV density, it becomes difficult to detect a single TSV using traditional probe-based detection methods, and the mechanical stress caused by the probe may damage the TSV. Detection of TSV defects through detection circuits has become the mainstream method.

[0003] There is a TSV detection method based on the principle of switched capacitor circuit. This method makes the switched capacitor circuit equivalent to a resistor. The size of the resistor depends on the cycle of the switch alternating conduction and the TSV equivalent capacitance. The relationship between the TSV equivalent capacitance and the resistor is established, and the TSV equivalent capacitance result is obtained by measuring the resistor. The open circuit fault reduces the equivalent capacitance of the TSV equivalent capacitance, making the switch capacitor circuit test response time greater than the average response time of the fault-free TSV. The leakage fault has an additional charge leakage path, which makes the voltage on the test capacitor Cs drop faster, resulting in a test response time less than the average test response time of the fault-free TSV. The above principle is used to detect TSV open circuit defects and leakage defects.

[0004] However, most of the existing TSV detection before bonding is based on the premise of a single type of defect for classification discussion. In addition, due to the technical difficulty of TSV testing before bonding, it is difficult to obtain sufficient fault information for fault diagnosis at this stage, and it is impossible to accurately analyze the fault degree and type of TSV. When the existing TSV detection method based on the principle of switched capacitor circuit faces the situation where multiple defects coexist in TSV in actual production, since open circuit defects and leakage defects have opposite effects on the test response time, if open circuit defects and leakage defects exist at the same time, misjudgment may occur. Summary of the invention

[0005] In order to solve the above problems existing in the prior art, the present invention provides a current charge and discharge TSV pre-bonding detection method based on equivalent modeling. The technical problem to be solved by the present invention is achieved through the following technical solutions:

[0006] The present invention provides a current charging and discharging TSV pre-bonding detection method based on equivalent modeling, the method comprising:

[0007] The time required for the TSV to be tested in the charging and discharging stage is obtained by the TSV pre-bonding detection circuit;

[0008] Establishing equivalent electrical models of the TSV pre-bonding detection circuit and the TSV to be tested in the charging stage and the discharging stage, respectively, and establishing corresponding mathematical modeling equations according to the equivalent electrical models corresponding to the charging stage and the discharging stage;

[0009] The fault is introduced into the corresponding mathematical modeling equation in the form of a variable, and the conversion relationship between the time required for the charging and discharging stage and the fault is obtained;

[0010] A fault detection tool is constructed in MATLAB based on the conversion relationship. The time required for the charging and discharging stages is processed using the fault detection tool to obtain the fault detection result.

[0011] In one embodiment of the present invention, the equivalent electrical model of the TSV pre-bonding detection circuit and the TSV to be tested in the charging stage includes:

[0012] Charging current source, current source internal resistance R is , capacitor C P , capacitor C1, capacitor C2 and resistor R1; where,

[0013] The input end of the charging current source is connected to the power supply voltage V DD , the output terminal and the capacitor C P A first end is connected;

[0014] The current source internal resistance R is A first end is connected to the input end of the charging current source, and a second end is connected to the output end of the charging current source;

[0015] The capacitor C P The second end of is grounded;

[0016] The first end of the capacitor C1 is connected to the capacitor C P The first end is connected to the ground, and the second end is grounded;

[0017] The first end of the capacitor C2 is connected to the first end of the capacitor C1, and the second end is grounded;

[0018] The first end of the resistor R1 is connected to the first end of the capacitor C1 , and the second end is grounded.

[0019] In one embodiment of the present invention, the mathematical modeling equation corresponding to the charging stage includes:

[0020]

[0021] Among them, t represents the time required for the charging stage, R is Represents the internal resistance of the current source R is Resistance value, C = xC TSV +C P , x represents the normalized position of the open circuit fault, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, C P Represents capacitance C P Capacitance value, V th1 It represents the threshold voltage of node V(t) in the charging phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, V DD Indicates the power supply voltage V DD The voltage value, I s Represents the current flowing through the charging current source, R eq =R is / / R1, / / represents a parallel connection, R1 represents the resistance value of resistor R1, and ... represents an expanded item that is negligible.

[0022] In one embodiment of the present invention, the equivalent electrical model of the TSV pre-bonding detection circuit and the TSV to be tested in the discharge stage includes:

[0023] Discharge current source, current source internal resistance R is1 , capacitor C P1 , capacitor C3, capacitor C4 and resistor R2; wherein,

[0024] The input terminal of the discharge current source is connected to the capacitor C P1 The first end is connected to the output end, and the output end is grounded;

[0025] The current source internal resistance R is1 A first end is connected to the input end of the discharge current source, and a second end is connected to the output end of the discharge current source;

[0026] The capacitor C P1 The second end of is grounded;

[0027] The first end of the capacitor C3 is connected to the capacitor C P1 The first end is connected to the ground, and the second end is grounded;

[0028] The first end of the capacitor C4 is connected to the capacitor C P1 The first end is connected to the ground, and the second end is grounded;

[0029] The first end of the resistor R2 is connected to the capacitor C P1 The first end is connected to the ground, and the second end is grounded.

[0030] In one embodiment of the present invention, the mathematical modeling equation corresponding to the discharge stage includes:

[0031]

[0032] Where t′ represents the time required for the discharge phase, R eq1 =R is1 / / R2, / / indicates parallel connection, R is1 Represents the internal resistance of the current source R is1 The resistance value of R2, I s ′ represents the current flowing through the discharge current source, C1=xC TSV +C P1 , x represents the normalized position of the open circuit fault, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, C P1 Represents capacitance C P1 Capacitance value, V DD Indicates the power supply voltage V DD The voltage value, V th2 represents the threshold voltage of the node V(t) in the discharge phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, and ... represents the expansion term that is negligible.

[0033] In one embodiment of the present invention, the conversion relationship between the time required for the charging stage and the fault includes:

[0034]

[0035] Wherein, t represents the time required for the charging stage, t0 represents the first constant, t1 represents the second constant, X1 represents the normalized position of the open circuit fault, and X2 represents the degree of the leakage fault.

[0036] In one embodiment of the present invention, the expression of the first constant t0 is as follows:

[0037]

[0038] Among them, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, I s Indicates the current flowing through the charging current source;

[0039] The expression of the second constant t1 is as follows:

[0040]

[0041] Among them, C P Represents capacitance C P Capacitance value.

[0042] In one embodiment of the present invention, the conversion relationship between the time required for the discharge phase and the fault includes:

[0043]

[0044] Wherein, t' represents the time required for the discharge stage, t0' represents the third constant, t1' represents the fourth constant, X1 represents the normalized position of the open circuit fault, and X2 represents the degree of the leakage fault.

[0045] In one embodiment of the present invention, the expression of the third constant t0′ is as follows:

[0046]

[0047] Among them, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, I s ′ represents the current flowing through the discharge current source;

[0048] The expression of the fourth constant t1′ is as follows:

[0049]

[0050] Among them, C P1 Represents capacitance C P1 Capacitance value.

[0051] Beneficial effects of the present invention:

[0052] In the solution provided by the present invention, mathematical modeling of equivalent electrical models is performed on the charging stage and the discharging stage in the TSV pre-bonding detection circuit respectively, and the open circuit fault and the leakage fault are introduced into the corresponding mathematical modeling equation in the form of variables to obtain the conversion relationship between the time required for the charging and discharging stage and the fault; the time required for the charging and discharging stage is processed by a fault detection tool constructed based on the conversion relationship in MATLAB to obtain detailed information on the normalized position of the open circuit fault and the leakage resistance of the TSV to be tested, thereby achieving accurate and detailed detection of a single open circuit fault, a single leakage fault and the coexistence of the two faults, making the defect mechanism and fault analysis of the TSV as comprehensive and accurate as possible, thereby providing valuable information for design and manufacturing, providing support for process improvement, and helping to improve the yield rate. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] Figure 1 A schematic diagram of the steps of a current charging and discharging TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention;

[0054] Figure 2A schematic diagram of the structure of a TSV pre-bonding detection circuit based on current charging and discharging provided by an embodiment of the present invention;

[0055] Figure 3 A schematic structural diagram of an equivalent electrical model of a charging phase of a current charging and discharging TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention;

[0056] Figure 4 A schematic structural diagram of an equivalent electrical model of a discharge phase of a current charge and discharge TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention;

[0057] Figure 5 A schematic flow chart of a current charge and discharge TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention;

[0058] Figure 6 It is a detection result error diagram of a current charge and discharge TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention when an open circuit fault and a leakage fault coexist. DETAILED DESCRIPTION

[0059] The present invention is further described in detail below with reference to specific embodiments, but the embodiments of the present invention are not limited thereto.

[0060] In order to achieve the purpose of effectively detecting TSV (Through Silicon Via) before bonding, an embodiment of the present invention provides a current charging and discharging TSV before bonding detection method based on equivalent modeling, which is applied to a TSV before bonding detection circuit, such as Figure 1 As shown, it may include:

[0061] S1, the time required for the TSV to be tested in the charging and discharging stage is obtained through the TSV pre-bonding detection circuit.

[0062] The TSV pre-bonding detection circuit proposed in S1 may be a TSV pre-bonding detection circuit based on current charging and discharging, such as Figure 2 As shown, it may include:

[0063] A charging current source, a discharging current source, a transmission gate switch array and a time detection circuit; wherein,

[0064] The transmission gate switch array is used to control the switching of the transmission gate switches inside the array so that the TSV pre-bonding detection circuit is in the charging stage, the resetting stage, the pre-charging stage or the discharging stage in sequence;

[0065] The charging current source is used to charge the TSV to be detected connected to the TSV pre-bonding detection circuit during the charging phase;

[0066] The discharge current source is used to discharge the TSV to be detected connected to the TSV pre-bonding detection circuit during the discharge phase;

[0067] The time detection circuit is used to obtain the time required for the charging phase and the time required for the discharging phase.

[0068] Specifically, a transmission gate switch array, such as Figure 2 As shown, it may include:

[0069] Transmission gate switch SW1, transmission gate switch SW5 and N combination arrays; wherein,

[0070] A first end of the transmission gate switch SW1 is connected to the output end of the charging current source, and a second end is connected to a first end of the transmission gate switch SW5;

[0071] The second terminal of the transmission gate switch SW5 is grounded;

[0072] For each combination array, the first end of the combination array is connected to the second end of the transmission gate switch SW1, the second end is connected to the input end of the discharge current source, and the third end is connected to the power supply voltage V DD , the fourth end is connected to the TSV to be detected corresponding to the combination array; N represents the total number of TSVs to be detected.

[0073] The structure of each combination array is the same, and the i-th combination array includes:

[0074] Transmission gate switch SW2_i, transmission gate switch SW3_i and transmission gate switch SW4_i; wherein,

[0075] The first end of the transmission gate switch SW2_i serves as the first end of the combination array, and the second end is connected to the first end of the transmission gate switch SW3_i;

[0076] The second end of the transmission gate switch SW3_i serves as the third end of the combination array;

[0077] The first end of the transmission gate switch SW4_i serves as the second end of the combination array, and the second end is connected to the second end of the transmission gate switch SW2_i to serve as the fourth end of the combination array; i represents the serial number of the TSV to be detected currently.

[0078] The transmission gate switch array controls the switching of the transmission gate switches inside itself to put the TSV pre-bonding detection circuit in the charging stage, the resetting stage, the pre-charging stage or the discharging stage, which may specifically include:

[0079] The transmission gate switch array controls the transmission gate switch SW1 and the transmission gate switch SW2_i corresponding to the TSV to be detected to be turned on, and the transmission gate switch SW5, the transmission gate switch SW3_i corresponding to the TSV to be detected, and the transmission gate switch SW4_i to be turned off, so that the TSV pre-bonding detection circuit is in the charging stage;

[0080] The transmission gate switch array controls the transmission gate switch SW5 and the transmission gate switch SW2_i corresponding to the TSV to be detected to be turned on, and the transmission gate switch SW1, the transmission gate switch SW3_i corresponding to the TSV to be detected, and the transmission gate switch SW4_i to be turned off, so that the TSV pre-bonding detection circuit is in a reset stage;

[0081] The transmission gate switch array controls the transmission gate switch SW3_i corresponding to the TSV to be detected to be turned on, and the transmission gate switch SW1, the transmission gate switch SW5 and the transmission gate switch SW2_i and the transmission gate switch SW4_i corresponding to the TSV to be detected are turned off, so that the TSV pre-bonding detection circuit is in the pre-charging stage;

[0082] The transmission gate switch array controls the transmission gate switch SW4_i corresponding to the TSV to be detected to be turned on, and the transmission gate switch SW1, the transmission gate switch SW5, the transmission gate switch SW2_i corresponding to the TSV to be detected, and the transmission gate switch SW3_i are turned off, so that the TSV pre-bonding detection circuit is in the discharge stage.

[0083] Time detection circuit, such as Figure 2 As shown, it may include:

[0084] Buffer buffer, inverter INV, two-to-one multiplexer MUX, AND gate AND, counter counter and memory RAM; among them,

[0085] The input end of the buffer buffer is connected to the first end of the discharge current source, and the output end is connected to the first input end of the two-to-one multiplexer MUX;

[0086] The input end of the inverter INV is connected to the first end of each combination array, and the output end is connected to the second input end of the two-to-one multiplexer MUX;

[0087] The control end of the two-to-one multiplexer MUX is connected to the control signal charge, and the output end is connected to the first input end of the AND gate AND;

[0088] The second input terminal of the AND gate AND is connected to the clock signal CLK, and the output terminal is connected to the first input terminal of the counter counter;

[0089] The second input terminal of the counter counter is connected to the control signal CTRL, and the output terminal is connected to the first input terminal of the memory RAM;

[0090] The second input terminal of the memory RAM is connected to the output signal of the two-to-one multiplexer MUX.

[0091] It can be understood that the TSV before bonding detection circuit is used to detect the TSV to be tested, so as to obtain the time required for the charging and discharging stage for subsequent fault detection. The TSV before bonding detection circuit uses the time detection circuit to obtain the time required for the charging stage and the time required for the discharging stage respectively, thereby realizing the detection of open circuit faults, leakage faults and open circuit leakage dual faults, avoiding the misjudgment caused by the coexistence of different faults. In the corresponding charging and discharging current source, the current input operational amplifier is used to realize the clamping function of the current mirror drain voltage, improve the current mirror replication accuracy, and use the shielding effect of the common source and common gate tube to realize the isolation of the current mirror drain voltage, so that the current of the charging and discharging current source remains unchanged during the charging and discharging stages of the detection process, so as to improve the linearity of the detection process.

[0092] S2, respectively establishing equivalent electrical models of the TSV pre-bonding detection circuit and the TSV to be tested in the charging stage and the discharging stage, and respectively establishing corresponding mathematical modeling equations according to the equivalent electrical models corresponding to the charging stage and the discharging stage.

[0093] For S2, this may include:

[0094] S21, establishing equivalent electrical models corresponding to the TSV pre-bonding detection circuit and the TSV to be tested in the charging stage and the discharging stage respectively.

[0095] Specifically, the equivalent electrical model of the TSV pre-bonding detection circuit and the TSV to be tested in the charging stage is as follows: Figure 3 As shown, it may include:

[0096] Charging current source, current source internal resistance R is , capacitor C P , capacitor C1, capacitor C2 and resistor R1; where,

[0097] The input of the charging current source is connected to the power supply voltage V DD , the output terminal and capacitor C P A first end is connected;

[0098] Current source internal resistance R is A first end is connected to an input end of a charging current source, and a second end is connected to an output end of the charging current source;

[0099] Capacitor C P The second end of is grounded;

[0100] The first terminal of capacitor C1 is connected to capacitor C P The first end is connected to the ground, and the second end is grounded;

[0101] A first end of the capacitor C2 is connected to a first end of the capacitor C1, and a second end is grounded;

[0102] A first end of the resistor R1 is connected to a first end of the capacitor C1 , and a second end of the resistor R1 is grounded.

[0103] The equivalent electrical model of the TSV pre-bonding detection circuit and the TSV to be tested in the discharge stage, such as Figure 4 As shown, it may include:

[0104] Discharge current source, current source internal resistance R is1 , capacitor C P1 , capacitor C3, capacitor C4 and resistor R2; wherein,

[0105] The input terminal of the discharge current source and the capacitor C P1 The first end is connected to the output end, and the output end is grounded;

[0106] Current source internal resistance R is1 A first end is connected to an input end of a discharge current source, and a second end is connected to an output end of the discharge current source;

[0107] Capacitor C P1 The second end of is grounded;

[0108] The first terminal of capacitor C3 is connected to capacitor C P1 The first end is connected to the ground, and the second end is grounded;

[0109] The first terminal of capacitor C4 is connected to capacitor C P1 The first end is connected to the ground, and the second end is grounded;

[0110] The first end of the resistor R2 and the capacitor C P1 The first end is connected to the ground, and the second end is grounded.

[0111] S22, establishing corresponding mathematical modeling equations according to the equivalent electrical models corresponding to the charging stage and the discharging stage.

[0112] Specifically, for the charging stage, the mathematical modeling equation corresponding to the charging stage may include:

[0113]

[0114] Among them, t represents the time required for the charging stage, R is Represents the internal resistance of the current source R is Resistance value, C = xC TSV +C P , x represents the normalized position of the open circuit fault, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, C P Represents capacitance C P Capacitance value, Vth1 It represents the threshold voltage of node V(t) in the charging phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, V DD Indicates the power supply voltage V DD The voltage value, I s Represents the current flowing through the charging current source, R eq =R is / / R1, R is / / R1 represents the internal resistance of the current source R is The resistance value after being connected in parallel with the resistor R1, R1 represents the resistance value of the resistor R1, and … represents the expanded term that can be ignored.

[0115] It can be understood that the embodiment of the present invention adopts a mathematical modeling method for current charging and discharging before TSV bonding to quantitatively detect TSV fault information. The mathematical modeling method is highly effective when combined with the test circuit and has high test accuracy. The test results are less affected by process deviations and the test robustness is high. The mathematical modeling method can be used for fault detection of open circuit faults, leakage faults and when the two faults coexist. Figure 3 It is a structural diagram of the equivalent electrical model in the charging stage. The calculation formula of the total load capacitance connected to the charging current source is:

[0116] C=xC TSV +C P ;

[0117] Where x represents the normalized position of the open circuit fault, C TSV represents the equivalent capacitance of a fault-free TSV, C P represents the total parasitic capacitance connected to the TSV to be tested. Where x∈[0,1], x=0 means the open circuit fault occurs at the top of the TSV, x=0.5 means the open circuit fault occurs at the midpoint of the TSV, and x=1 means the open circuit fault occurs at the bottom of the TSV.

[0118] The total load resistance connected to the charging current source is calculated as:

[0119] R eq =R is / / R1;

[0120] Among them, R is / / R1 represents the internal resistance of the current source R is The resistance value after being connected in parallel with resistor R1.

[0121] Kirchhoff's current calculation formula is listed for the current at node V(t):

[0122]

[0123] Solving the differential equation for Kirchhoff's current calculation formula, we get the calculation formula for the charging process node V(t) during the charging phase:

[0124]

[0125] Based on the calculation formula of the charging process node V(t) in the charging stage, the calculation formula for the time required for the charging stage is obtained:

[0126]

[0127] Among them, V th1 It represents the threshold voltage of node V(t) in the charging phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, V th1 It can be selected by the user according to the needs. In the embodiment of the present invention, for example, V th1 You can take 2V.

[0128] Taylor expansion of the time calculation formula for the charging stage gives the following calculation formula:

[0129]

[0130] Furthermore, the calculation formula obtained by Taylor expansion is factored to obtain the mathematical modeling equation corresponding to the charging stage:

[0131]

[0132] It is understandable that Taylor expansion can decompose the equation into an infinite number of terms, but the first few terms play a major role, so many of the subsequent terms whose effects are negligible can be omitted, otherwise the formula will be very complicated.

[0133] For the discharge stage, the mathematical modeling equations corresponding to the discharge stage include:

[0134]

[0135] Where t′ represents the time required for the discharge phase, R eq1 =R is1 / / R2, R is1 / / R2 represents the internal resistance of the current source R is1 The resistance value after connecting in parallel with resistor R2, R is1 Represents the internal resistance of the current source R is1 The resistance value of R2, I s ′ represents the current flowing through the discharge current source, C1=xC TSV +C P1 , x represents the normalized position of the open circuit fault, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, CP1 Represents capacitance C P1 Capacitance value, V DD Indicates the power supply voltage V DD The voltage value, V th2 represents the threshold voltage of the node V(t) in the discharge phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, and ... represents the expansion term that is negligible.

[0136] It is understandable that the capacitor C P1 With capacitor C P The capacitance value is the same, C P =C P1 .

[0137] Specifically, Figure 4 The schematic diagram of the equivalent electrical model in the discharge phase is shown below. The Kirchhoff current calculation formula for the current at the node V(t) is listed as follows:

[0138]

[0139] Solving the differential equation for the above Kirchhoff current calculation formula gives the calculation formula for the discharge process node V(t) in the discharge phase:

[0140]

[0141] Based on the calculation formula of the discharge process node V(t) in the discharge phase, the calculation formula for the time required for the discharge phase is obtained:

[0142]

[0143] Among them, V th2 It represents the threshold voltage of node V(t) in the discharge phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, V th2 It can be selected by the user according to the needs. In the embodiment of the present invention, for example, V th2 You can take 1V.

[0144] Taylor expansion is performed on the calculation formula for the time required for the discharge stage to obtain the mathematical modeling equation corresponding to the discharge stage:

[0145]

[0146] It can be understood that in S2, the charging and discharging current source is modeled as a current source with internal resistance, the TSV to be tested is modeled as an equivalent capacitor and an equivalent leakage resistor, and the total parasitic capacitance of the transmission gate is also considered as a load capacitance connected to the detection circuit to improve the detection accuracy. The voltage equation of the TSV node to be tested is obtained according to Kirchhoff's law.

[0147] S3, introduce the fault into the corresponding mathematical modeling equation in the form of a variable, and obtain the conversion relationship between the time required for the charging and discharging stage and the fault.

[0148] Specifically, the variable X1 is introduced to represent the normalized position of the open circuit fault:

[0149] C=X1C TSV +C P ;

[0150] The calculation formula for the normalized position of the open circuit fault is obtained:

[0151]

[0152] The variable X2 is introduced to represent the degree of leakage fault, and the calculation formula between X2 and leakage resistance is obtained:

[0153]

[0154] The variable X1 representing the normalized position of the open circuit fault and the variable X2 representing the degree of the leakage fault are introduced into the mathematical modeling equation corresponding to the charging stage, and the calculation formula after the introduction of variables is obtained:

[0155]

[0156] Since the internal resistance of the current source is very large, an approximate calculation formula for the time required for the charging phase can be obtained:

[0157]

[0158] It is understandable that an open circuit fault will divide the equivalent capacitance of a fault-free TSV into two parts, the upper and lower parts, and the equivalent capacitance connected to the detection circuit will become smaller. From the approximate calculation formula for the time required for the charging phase, it can be seen that the closer the normalized position of the open circuit fault is to the top of the TSV, the smaller X1 is, and the shorter the time required for the charging phase. Leakage faults will produce additional charge leakage paths, which will increase the time required for the charging phase. When the leakage fault is larger, the leakage resistance R1 is smaller and X2 is larger, resulting in a longer time required for the charging phase.

[0159] Similarly, the variable X1 representing the open circuit fault and the variable X2 representing the leakage fault degree are introduced into the mathematical modeling equation corresponding to the discharge stage, and the calculation formula after the introduction of variables is obtained:

[0160]

[0161] It is understandable that an open circuit fault will divide the equivalent capacitance of a fault-free TSV into two parts, the upper and lower parts, and the equivalent capacitance connected to the detection circuit will become smaller. From the above formula, it can be seen that the closer the normalized position of the open circuit fault is to the top of the TSV, the smaller X1 is, and the shorter the time required for the discharge phase. A leakage fault will generate an additional charge leakage path, which reduces the time required for the discharge phase. When the leakage fault is larger, the leakage resistance R2 is smaller, and X2 is larger, resulting in a shorter time required for the discharge phase.

[0162] The expression of the first constant t0 is as follows:

[0163]

[0164] Among them, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, I s Indicates the current flowing through the charging current source;

[0165] The expression of the second constant t1 is as follows:

[0166]

[0167] Among them, C P Represents capacitance C P Capacitance value.

[0168] The expression of the third constant t0′ is as follows:

[0169]

[0170] Among them, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, I s ′ represents the current flowing through the discharge current source;

[0171] The expression of the fourth constant t1′ is as follows:

[0172]

[0173] Among them, C P1 Represents capacitance C P1 Capacitance value.

[0174] Based on the first constant t0 and the second constant t1, a conversion relationship between the time required for the charging stage and the fault is obtained, including:

[0175]

[0176] Wherein, t represents the time required for the charging stage, t0 represents the first constant, t1 represents the second constant, X1 represents the normalized position of the open circuit fault, and X2 represents the degree of the leakage fault.

[0177] When the TSV to be tested is short-circuited to ground, the calculation formula for the time required for the charging phase is:

[0178]

[0179] Connect to a fault-free TSV, and the charging time is calculated as follows:

[0180]

[0181] Based on the third constant t0′ and the fourth constant t1′, the conversion relationship between the time required for the discharge stage and the fault includes:

[0182]

[0183] Wherein, t' represents the time required for the discharge stage, t0' represents the third constant, t1' represents the fourth constant, X1 represents the normalized position of the open circuit fault, and X2 represents the degree of the leakage fault.

[0184] It can be understood that in S3, the normalized position of the open circuit fault and the leakage fault are introduced into the calculation formula of the time required for the charging and discharging stage in the form of variables to obtain the relationship between the time required for the charging and discharging stage and the open circuit fault and the leakage fault.

[0185] S4, constructing a fault detection tool in MATLAB based on the conversion relationship; using the fault detection tool to process the time required for the charging and discharging stages to obtain a fault detection result.

[0186] After obtaining t0, t1, t0′ and t1′ by connecting a fault-free TSV and shorting the TSV to be tested to ground, a fault detection tool was constructed in MATLAB based on the conversion relationship between the time required in the charging phase and the fault and the conversion relationship between the time required in the discharging phase and the fault.

[0187] The fault detection tool is used to solve the data of the time required for the charging phase and the time required for the discharging phase obtained by the time detection circuit, and X1 representing the normalized position of the open circuit fault and X2 representing the size of the leakage fault are obtained to realize the detection of TSV.

[0188] Understandably, Figure 5 A schematic diagram of a flow chart of a current charge and discharge TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention, from Figure 5It can be seen that in the process of using the TSV pre-bonding detection circuit for detection, first, all the TSVs to be tested need to be detected in the charging stage before they can be detected in the discharging stage, so as to obtain the time required for all TSVs to be tested in the charging and discharging stages; then the time required for the charging and discharging stages is brought into the fault detection tool constructed based on the conversion relationship in MATLAB to obtain the corresponding fault detection results. The time required for the charging and discharging stages obtained by the time detection circuit is brought into the fault detection tool constructed by MATLAB for solution to obtain the variables characterizing the open circuit fault and the leakage fault, and the variables are further converted into the normalized position of the open circuit fault and the size of the leakage resistance. Effective detection of single open circuit faults, single leakage faults, and the coexistence of the two faults is achieved, and the fault type and the degree of each fault type are obtained.

[0189] Figure 6 The error diagram of the detection result when the open circuit fault and leakage fault coexist in a current charge and discharge TSV pre-bonding detection method based on equivalent modeling provided by an embodiment of the present invention is shown in FIG. Figure 6 It can be seen that after the mathematical modeling method is adopted in the present invention, the normalized error of the open circuit fault under the coexistence of two faults is less than 3.97%, and the error of the leakage fault degree is less than 4.28%.

[0190] The embodiment of the present invention performs mathematical modeling of equivalent electrical models for the charging stage and the discharging stage in the TSV pre-bonding detection circuit, introduces the open circuit fault and the leakage fault into the corresponding mathematical modeling equation in the form of variables, and obtains the conversion relationship between the time required for the charging and discharging stage and the fault; uses the fault detection tool constructed based on the conversion relationship in MATLAB to process the time required for the charging and discharging stage, and obtains detailed information on the normalized position of the open circuit fault and the leakage resistance of the TSV to be tested, thereby realizing accurate and detailed detection of a single open circuit fault, a single leakage fault and the coexistence of the two faults, making the defect mechanism and fault analysis of the TSV as comprehensive and accurate as possible, thereby providing valuable information for design and manufacturing, providing support for process improvement, and helping to improve the yield rate.

[0191] It should be noted that in the description of the present invention, it should be understood that the terms "first" and "second" are only used for descriptive purposes and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present invention, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0192] The above description is only a preferred embodiment of the present invention and is not intended to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are included in the protection scope of the present invention.

Claims

1. A current charge and discharge TSV pre-bonding detection method based on equivalent modeling, applied to a TSV pre-bonding detection circuit, characterized in that: include: The time required for the TSV to be tested in the charging and discharging stage is obtained by the TSV pre-bonding detection circuit; Establishing equivalent electrical models of the TSV pre-bonding detection circuit and the TSV to be tested in the charging stage and the discharging stage, respectively, and establishing corresponding mathematical modeling equations according to the equivalent electrical models corresponding to the charging stage and the discharging stage; The fault is introduced into the corresponding mathematical modeling equation in the form of a variable, and the conversion relationship between the time required for the charging and discharging stage and the fault is obtained; A fault detection tool is constructed in MATLAB based on the conversion relationship. The time required for the charging and discharging stages is processed using the fault detection tool to obtain the fault detection result.

2. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 1 is characterized in that: The equivalent electrical model of the TSV pre-bonding detection circuit and the TSV to be tested during the charging phase includes: Charging current source, current source internal resistance R is , capacitor C P , capacitor C1, capacitor C2 and resistor R1; where, The input end of the charging current source is connected to the power supply voltage V DD , the output terminal and the capacitor C P A first end is connected; The current source internal resistance R is A first end is connected to the input end of the charging current source, and a second end is connected to the output end of the charging current source; The capacitor C P The second end of is grounded; The first end of the capacitor C1 is connected to the capacitor C P The first end is connected to the ground, and the second end is grounded; The first end of the capacitor C2 is connected to the first end of the capacitor C1, and the second end is grounded; The first end of the resistor R1 is connected to the first end of the capacitor C1 , and the second end is grounded.

3. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 2 is characterized in that: The mathematical modeling equations corresponding to the charging stage include: Among them, t represents the time required for the charging stage, R is Represents the internal resistance of the current source R is Resistance value, C = xC TSV +C P , x represents the normalized position of the open circuit fault, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, C P Represents capacitance C P Capacitance value, V th1 It represents the threshold voltage of node V(t) in the charging phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, V DD Indicates the power supply voltage V DD The voltage value, I s Represents the current flowing through the charging current source, R eq =R is / / R1, R is / / R1 represents the internal resistance of the current source R is The resistance value after being connected in parallel with the resistor R1, R1 represents the resistance value of the resistor R1, and … represents the expanded term that can be ignored.

4. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 1 is characterized in that: The equivalent electrical model of the TSV pre-bonding detection circuit and the TSV to be tested in the discharge stage includes: Discharge current source, current source internal resistance R is1 , capacitor C P1 , capacitor C3, capacitor C4 and resistor R2; wherein, The input terminal of the discharge current source is connected to the capacitor C P1 The first end is connected to the output end, and the output end is grounded; The current source internal resistance R is1 A first end is connected to the input end of the discharge current source, and a second end is connected to the output end of the discharge current source; The capacitor C P1 The second end of is grounded; The first end of the capacitor C3 is connected to the capacitor C P1 The first end is connected to the ground, and the second end is grounded; The first end of the capacitor C4 is connected to the capacitor C P1 The first end is connected to the ground, and the second end is grounded; The first end of the resistor R2 is connected to the capacitor C P1 The first end is connected to the ground, and the second end is grounded.

5. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 4 is characterized in that: The mathematical modeling equations corresponding to the discharge stage include: Where t′ represents the time required for the discharge phase, R eq1 =R is1 / / R2, R is1 / / R2 represents the internal resistance of the current source R is1 The resistance value after connecting in parallel with resistor R2, R is1 Represents the internal resistance of the current source R is1 The resistance value of R2, I s ′ represents the current flowing through the discharge current source, C1=xC TSV +C P1 , x represents the normalized position of the open circuit fault, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, C P1 Represents capacitance C P1 Capacitance value, V DD Indicates the power supply voltage V DD The voltage value, V th2 represents the threshold voltage of the node V(t) in the discharge phase that causes the time detection circuit in the TSV pre-bonding detection circuit to generate a logic jump, and ... represents the expansion term that is negligible.

6. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 1 is characterized in that: The conversion relationship between the time required for the charging stage and the fault includes: Wherein, t represents the time required for the charging stage, t0 represents the first constant, t1 represents the second constant, X1 represents the normalized position of the open circuit fault, and X2 represents the degree of the leakage fault.

7. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 6 is characterized in that: The expression of the first constant t0 is as follows: Among them, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, I s Indicates the current flowing through the charging current source; The expression of the second constant t1 is as follows: Among them, C P Represents capacitance C P Capacitance value.

8. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 1 is characterized in that: The conversion relationship between the time required for the discharge stage and the fault includes: Wherein, t' represents the time required for the discharge stage, t0' represents the third constant, t1' represents the fourth constant, X1 represents the normalized position of the open circuit fault, and X2 represents the degree of the leakage fault.

9. The current charging and discharging TSV pre-bonding detection method based on equivalent modeling according to claim 8, characterized in that: The expression of the third constant t0′ is as follows: Among them, C TSV The capacitance value representing the equivalent capacitance of a fault-free TSV, I s ′ represents the current flowing through the discharge current source; The expression of the fourth constant t1′ is as follows: Among them, C P1 Represents capacitance C P1 Capacitance value.

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