Selective deposition of oxide materials and deposition assemblies
By providing a catalyst, the first precursor and an oxygen precursor in the first surface of the semiconductor substrate with a gas phase, the problem of insufficient deposition reactivity of oxide materials in the prior art is solved, and a combination of high selectivity and soft deposition processes is achieved.
Patent Information
- Application Number
- CN202411147613.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2023-08-24
- Filing Date
- 2024-08-21
- Publication Date
- 2025-02-25
AI Technical Summary
The prior art has the problem of reactive oxygen precursor dependence when selectively depositing oxide materials on semiconductor substrates, making it difficult to achieve a soft selective deposition process while maintaining sufficient deposition reactivity.
Selective deposition of the oxide material layer on the first surface is achieved by providing a semiconductor substrate including the first and second surfaces in the reaction chamber and providing a metal or metalloid catalyst, a first precursor and an oxygen precursor containing hydroxyl groups in the gas phase.
This method can significantly improve the selective deposition of the oxide material layer on the first surface, reduce the dependence on reactive oxygen precursors, achieve a softer selective deposition process while maintaining high reactivity.
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Figure CN119506835A_ABST
Abstract
Description
Technical Field
[0001] The present disclosure generally relates to methods and assemblies for processing semiconductor substrates. More specifically, the present disclosure relates to methods and assemblies for selectively depositing an oxide material on a semiconductor substrate including first and second surfaces. Background Art
[0002] Semiconductor device manufacturing processes often use advanced deposition methods. Patterning is often used to deposit different materials on semiconductor substrates. Semiconductor manufacturers are increasingly interested in selective deposition, which can reduce the steps required for conventional patterning, thereby reducing processing costs. Selective deposition can also allow for enhanced scaling of narrow structures. Various alternatives to achieve selective deposition have been proposed, and additional improvements are needed to expand the use of selective deposition in industrial-scale device manufacturing.
[0003] Oxide materials, such as silicon oxide, metal oxides, and mixtures thereof, are used in many applications and perform various functions in semiconductor devices. For example, certain metal oxides, such as hafnium oxide, zirconium oxide, aluminum oxide, and yttrium oxide, can be used as high-k materials, etch stop layers, or both. Silicon oxide-based materials are probably the most widely used group of materials in industry, and silicon oxide alone or in combination with one or more metals is a component of most semiconductor devices.
[0004] Vapor deposition techniques, especially cyclic chemical vapor deposition (cyclic CVD) and atomic layer deposition (ALD) can be used to grow oxide materials on semiconductor substrates. Typically, deposition relies on two precursors, one of which provides oxygen and the other provides an additional element, such as a metal or silicon. Depending on the exposed surface of the partially manufactured device, the deposition of oxide materials may have the disadvantage that the oxygen precursor damages (e.g., by oxidation) the exposed sensitive surface. Therefore, the industry seeks softer selective deposition processes. However, the development of such processes has proven difficult because maintaining sufficient deposition reactivity usually relies on a reactive oxygen precursor, because selectivity may require that the second precursor has moderate reactivity.
[0005] Any discussion set forth in this section, including discussion of problems and solutions, has been included in the present disclosure only to provide context for the present disclosure. Such discussion should not be considered as an admission that any information was known or constituted prior art when the present invention was made. Summary of the invention
[0006] This summary may introduce some concepts in a simplified form, which will be described in further detail below. This summary is not intended to necessarily identify key features or essential features of the claimed subject matter, nor is it intended to be used to limit the scope of the claimed subject matter. Various embodiments of the present disclosure are directed to methods of selectively depositing an oxide material on a first surface of a substrate relative to a second surface. Embodiments of the present disclosure also relate to methods of manufacturing semiconductor devices, and semiconductor processing assemblies.
[0007] Various embodiments of the present disclosure relate to vapor deposition methods and assemblies for selectively depositing an oxide material layer on a substrate.
[0008] A method for selectively depositing an oxide material layer on a first surface of a substrate is disclosed. The deposition on the first surface may be performed relative to a second surface of the same substrate. The method according to the present disclosure includes providing a substrate comprising a first surface and a second surface in a reaction chamber, and optionally providing a metal or metalloid catalyst in a gas phase to the reaction chamber. Thereafter, providing a first precursor in a gas phase in the reaction chamber; and providing an oxygen precursor comprising a hydroxyl group in a gas phase in the reaction chamber to form an oxide material layer on the first surface.
[0009] In some embodiments, the second surface comprises a passivation layer. In some embodiments, the passivation layer comprises polyimide.
[0010] In some embodiments, the first surface comprises a dielectric surface. In some embodiments, the first surface is a dielectric surface. In some embodiments, the first surface comprises silicon. In some embodiments, the first surface is a silicon-containing dielectric surface.
[0011] In some embodiments, the catalyst is a metalloid catalyst. In some embodiments, the catalyst comprises boron. In some embodiments, the catalyst comprises silicon. In some embodiments, the catalyst comprises a metal halide, an organometallic compound or a metal organic compound. In some embodiments, the catalyst is a metal catalyst. In some embodiments, the catalyst is a metal halide, an organometallic compound or a metal organic compound. In some embodiments, the catalyst is a compound comprising B, Zn, Mg, Mn, La, Hf, Al, Zr, Ti, Sn, Y or Ga. In some embodiments, the catalyst comprises trimethylaluminum (TMA), dimethylaluminum chloride, aluminum chloride (AlCl3), dimethylaluminum isopropoxide (DMAI), tri(tert-butyl)aluminum (TTBA), tri(isopropoxide)aluminum (TIPA), tri(dimethylamino)aluminum (TDMAA) or triethylaluminum (TEA).
[0012] In some embodiments, the substrate is heated prior to providing the catalyst into the reaction chamber.
[0013] In some embodiments, the oxygen precursor comprises an alcohol containing 1 to 6 carbon atoms. In some embodiments, the oxygen precursor is an alcohol containing 1 to 6 carbon atoms. In some embodiments, the oxygen precursor comprises a secondary alcohol or a tertiary alcohol. In some embodiments, the oxygen precursor is a secondary alcohol or a tertiary alcohol. In some embodiments, the oxygen precursor is selected from methanol, ethanol, 1-propanol, 2-propanol, 1-butanol, 2-butanol, 1-pentanol, isobutanol, tert-butanol, 2-pentanol, 3-pentanol, 1,2-ethanediol, 1,2-propylene glycol, 1,2,3-propanetriol, 1,2-butanediol, 2,3-butanediol, 1,3-butanediol, 1,4-butanediol, 1,2,3-butanetriol, 1,2 ,3,4-butanetetrol, 1,2-pentanediol, 1,3-pentanediol, 1,4-pentanediol, 1,5-pentanediol, 2,3-pentanediol, 2,4-pentanediol, 1,2,3-pentanetriol, 1,2,4-pentanetriol, 1,2,5-pentanetriol, 2,3,4-pentanetriol, 1,2,3,4-pentanetetrol, 1,2,3,5-pentanetetrol, 1,2,4,5-pentanetetrol.
[0014] In some embodiments, the first precursor comprises an alkoxy group.
[0015] In some embodiments, the oxide material layer includes silicon oxide, and the first precursor includes an alkoxysilane precursor. In some embodiments, the oxide material layer includes silicon oxide, and the first precursor is an alkoxysilane precursor. In some embodiments, the alkoxysilane is selected from tetraacetoxysilane, tetramethoxysilane, tetraethoxysilane, trimethoxysilane, triethoxysilane and trimethoxy (3-methoxypropyl) silane.
[0016] In some embodiments, the oxide material is a metal oxide and the first precursor is a metal alkoxide. In some embodiments, the oxide material is a metal oxide and the first precursor includes a metal alkoxide. In some embodiments, the first precursor includes a metal atom, an alkyl group, and an alkoxide group. In some embodiments, the metal of the metal precursor is a transition metal.
[0017] In some embodiments, the metal of the first precursor is selected from Al, Ga, and In. In some embodiments, the first precursor is selected from aluminum propoxide (Al(O n Pr)3), aluminum isopropoxide (Al(O i Pr)3), aluminum sec-butylate (Al(O s Bu)3), aluminum ethoxide (Al(OEt)3), Al(N i Pr2)2(C3H6NMe2), dimethylaluminum isopropoxide (AlMe2O i Pr), dimethyl gallium isopropoxide (GaMe2O i Pr), In(dmamp)2(OiPr).
[0018] In some embodiments, the first precursor comprises a cyclopentadienyl group. In some embodiments, the first precursor comprises a heteroleptic precursor comprising a Group 3 metal, at least one cyclopentadienyl ligand and at least one amido ligand. In some embodiments, the first precursor is a heteroleptic precursor comprising a Group 3 metal, at least one cyclopentadienyl ligand and at least one amido ligand. In some embodiments, the oxide material comprises a metal oxide, and the metal of the metal oxide is selected from scandium (Sc), yttrium (Y), lanthanum (La) and cerium (Ce). In some embodiments, the oxide material is a metal oxide, and the metal of the metal oxide is selected from scandium (Sc), yttrium (Y), lanthanum (La) and cerium (Ce). In some embodiments, the metal oxide is scandium oxide, and the first metal precursor is a scandium precursor. In some embodiments, the metal oxide is yttrium oxide, and the first metal precursor is a yttrium precursor. In some embodiments, the metal oxide is lanthanum oxide, and the first metal precursor is a lanthanum precursor. In some embodiments, the metal oxide is cerium oxide, and the first metal precursor is a cerium precursor.
[0019] In some embodiments, the cyclopentadienyl ligand comprises at least one C1 to C5 alkyl substituent. In some embodiments, the alkyl substituent is selected from methyl, ethyl, and a straight or branched alkyl group comprising three, four, or five carbon atoms. In some embodiments, the first metal precursor comprises two ethylcyclopentadienyl ligands.
[0020] In some embodiments, the amidino ligand includes an acetamido ligand. In some embodiments, the acetamido ligand is an alkyl acetamido ligand. In some embodiments, the alkyl acetamido ligand includes a dialkyl acetamido ligand. In some embodiments, the alkyl acetamido ligand is a dialkyl acetamido ligand. In some embodiments, one or two alkyl groups in the acetamido ligand are selected from methyl, ethyl, n-propyl, isopropyl, n-butyl, tert-butyl and sec-butyl.
[0021] In some embodiments, the first metal precursor is selected from bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido)scandium (Sc(iPrCp)2(iPr-AMD)), bis(ethylcyclopentadienyl)(N,N'-diisopropylacetamido)yttrium (Y(EtCp)2(iPr-AMD)), bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido)lanthanum (La(iPrCp)2(iPr-AMD)), and bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido)cerium (Ce(iPrCp)2(iPr-AMD)).
[0022] In some embodiments, the oxide material layer is deposited on the first surface with a selectivity greater than about 50% relative to the second surface.
[0023] In some embodiments, the method comprises a cyclic process, and the deposition cycle comprises providing the first precursor and the oxygen precursor into the reaction chamber. In some embodiments, the method is a cyclic process, and the deposition cycle comprises providing the first precursor and the oxygen precursor into the reaction chamber.
[0024] In some embodiments, at least two different pressures are used during a deposition cycle. In some embodiments, a first pressure is used during providing the catalyst into the reaction chamber, and a second pressure is used when providing the first precursor into the reaction chamber. In some embodiments, the first pressure is lower than the second pressure. In some embodiments, the first pressure is lower than about 5 Torr. In some embodiments, the second pressure is greater than or equal to about 5 Torr.
[0025] In some embodiments, at least one oxygen precursor is provided to the reaction chamber at least partially simultaneously with the first precursor. In some embodiments, at least one oxygen precursor is provided to the reaction chamber at least partially after the first precursor is provided to the reaction chamber. In some embodiments, the first precursor is provided in two or more consecutive pulses during the deposition cycle. In some embodiments, the method further comprises an activation treatment prior to the deposition of the oxide material layer, wherein the activation treatment comprises providing a catalyst in a gas phase to the reaction chamber; and providing an oxygen precursor in a gas phase to the reaction chamber. In some embodiments, the catalyst and the oxygen precursor are cyclically provided to the reaction chamber.
[0026] In some embodiments, the oxide material is deposited in a substantially water-free environment.
[0027] In another aspect, a semiconductor processing assembly for selectively depositing an oxide material layer on a substrate is disclosed. The semiconductor processing assembly includes: one or more reaction chambers, the reaction chambers being constructed and arranged to hold a substrate; a precursor injector system, which is constructed and arranged to provide a first precursor and an oxygen precursor into the reaction chamber in a gas phase. The semiconductor processing assembly also includes a first precursor source constructed and arranged to contain the first precursor, and an oxygen source constructed and arranged to contain the oxygen precursor. The semiconductor processing assembly is constructed and arranged to provide a first metal precursor and an oxygen precursor into the reaction chamber through the precursor injector system to selectively deposit a metal oxide on the substrate.
[0028] In some embodiments, the semiconductor processing assembly further includes one or more passivation sources, and the precursor injector system is constructed and arranged to provide one or more passivating agents in a vapor phase into the reaction chamber prior to providing the first metal precursor into the reaction chamber. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] The accompanying drawings, which are included to provide a further understanding of the disclosure and constitute a part of this specification, illustrate exemplary embodiments and together with the description help to explain the principles of the disclosure.
[0030] In the attached picture:
[0031] Figure 1 is a block diagram of an exemplary embodiment of a method according to the present disclosure.
[0032] Figure 2 is a schematic diagram of an embodiment of a semiconductor processing assembly according to the present disclosure.
[0033] It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. The illustrations presented herein are not meant to be actual views of any particular material, structure, or device, but are merely idealized representations used to describe embodiments of the present disclosure. For example, the size of some elements in the drawings may be exaggerated relative to other elements to help improve understanding of the illustrated embodiments of the present disclosure. DETAILED DESCRIPTION
[0034] The descriptions of exemplary embodiments of methods, structures, devices, and semiconductor processing assemblies provided below are merely exemplary and are for illustrative purposes only. The following description is not intended to limit the scope of the present disclosure or the claims. In addition, the recitation of multiple embodiments having the features shown is not intended to exclude other embodiments having additional features or other embodiments incorporating different combinations of the features described. For example, various embodiments are set forth as exemplary embodiments and may be recited in dependent claims. Unless otherwise indicated, the exemplary embodiments or components thereof may be combined or may be applied separately from each other.
[0035] The headings provided herein, if any, are for convenience only and do not necessarily affect the scope or meaning of the claimed subject matter.
[0036] In one aspect, a method for selectively depositing a layer of oxide material on a first surface of a semiconductor substrate relative to a second surface of the substrate is disclosed. The method includes providing a substrate including a first surface and a second surface in a reaction chamber. As used herein, the terms "layer" and / or "film" may refer to any continuous or non-continuous material, such as a material deposited by the methods disclosed herein. For example, the layer and / or film may include a two-dimensional material, a three-dimensional material, nanoparticles, or even a partial or complete molecular layer or a partial or complete atomic layer or atom and / or molecular clusters. The film or layer may include a material or layer having pinholes, which may be at least partially continuous. In some embodiments, the layer according to the present disclosure is substantially continuous. In some embodiments, the layer according to the present disclosure is continuous.
[0037] Substrate
[0038] The deposition method according to the present invention includes providing a substrate in a reaction chamber. The substrate can be any one or more underlying materials that can be used to form or on which a structure, device, circuit or layer can be formed. The substrate can include bulk materials, such as silicon (e.g., single crystal silicon), other IV group materials, such as germanium, or other semiconductor materials, such as II-VI group or III-V group semiconductor materials, and can include one or more layers covering or located below the bulk material. In addition, the substrate can include various features, such as depressions, protrusions, etc. formed in or on at least a portion of the substrate layer. For example, the substrate can include a bulk semiconductor material and an insulating or dielectric material layer covering at least a portion of the bulk semiconductor material. The substrate can include nitrides, such as TiN, oxides, insulating materials, dielectric materials, conductive materials, metals, such as tungsten, ruthenium, molybdenum, cobalt, aluminum or copper, or metallic materials, crystalline materials, epitaxial materials, heteroepitaxial materials and / or single crystal materials. In some embodiments currently disclosed, the substrate includes silicon. As described above, in addition to silicon, the substrate can include other materials. Other materials can form layers. Specifically, the substrate can include a partially manufactured semiconductor device.
[0039] The substrate according to the present disclosure includes a first surface and a second surface. The first surface and the second surface have different material properties, allowing for selective deposition of an oxide material layer on the first surface. For clarity, the first surface and the second surface may be on the same side of the substrate.
[0040] In some embodiments, the substrate may be pretreated or cleaned before or at the beginning of the selective deposition process. In some embodiments, the substrate may be subjected to a plasma cleaning process before or at the beginning of the selective deposition process. In some embodiments, the plasma cleaning process may not include ion bombardment, or may include a relatively small amount of ion bombardment. For example, in some embodiments, before or at the beginning of the selective deposition process, the substrate surface may be exposed to plasma, free radicals, excited substances, and / or atomic substances. In some embodiments, before or at the beginning of the selective deposition process, the substrate surface may be exposed to hydrogen plasma, free radicals, or atomic substances. In some embodiments, the substrate may be subjected to a chemical cleaning process before or at the beginning of the selective deposition process. In some embodiments, alcohols such as methanol or ethanol may be used to perform the chemical cleaning process. In some embodiments, beta-diketonates such as hexafluoroacetylacetone (Hhfac) may be used to perform the chemical cleaning process. Without limiting the present disclosure to any particular theory, the cleaning process may reduce the surface, such as a metal surface. In some embodiments, the pretreatment or cleaning process may be performed in the same reaction chamber as the selective deposition process. However, in some embodiments, the pretreatment or cleaning process may be performed in a separate reaction chamber.
[0041] Reaction Chamber
[0042] The method for depositing an oxide material layer according to the present invention includes providing a substrate in a reaction chamber. In other words, the substrate is in a space where deposition conditions can be controlled. The reaction chamber can be a single wafer reactor. Alternatively, the reaction chamber can be a batch reactor. The reaction chamber can form part of a vapor processing assembly for manufacturing semiconductor devices such as semiconductor processing assemblies. The semiconductor processing assembly may include one or more multi-station processing chambers. The reaction chamber may be part of a combination tool in which different processes are performed to form an integrated circuit. The various stages of the method can be performed in a single reaction chamber, or they can be performed in multiple reaction chambers, such as a reaction chamber of a combination tool, or a deposition station of a multi-station processing chamber.
[0043] In some embodiments, the reaction chamber may be a flow-type reactor, such as a cross-flow reactor. In some embodiments, the reaction chamber may be a showerhead reactor. In some embodiments, the reaction chamber may be a hot wall reactor. In some embodiments, the reaction chamber may be a spatially separated reactor. In some embodiments, the reaction chamber may be a single wafer ALD reactor. In some embodiments, the reaction chamber may be a single wafer ALD reactor for mass production. In some embodiments, the reaction chamber may be a batch reactor for simultaneously producing multiple substrates.
[0044] The reaction chamber of the present disclosure may form part of an atomic layer deposition (ALD) assembly. The reaction chamber may form part of a chemical vapor deposition (CVD) assembly. The processing assembly may be an ALD or CVD processing assembly. In certain parts of the deposition process flow, molecular layer deposition (MLD) may be employed. In some embodiments, the method is performed in a single reaction chamber of a combination tool, but other, previous or subsequent manufacturing steps of the structure or device are performed in additional reaction chambers of the same combination tool. Optionally, a semiconductor processing assembly including a reaction chamber may be provided with a heater to activate the reaction by raising the temperature of one or more substrates and / or reactants and / or precursors.
[0045] Cyclic Vapor Deposition
[0046] When the substrate is provided in the reaction chamber, an oxide material layer is deposited on the first surface of the substrate by a cyclic vapor deposition process. Cyclic deposition in the present disclosure refers to a vapor deposition process that performs deposition cycles (usually multiple consecutive deposition cycles) in a processing chamber.
[0047] In the present disclosure, "gas" may include materials that are gaseous at normal temperature and pressure (NTP), evaporated solids and / or evaporated liquids, and may be composed of a single gas or a gas mixture as appropriate. Precursors according to the present disclosure may be provided to a reaction chamber in a gas phase. The term "inert gas" may refer to a gas that does not participate in a chemical reaction and / or does not become part of a layer to a perceptible degree. Exemplary inert gases include He and Ar and any combination thereof. In some cases, molecular nitrogen and / or hydrogen may be inert gases. Gases other than process gases, i.e., gases that are not introduced by a precursor injector system, other gas distribution devices, etc., may be used, for example, to seal a reaction space and may include a sealing gas.
[0048] Typically, in a cyclic deposition process according to the present disclosure, such as atomic layer deposition (ALD) and molecular layer deposition (MLD), during each cycle, a first precursor is introduced into a reaction chamber and chemically adsorbed onto a substrate surface (e.g., a substrate surface that may include previously deposited material or other material from a previous deposition cycle). In some embodiments, the first precursor on the substrate surface is not easily reacted with additional first precursors (i.e., the deposition of the first precursor may be a partially or completely self-limiting reaction). Thereafter, a second precursor or reactant may be introduced into the reaction chamber for converting the chemically adsorbed first precursor into a desired material on the deposition surface. The second precursor or reactant is capable of further reacting with the precursor. During one or more cycles, such as during each step of each cycle, a purge step may be utilized to remove any excess first precursor from the processing chamber and / or remove any excess second precursor, reactant, and / or reaction byproducts from the reaction chamber. Thus, in some embodiments, the cyclic deposition process includes purging the reaction chamber after providing the first precursor into the reaction chamber. In some embodiments, the cyclic deposition process includes purging the reaction chamber after providing the oxygen precursor into the reaction chamber. In some embodiments, the cyclic deposition process includes purging the reaction chamber after providing the second metal precursor into the reaction chamber. In some embodiments, the cyclic deposition process includes purging the reaction chamber after providing the first precursor into the reaction chamber, after providing the oxygen precursor into the reaction chamber, and after providing the second metal precursor into the reaction chamber. Without limiting the present disclosure to any particular theory, ALD and MLD may be similar processes in terms of self-limiting reactions and slower and more controllable layer growth rates compared to CVD. Typically, ALD is used to deposit inorganic materials, while in MLD, the precursors may be entirely organic molecules.
[0049] In some embodiments, the vapor deposition method according to the present disclosure includes providing the first precursor and the oxygen precursor alternately and sequentially into the reaction chamber. Considering controlled layer growth, selectivity, layer uniformity and / or conformality, this configuration for providing two precursors (i.e., a first precursor pulse and an oxygen precursor pulse, respectively) may be beneficial. The second metal precursor may also be provided alternately and sequentially relative to the first precursor and / or the oxygen precursor.
[0050] In some embodiments, the process according to the present disclosure may include a CVD component. CVD-type processes are characterized by vapor deposition, which is not self-limiting. They generally involve gas phase reactions between two or more precursors and / or reactants. Precursors and reactants may be provided to the reaction space or substrate simultaneously, or in partially or completely separated pulses. However, CVD may be performed with a single precursor or two or more precursors that do not react with each other. A single precursor may be decomposed into reactive components deposited on the substrate surface. For example, decomposition may be performed by plasma or thermal methods. The substrate and / or reaction space may be heated to promote the reaction between gaseous precursors and / or reactants. In some embodiments, precursors and reactants are provided until a layer with a desired thickness is deposited. In some embodiments, a cyclic CVD process may be used to deposit a film with a desired thickness through multiple cycles. In a cyclic CVD process, precursors and / or reactants may be provided to the reaction chamber with pulses that do not overlap or partially or completely overlap. The process may include one or more cyclic stages. In some embodiments, the process includes one or more non-cyclic (i.e., continuous) stages. An example of a continuous phase is pretreatment with a single reactant. In some embodiments, the deposition process includes a continuous flow of at least one precursor. In some embodiments, one or more precursors are provided continuously in the reaction chamber.
[0051] In some embodiments, at least one of the first precursor, the oxygen precursor, and the second metal precursor is provided to the reaction chamber in pulses. In some embodiments, the first precursor is provided in pulses, the oxygen precursor is provided in pulses, and the reaction chamber is purged between successive pulses of the first precursor and the oxygen precursor. In some embodiments, the second metal precursor is provided in pulses, the oxygen precursor is provided in pulses, and the reaction chamber is purged between successive pulses of the second metal precursor and the oxygen precursor. In some embodiments, the first precursor is provided in pulses, the second metal precursor is provided in pulses, and the reaction chamber is purged between successive pulses of the first precursor and the second metal precursor. The duration of providing the first precursor and / or the second metal precursor to the reaction chamber (i.e., the first precursor pulse time and the second metal precursor pulse time, respectively) can be, for example, from about 0.1s to about 60s, such as from about 0.1s to about 5s, or from about 1s to about 20s, or from about 1s to about 8s, or from about 0.5s to about 10s, or from about 5s to about 15s, or from about 10s to about 30s, or from about 10s to about 60s, or from about 20s to about 60s. The duration of the first precursor or the second metal precursor pulse can be, for example, about 0.3s, 0.5s, 1.5s, 2s, 2.5s, 3s, 4s, 5s, 8s, 10s, 12s, 15s, 25s, 30s, 40s, 50s, or 60s. In some embodiments, the first precursor or the second metal precursor pulse time can be at least 1 second, or at least 3 seconds. In some embodiments, the first precursor or the second metal precursor pulse time can be at most 2 seconds, or at most 5 seconds, or at most 10 seconds, or at most 30 seconds.
[0052] The duration of providing the oxygen precursor to the reaction chamber (i.e., the oxygen precursor pulse time) can be, for example, from about 0.05s to about 60s, such as from about 0.05s to about 5s, or from about 0.1s to about 20s, or from about 0.2s to about 8s, or from about 0.5s to about 10s, or from about 5s to about 15s, or from about 10s to about 30s, or from about 10s to about 30s, or from about 20s to about 60s. The duration of the oxygen precursor pulse can be, for example, about 0.15s, 0.2s, 0.3s, 0.4s, 0.5s, 1s, 1.5s, 2s, 2.5s, 3s, 5s, 7s, 10s, 12s, 15s, 25s, 30s, 40s, 50s, or 60s. In some embodiments, the oxygen precursor pulse time can be at least 0.25 seconds, or at least 0.5 seconds. In some embodiments, the oxygen precursor pulse time can be at most 2 seconds, or at most 5 seconds, or at most 10 seconds, or at most 30 seconds.
[0053] The pulse times of the first precursor, the second metal precursor, and the oxygen precursor vary independently according to the process in question. The selection of the appropriate pulse time may depend on the substrate topology, such as the aspect ratio of the features on or in the substrate. For structures with higher aspect ratios, longer pulse times may be required to obtain sufficient surface saturation in different regions of the high aspect ratio structure. In addition, the selected precursor chemistry may affect the appropriate pulse time. For process optimization purposes, shorter pulse times may be preferred as long as appropriate layer properties can be achieved. In some embodiments, the first precursor pulse time is longer than the second metal precursor pulse time. In some embodiments, the second metal precursor pulse time is longer than the first precursor pulse time. In some embodiments, the first precursor pulse time is the same as the second metal precursor pulse time. In some embodiments, the first precursor pulse time is longer than the oxygen precursor pulse time. In some embodiments, the oxygen precursor pulse time is longer than the first precursor pulse time. In some embodiments, the first precursor pulse time is the same as the oxygen precursor pulse time. In some embodiments, the second metal precursor pulse time is longer than the oxygen precursor pulse time. In some embodiments, the oxygen precursor pulse time is longer than the second metal precursor pulse time. In some embodiments, the second metal precursor pulse time is the same as the oxygen precursor pulse time.
[0054] In some embodiments, providing the first precursor and / or the second metal precursor to the reaction chamber includes pulsing the first precursor and the second metal precursor on the substrate. In certain embodiments, pulse times in the range of several minutes can be used for the first precursor and / or the second metal precursor. In some embodiments, the first precursor can be pulsed more than once, for example, twice, three times, or four times, before the second metal precursor or the oxygen precursor is pulsed into the reaction chamber. Similarly, there can be more than one pulse, for example, two, three, or four pulses of the second metal precursor or the oxygen precursor, before the first precursor is pulsed (i.e., provided) into the reaction chamber.
[0055] In the method according to the present disclosure, the vapor deposition process includes providing a first precursor to a reaction chamber in a vapor phase and providing an oxygen precursor to the reaction chamber in a vapor phase. In some embodiments, the deposition cycle includes providing a second metal precursor to the reaction chamber. As described above, the process is a cyclic deposition process, so the precursor is repeatedly provided (i.e., pulsed) to the reaction chamber. Depending on, for example, the growth rate of the oxide material and the expected thickness of the oxide material layer, the pulse can be repeated as needed. In some embodiments, the growth rate of the oxide material layer is from about 0.01nm / cycle to about 0.5nm / cycle. In some embodiments, the growth rate of the oxide material layer is from about 0.01nm / cycle to about 0.05nm / cycle, for example, about 0.02nm / cycle or about 0.03nm / cycle. In some embodiments, the growth rate of the oxide material layer is from about 0.03nm / cycle to about 0.1nm / cycle, for example, about 0.07nm / cycle or about 0.08nm / cycle or about 0.09nm / cycle. In some embodiments, the growth rate of the oxide material layer is from about 0.05 nm / cycle to about 0.3 nm / cycle, such as about 0.15 nm / cycle, about 0.2 nm / cycle, or about 0.25 nm / cycle. In some embodiments, the growth rate of the oxide material layer is from about 0.1 nm / cycle to about 0.5 nm / cycle, such as about 0.35 nm / cycle, about 0.4 nm / cycle, or about 0.45 nm / cycle.
[0056] The oxide material layer thickness may be selected depending on the application in question. In some embodiments, the deposited oxide material layer has a thickness from about 0.03 nm to about 10 nm. Thus, depending on the growth rate of the oxide material layer, the deposition cycle may be performed from about 2 to about 800 times. For example, the deposition cycle may be performed about 2, 3, 5, 7, 10, 13, 15, 20, 40, 50, 100, 200, 300, 500, or 600 times.
[0057] In some embodiments, the deposition is performed under reduced pressure. In some embodiments, the oxide material layer according to the present disclosure is deposited at a pressure of at least 0.01 Torr to at most 100 Torr, or at least 0.1 Torr to at most 50 Torr, or at least 0.5 Torr to at most 25 Torr, or at least 1 Torr to at most 10 Torr, or at least 2 Torr to at most 5 Torr. For example, the oxide material layer can be deposited at a pressure of about 1 Torr, about 3 Torr, about 6 Torr, about 8 Torr, about 9 Torr, about 12 Torr, or about 18 Torr.
[0058] In some embodiments, deposition according to the present disclosure is performed in an atmosphere substantially free of oxygen. In some embodiments, deposition is performed under reduced pressure in an atmosphere substantially free of oxygen. Thus, in some embodiments, the oxygen precursor is substantially the only oxygen source for the oxide material deposited according to the present disclosure. For example, deposition according to the present disclosure can be performed in an environment substantially free of water.
[0059] The reduction in size of semiconductor devices (such as complementary metal oxide semiconductor (CMOS) devices) has led to significant increases in the speed and density of integrated circuits. However, conventional device scaling techniques face significant challenges for future technology nodes. For example, one challenge is to find a suitable dielectric stack that forms an insulating barrier between the gate and the channel of a field effect transistor while keeping the number of processing steps economical and feasible to allow reliable device manufacturing. A particular problem in this regard is the deposition of a layer that controls the threshold voltage of a field effect transistor. Therefore, in one aspect, a threshold voltage shift layer deposited according to the method disclosed herein is disclosed. Therefore, in some embodiments, the oxide material layer is a threshold voltage shift layer. The term "threshold voltage" as used herein refers to the minimum gate voltage required to establish a conductive path between the source and drain terminals of a field effect transistor. The term "threshold voltage shift layer" as used herein refers to a layer used to control the threshold voltage of a metal oxide field effect transistor. Therefore, it refers to a layer that can be used in the gate stack of a field effect transistor and can change the threshold voltage of the field effect transistor. It can be equivalent to similar terms such as "threshold voltage tuning layer", "dipole layer" or "threshold voltage control layer".
[0060] In such embodiments, a layer thickness of, for example, about 1 nm or less may be desired. Accordingly, deposition cycles may be performed from about 2 to about 100 or 150 times, for example about 2, 3, 5, 7, 10, 13, 15, 20, 40, 50, 75, or 120 times.
[0061] The present method and device for selectively depositing a threshold voltage shift layer are particularly useful for controlling the threshold voltage of an n-channel field effect transistor, such as an n-channel metal oxide semiconductor field effect transistor, such as an n-channel all-around gate metal oxide semiconductor field effect transistor. In some embodiments, the present method and device are particularly useful for controlling the threshold voltage of a p-channel field effect transistor, such as a p-channel metal oxide semiconductor field effect transistor, such as a p-channel all-around gate metal oxide semiconductor field effect transistor. In particular, the present method and device are particularly useful for sensing the positive flat band voltage shift of a metal oxide semiconductor field effect transistor (MOSFET). Therefore, the present method and device are particularly useful for increasing the gate voltage that generates a conductive channel between the source and drain of an n-MOSFET. For example, an n-MOSFET can be included in a CMOS-based integrated circuit. Additionally or alternatively, the present method and device are particularly useful for reducing the gate voltage that generates a conductive channel between the source and drain of a p-MOSFET. For example, a p-MOSFET can be included in a CMOS-based integrated circuit. In other words, the present method and device are particularly useful for increasing the voltage at which an n-MOSFET switches from an off state to an on state and reducing the voltage at which a p-MOSFET switches from an off state to an on state. Similarly, the present method and device are particularly useful for increasing the flatband voltage of an n-MOSFET and reducing the flatband voltage of a p-MOSFET. The present method and device are particularly useful for manufacturing n-MOSFETs and p-MOSFETs with a full surround gate architecture. Additionally or alternatively, the present method and device can be particularly useful in the context of a system on a chip. Advantageously, the currently disclosed method allows deposition of a threshold drift layer that contributes minimally to the equivalent oxide thickness of a gate dielectric stack, while providing a low growth rate and providing a significant positive threshold voltage drift.
[0062] The presently disclosed methods may allow for the deposition of threshold voltage shift layers having low impurity content, such as less than 2.5 atomic % or less than 2.0% carbon content.
[0063] The method and device described at present are useful for controlling the threshold voltage of a field effect transistor. In some embodiments, the method and device can be used to control the threshold voltage of an n-channel field effect transistor, such as an n-channel metal oxide semiconductor field effect transistor, such as an n-channel all-around gate metal oxide semiconductor field effect transistor. In some embodiments, the method and device are particularly useful for controlling the threshold voltage of a p-channel field effect transistor, such as a p-channel metal oxide semiconductor field effect transistor, such as a p-channel all-around gate metal oxide semiconductor field effect transistor. In particular, the method and device are particularly useful for sensing the positive flat band voltage offset of a metal oxide semiconductor field effect transistor (MOSFET). Therefore, the method and device are particularly useful for increasing the gate voltage that generates a conductive channel between the source and drain of an n-MOSFET. For example, an n-MOSFET can be included in a CMOS-based integrated circuit. In addition or alternatively, the method and device are particularly useful for reducing the gate voltage that generates a conductive channel between the source and drain of a p-MOSFET. For example, a p-MOSFET can be included in a CMOS-based integrated circuit. In other words, the method.
[0064] In some embodiments, the oxide material layer is an etch stop layer. The term "etch stop layer" used herein refers to a layer having a lower etching rate than another material on the same substrate during an etching process used in a process for manufacturing a semiconductor device. The etch stop layer is used to protect the underlying material from being etched. In some embodiments, the etch stop layer is not substantially etched under the etching conditions used. The etch stop layer may not have the characteristics required for the semiconductor device, so it can be removed after the etching is completed. In some cases, for example, when the etch stop layer is thin enough, or when it does not adversely affect the semiconductor device, it can remain in the final structure. The etch stop layer can have a thickness from about 0.5nm to about 10nm, for example, about 1nm, about 2nm, about 3nm or about 4nm, about 5nm or about 7nm. Accordingly, to obtain an etch stop layer of the desired thickness, the deposition cycle may be performed from about 2 to about 500 or about 600 times, such as about 3, 5, 10, 15, 25, 50, 75, 100, 150, 200, 250, 300, 400, 450, or 550 times. Because a metal oxide etch stop layer may be very etch resistant, using, for example, an yttrium oxide layer may be advantageous because it can be kept very thin, such as less than 2 nm or less than 1 nm, or less than 0.5 nm.
[0065] As an example, a yttrium oxide (Y2O3) based etch stop layer can be used as a hard mask in the patterning of structures on a semiconductor substrate. Metal oxide hard masks such as yttrium oxide show much higher etch resistance than carbon based hard masks, preventing, for example, the "rounding" phenomenon during a prolonged etching process. to about ) can mitigate or eliminate the major disadvantages associated with thicker yttrium oxide etch stop layers, such as the difficulty of removal and the impact on device stack performance if not removed. In addition to selective deposition, the yttrium oxide-based hard mask can be used in a non-selective manner because it can be effectively patterned and removed with a chlorine-based wet etch, while it will not be etched by HF. Therefore, in some embodiments, the etch stop layer described herein can be deposited substantially non-selectively on a substrate including one or more surfaces. In other words, in some embodiments, the etch stop layer according to the present disclosure can be non-selectively deposited. This can be achieved by selecting a substrate on which the deposition surface is essentially non-selective to the current chemistry and omitting any passivation disclosed herein.
[0066] However, by using a heteroleptic precursor comprising yttrium and at least one cyclopentadienyl ligand and at least one amidine ligand, yttrium oxide can also be deposited with excellent selectivity. Yttrium oxide deposition is selective to surfaces comprising organic passivation (e.g., passivation comprising polyimide). In addition, yttrium oxide can be deposited on high-k materials, such as HfO2 relative to silylated silicon-containing surfaces (e.g., silicon oxide). The selective workflow can eliminate process steps including wet etching to pattern a hard mask, which may be beneficial in many applications. In some embodiments, prior to deposition, a substrate comprising a first surface containing hafnium oxide can be treated with hydrogen plasma. In some embodiments, the substrate is treated with hydrogen plasma for about 5 seconds, about 10 seconds, about 20 seconds, or about 30 seconds. This can increase the growth rate of metal oxides on the substrate surface.
[0067] The etch stop layer can be removed after the etching process is complete. However, if the etch stop layer is thin enough, it may not be necessary to remove it. This may be advantageous in situations where a very resistant etch stop layer is required, and its removal may be challenging. Alternatively or in addition, if the etch stop layer can remain in the finished structure, the process can become simpler because the etch stop layer removal step can be omitted.
[0068] Furthermore, methods and layers according to the present disclosure may be used in many other applications, particularly in logic, including deposition of guiding layers, electrical insulation of conductive materials, and improved via alignment at a relatively low cost.
[0069] In some embodiments, the cyclic deposition process according to the present disclosure includes a thermal deposition process. In thermal deposition, the temperature increased relative to the ambient temperature promotes chemical reactions. Generally speaking, in the absence of other external energy sources (such as plasma, free radicals or other forms of radiation), the temperature increase provides the energy required to form the target material. In some embodiments, the method according to the present disclosure includes a plasma enhanced deposition method, such as PEALD or PECVD. For example, in some embodiments, the oxide material layer deposition can be performed by PEALD or PECVD.
[0070] Selectivity
[0071] The present disclosure relates to selective deposition processes. Selectivity can be given by a percentage calculated as [(deposition on the first surface)-(deposition on the second surface)] / (deposition on the first surface). Deposition can be measured by any of a variety of methods. In some embodiments, deposition can be given as a measured thickness of a deposited material. In some embodiments, deposition can be given as a measured amount of a deposited material.
[0072] In some embodiments, the selectivity is greater than about 30%. In some embodiments, the selectivity is greater than about 50%. In some embodiments, the selectivity is greater than about 75% or greater than about 85%. In some embodiments, the selectivity is greater than about 90% or greater than about 93%. In some embodiments, the selectivity is greater than about 95% or greater than about 98%. In some embodiments, the selectivity is greater than about 99% or even greater than about 99.5%. In embodiments, the selectivity can vary with the duration or thickness of the deposition.
[0073] In some embodiments, deposition occurs only on the first surface and not on the second surface. In some embodiments, deposition on the first surface of the substrate has a selectivity of at least about 80% relative to the second surface of the substrate, which may be sufficiently selective for some specific applications. In some embodiments, deposition on the first surface of the substrate has a selectivity of at least about 50% relative to the second surface of the substrate, which may be sufficiently selective for some specific applications. In some embodiments, deposition on the first surface of the substrate has a selectivity of at least about 10% relative to the second surface of the substrate, which may be sufficiently selective for some specific applications.
[0074] In some embodiments, selective deposition is inherent, and no additional processing steps are required except for the processing steps conveniently performed on the substrate. However, in some embodiments, before depositing the oxide material layer on the first surface, the second surface can be passivated. Selectivity may be inherent to the specific thickness of the deposited material, and will be lost if the deposition continues to exceed a specific process threshold. Therefore, before the selectivity is lost, an oxide material layer of, for example, about 0.1nm, about 0.5nm, about 1nm, about 2nm, about 3nm, about 5nm or about 6nm can be deposited. If a thicker material layer is required, the contrast between the first surface and the second surface can be enhanced by passivating the second surface. Alternatively or in addition, an intermittent etch-back phase using, for example, plasma (such as hydrogen plasma) can be used to maintain sufficient selectivity of the process. In some embodiments, the second surface includes passivation. In some embodiments, the passivation includes a passivation layer on the second surface. In some embodiments, the passivation layer includes an organic polymer. In some embodiments, the organic polymer includes polyimide. In some embodiments, the passivation includes silylation of the second surface.
[0075] In some embodiments, the first surface is a dielectric surface. In some embodiments, the first surface is a low-k surface. The low-k surface here refers to a surface having a k value similar to that of silicon oxide at most. In some embodiments, the first surface includes oxide. In some embodiments, the first surface includes nitride. In some embodiments, the first surface includes silicon. In some embodiments, the first surface includes silicon-based dielectric materials. Examples of silicon-containing dielectric materials include silicon oxide-based materials, including grown or deposited silicon dioxide, doped and / or porous oxides, and natural oxides on silicon. In some embodiments, the first surface includes silicon oxide. In some embodiments, the first surface is a silicon oxide surface, such as a natural oxide surface, a thermal oxide surface, or a chemical oxide surface. In some embodiments, the first surface includes carbon. In some embodiments, the first surface includes SiN. In some embodiments, the first surface includes SiOC. In some embodiments, the first surface is an etch stop layer. The etch stop layer may include, for example, a nitride. In some embodiments, the first dielectric surface includes a material selected from SiO2, SiN, SiC, SiOC, SiON, SiOCN, SiGe, and combinations thereof.
[0076] In some embodiments, the substrate includes a first dielectric surface and a second metal or metallic surface. In some embodiments, the substrate includes a first metal oxide surface. In some embodiments, the first surface may include -OH groups. In some embodiments, the first surface may be a SiO2-based surface. In some embodiments, the first surface may include Si-O bonds. In some embodiments, the first surface may include a low-k material based on SiO2. In some embodiments, the first surface may contain greater than about 30% or greater than about 50% SiO2. In certain embodiments, the first surface may include a silicon dioxide surface. Therefore, in some embodiments, the first surface includes silicon. In some embodiments, the first surface is a silicon-containing dielectric surface.
[0077] In some embodiments, the first surface is a SiO2 surface and the second surface is a metal surface. In some embodiments, the first surface is a SiN surface and the second surface is a metal surface, such as an elemental metal surface. In some embodiments, the first surface is a SiOC surface and the second surface is a metal surface. In some embodiments, the first surface is a SiON surface and the second surface is a metal surface. In some embodiments, the first surface is a SiOCN surface and the second surface is a metal surface. The second metal surface can be, for example, a copper surface, a ruthenium surface, a tungsten surface, a cobalt surface.
[0078] In some embodiments, the dielectric material of the first surface comprises a metal oxide. Thus, in some embodiments, the oxide material layer is selectively deposited on the first metal oxide surface relative to the second surface. In some embodiments, the first surface comprises aluminum oxide. In some embodiments, the first surface is a high-k surface, such as a surface containing hafnium oxide, a surface containing lanthanum oxide.
[0079] In some embodiments, the oxide material layer is selectively deposited on a first surface comprising a metal oxide relative to another surface. The metal oxide surface can be, for example, a tungsten oxide (WOx) surface, a hafnium oxide (HfOx) surface, a titanium oxide (TiOx) surface, an aluminum oxide (AlOx) surface, or a zirconium oxide (ZrOx) surface. In some embodiments, the metal oxide surface is an oxidized surface of a metallic material. In some embodiments, at least the surface of a metallic material is oxidized by using an oxygen compound such as O3, H2O, H2O2, O2, an oxygen atom, a plasma, or a free radical or a mixture thereof to produce a metal oxide surface. In some embodiments, the metal oxide surface is a natural oxide formed on a metallic material.
[0080] In some embodiments, the oxide material layer is selectively deposited on the first dielectric surface of the substrate relative to the second conductive (e.g., metal or metallic) surface of the substrate. In some embodiments, the first surface includes hydroxyl groups (-OH). In some embodiments, the first surface may additionally include a hydrogen (-H) terminal, such as a Si immersed in HF or a Ge immersed in HF. In such embodiments, the surface of interest will be considered to include the -H terminal and the material below the -H terminal. In some embodiments, the first surface and the second surface are adjacent to each other.
[0081] In some embodiments, the oxide material layer is selectively deposited on a first dielectric surface of the substrate relative to a different second dielectric surface. In some such embodiments, the dielectric has different compositions. In some embodiments, the first surface comprises a metal oxide. In some embodiments, the metal oxide is selected from aluminum oxide, hafnium oxide, and zirconium oxide. In some embodiments, the first surface comprises a high-k material. In some embodiments, the high-k material is selected from hafnium oxide, zirconium oxide, and combinations thereof. In some embodiments, the first surface is a hafnium oxide surface. In some embodiments, the first surface is a zirconium oxide surface. In some embodiments, the first surface is a hafnium zirconium oxide surface. In some embodiments, the first surface is a hafnium oxide surface and the second surface is a silicon-containing surface. In some embodiments, the first surface is a zirconium oxide surface and the second surface is a silicon-containing surface. In some embodiments, the first surface is a hafnium zirconium oxide surface and the second surface is a silicon-containing surface. In some embodiments, the first surface is a hafnium zirconium oxide surface and the second surface is a silicon-containing surface.
[0082] In some embodiments, passivation (e.g., silylation) is used to improve the contrast between the two dielectric surfaces prior to depositing a layer of oxide material on the first dielectric surface. In some embodiments, the first surface is a high-k surface and the second surface is a passivated low-k surface. In some embodiments, the first surface is a hafnium oxide surface and the second surface is a silylated silicon-containing surface. In some embodiments, the first surface is a zirconium oxide surface and the second surface is a silylated silicon-containing surface. In some embodiments, the first surface is a hafnium zirconium oxide surface and the second surface is a silylated silicon-containing surface. The silicon-containing second surface, such as a SiO2, SiN, SiC, SiON, or SiOC surface, can be selectively silylated relative to the first surface by a silylating agent. In some embodiments, the silicon-containing second surface is silylated by exposure to a silylating agent, such as an alkylsilane, for example, allyltrimethylsilane (TMS-A), a halosilane, for example, trimethylchlorosilane (TMS-Cl) or octadecyltrichlorosilane (ODTCS), an imidazole, for example, N-(trimethylsilyl)imidazole (TMS-Im), a silazane, for example, hexamethyldisilazane (HMDS), or a silylamine, for example, N-(trimethylsilyl)dimethylamine (TMSDMA). Silylation can passivate the second surface, preventing the oxide material layer from being deposited on the second surface.
[0083] Thus, in some embodiments, a blocking dielectric surface can allow for selective passivation of another surface, such as a metal surface or a dielectric surface of a different composition. In some embodiments, the blocked dielectric surface can be treated, such as with a plasma, to provide a desired surface termination to promote catalyst chemisorption, as described in more detail below.
[0084] In some embodiments, the method includes, before providing the first precursor into the reaction chamber, passivating the first surface with a silylating agent, and then depositing an organic polymer on the second surface. For example, the first surface can be a dielectric surface comprising silicon, and the second surface can be a metal or metallic surface. The first dielectric surface can be passivated with a silylating agent, allowing the second metal or metallic surface to be passivated by a passivation layer comprising an organic polymer, such as a passivation layer comprising polyimide. The oxide material layer according to the present invention can be deposited on the first surface after removing the initial silylation passivation. Therefore, in some embodiments, the second surface includes a passivation layer. In some embodiments, the passivation layer includes polyimide. In some embodiments, silylation of the dielectric surface contributes to the selectivity of forming a polymer passivation layer on the second surface. In some embodiments, before depositing the oxide material on the first surface, a barrier such as silylation does not require a specific removal step.
[0085] Therefore, in some embodiments, the second surface includes a passivated metal surface. That is, in some embodiments, the second surface may include a metal surface containing a passivator. The passivator on the second surface may be a polymer layer. In some embodiments, the passivator is an organic material, such as an organic polymer. For example, the second organic surface may include polyimide, polyamide, polyurea, polystyrene, polyurethane, polythiourea, polyester, polyimide, polyamic acid, polythiophene or other such polymers. In some embodiments, the polymer may include a dimer or trimer. In some embodiments, the organic surface may include other polymer forms or mixtures of the above materials. For example, an organic passivation layer such as a passivation layer or a self-assembled monolayer containing polyimide. In some embodiments, the passivation layer is retained on the second surface in at least two, such as at least about 10 times, about 20 times, about 50 times, about 100 times or about 150 deposition cycles of the metal oxide. In other words, a passivation layer that can withstand deposition conditions for a long time is used, such as a layer containing polyimide.
[0086] In some embodiments, the oxide material layer is selectively deposited on the first dielectric surface of the substrate relative to the second metal or metallic surface of the substrate. In some embodiments, the second surface comprises a metal oxide, an elemental metal, or a metallic surface. In some embodiments, the second metal or metallic surface comprises a passivation layer comprising polyamic acid, polyimide, or other polymer material.
[0087] The term dielectric is used in the description here to simplify the distinction from metal or metallic surfaces. It will be appreciated by those skilled in the art that not all non-conductive surfaces are dielectric surfaces. For example, metal or metallic surfaces may include non-conductive or very high resistivity oxidized metal surfaces. The selective deposition process taught herein may be deposited on dielectric surfaces, and the deposition on this adjacent non-conductive metal or metallic surface is minimal.
[0088] For an embodiment in which a surface of a substrate comprises a metal, the surface is referred to as a metal surface. In some embodiments, the metal surface is composed of or substantially composed of one or more metals. The metal surface may be a metal surface or a metallic surface. In some embodiments, the metal or metallic surface may include a metal, a metal oxide and / or a mixture thereof. In some embodiments, the metal or metallic surface may include surface oxidation. In some embodiments, the metal or metallic material of the metal or metallic surface is conductive with or without surface oxidation. In some embodiments, the metal or metallic surface comprises one or more transition metals. In some embodiments, the metal or metallic surface comprises one or more transition metals of the 4th row of the periodic table. In some embodiments, the metal or metallic surface comprises one or more transition metals of the 4th to 11th groups of the periodic table. In some embodiments, the metal or metallic surface comprises aluminum (Al). In some embodiments, the metal or metallic surface comprises copper (Cu). In some embodiments, the metal or metallic surface comprises tungsten (W). In some embodiments, the metal or metallic surface comprises cobalt (Co). In some embodiments, the metal or metallic surface comprises nickel (Ni). In some embodiments, the metal or metallic surface comprises niobium (Nb). In some embodiments, the metal or metallic surface comprises iron (Fe). In some embodiments, the metal or metallic surface comprises molybdenum (Mo). In some embodiments, the metal or metallic surface comprises a metal selected from the group consisting of Al, Mn, Fe, Co, Ni, Cu, Zn, Nb, Mo, Ru, and W. In some embodiments, the metal or metallic surface comprises a transition metal selected from the group consisting of Zn, Fe, Mn, and Mo.
[0089] In some embodiments, the metallic surface includes titanium nitride. In some embodiments, the metal or metallic surface includes one or more noble metals, such as Ru. In some embodiments, the metal or metallic surface includes conductive metal oxide. In some embodiments, the metal or metallic surface includes conductive metal nitride. In some embodiments, the metal or metallic surface includes conductive metal carbide. In some embodiments, the metal or metallic surface includes conductive metal boride. In some embodiments, the metal or metallic surface includes a combined conductive material. For example, the metal or metallic surface may include one or more of ruthenium oxide (RuOx), niobium carbide (NbCx), niobium boride (NbBx), nickel oxide (NiOx), cobalt oxide (CoOx), niobium oxide (NbOx), tungsten carbonitride (WNCx), tantalum nitride (TaN) or titanium nitride (TiN).
[0090] In some embodiments, the second surface is a conductive surface. In some embodiments, the second surface comprises a material selected from metal, amorphous carbon, metal oxide, and metal nitride. In some embodiments, the second surface comprises an elemental metal. In some embodiments, the metal of the second surface is selected from Cu, Co, Ru, W, Ti, Al, Ta, and Mo.
[0091] catalyst
[0092] In some embodiments, particularly in embodiments where the first precursor comprises silicon, a metal or metalloid catalyst ("catalyst") is selectively deposited on a first surface relative to a second surface. In some embodiments, the catalyst is selectively chemisorbed on a first surface, such as a dielectric surface. The catalyst can be, for example, a metal or metalloid catalyst as described below. For simplicity, the term "catalyst" is used throughout this disclosure. It should be understood that, in practice, the surface-bound catalytically active species can be chemically different from the species provided to the reaction chamber in the gas phase.
[0093] Then, by providing a silicon precursor into the reaction chamber, the oxide material is selectively deposited on the first surface relative to the passivated second surface. The catalyst can improve the interaction between the substrate and the first precursor (e.g., a silicon precursor), resulting in the selective growth of the catalytic oxide material on the first surface of the substrate relative to the second surface (e.g., a passivated metal or metal oxide surface). The oxide material can be deposited by a cyclic vapor deposition process in which the substrate is alternately contacted with the catalyst, the first precursor, and the oxygen precursor until the desired thickness of the oxide material has been selectively deposited. After the oxide material is deposited, the passivation layer on the second surface can be removed, for example, by etching. For example, etching can be performed by plasma or chemical treatment.
[0094] In some embodiments, the process according to the present disclosure includes providing a passivating agent in a gas phase to the reaction chamber before providing the catalyst to the reaction chamber to selectively passivate the second surface. By providing the passivating agent to the reaction chamber, an organic polymer passivation layer can be selectively formed on a second (e.g., metal) surface relative to the first dielectric surface. The passivating agent can be provided by a cyclic deposition process. For example, a passivating layer containing polyimide can be deposited by alternately and sequentially providing acetic anhydride and diamine to the reaction chamber to form a passivating layer. By providing the passivating agent to the reaction chamber, the passivating layer can be selectively deposited on the second surface. In some embodiments, the passivating layer on the metal or metallic surface suppresses, prevents or reduces the formation of oxide materials on the metal or metallic surface.
[0095] Plasma treatment can be used to activate the dielectric surface. For example, a silylated dielectric surface can be exposed to H2 plasma.
[0096] Relative to the second surface, the catalyst is selectively provided on the first surface, for example, by providing the catalyst into the reaction chamber. Wherein, the catalyst contacts the substrate. The first surface can be a dielectric surface, and the second surface can be a metal surface. In some embodiments, the substrate contacts the catalyst as described below. The catalyst can be, for example, a compound comprising B, Zn, Mg, Mn, La, Hf, Al, Zr, Ti, Sn, Y or Ga. In some embodiments, the catalyst is a metal catalyst. In some embodiments, the catalyst is a metal halide, an organometallic or a metal organic compound. In some embodiments, the catalyst can be a metal oxide. In some embodiments, the catalyst is an aluminum catalyst, such as an alkyl aluminum catalyst. The aluminum catalyst can include trimethylaluminum (TMA), dimethylaluminum chloride, aluminum chloride (AlCl3), dimethylaluminum isopropoxide (DMAI), tri(tert-butyl) aluminum (TTBA), tri(isopropanol) aluminum (TIPA), tri(dimethylamino) aluminum (TDMAA) or triethylaluminum (TEA). In some embodiments, the catalyst is a zirconium compound, such as bis(methylcyclopentadienyl) methoxymethyl zirconium (ZrD-04). In some embodiments, the catalyst is tetrakis(ethylmethylamino)zirconium (TEMAZ). In some embodiments, the catalyst is ZrCl4. In some embodiments, the catalyst is a lanthanum compound, such as tri(isopropyl-cyclopentadienyl)lanthanum (La(iPrCp)3). In some embodiments, the catalyst is a titanium compound, such as titanium isopropoxide (TTIP) or TiCl4. In some embodiments, the catalyst is a gallium compound, such as trimethylgallium (TMG). In some embodiments, the catalyst is a hafnium compound, such as HfD-04, HfCl4, or Hf(NO3)4.
[0097] In some embodiments, the metal or metalloid catalyst is a metalloid catalyst. In some embodiments, the catalyst comprises an alkylborane. In some embodiments, the catalyst comprises a trialkylborane. In some embodiments, the catalyst comprises trimethylborane or triethylborane. The metalloid in the present disclosure refers to an element selected from boron, silicon, germanium, arsenic, antimony, selenium, antimony and tellurium. In some embodiments, the metalloid element is selected from boron, silicon, germanium, antimony and tellurium. In some embodiments, the metalloid element is selected from boron, silicon, germanium and antimony. In some embodiments, the metalloid element is selected from boron, silicon, germanium and antimony. In some embodiments, the metalloid element is selected from boron, silicon and germanium. In some embodiments, the metalloid element is selected from boron and silicon. In some embodiments, the metalloid element is selected from silicon and germanium. In some embodiments, the metalloid element is silicon.
[0098] In some embodiments, the catalyst comprises a catalyst having the formula MR x A 3-xA compound wherein x is 1 to 3, R is a C1-C5 alkyl ligand, M is B, Zn, Mg, Mn, La, Hf, Al, Zr, Ti, Sn, Y or Ga, and A is a halide, an alkylamine, an amino group, a silyl group or a derivative thereof. In some embodiments, R is a C1-C3 alkyl ligand. In some embodiments, R is methyl or ethyl. In some embodiments, M is boron. In some embodiments, the catalyst is ZnR x A 2-x , wherein x is 1 to 2, R is a C1-C5 alkyl ligand, and A is a halide, an alkylamine, an amino group, a silyl group, or a derivative thereof. In some such embodiments, R is a C1-C3 alkyl ligand. In some embodiments, R is a methyl group or an ethyl group.
[0099] In some embodiments, the catalyst may be preferentially chemically adsorbed on the dielectric surface, such as on the dielectric surface containing the encapsulating agent, relative to the passivated metal surface. In some embodiments, the catalyst is preferentially deposited on the dielectric surface relative to the passivated metal surface. In some embodiments, the passivating agent on the metal surface inhibits or prevents the catalyst from being deposited on the metal surface. In some embodiments, a single exposure to the passivating agent in 1, 2, 5, 10, 20, 30, 40 or 50 or more cycles of contact of the substrate with the catalyst can prevent the catalyst from being deposited on the metal surface. In some embodiments, the second surface is not passivated, and in the absence of the passivating agent on the metal surface, the catalyst is selectively chemically adsorbed on the dielectric surface. For example, the catalyst can be selectively deposited on the dielectric surface containing the encapsulating agent relative to the second surface. In some embodiments, no catalyst is used.
[0100] After the catalyst is contacted with the dielectric surface, the oxide material is selectively deposited on the dielectric surface relative to the passivated second surface. For example, the substrate can be exposed to a silicon precursor, such as an alkoxysilane. In some embodiments, the substrate is exposed to the silicon precursor alone, while in some embodiments, the substrate is exposed to a silicon precursor and an oxygen precursor, such as H2O. The silicon precursor and the oxygen precursor can react with the surface containing the catalyst to form the oxide material. For example, the substrate can be contacted with a silicon precursor containing an alkoxysilane, so that the alkoxysilane decomposes at the catalyst atoms on the dielectric surface, resulting in the selective growth of the oxide material on the dielectric surface relative to the second surface.
[0101] Silicon Precursor
[0102] According to the current disclosure, the oxide material may include silicon. For example, the oxide material may include silicon oxide, or a combination of silicon oxide and a metal oxide. Such a material may include a silicate. Therefore, in some embodiments, the first precursor is a silicon precursor.
[0103] As used herein, "silicon precursor" includes a gas or a material that can become gaseous, which can be represented by a chemical formula including silicon. In some embodiments, the silicon precursor according to the present disclosure includes an alkoxysilane. In some embodiments, the silicon precursor is an alkoxysilane. In some embodiments, the silicon precursor does not contain a hydroxyl group. In some embodiments, the alkoxysilane according to the present disclosure includes four identical alkoxy groups. In some embodiments, the alkoxysilane according to the present disclosure includes a carboxylate group. In some embodiments, the alkoxysilane according to the present disclosure includes a silyl ester. In some embodiments, the alkoxysilane is selected from tetraacetoxysilane (tetraacetyl orthosilicate), tetramethoxysilane, tetraethoxysilane (tetraethyl orthosilicate), trimethoxysilane, triethoxysilane and trimethoxy (3-methoxypropyl) silane. In some embodiments, the trialkoxysilane according to the present disclosure includes a compound of formula RSi (OR ') 3, wherein R is selected from H, 3-aminopropyl, CHCH3, 3-methoxypropyl, and R' is selected from CH3 and CH2CH3. In some embodiments, the triethoxysilane according to the present disclosure includes a compound of formula HSi(OCH2CH3)3. In some embodiments, the triethoxysilane according to the present disclosure includes triethoxy-3-aminopropylsilane (Si(OCH2CH3)3CH2CH2CH2NH2). In some embodiments, the triethoxysilane according to the present disclosure includes triethoxy(ethyl)silane (Si(OCH2CH3)3CHCH3).
[0104] Alkoxysilanes (e.g., tetraethoxysilane) may be superior to other silicon precursors in selective deposition applications because of their low reactivity. In some embodiments, the silicon precursor does not contain hydroxyl groups. This may be applicable to OH groups on the surface of dielectric materials and metal and metallic surfaces. Alkoxysilanes may also have a low reactivity to organic passivators. In some embodiments, the reactivity to the reduction of the passivator is more significant than the reactivity to the dielectric surface. In some embodiments, process conditions can be selected in a manner that substantially completely prevents the growth of oxide materials on the organic passivation. The reactivity of alkoxysilanes to the reduction of organic passivators (e.g., polyimides and / or polyamic acid) may also be stronger than other silicon precursors, and may be able to tolerate some plasma-induced damage on the organic passivator. In general, alkoxysilanes, particularly tetraethoxysilane, may have a useful selectivity window.
[0105] In some embodiments, the silicon precursor is provided twice or more in at least one oxide material deposition sub-cycle. In some embodiments, during the deposition cycle, the silicon precursor is provided in two or more continuous pulses. In some embodiments, the silicon precursor includes tetraethoxysilane. In some embodiments, the silicon precursor is mainly composed of tetraethoxysilane. In some embodiments, the silicon precursor includes trimethoxy (3-methoxypropyl) silane. In some embodiments, the silicon precursor is mainly composed of trimethoxy (3-methoxypropyl) silane.
[0106] Metal Precursors
[0107] According to the oxide material currently disclosed, metals may be included. For example, the oxide material may include a metal oxide, or a combination of a metal oxide and silicon oxide. Therefore, in some embodiments, the first precursor is a first metal precursor. In some embodiments, the metal oxide is a transition metal oxide, and the first precursor is a first transition metal precursor. In some embodiments, the transition metal oxide is a metal oxide of Group 4 to Group 6, such as titanium oxide, zirconium oxide, hafnium oxide, vanadium oxide, niobium oxide, tantalum oxide, chromium oxide, molybdenum oxide or tungsten oxide. In some embodiments, the metal oxide is a metal oxide of Group 13, such as aluminum oxide, indium oxide or gallium oxide.
[0108] In some embodiments, the metal precursor is a metal alkoxide. In some embodiments, the oxide material comprises titanium oxide, and the first metal precursor is titanium isopropoxide (Ti(O i In some embodiments, the oxide material comprises titanium oxide, and the first metal precursor is titanium tert-butoxide (Ti(O t In some embodiments, the oxide material comprises titanium oxide, and the first metal precursor is titanium methoxide (Ti(OMet)4).
[0109] In some embodiments, the oxide material includes niobium oxide, and the first metal precursor is niobium ethoxide (Nb(OEt) 5 ).
[0110] In some embodiments, the oxide material includes zirconium oxide, and the first metal precursor is zirconium tert-butoxide (Zr(O t In some embodiments, the oxide material comprises zirconium oxide, and the first metal precursor is zirconium isopropoxide (Zr(O i In some embodiments, the oxide material comprises zirconium oxide and the first metal precursor is Zr(dmae)2(O t In some embodiments, the oxide material comprises zirconium oxide and the first metal precursor is Zr(dmae)2(OiPr)2.
[0111] In some embodiments, the oxide material includes hafnium oxide, and the first metal precursor is hafnium tert-butoxide (Hf(O t In some embodiments, the oxide material includes hafnium oxide, and the first metal precursor is hafnium isopropoxide (Hf(O i Pr)4).
[0112] In some embodiments, the oxide material includes lithium oxide, and the first metal precursor is lithium tert-butoxide (LiO t In some embodiments, the oxide material includes vanadium oxide, and the first metal precursor is vanadyl isopropoxide (VO(O i In some embodiments, the oxide material comprises tantalum oxide and the first metal precursor is tantalum ethoxide (Ta(OEt)5).
[0113] In some embodiments, the first metal precursor comprises a cyclopentadienyl ligand. In some embodiments, the cyclopentadienyl ligand comprises at least one C1 to C5 alkyl substituent. In some embodiments, the alkyl substituent is selected from methyl, ethyl and a straight or branched alkyl group containing three, four or five carbon atoms. In some embodiments, the cyclopentenyl group comprises at least one alkyl substituent, wherein the alkyl substituent is selected from C1 to C5 alkyl. In some embodiments, the alkyl substituent is selected from methyl, ethyl and a straight or branched alkyl group containing three, four or five carbon atoms. In some embodiments, the alkyl substituent is selected from methyl, ethyl, n-propyl, isopropyl, n-butyl, isobutyl, sec-butyl, tert-butyl, n-pentyl, 1,1-dimethylpropyl, 3-methylbutyl, 1-methylbutyl, 2,2-dimethylpropyl, 1-ethylpropyl, 1,2-dimethylpropyl and 2-methylbutyl. In some embodiments, the first metal precursor comprises two methylcyclopentadienyl ligands. In some embodiments, the first metal precursor comprises two ethylcyclopentadienyl ligands. In some embodiments, the first metal precursor comprises two n-propylcyclopentadienyl ligands. In some embodiments, the first metal precursor comprises two isopropylcyclopentadienyl ligands.
[0114] In some embodiments, the first metal precursor comprises a cyclopentadienyl ligand and an amidino ligand. In some embodiments, the amidino ligand comprises an acetamido ligand. In some embodiments, the acetamido ligand is an alkyl acetamido ligand. In some embodiments, the alkyl acetamido ligand is a dialkyl acetamido ligand. In some embodiments, one or two alkyl groups of the alkyl acetamido ligand are selected from methyl, ethyl, n-propyl, isopropyl, n-butyl, tert-butyl and sec-butyl. In some embodiments, the acetamido group comprises two identical alkyl groups.
[0115] The following abbreviations are used in this disclosure: Me represents methyl; Et represents ethyl; Pr represents propyl; i Pr represents isopropyl;n Pr represents n-propyl; Bu represents butyl; t Bu represents tert-butyl, s Bu represents sec-butyl; t Pn represents tert-amyl; Cp represents cyclopentadienyl; AMD represents acetamidine, mmp represents 1-methoxy-2-methyl-propanol; acac represents acetylacetonate; FMD represents formamide; dpguan represents N,N'-diisopropyl-2-dimethylaminoguanidine; triaz represents triazene; dmae represents dimethylaminoethanol (OCH2CH2N(CH3)2).
[0116] In some embodiments, the oxide material layer includes scandium, and the first metal precursor is a scandium precursor. In some embodiments, the metal oxide is scandium oxide, and the first metal precursor is a scandium precursor. In some embodiments, the scandium precursor includes at least one cyclopentadienyl ligand or an alkyl-substituted variant thereof, and at least one amidine ligand. In some embodiments, the scandium precursor includes at least one cyclopentadienyl ligand or an alkyl-substituted variant thereof and at least one alkyl acetamidine ligand. In some embodiments, the scandium precursor includes a heteroleptic scandium precursor, such as a precursor including at least one alkyl-substituted cyclopentadienyl ligand and at least one alkyl acetamidine ligand. In some embodiments, the scandium precursor is bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido) scandium (Sc(iPrCp)2(iPr-AMD)).
[0117] The oxidation state of the metal in the first metal precursor may be higher than 0. The oxidation state of the metal in the first metal precursor may be 3.
[0118] In some embodiments, the oxide material layer includes yttrium, and the first metal precursor is a yttrium precursor. In some embodiments, the metal oxide is yttrium oxide, and the first metal precursor is a yttrium precursor. In some embodiments, the yttrium precursor includes at least one cyclopentadienyl ligand or its alkyl-substituted variant and at least one amidine ligand. In some embodiments, the yttrium precursor includes at least one cyclopentadienyl ligand or its alkyl-substituted variant and at least one alkyl acetamidine ligand. In some embodiments, the yttrium precursor includes at least one cyclopentadienyl ligand or its alkyl-substituted variant and at least one amidine ligand. In some embodiments, the yttrium precursor includes a heteroleptic yttrium precursor, such as a precursor including at least one alkyl-substituted cyclopentadienyl ligand and at least one alkyl acetamidine ligand. In some embodiments, the yttrium precursor is bis(ethylcyclopentadienyl)(N,N'-diisopropylacetamido)yttrium (Y(EtCp)2(iPr-AMD)).
[0119] In some embodiments, the oxide material layer includes lanthanum, and the first metal precursor is a lanthanum precursor. In some embodiments, the metal oxide is lanthanum oxide, and the first metal precursor is a lanthanum precursor. In some embodiments, the lanthanum precursor includes at least one cyclopentadienyl ligand or an alkyl-substituted variant thereof. In some embodiments, the lanthanum precursor includes at least one amidine ligand. In some embodiments, the lanthanum precursor includes at least one cyclopentadienyl ligand or an alkyl-substituted variant thereof and at least one alkyl acetamidine ligand. In some embodiments, the lanthanum precursor includes a heteroleptic lanthanum precursor, such as a precursor including at least one alkyl-substituted cyclopentadienyl ligand and at least one alkyl acetamidine ligand. In some embodiments, the lanthanum precursor includes bis(isopropylcyclopentadienyl) (N, N'-diisopropylacetamido) lanthanum (La(iPrCp)2(iPr-AMD)).
[0120] In some embodiments, the oxide material layer includes cerium, and the first metal precursor is a cerium precursor. In some embodiments, the metal oxide is cerium oxide, and the first metal precursor is a cerium precursor. In some embodiments, the cerium precursor includes at least one cyclopentadienyl ligand or an alkyl-substituted variant thereof. In some embodiments, the cerium precursor includes at least one amidine ligand. In some embodiments, the cerium precursor includes at least one cyclopentadienyl ligand or an alkyl-substituted variant thereof and at least one alkyl acetamidine ligand. In some embodiments, the cerium precursor includes a heteroleptic cerium precursor, such as a precursor including at least one alkyl-substituted cyclopentadienyl ligand and at least one alkyl acetamidine ligand. In some embodiments, the cerium precursor includes bis(isopropylcyclopentadienyl) (N, N'-diisopropylacetamido) cerium (Ce(iPrCp)2(iPr-AMD)).
[0121] In some embodiments, the first metal precursor according to the present disclosure may be represented by the formula M(RCp): x [R'N(CR")NR'] y In other words, M is selected from Sc, Y, La, Ce and other rare earth elements, and R is H, Me, Et, i Pr, t Bu, R' is Et, i Pr, t Bu, t Pn, R" is H, Me, Et, Pr, Bu, R"' is Et, i Pr, t Bu, t Pn and x+y=3, wherein x and Y are both integers greater than 0. This example is for a compound comprising Cp and an amidino-type ligand.
[0122] In some embodiments, the oxide material comprises zirconium oxide, and the first metal precursor is a zirconium precursor comprising a Cp ligand. In some embodiments, the zirconium precursor is selected from Zr(Cp)( t BuDAD)(O i Pr),Zr(Cp2CMe2)Me(OMe),Zr(Cp2CMe2)Me2,Zr(CpEt)(NMe2)3,Zr(CpMe)(NMe2)3,Zr(CpMe)2Me(OMe),Zr(CpMe)2Me2,Zr(CpMe)CHT,Zr(CpMe2)2Me(O t Bu), Zr(Me5Cp)(TEA), Zr(MeCp)(TMEA) and ZrCp2Cl2, ZrCp2Me(OMe).
[0123] In some embodiments, the oxide material comprises zirconium oxide, and the first metal precursor is a zirconium precursor comprising a Cp ligand. In some embodiments, the zirconium precursor is selected from Hf(Cp)(NMe2)3, Hf(Cp2CMe2)Me(OMe), Hf(Cp2CMe2)Me2, Hf(CpMe)(NMe2)3, Hf(CpMe)2(mmp)Me, Hf(CpMe)2(OMe), i Pr)Me, Hf(CpMe)2(OMe)Me, Hf(CpMe)2Me2, HfCp(edpa)3, HfCp2Cl2 and HfCp2Me2.
[0124] In some embodiments, a second metal precursor is provided to the reaction chamber. The second metal precursor may include the same metal as the first metal precursor or a different metal. Therefore, a second element may be introduced into the deposition material. In some embodiments, the first precursor is a first metal precursor, and the second metal precursor includes a metal different from the first metal. In an embodiment where the second metal precursor includes a metal different from the first metal precursor, the oxide material layer includes two metals. In some embodiments, the first precursor is a first metal precursor, and the second metal precursor includes the same metal as the first metal precursor. In some embodiments, the first precursor is a silicon precursor, the second metal precursor includes a metal, and an oxide material including silicon and a metal is deposited. In the oxide material layer including two metals, the molar ratio of the first metal or silicon to the second metal may vary from 1:50 to 50:1. In the most extreme embodiment, the oxide material layer mainly includes the first metal, silicon or the second metal, and the other is used as a dopant. In some embodiments, in the oxide material layer comprising two metals, the molar ratio of the first metal or silicon to the second metal varies from about 1:20 to about 20:1, or from about 1:10 to about 10:1, or from about 1:5 to about 5:1. In some embodiments, in the oxide material layer comprising two metals, the molar ratio of the first metal or silicon to the second metal varies from about 1:3 to about 3:1, or from about 1:2 to about 2:1. In some embodiments, in the oxide material layer comprising two metals, the molar ratio of the first metal or silicon to the second metal is about 1:2, about 2:1, about 3:2, about 2:3, or about 1:1.
[0125] In some embodiments, the second metal is a transition metal and the second metal precursor is a transition metal precursor. In some embodiments, the second metal is a post-transition metal and the second metal precursor is a post-transition metal precursor. In some embodiments, the second metal is a Group 13 metal and the second metal precursor is a Group 13 metal precursor. In some embodiments, the Group 13 metal is selected from aluminum, gallium, and indium. In some embodiments, the Group 13 metal is aluminum and the second metal precursor is an aluminum precursor. In some embodiments, the Group 13 metal is gallium and the second metal precursor is a gallium precursor. In some embodiments, the Group 13 metal is indium and the second metal precursor is an indium precursor. Examples of aluminum precursors include, but are not limited to, AlMe3, AlEt3, Al(OEt)3, Al(O n Pr)3,Al(O i Pr)3,Al(O s Bu)3,Al( i PrAMD)Et2,Al(mmp)3,Al(NMe2)3,Al(NEt2)3,AlCl3,AlMe2Cl,AlMe2O i Pr,Al(N i Pr2)3 and Al(N iPr2)2(C3H6NMe2). Examples of gallium precursors include, but are not limited to, Ga(acac)3, Ga(CpMe5), Ga2(NMe2)6, and GaMe2(O i Pr). Examples of indium precursors include, but are not limited to, In(acac)3, In(dpguan)3, In(EtCp), In( i PrAMD)3,In( i PrFMD)3,In(N(SiMe3)2)Et2,In(PrNMe2)Me2,In(triaz)3,InCl3,InCp,InMe2(edpa),InMe3,InMe3(MeO(CH2)2NH t Bu).
[0126] Oxygen Precursors
[0127] The method according to the present disclosure includes providing an oxygen precursor into a reaction chamber to selectively deposit an oxide material on a substrate. The oxygen precursor according to the present disclosure includes hydroxyl groups. In some embodiments, one or more hydroxyl groups are substantially the only reactive groups in the oxygen precursor. In some embodiments, the oxygen precursor is an alcohol. In some embodiments, the alcohol is substantially the only oxygen source during the deposition process.
[0128] In some embodiments, the alcohol is a primary alcohol. In some embodiments, the alcohol is a secondary alcohol. In some embodiments, the alcohol is a tertiary alcohol. In some embodiments, the oxygen precursor is a secondary alcohol or a tertiary alcohol. In some embodiments, the alcohol comprises one carbon atom. In some embodiments, the alcohol comprises two carbon atoms. In some embodiments, the alcohol comprises three carbon atoms. In some embodiments, the alcohol comprises four carbon atoms. In some embodiments, the alcohol comprises five carbon atoms. In some embodiments, the alcohol comprises six carbon atoms.
[0129] In some embodiments, the alcohol comprises one hydroxyl group. In some embodiments, the alcohol comprises two hydroxyl groups. In some embodiments, the alcohol comprises at least two hydroxyl groups. In some embodiments, the alcohol comprises three hydroxyl groups. In some embodiments, the alcohol comprises at least three hydroxyl groups. In some embodiments, the alcohol comprises four hydroxyl groups. In some embodiments, the alcohol comprises at least four hydroxyl groups. In some embodiments, the alcohol comprises five hydroxyl groups. In some embodiments, the alcohol comprises at least five hydroxyl groups.
[0130] In some embodiments where the oxygen precursor comprises at least two hydroxyl groups, each hydroxyl group is bonded to a different carbon atom. In some embodiments, two hydroxyl groups are bonded to one carbon atom. In some embodiments, at least two hydroxyl groups are bonded to one carbon atom. In some embodiments, an alcohol comprises two carbon atoms bonded to two hydroxyl groups. In some embodiments, an alcohol comprises at least two carbon atoms bonded to two hydroxyl groups. In some embodiments, an alcohol comprises three carbon atoms bonded to two hydroxyl groups. In some embodiments, an alcohol comprises at least three carbon atoms bonded to two hydroxyl groups. In some embodiments, the oxygen precursor does not comprise a carboxyl group. In some embodiments, the only oxygen atoms in the oxygen precursor are in the hydroxyl groups. In some embodiments, the oxygen precursor comprises only carbon and hydrogen, except for the oxygen in the hydroxyl groups. In some embodiments, additional oxygen precursors may be used to adjust the deposition process. For example, a highly reactive oxygen precursor such as ozone or oxygen plasma may be used at the end of the process to ensure that the first precursor and the optional second metal precursor are fully converted into an oxide material.
[0131] In some embodiments, the oxygen precursor is selected from methanol, ethanol, 1-propanol, 2-propanol, 1-butanol, 2-butanol, 1-pentanol, isobutanol, tert-butanol, 2-pentanol, 3-pentanol, 1,2-ethanediol, 1,2-propylene glycol, 1,2,3-propanetriol, 1,2-butanediol, 2,3-butanediol, 1,3-butanediol, 1,4-butanediol, 1,2,3-butanetriol, 1,2 ,3,4-butanetetrol, 1,2-pentanediol, 1,3-pentanediol, 1,4-pentanediol, 1,5-pentanediol, 2,3-pentanediol, 2,4-pentanediol, 1,2,3-pentanetriol, 1,2,4-pentanetriol, 1,2,5-pentanetriol, 2,3,4-pentanetriol, 1,2,3,4-pentanetetrol, 1,2,3,5-pentanetetrol, 1,2,4,5-pentanetetrol.
[0132] According to some exemplary embodiments, a structure is formed using the methods described herein. The structure may include a substrate and an oxide material layer formed overlying the surface of the substrate, such as a threshold voltage shift layer or an etch stop layer. The exemplary structure may also include one or more additional layers, such as an additional metal or conductive layer covering the oxide material layer and / or one or more insulating layers or dielectric layers below the oxide material layer. The structure may be or form part of a CMOS structure, such as one or more structures in a PMOS and NMOS junction, or other device structures.
[0133] According to further embodiments of the present disclosure, the methods and / or structures described herein may be used to form a device or a portion thereof. The device may be, for example, a CMOS device or form a portion thereof.
[0134] The present disclosure is further explained by the following exemplary embodiments depicted in the accompanying drawings. The illustrations given herein are not meant to be actual views of any particular material, structure, or assembly, but are merely schematic representations of embodiments of the present disclosure. It should be understood that the elements in the drawings are shown for simplicity and clarity and are not necessarily drawn to scale. For example, the sizes of some elements in the drawings may be exaggerated relative to other elements to help improve the understanding of the illustrated embodiments of the present disclosure. The structures, devices, and assemblies depicted in the drawings may include additional elements and details, which may be omitted for clarity.
[0135] For the sake of brevity, conventional manufacturing, connection, preparation, and other functional aspects of the methods and assemblies described herein may not be described in detail. In addition, the connecting lines shown in the various figures are intended to represent exemplary functional relationships and / or physical connections between the various elements. Many alternative or additional functional relationships or physical connections may exist in actual systems, and / or may not exist in some embodiments.
[0136] Figure 1 1 is a block diagram of an exemplary embodiment of a method according to the present disclosure. First, in block 102, a substrate is provided in a reaction chamber. As described in the present disclosure, the substrate includes a first surface and a second surface. For example, the first surface can be a dielectric surface including a passivation sealant such as a silylating agent, and the second surface can be a metal surface including an organic passivation layer, such as a copper surface. In an exemplary embodiment, the metal passivation layer includes polyimide. The deposition of the passivation layer can include etching back the deposited passivation layer to improve the accuracy of subsequent selective deposition. Before providing the catalyst into the reaction chamber, the substrate can be heated in block 102.
[0137] After the substrate is provided into the reaction chamber 102, at block 104, a catalyst is optionally provided into the reaction chamber so that the catalyst contacts the substrate. The catalyst may be, for example, an aluminum-containing catalyst, such as dimethylaluminum isopropoxide. The catalyst is provided into the reaction chamber in a gas phase. The duration of providing the catalyst may be, for example, from about 0.5 seconds to about 10 seconds, such as about 1 second, about 2 seconds, about 3 seconds, about 5 seconds, or about 7 seconds. After the catalyst is provided into the reaction chamber, the reaction chamber may be purged. Figure 1Purge is not shown in the figure, but it can be optionally included after frame 104. The catalyst can be a metalloid catalyst. For example, the catalyst can include boron and / or silicon. In some embodiments, the catalyst is a metal catalyst and can include metal halides, organometallic compounds and / or metal organic compounds. In some embodiments, the catalyst is a compound containing at least one element selected from B, Zn, Mg, Mn, La, Hf, Al, Zr, Ti, Sn, Y and Ga. In some embodiments, the catalyst is trimethylaluminum (TMA), dimethylaluminum chloride, aluminum chloride (AlCl3), dimethylaluminum isopropoxide (DMAI), tri(tert-butyl)aluminum (TTBA), tri(isopropoxide)aluminum (TIPA), tri(dimethylamino)aluminum (TDMAA) or triethylaluminum (TEA).
[0138] In some embodiments, a process according to the present disclosure includes passivating the second surface prior to providing the catalyst or the first precursor (as the case may be) into the reaction chamber. In such embodiments, the passivation may be deposited in the same process chamber as the oxide material deposition or in a different process chamber. Thus, the passivation may have occurred before or after block 102.
[0139] In frame 106, the first precursor is provided to the reaction chamber in a gas phase. In an exemplary embodiment, the first precursor is a silicon precursor, such as tetraethoxysilane. Alternatively, the first precursor can be a first metal precursor, such as an aluminum precursor, a yttrium precursor, or a scandium precursor disclosed herein. Examples of the first metal precursor tested are dimethyl isopropoxide aluminum for depositing aluminum oxide materials, and bis(ethylcyclopentadienyl)(N,N'-diisopropylacetamide)yttrium for depositing yttrium oxide materials. In particular, when a silicon precursor is used, a catalyst can be used, and the oxide material includes silicon oxide. Therefore, in some embodiments, a catalyst is used. For example, the selective deposition of aluminum oxide, yttrium oxide, and several other metal oxides may not require a catalyst for deposition.
[0140] In some embodiments, the oxide material layer includes silicon oxide, and the first precursor is an alkoxysilane precursor. In some embodiments, the alkoxysilane is selected from tetraacetoxysilane, tetramethoxysilane, tetraethoxysilane, trimethoxysilane, triethoxysilane and trimethoxy(3-methoxypropyl)silane.
[0141] In some embodiments, the oxide material is a metal oxide and the first precursor comprises a metal alkoxide. In some embodiments, the first precursor comprises a metal atom, an alkyl group and an alkoxide group. In some embodiments, the metal of the metal precursor is a transition metal.
[0142] In some embodiments, the metal of the first precursor is selected from Al, Ga, and In. In some embodiments, the first precursor is selected from aluminum propoxide (Al(O nPr)3), aluminum isopropoxide (Al(O i Pr)3), aluminum sec-butylate (Al(O s Bu)3), aluminum ethoxide (Al(OEt)3), Al(N i Pr2)2(C3H6NMe2), dimethylaluminum isopropoxide (AlMe2O i Pr), dimethyl gallium isopropoxide (GaMe2O i Pr), In(dmamp)2(OiPr).
[0143] In some embodiments, the first precursor comprises a cyclopentadienyl group. In some embodiments, the first precursor is a heteroleptic precursor comprising a Group 3 metal, at least one cyclopentadienyl ligand and at least one amidine ligand. In some embodiments, the oxide material is a metal oxide, and the metal of the metal oxide is selected from scandium (Sc), yttrium (Y), lanthanum (La) and cerium (Ce). In some embodiments, the metal oxide is scandium oxide, and the first metal precursor is a scandium precursor. In some embodiments, the metal oxide is yttrium oxide, and the first metal precursor is a yttrium precursor. In some embodiments, the metal oxide is lanthanum oxide, and the first metal precursor is a lanthanum precursor. In some embodiments, the metal oxide is cerium oxide, and the first metal precursor is a cerium precursor.
[0144] In some embodiments, the cyclopentadienyl ligand comprises at least one C1 to C5 alkyl substituent. In some embodiments, the alkyl substituent is selected from methyl, ethyl, and a straight or branched alkyl group comprising three, four, or five carbon atoms. In some embodiments, the first metal precursor comprises two ethylcyclopentadienyl ligands.
[0145] In some embodiments, the amidino ligand includes an acetamido ligand. In some embodiments, the acetamido ligand is an alkyl acetamido ligand. In some embodiments, the alkyl acetamido ligand is a dialkyl acetamido ligand. In some embodiments, one or two alkyl groups in the acetamido ligand are selected from methyl, ethyl, n-propyl, isopropyl, n-butyl, tert-butyl and sec-butyl.
[0146] In some embodiments, the first metal precursor is selected from bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido)scandium (Sc(iPrCp)2(iPr-AMD)), bis(ethylcyclopentadienyl)(N,N'-diisopropylacetamido)yttrium (Y(EtCp)2(iPr-AMD)), bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido)lanthanum (La(iPrCp)2(iPr-AMD)), and bis(isopropylcyclopentadienyl)(N,N'-diisopropylacetamido)cerium (Ce(iPrCp)2(iPr-AMD)).
[0147] The first precursor is selectively chemically adsorbed on the first surface relative to the second surface of the substrate. The first precursor can be provided to the reaction chamber (i.e., pulsed) for about 0.2 to 8 seconds, for example, about 0.5 seconds, about 1 second, about 3 seconds, or about 5 seconds. In some embodiments, the first precursor is provided to the reaction chamber in multiple (e.g., 2, 4, or 10) continuous pulses. In some embodiments, for each deposition cycle, the first precursor is provided to the reaction chamber in a single pulse. The selective chemical adsorption of the first precursor on the first surface of the substrate can allow selective deposition according to the process of the present disclosure. The degree of selectivity of depositing the oxide material layer on the first surface relative to the second surface varies depending on the exact chemical composition and deposition conditions. However, in some embodiments, the selectivity is greater than about 50%, or greater than about 80%, or greater than about 95%. In some embodiments, the selectivity can be observed as a delayed layer growth on the second surface relative to the first surface.
[0148] After the first precursor pulse, the reaction chamber may be purged. Figure 1 Purge is not shown in FIG, but it may optionally be included in block 106 .
[0149] At block 108, an oxygen precursor is provided in a gas phase into the reaction chamber. In an exemplary embodiment, the oxygen precursor is tert-butyl alcohol. In another exemplary embodiment, the oxygen precursor is isopropanol. However, additional alcohols containing 1 to 6 carbon atoms may be used. The oxygen precursor may be a secondary alcohol or a tertiary alcohol. The oxygen precursor reacts with the chemically adsorbed first precursor to form an oxide material on the first surface of the substrate. The oxide material may include, for example, silicon oxide and / or a metal silicate, such as aluminum silicate. The reaction chamber may be purged after the oxygen precursor pulse. Figure 1 Purge is not shown in FIG, but it may optionally be included in block 108 .
[0150] In some embodiments, the oxygen precursor is selected from methanol, ethanol, 1-propanol, 2-propanol, 1-butanol, 2-butanol, 1-pentanol, isobutanol, tert-butanol, 2-pentanol, 3-pentanol, 1,2-ethanediol, 1,2-propylene glycol, 1,2,3-propanetriol, 1,2-butanediol, 2,3-butanediol, 1,3-butanediol, 1,4-butanediol, 1,2,3-butanetriol, 1,2 ,3,4-butanetetrol, 1,2-pentanediol, 1,3-pentanediol, 1,4-pentanediol, 1,5-pentanediol, 2,3-pentanediol, 2,4-pentanediol, 1,2,3-pentanetriol, 1,2,4-pentanetriol, 1,2,5-pentanetriol, 2,3,4-pentanetriol, 1,2,3,4-pentanetetrol, 1,2,3,5-pentanetetrol, 1,2,4,5-pentanetetrol.
[0151] The deposition process according to the present disclosure may be a cyclic deposition process. In some embodiments, the method is a cyclic process, and the deposition cycle includes providing a first precursor and an oxygen precursor to a reaction chamber. However, in some embodiments where a very thin oxide material layer is required, it may be sufficient to perform only one process step. Therefore, in cycle 110 or 112, the deposition cycle begins again. If an embodiment including cycle 110 is used, a catalyst is provided to the reaction chamber in each cycle, and the deposition process can be considered as an ABC process, with one deposition cycle including three stages. However, cycle 112 may be used for cyclic deposition, especially deposition of metal oxide materials. In such an embodiment, the catalyst at frame 104 is not provided to the reaction chamber, or is not provided in each deposition cycle. In some embodiments, frame 104 is not used at all, while in other embodiments, frame 104 is used only at the beginning of the deposition process. In some further embodiments, every nth deposition cycle includes frame 104, i.e., the process includes repeating frames 106 and 108 a predetermined number of times (n) by cycle 112, after which the catalyst is provided to the reaction chamber 104.
[0152] In summary, the deposition process according to the present disclosure can be represented by the formula x[A+n(B+C)], where A represents the provision of a catalyst into a reaction chamber, B represents the provision of a first precursor into a reaction chamber, and C represents the provision of an oxygen precursor into a reaction chamber. In this formula, x represents the total number of main cycles in the deposition process, and can vary between 1 and about 100, and n represents the number of deposition sub-cycles for depositing an oxide material using a first precursor and an oxygen precursor, and n can vary between 1 and about 100.
[0153] Thus, the deposition cycle can be repeated as many times as needed to deposit a desired amount of oxide material on the substrate. For example, the deposition cycle can be performed 1 to about 1000 times, or about 10 to about 500 times, or about 10 to about 500 times, or about 50 to 300 times. For example, the deposition cycle can be performed about 10 times, about 20 times, about 30 times, about 50 times, about 70 times, about 100 times, about 150 times, about 200 times, or about 400 times. Although not described in the present disclosure, the process may include additional steps, such as refreshing any blocking or passivation that may be necessary for continued selective deposition. In particular, the reaction chamber may be purged after any one of frames 104, 106, and 108. In some embodiments, after each of frames 104, 106, and 108, the reaction chamber is purged.
[0154] although Figure 1Not shown, but after block 104, an oxygen precursor may additionally be provided to the reaction chamber. If the catalyst is, for example, a metal catalyst, such as an aluminum-containing catalyst, a separate sub-cycle of depositing a metal oxide may be formed by alternately providing the catalyst and the oxygen precursor to the reaction chamber. Such additional sub-cycles may be repeated and used to adjust the ratio of the different elements in the oxide material.
[0155] As described above, the selective deposition according to the present disclosure can have a wider selectivity window (i.e., selectivity can be observed under a wider range of conditions) relative to methods known in the art. For example, the temperature during the process can vary. In some embodiments, deposition (including providing a catalyst into a reaction chamber) is performed at a temperature of about 150°C to about 450°C, for example, at 300°C or 350°C. In some embodiments, at least two different pressures are used during the deposition cycle. For example, a first pressure is used during the provision of a catalyst into the reaction chamber, and a second pressure is used when providing a first precursor into the reaction chamber. In some embodiments, the first pressure is lower than the second pressure. In some embodiments, the first pressure is lower than about 5 Torr. In some embodiments, the second pressure is greater than or equal to about 5 Torr.
[0156] To avoid oxidation damage to the substrate surface, and to determine a desired degree of selectivity, the oxide material may be deposited in a substantially water-free environment.
[0157] In some embodiments, the selective deposition of the oxide material on the first surface does not damage the organic passivation layer present on the second surface. In addition, in some embodiments, the oxide material is not substantially deposited on the organic passivation layer. In addition, using alcohols as oxygen precursors can have the benefit of avoiding oxidation of the substrate metal surface. In addition, the deposition rate can be lower when using alcohols as oxygen precursors compared to traditional more oxidizing oxygen precursors. This can be beneficial in some applications where the goal is to very carefully control the oxide material layer thickness or a very thin oxide material layer. In addition, Figure 1 The different deposition schemes shown allow the composition of the deposited oxide material to be tailored to the needs of the application in question.
[0158] although Figure 1 104 and 106 can be performed at least partially simultaneously. In some embodiments, stages 106 and 108 can be performed at least partially simultaneously. Thus, different precursors and reactants can be provided to the reaction chamber in various schemes. For example, the oxygen precursor can be provided to the reaction chamber at least partially simultaneously with the first precursor, or the oxygen precursor can be provided to the reaction chamber at least partially after the first precursor is provided to the reaction chamber. In some embodiments, during the deposition cycle, the first precursor is provided in two or more consecutive pulses.
[0159] Selective deposition according to the present disclosure may further include providing a second metal precursor to the reaction chamber. In a deposition cycle, the second metal precursor may be provided to the reaction chamber after the first precursor or after the oxygen precursor. The deposition cycle may include one oxygen pulse (i.e., the oxygen precursor is pulsed after both the first precursor and the second metal precursor are provided to the reaction chamber) or two oxygen pulses (i.e., the oxygen precursor is pulsed after the first precursor pulse and after the second metal precursor pulse). In embodiments using a catalyst, the catalyst may be provided before the first precursor, before the second metal precursor, or before both. However, in most embodiments, the catalyst is provided to the reaction chamber less frequently than the precursor.
[0160] In some embodiments, the first or second metal precursor is not a metal alkyl. In particular, in some embodiments, the first or second metal precursor is not diethylzinc. In some embodiments, the first or second metal precursor is not trimethylindium.
[0161] In some tested embodiments, yttrium oxide material is selectively deposited on dielectric surfaces, such as deposited silicon oxide surfaces, native silicon surfaces, and thermally oxidized silicon surfaces, relative to metal or metallic surfaces passivated by polyimide. Bis(ethylcyclopentadienyl)(N,N'-diisopropylacetamido)yttrium is used as the first metal precursor and tert-butyl alcohol is used as the oxygen precursor. Deposition is performed at a temperature of about 350°C and growth rates of material on the dielectric surface are observed to be between 0.5 and 100 Å. In another experiment with the same yttrium precursor and deposition temperature, 2-propanol was used as the oxygen precursor with similar results, although the growth rate of the oxide material was slightly lower.
[0162] In additional tests, aluminum oxide material was selectively deposited on dielectric surfaces, such as deposited silicon oxide surfaces, native silicon surfaces, and thermally oxidized silicon surfaces, by using aluminum dimethyl isopropoxide as the first metal precursor and tert-butyl alcohol as the oxygen precursor. The deposition was performed at a temperature of about 350° C., and the growth rate of the material on the silicon oxide surface was observed to be about 0.6 to about 100 %. In another experiment, 2-propanol was used as the oxygen precursor at the same aluminum precursor and deposition temperature with similar results, although the growth rate of the oxide material was slightly lower ( / cycle).
[0163] To test the deposition of metal and silicon oxide containing materials, a process including providing aluminum dimethyl isopropoxide and alkoxysilane to the reaction chamber in addition to the oxygen precursor was performed. Under conditions similar to those described above, the aluminum, silicon and oxygen containing materials were selectively deposited on the dielectric surface relative to the metal surface.
[0164] Figure 22 is a schematic diagram of a semiconductor processing assembly 200 for selectively depositing an oxide material on a first surface of a substrate according to the present disclosure. The semiconductor processing assembly 200 includes one or more reaction chambers 220, which are constructed and arranged to hold a substrate, a precursor injector system 201, which is constructed and arranged to provide a first precursor and an oxygen precursor in a gas phase into the reaction chamber. The semiconductor processing assembly 200 includes a first precursor source 202 constructed and arranged to contain a first precursor, an oxygen source 203 constructed and arranged to contain an oxygen precursor, and a third reactant source 204 constructed and arranged to contain an optional catalyst. The assembly is constructed and arranged to provide the first precursor and the oxygen precursor and the optional catalyst to the reaction chamber 220 via the precursor injector system 201 to deposit the oxide material on the first surface of the substrate. In the illustrated example, the semiconductor processing assembly 200 also includes an exhaust source 220 and a controller 230. The semiconductor processing assembly 200 may include one or more additional gas sources (not shown), such as an additional reactant source for a second metal precursor, an inert gas source, a carrier gas source, and / or a purge gas source. Semiconductor processing assembly 200 may be used to perform the methods described herein.
[0165] The semiconductor processing assembly also includes a first precursor source constructed and arranged to contain a first precursor, and an oxygen source constructed and arranged to contain an oxygen precursor. The semiconductor processing assembly is constructed and arranged to provide the first metal precursor and the oxygen precursor into the reaction chamber through the precursor injector system to selectively deposit a metal oxide on the substrate.
[0166] In embodiments where blocking and / or passivation are performed in the same semiconductor processing assembly, the assembly may include the respective sources. Thus, in some embodiments, the semiconductor processing assembly further includes one or more passivation sources, and the precursor injector system is constructed and arranged to provide one or more passivating agents in a vapor phase into the reaction chamber prior to providing the first metal precursor into the reaction chamber.
[0167] The reaction chamber 202 may include any suitable reaction chamber, such as an ALD or CVD reaction chamber as described herein. The first precursor source 202 may include a container and a first precursor as described herein—alone or mixed with one or more carrier gases (e.g., an inert gas). The oxygen source 203 may include a container and an oxygen precursor as described herein—alone or mixed with one or more carrier gases. The third reactant source 204 may include a catalyst as described herein. For embodiments utilizing a second metal precursor, there may be a corresponding number of third additional reactant sources ( Figure 2204). Thus, although three reactant sources 202-204 are shown, semiconductor processing assembly 200 may include any suitable number of sources. Sources 202-204 may be coupled to reaction chamber 202 via lines 212-214, which may each include a flow controller, a valve, a heater, etc. In some embodiments, each of the first precursor in first precursor source 202, the oxygen precursor in oxygen source 203, and / or the catalyst in third reactant source 204 may be independently heated or maintained at ambient temperature. In some embodiments, the source container is heated so that the precursor or reactant reaches a temperature suitable for evaporation.
[0168] Exhaust source 220 may include one or more vacuum pumps.
[0169] The controller 230 includes electronic circuits and software to selectively operate valves, manifolds, heaters, pumps and other components included in the semiconductor processing assembly 200. Such circuits and components are used to introduce precursors, reactants and purge gases from corresponding sources. The controller 230 can control the timing of gas pulse sequences, the temperature of the substrate and / or the reaction chamber 202, the pressure within the reaction chamber 202, and various other operations to provide the correct operation of the semiconductor processing assembly 200. The controller 230 may include control software to control the flow of precursors, reactants and purge gases into and out of the reaction chamber 202 by electrically or pneumatically controlling the valves. The controller 230 may include modules, such as software or hardware components, that perform specific tasks. The modules may be configured to reside on an addressable storage medium of the control system and configured to perform one or more processes. In some embodiments, a semiconductor processing assembly is disclosed, wherein the assembly includes a reaction chamber and a controller, wherein the controller is constructed and arranged to cause the system to perform a method according to the present disclosure.
[0170] Other configurations of the semiconductor processing assembly 200 are also possible, including different numbers and types of precursor and reactant sources. For example, the reaction chamber 202 may include more than one, for example two or four deposition stations. For example, if the blocking, passivation and / or activation processes are performed in the same chamber, this multi-station configuration may have advantages. In addition, it should be understood that there are many arrangements of valves, conduits, precursor sources, reactant sources, and other gas sources that can be used to achieve the goal of selectively and in a coordinated manner to supply gases to the reaction chamber 202. In addition, as a schematic representation of the semiconductor processing assembly, many components have been omitted for simplicity of illustration, and these components may include, for example, various valves, manifolds, purifiers, heaters, containers, vents, and / or bypasses.
[0171] During operation of semiconductor processing assembly 200, a substrate such as a semiconductor wafer (not shown) is transferred from, for example, a substrate handling system to reaction chamber 202. Once the substrate is transferred to reaction chamber 202, one or more gases such as precursors, reactants, carrier gases, and / or purge gases are introduced into reaction chamber 202 from a gas source.
[0172] In the present disclosure, "gas" may include materials that are gaseous at normal temperature and pressure (NTP), evaporated solids and / or evaporated liquids, and may be composed of a single gas or a gas mixture as appropriate. Precursors according to the present disclosure may be provided to a reaction chamber in a gas phase. The term "inert gas" may refer to a gas that does not participate in a chemical reaction and / or does not become part of a layer to a perceptible degree. Exemplary inert gases include He and Ar and any combination thereof. In some cases, molecular nitrogen and / or hydrogen may be inert gases. Gases other than process gases, i.e., gases that are not introduced by a precursor injector system, other gas distribution devices, etc., may be used, for example, to seal a reaction space and may include a sealing gas.
[0173] It should be understood that the configuration and / or method described herein are exemplary in nature, and these specific embodiments or examples should not be considered restrictive, because many variations are possible. The specific routine or method described herein can represent one or more of any number of processing strategies. Therefore, the various actions shown can be performed in the order shown, in other orders, or omitted in some cases.
[0174] In the abbreviations of chemical formulas, Me represents methyl, Et represents ethyl, Pr represents propyl, and Bu represents butyl. i Pr represents isopropyl, n Pr represents n-propyl, s Bu represents sec-butyl, t Bu represents tert-butyl, dmamp represents 2-dimethylamino-2-methyl-1-propanol ester; mmp represents 1-methoxy-2-methyl-2-propanol; acac represents acetylacetonate; dpguan represents N,N'-diisopropyl-2-dimethoguanyl; FMD represents formamide; triaz represents 1,3-diisopropyltriazene; edpa represents bis(N-ethoxy-2,2-dimethylpropionamido); DAD represents N,N-bis(tert-butyl)ethylene-1,2-diamide; CHT represents cycloheptatrienyl; mmp represents 1-methoxy-2-methyl-2-propoxy; edpa represents N-ethoxy-2,2-dimethylpropionamido; and TMEA represents tris[2-(methylamino)ethyl]amino.
[0175] The subject matter of the present disclosure includes all novel and nonobvious combinations and subcombinations of the various methods and components, and other features, functions, acts, and / or properties disclosed herein, and any and all equivalents thereof.
Claims
1. A method for selectively depositing a layer of oxide material on a first surface of a substrate relative to a second surface of the substrate, the method comprising: providing a substrate including a first surface and a second surface in a reaction chamber; providing a first precursor in a gas phase into a reaction chamber; as well as An oxygen precursor including hydroxyl groups is provided in a gas phase into the reaction chamber to form an oxide material layer on the first surface.
2. The method according to claim 1, wherein: The second surface includes a passivation layer comprising polyimide.
3. The method according to claim 1 or 2, wherein: The first surface is a dielectric surface.
4. The method according to claim 3, wherein: The first surface includes silicon.
5. A method according to any one of the preceding claims, wherein: The method includes providing a metal or metalloid catalyst into the reaction chamber.
6. The method according to claim 5, wherein: The catalyst is a metal halide, an organometallic compound or a metal-organic compound.
7. A method according to any one of the preceding claims, wherein: The oxygen precursor is an alcohol containing 1 to 6 carbon atoms.
8. The method according to claim 7, wherein: The oxygen precursor is a secondary alcohol or a tertiary alcohol.
9. A method according to any one of the preceding claims, wherein: The first precursor includes an alkoxy group.
10. The method according to claim 9, wherein: The oxide material layer includes silicon oxide, and the first precursor is an alkoxysilane precursor.
11. The method according to claim 9, wherein: The oxide material is a metal oxide, and the first precursor includes a metal alkoxide.
12. The method according to claim 11, wherein: The first precursor includes a metal atom, an alkyl group, and an alkoxide group.
13. The method according to claim 11 or 12, wherein: The metal of the first precursor is selected from Al, Ga and In.
14. The method according to any one of claims 11 to 13, wherein: The first precursor is selected from aluminum propoxide (Al(O n Pr)3), aluminum isopropoxide (Al(O i Pr)3), aluminum sec-butylate (Al(O s Bu)3), aluminum ethoxide (Al(OEt)3), Al(N i Pr2)2(C3H6NMe2), dimethylaluminum isopropoxide (AlMe2O i Pr), dimethyl gallium isopropoxide (GaMe2O i Pr), In(dmamp)2(OiPr).
15. The method according to any one of claims 1 to 8, wherein: The first precursor comprises a cyclopentadienyl group.
16. The method according to claim 15, wherein: The first precursor is a heteroleptic precursor comprising a Group 3 metal, at least one cyclopentadienyl ligand, and at least one amidino ligand.
17. The method according to claim 15 or 16, wherein: The oxide material is a metal oxide, and the metal of the metal oxide is selected from scandium (Sc), yttrium (Y), lanthanum (La) and cerium (Ce).
18. The method according to any one of claims 16 to 17, wherein: The amidino ligands include alkylacetamido ligands.
19. The method according to claim 18, wherein: The alkylacetamido ligand is a dialkylacetamido ligand.
20. A method according to any one of the preceding claims, wherein: The method is a cyclic process, and a deposition cycle includes providing the first precursor and the oxygen precursor into the reaction chamber.
21. A method according to any one of the preceding claims, wherein: The oxide material is deposited in a substantially water-free environment.
22. A semiconductor processing assembly for selectively depositing a layer of oxide material on a substrate, the assembly comprising: one or more reaction chambers constructed and arranged to hold a substrate; a precursor injector system constructed and arranged to provide a first precursor and an oxygen precursor into the reaction chamber in a gas phase; wherein the semiconductor processing assembly further comprises a first precursor source constructed and arranged to contain a first precursor; and an oxygen source constructed and arranged to contain an oxygen precursor; and The assembly is constructed and arranged to provide a first metal precursor and an oxygen precursor into a reaction chamber via a precursor injector system for selectively depositing a metal oxide on a substrate.