Packaged device and method of manufacturing the same

Abstract

The application relates to a packaging device and a preparation method thereof, wherein the wiring layer structure of the packaging device comprises a chip, an external circuit module and an optoelectronic conversion module. The chip is located on one side of the wiring layer structure in a first direction, and the first direction is the thickness direction of the wiring layer structure. The external circuit module is located on the side of the wiring layer structure away from the chip in the first direction. The optoelectronic conversion module is installed on the same side of the wiring layer structure as the chip and / or the external circuit module, and comprises an optoelectronic conversion part and an optical interface part. The optoelectronic conversion part is installed to the wiring layer structure. The optical interface part is connected to the optoelectronic conversion part in a second direction, and the optical interface part protrudes relative to the wiring layer structure in the second direction, and the second direction is perpendicular to the first direction. The application can effectively improve the signal transmission speed.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and in particular to a packaging device and a method for preparing the same. Background Art

[0002] For some packaged device products, circuit structures are formed on both sides of the wiring layer, where one side of the circuit structure includes a chip wrapped by a plastic layer, and the other side includes an external circuit module.

[0003] The signal transmission rate of existing products formed in this way is usually limited. Summary of the Invention

[0004] Based on this, the present application provides a packaging device and a preparation method thereof that can improve signal transmission speed.

[0005] A packaged device, comprising:

[0006] Wiring layer structure;

[0007] A chip is located on one side of the wiring layer structure in a first direction, where the first direction is a thickness direction of the wiring layer structure;

[0008] an external circuit module, located on a side of the wiring layer structure away from the chip in a first direction;

[0009] A photoelectric conversion module is installed on the same side of the wiring layer structure as the chip and / or the external circuit module, and includes a photoelectric conversion part and an optical interface part; the photoelectric conversion part is installed to the wiring layer structure; the optical interface part is connected to the photoelectric conversion part along a second direction, and the optical interface part protrudes relative to the wiring layer structure in the second direction, and the second direction is perpendicular to the first direction.

[0010] In one embodiment, the photoelectric conversion module and the chip are mounted on the same side of the wiring layer structure;

[0011] The packaging device further includes a plastic packaging layer, which covers the chip, the wiring layer structure and at least a portion of the photoelectric conversion unit.

[0012] In one embodiment, a height of the optical interface portion in the first direction is greater than a height of the photoelectric conversion portion in the first direction.

[0013] In one embodiment, the photoelectric conversion module and the external circuit module are installed on the same side of the wiring layer structure;

[0014] The packaging device also includes a first frame structure, which includes a first frame and a socket located on the first frame. The photoelectric conversion part is located on a side of the first frame away from the wiring layer structure and is connected to the wiring layer structure through the socket; alternatively, the photoelectric conversion part is welded to the wiring layer structure.

[0015] In one embodiment, the photoelectric conversion unit includes an electrical chip and an optical chip, the electrical chip is mounted on the wiring layer structure, the optical chip is stacked on the electrical chip along a first direction, and the optical interface unit is at least connected to the optical chip.

[0016] In one embodiment, the packaging device includes a first frame structure, the first frame structure includes a first frame and a socket located on the first frame, and the first frame structure is provided with a positioning hole;

[0017] The wiring layer structure further includes a positioning pin, which is located on a side of the wiring layer structure away from the chip in a first direction, and the positioning pin is inserted into the positioning hole.

[0018] In one embodiment, the first frame structure further includes an ear piece, the ear piece is connected to the first frame, and the positioning hole is located in the ear piece.

[0019] In one embodiment, the wiring layer structure includes an interposer structure, which includes an interposer substrate, a wiring layer, and a conductive through-hole structure. The wiring layer is located on one side of the interposer substrate, and the conductive through-hole structure passes through the interposer substrate and connects the wiring layer. The chip is located on a side of the wiring layer away from the interposer substrate.

[0020] In one embodiment, the interposer structure further includes a protective layer, the protective layer is located on a side of the interposer substrate away from the wiring layer, and the conductive via structure penetrates the protective layer and the interposer substrate.

[0021] In one embodiment, the interposer structure further includes:

[0022] A first pad is located on the surface of the wiring layer, and the chip is mounted on the first pad;

[0023] a second pad located on a side of the interposer substrate away from the wiring layer and covering the conductive through-hole structure, the external circuit module being mounted on the second pad;

[0024] The photoelectric conversion unit is connected to the first pad and / or the second pad;

[0025] The packaged device further comprises:

[0026] a plastic encapsulation layer covering the chip and the interposer structure;

[0027] a heat sink located on a side of the plastic encapsulation layer away from the interposer structure;

[0028] a first fixing hole penetrating through the interposer structure and the plastic encapsulation layer;

[0029] a fixing member passing through the first fixing hole to fix the heat sink.

[0030] A method for manufacturing a packaged device, comprising:

[0031] providing a first carrier substrate;

[0032] forming an interposer structure on the first carrier substrate, the interposer structure comprising an interposer substrate, a wiring layer and a conductive via structure, the wiring layer being located on a side of the interposer substrate away from the first carrier substrate, the conductive via structure penetrating through the interposer substrate along a first direction to connect the wiring layer, the first direction being a thickness direction of the interposer substrate;

[0033] forming a chip on a side of the wiring layer away from the interposer substrate;

[0034] forming a plastic encapsulation layer covering the chip and the interposer structure;

[0035] removing the first carrier substrate;

[0036] forming an external circuit module on a side of the interposer structure away from the chip, the external circuit module being connected to the chip through the interposer structure;

[0037] wherein, while forming the chip on the side of the wiring layer away from the interposer substrate, an optoelectronic conversion module is also formed on the side of the wiring layer away from the interposer substrate; and / or, while forming the external circuit module on the side of the interposer structure away from the chip, an optoelectronic conversion module is also formed on the side of the interposer structure away from the chip; the optoelectronic conversion module comprises an optoelectronic conversion part and an optical interface part; the optoelectronic conversion part is mounted to the wiring layer structure; the optical interface part is connected to the optoelectronic conversion part along a second direction, and the optical interface part protrudes relative to the wiring layer structure in the second direction, the second direction being perpendicular to the first direction.

[0038] In one of the embodiments, the external circuit module comprises an external plug, and after removing the first carrier substrate, the method further comprises:

[0039] forming a positioning pin on the side of the interposer structure away from the chip;

[0040] The forming of an external circuit module on a side of the interposer structure away from the chip includes:

[0041] A first frame structure having a positioning hole is formed on a side of the interposer structure away from the chip, and the positioning pin is inserted into the positioning hole, wherein the first frame structure includes a first frame and a socket located on the first frame;

[0042] An external plug-in is formed on a side of the first frame structure away from the interposer structure, and the external plug-in is connected to the second pad through the socket.

[0043] The packaged device and its preparation method include a photoelectric conversion module mounted on the same side of the wiring layer structure as the chip and / or external circuit module. The photoelectric conversion module can convert electrical signals into optical signals, thereby effectively increasing signal transmission speed, among other things.

[0044] The photoelectric conversion module includes a photoelectric conversion unit and an optical interface unit. The photoelectric conversion unit is mounted to the wiring layer structure, thereby facilitating electrical connection between the photoelectric conversion unit and the wiring layer structure. The optical interface unit protrudes relative to the wiring layer structure in a second direction, thereby facilitating connection with an external light receiving device, thereby enabling optical signal transmission between the external device and the optical interface unit. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the conventional technology, the following briefly introduces the drawings required for use in the embodiments or the conventional technology descriptions. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0046] Figure 1 is a schematic diagram of the cross-sectional structure of a packaging device provided in one embodiment;

[0047] Figure 2 is a schematic cross-sectional structural diagram of a packaging device provided in another embodiment;

[0048] Figure 3 is an exploded cross-sectional structural diagram of a local structure of a packaging device provided in one embodiment;

[0049] Figure 4 is an exploded top view schematic diagram of a partial structure of a packaged device provided in one embodiment;

[0050] Figure 5 is a flow chart of a method for preparing a packaged device provided in one embodiment;

[0051] Figures 6 to 21Schematic diagram of the cross-sectional structure of the structure obtained in each step of the method for preparing a packaging device provided in one embodiment.

[0052] Description of reference numerals:

[0053] 100-photoelectric conversion module, 110-photoelectric conversion unit, 111-electrical chip, 112-optical chip, 120-optical interface unit, 200a-first carrier board, 200b-second carrier board, 200-wiring layer structure, 210-interposer substrate, 220-wiring layer, 230-conductive via structure, 240-positioning pin, 2001-interposer initial structure, 2101-interposer initial sheet, 2301-conductive initial structure, 240-first solder pad, 250-second solder pad, 260-first patterned dielectric layer, 270-second patterned dielectric layer, 300-chip, 400 -Plastic sealing layer, 500-external circuit module, 510-passive components, 520-external plug-in, 521-voltage management module, 522-connector, 600-protective layer, 6001-protective material layer, 710-first adhesive layer, 720-second adhesive layer, 730-adhesive, 740-fixing part, 810-first frame structure, 811-first frame, 812-socket, 813-conductive part, 814-ear piece, 820-second frame structure, 900-heat sink, 10-annular space, 20-first fixing hole, 30-second fixing hole, 40-positioning hole. DETAILED DESCRIPTION

[0054] To facilitate understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The accompanying drawings provide embodiments of the present application. However, the present application may be implemented in many different forms and is not limited to the embodiments described herein. Rather, these embodiments are provided to make the disclosure of the present application more thorough and comprehensive.

[0055] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application pertains. The terms used herein in the specification of this application are for the purpose of describing specific embodiments only and are not intended to limit this application.

[0056] It will be understood that when an element or layer is referred to as being "on" or "connected to" another element or layer, it can be directly on or connected to the other element or layer or intervening elements or layers can be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there are no intervening elements or layers present. It will also be understood that, although the terms first, second, third, etc. can be used herein to describe various elements, components, regions, layers and / or sections, these elements, components, regions, layers and / or sections should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or section from another element, component, region, layer or section. Thus, a first element, component, region, layer or section discussed below could be termed a second element, component, region, layer or section without departing from the teachings of the present application.

[0057] Spatially relative terms, such as "beneath", "below", "lower", "under", "above", "upper" and the like, can be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if a device in the figures is turned over, elements described as "below" or "beneath" other elements or features would then be oriented "above" or "over" the other elements or features. Thus, the exemplary term "below" can encompass both an orientation of above and below. The device can also be oriented in the other direction, and the spatially relative terms used herein can be interpreted accordingly.

[0058] As used herein, the singular forms "a", "an" and "the" include plural referents unless the context clearly dictates otherwise. It will be further understood that the terms "comprises", "comprising", "includes" and / or "including", or the like, when used in this specification, specify the presence of stated features, integers, steps, operations, elements, components, or combinations thereof, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, or combinations thereof.

[0059] In one embodiment, referring to Figure 1 or Figure 2 a package device is provided, which includes a wiring layer structure 200, a chip 300, an external circuit module 500, and an optoelectronic conversion module 100.

[0060] The wiring layer structure 200 may include a plurality of interconnected wiring layers 220 , and an insulating dielectric layer may be provided between adjacent wiring layers 220 .

[0061] The chip 300 is located on one side of the wiring layer structure 200 in a first direction. The first direction is a thickness direction of the wiring layer structure 200.

[0062] A plurality of chips 300 may be disposed on one side of the wiring layer structure 200. The plurality of chips 300 may be disposed at intervals and each chip 300 may be electrically connected to the wiring layer 220. Different chips 300 may have different functions.

[0063] The external circuit module 500 is located on a side of the wiring layer structure 200 away from the chip 300 in the first direction. That is, the external circuit module 500 and the chip 300 are located on two opposite sides of the wiring layer structure 200 .

[0064] The external circuit module 500 may include a passive device 510 (IPD) and / or an external plug-in 520 , etc. The external plug-in 520 may include a voltage management module 521 and / or a connector 522 , etc. The external circuit module 500 may be connected to the chip 300 via the wiring layer structure 200 .

[0065] The photoelectric conversion module 100 and the chip 300 are mounted on the same side of the wiring layer structure 200. Alternatively, the photoelectric conversion module 100 and the external circuit module 500 are mounted on the same side of the wiring layer structure 200. Alternatively, when there is more than one photoelectric conversion module 100, a photoelectric conversion module 100 mounted on the same side of the wiring layer structure 200 as the chip 300 and a photoelectric conversion module 100 mounted on the same side of the wiring layer structure 200 as the external circuit module 500 may be provided.

[0066] The number of the photoelectric conversion modules 100 may be one or more. In addition, the same photoelectric conversion module 100 includes a photoelectric conversion unit 110 and an optical interface unit 120 .

[0067] The photoelectric conversion unit 110 is used to perform photoelectric conversion.

[0068] At the same time, the photoelectric converter 110 is mounted on the wiring layer structure 200. At this time, the orthographic projection of the photoelectric converter 110 overlaps with the orthographic projection of the wiring layer structure 200 on the projection plane perpendicular to the first direction, thereby facilitating electrical connection between the photoelectric converter 110 and the wiring layer structure 200.

[0069] The optical interface portion 120 is connected to the photoelectric conversion portion 110 along the second direction.

[0070] As an example, the optoelectronic conversion module 100 can include an electrical chip 111 and an optical chip 112. The electrical chip 111 is mounted to the wiring layer structure 200, so as to be electrically connected to the wiring layer structure 200. The optical chip 112 is stacked to the electrical chip 111 along a first direction, so as to convert an electrical signal on the electrical chip 111 into an optical signal, or convert an optical signal into an electrical signal and transmit the electrical signal to the electrical chip 111.

[0071] At this time, the optical interface 120 can be connected to at least the optical chip 112.

[0072] Of course, the form of the optoelectronic conversion module 100 is not limited to this. For example, the optoelectronic conversion module 100 can also include a single chip 300 having an optoelectronic conversion function, which is not limited herein. For another example, the optoelectronic conversion module 100 can include the electrical chip 111 and the optical chip 112. The electrical chip 111, the optical chip 112, and the optical interface can be arranged in sequence along a second direction.

[0073] The optical interface 120 protrudes from the wiring layer structure 200 along the second direction, so as to be easily connected to an external optical receiving device (such as an optical fiber, etc.), and thus transmit an optical signal between the external device.

[0074] In the present embodiment, in the packaging device, the optoelectronic conversion module 100 is arranged on the same side of the chip 300 and / or the external circuit module 500 as the wiring layer structure 200. The optoelectronic conversion module 100 can convert an electrical signal into an optical signal, so as to effectively improve the signal transmission speed, etc.

[0075] Meanwhile, the optoelectronic conversion module 100 includes the optoelectronic conversion module 110 and the optical interface 120. The optoelectronic conversion module 110 is mounted to the wiring layer structure 200, so as to be easily electrically connected to the wiring layer structure 200. The optical interface 120 protrudes from the wiring layer structure 200 along the second direction, so as to be easily connected to an external optical receiving device, and thus transmit an optical signal between the external device.

[0076] In one embodiment, referring to Figure 1 The optoelectronic conversion module 100 and the chip 300 are arranged on the same side of the wiring layer structure 200.

[0077] The packaging device further includes a plastic encapsulation layer 400. The material of the plastic encapsulation layer 400 can include, but is not limited to, epoxy molding compound (EMC).

[0078] The plastic encapsulation layer 400 encapsulates the chip 300, the wiring layer structure 200, and at least part of the optoelectronic conversion module 110.

[0079] As an example, on a projection plane perpendicular to the first direction, the orthographic projection of the photoelectric conversion unit 110 may be completely located within the orthographic projection of the wiring layer structure 200. In this case, the plastic encapsulation layer 400 may completely cover the photoelectric conversion unit 110.

[0080] As an example, on a projection plane perpendicular to the first direction, the orthographic projection of the photoelectric conversion unit 110 may partially extend beyond the orthographic projection of the wiring layer structure 200. In this case, the plastic encapsulation layer 400 may cover the portion of the orthographic projection of the photoelectric conversion unit 110 that is within the orthographic projection of the wiring layer structure 200.

[0081] In this embodiment, the photoelectric conversion module 100 and the chip 300 are installed on the same side of the wiring layer structure 200, so that the photoelectric conversion part 110 can be plastic-encapsulated and mechanically fixed at the same time as the chip 300 is plastic-encapsulated and mechanically fixed. As a result, the photoelectric conversion part 110 does not need to be specially provided with a device (such as a carrier board, etc.) for fixing and protecting the optical chip 112, the electrical chip 111, etc.

[0082] In one embodiment, see Figure 1 The photoelectric conversion module 100 and the chip 300 are mounted on the same side of the wiring layer structure 200 , and the height of the optical interface portion 120 in the first direction is greater than the height of the photoelectric conversion portion 110 in the first direction.

[0083] It can be understood that when the photoelectric conversion unit 110 includes the optical chip 112 and the electrical chip 111 stacked together in the first direction, the height of the photoelectric conversion unit 110 in the first direction includes the height of the optical chip 112 in the first direction and the height of the electrical chip 111 in the first direction.

[0084] At this time, the height of the photoelectric conversion unit 110 can be relatively small, so that there can be a small height difference with the chip 300. Therefore, when the chip 300 is plastic-sealed, the thickness of the plastic layer 400 is not affected.

[0085] At the same time, the height of the optical interface portion 120 may be relatively large, thereby facilitating connection with an external light receiving device.

[0086] In one embodiment, see Figure 2 The photoelectric conversion module 100 and the external circuit module 500 are mounted on the same side of the wiring layer structure 200 .

[0087] At this time, as an example, the photoelectric conversion unit 110 may further include a fixing and protection device (such as a carrier board, etc.) to mechanically fix and protect the optical chip 112 , the electrical chip 111 , etc.

[0088] The heights of the photoelectric conversion unit 110 and the optical interface unit 120 in the first direction may be the same or different, and may be specifically set according to actual needs.

[0089] In one embodiment, see Figure 2 as well as Figure 3 The packaged device may further include a first frame structure 810 . The first frame structure 810 may be mounted to the wiring layer structure 200 .

[0090] The first frame structure 810 may include a first frame 811 and a socket 812. The material of the first frame 811 may include, but is not limited to, silicone. The socket 812 may be disposed on the first frame 811. Specifically, a mounting groove may be provided on the surface of the first frame 811, and the socket 812 may be placed in the mounting groove to secure the socket 812 in place.

[0091] Optionally, the first frame structure 810 may further include a conductive portion 813. The conductive portion 813 may be located within the first frame 811 and may be disposed at the bottom of the socket 812. The material of the conductive portion 813 may include, but is not limited to, conductive rubber.

[0092] The external circuit module 500 may include an external plug-in 520 , etc. The pins of the external plug-in 520 may be inserted into the socket 812 , thereby being conductively connected to the wiring layer structure 200 through the socket 812 and the conductive portion 813 .

[0093] The photoelectric converter 110 is located on a side of the first frame 811 away from the wiring layer structure 200 and is connected to the wiring layer structure 200 via a socket 812. Specifically, the photoelectric converter 110 can also be plugged into the socket 812 similar to the external plug-in 520, thereby being electrically connected to the wiring layer structure 200, thereby facilitating installation.

[0094] It is understood that the first frame structure 810 may be provided with a plurality of sockets 812 . The photoelectric conversion unit 110 and the external plug-in 520 may be plugged into different sockets 812 . Different external plug-ins 520 may also be plugged into different sockets 812 .

[0095] Of course, in other embodiments, the installation method of the photoelectric conversion unit 110 is not limited thereto. For example, the photoelectric conversion unit 110 may also be directly soldered to the wiring layer structure 200 .

[0096] In one embodiment, see Figure 3 as well as Figure 4 The packaged device includes a first frame structure 810. The first frame structure 810 includes a first frame 811 and a socket 812 located on the first frame 811. In addition, a positioning hole 40 is provided on the first frame structure 810.

[0097] As an example, the first frame structure 810 can further include an ear 814. The ear 814 can be disposed around the first frame 811. The positioning hole 40 can be disposed in the ear 814.

[0098] Of course, the positioning hole 40 is not limited to the above-mentioned form. For example, the positioning hole 40 can be formed in a positioning part of the first frame 811 when the first frame 811 is manufactured.

[0099] Meanwhile, the wiring layer structure 200 further includes a positioning pin 240. The positioning pin 240 is located on a side of the wiring layer structure 200 away from the chip 300 in the first direction.

[0100] The positioning pin 240 is inserted into the positioning hole 40, so that the first frame structure 810 can be fixed to the wiring layer structure 200.

[0101] The positioning pin 240 and the positioning hole 40 are matched with each other and are arranged one-to-one. The number of the positioning pin 240 and the positioning hole 40 can be set according to actual needs.

[0102] In the embodiment, a corresponding number of positioning pins 240 are directly disposed on the wiring layer structure 200, and the positioning pins 240 are directly inserted into the positioning holes 40 on the first frame structure 810. At this time, in the packaging process, the first frame structure 810 can be first positioned to the wiring layer structure 200, so as to ensure the position accuracy of the socket 812. Then, after the external plug-in 520 is inserted into the socket 812, the external plug-in 520 and the wiring layer structure 200 can be accurately connected and conducted.

[0103] In one embodiment, referring to Figure 1 or Figure 2 , the wiring layer structure 200 includes an interposer structure. The interposer structure includes an interposer substrate 210, a wiring layer 220, and a conductive via structure 230.

[0104] The interposer structure can include but is not limited to a silicon interposer. The interposer substrate 210 can include but is not limited to a silicon wafer.

[0105] The wiring layer 220 is located on one side of the interposer substrate 210. The one side of the interposer substrate 210 can be provided with a plurality of wiring layers 220 connected to each other, and adjacent wiring layers 220 can have an insulating medium layer therebetween. It should be noted that only part of the structure of the wiring layer 220 is simply shown in the figure.

[0106] The conductive via structure 230 penetrates the interposer substrate 210 to connect the wiring layers 220. The material of the conductive via structure 230 can include but is not limited to a metal material such as copper.

[0107] The chip 300 is located on a side of the wiring layer 220 away from the interposer substrate 210 .

[0108] A plurality of chips 300 may be disposed on a side of the wiring layer 220 away from the interposer substrate 210. The chips 300 may be electrically connected to the wiring layer 220. The plurality of chips 300 may be disposed at intervals.

[0109] The external circuit module 500 is located on a side of the interposer structure away from the chip 300 .

[0110] In this embodiment, an interposer structure is used to connect the chip 300 and the external circuit module 500, instead of the traditional wiring layer structure 200 formed by coating a PI film layer and then photolithographically plating copper. This can prevent the structure from warping due to the excessive thermal expansion coefficient of the PI film layer and copper. At the same time, the interposer technology can achieve a wiring layer 220 with a high degree of integration. Therefore, connecting the chip 300 and the external circuit module 500 through an interposer structure can effectively improve the circuit integration density. Moreover, when the interposer structure is a silicon interposer, the heat dissipation of silicon is relatively good, thereby effectively improving the heat dissipation of the product. Therefore, the method of this embodiment can effectively improve the performance of the packaged device.

[0111] In one embodiment, see Figure 1 or Figure 2 The interposer structure further includes a protective layer 600. The material of the protective layer 600 may include but is not limited to silicon oxide, silicon nitride or silicon oxynitride.

[0112] The protection layer 600 is located on a side of the interposer substrate 210 away from the wiring layer 220 , and the conductive via structure 230 penetrates the protection layer 600 and the interposer substrate 210 .

[0113] The protection layer 600 can prevent metal in the conductive via structure 230 from entering the interposer substrate 210 , thereby preventing leakage between adjacent conductive via structures 230 .

[0114] In one embodiment, see Figure 1 or Figure 2 The interposer structure further includes a first pad 240 and a second pad 250. The material of the first pad 240 and / or the second pad 250 may include, but is not limited to, copper, etc. The number of the first pad 240 and / or the second pad 250 may be multiple.

[0115] The first pad 240 is located on the surface of the wiring layer 220 and may cover at least a portion of the wiring layer 220 , thereby being electrically connected to the wiring layer 220 .

[0116] The chip 300 is mounted to the first pad 240 .

[0117] When the photoelectric conversion module 100 and the chip 300 are mounted on the same side of the wiring layer structure 200 , the photoelectric conversion unit 110 may be connected to the first pad 240 .

[0118] As an example, the photoelectric conversion unit 110 may be die-mounted or hybrid-bonded to the first pad 240 together with the chip 300 .

[0119] The second pad 250 may be located on a side of the interposer substrate 210 away from the wiring layer 220 and cover the conductive via structure 230 to be electrically connected to the conductive via structure 230. The external circuit module 500 is mounted to the second pad 250.

[0120] When the photoelectric conversion module 100 and the external circuit module 500 are mounted on the same side of the wiring layer structure 200 , the photoelectric conversion portion 110 may be connected to the second pad 250 .

[0121] As an example, the photoelectric conversion unit 110 may be connected to the second pad 250 via the first frame structure 810. Alternatively, the photoelectric conversion unit 110 may be directly soldered to the second pad 250.

[0122] In one embodiment, see Figure 1 or Figure 2 The packaged device further includes a plastic layer 400 , a heat dissipation plate 900 , a first fixing hole 20 and a fixing member 740 .

[0123] The plastic layer 400 covers the chip 300 and the interposer structure.

[0124] The heat dissipation plate 900 is located on a side of the molding layer 400 away from the interposer structure. As an example, the heat dissipation plate 900 can be bonded to the molding layer 400 by adhesive 730 (eg, TIM adhesive).

[0125] The first fixing hole 20 passes through the interposer structure and the plastic packaging layer 400 .

[0126] The fixing member 740 passes through the first fixing hole 20 to fix the heat dissipation plate 900. The fixing member 740 may include but is not limited to a bolt or the like.

[0127] After passing through the first fixing hole 20 , the fixing member 740 may not penetrate the heat dissipation plate 900 , or may penetrate the heat dissipation plate 900 .

[0128] As an example, the packaged device may further include a first frame structure 810 and a second frame structure 820 .

[0129] The external circuit structure may be located on a side of the first frame structure 810 away from the interposer structure, and may include a first frame 811 and a socket 812 .

[0130] The second frame structure 820 may include a plug-in slot, in which the external plug-in 520 may be disposed, etc. The second frame structure 820 is used for mechanical fixing and limiting.

[0131] Optionally, the second frame structure 820 may include a frame plate and a frame hole provided at an edge of the frame plate. The frame plate may cover at least a portion of the photoelectric conversion unit 110, and the optical interface unit 120 may be located in the frame hole.

[0132] The first frame structure 810 may have a second fixing hole 30. The second frame structure 820 may also have a third fixing hole. The second fixing hole 30 and the third fixing hole may be arranged opposite the first fixing hole 20. The fixing member 740 may also pass through the third fixing hole and the second fixing hole 30 simultaneously, thereby simultaneously fixing the second frame structure 820 to the first frame structure 810.

[0133] In this embodiment, the fixing member 740 can make the connection between the heat dissipation plate 900 and the plastic packaging layer 400 more reliable.

[0134] In one embodiment, see Figure 5 , provides a method for preparing a packaged device, comprising the following steps:

[0135] Step S10, see Figure 15 , providing a first carrier board 200a.

[0136] The first carrier plate 200a is a carrier plate that can be used for support. The material of the first carrier plate 200a can include but is not limited to a glass plate, a metal plate or a plastic plate.

[0137] Step S20, see Figure 15 An interposer structure is formed on the first carrier 200a. The interposer structure includes an interposer substrate 210, a wiring layer 220, and a conductive through-hole structure 230. The wiring layer 220 is located on a side of the interposer substrate 210 away from the first carrier 200a. The conductive through-hole structure 230 penetrates the interposer substrate 210 along a first direction and connects the wiring layer 220. The first direction is the thickness direction of the interposer substrate 210.

[0138] The interposer structure may include, but is not limited to, a silicon interposer. The interposer substrate 210 may include, but is not limited to, a silicon wafer. The conductive via structure 230 may be made of, but is not limited to, a metal material such as copper.

[0139] One side of the interposer substrate 210 may be provided with multiple interconnected wiring layers 220, and an insulating dielectric layer may be provided between adjacent wiring layers 220. It should be noted that the figure only briefly illustrates a partial structure of the wiring layer 220.

[0140] Step S30, see Figure 16 The chip 300 is formed on the wiring layer 220 away from the interposer substrate 210.

[0141] A plurality of chips 300 can be formed on the wiring layer 220 away from the interposer substrate 210. The chips 300 can be electrically connected with the wiring layer 220. The plurality of chips 300 can be arranged at intervals. Different chips 300 can have different functions.

[0142] At step S40, referring to Figure 17 A molding layer 400 is formed to cover the chip 300 and the interposer structure.

[0143] The molding layer 400 can completely cover the chip 300, thereby protecting the chip 300 by molding. The material of the molding layer 400 can include, but is not limited to, epoxy molding compound (EMC).

[0144] At step S50, referring to Figure 18 The first carrier board 200a is removed.

[0145] The first carrier board 200a can be removed by laser stripping or the like, thereby exposing the side of the interposer structure away from the chip 300.

[0146] At step S70, referring to Figure 20 and Figure 21 An external circuit module 500 is formed on the side of the interposer structure away from the chip 300, and the external circuit module 500 is connected with the chip 300 through the interposer structure.

[0147] After the first carrier board 200a is removed, the structure can be flipped to facilitate the formation of the external circuit module 500.

[0148] The external circuit module 500 can include a passive device 510 (IPD) and / or an external plug-in 520, etc. The external plug-in 520 can include a voltage management module 521 and / or a connector 522, etc.

[0149] At step S30, referring to Figure 16 The photoelectric conversion module is formed on the side of the wiring layer 220 away from the interposer substrate 210 at the same time when the chip 300 is formed on the side of the wiring layer 220 away from the interposer substrate 210.

[0150] At step S70, referring to Figure 2 The photoelectric conversion module 100 is formed on the side of the interposer structure away from the chip 300 at the same time when the external circuit module 500 is formed on the side of the interposer structure away from the chip 300.

[0151] The photoelectric conversion module 100 includes a photoelectric conversion unit 110 and an optical interface unit 120. The photoelectric conversion unit 110 is mounted to the wiring layer structure 200. The optical interface unit 120 is connected to the photoelectric conversion unit 110 along a second direction. The optical interface unit 120 protrudes relative to the wiring layer structure 200 in the second direction, which is perpendicular to the first direction.

[0152] In this embodiment, an interposer structure is first formed on a first carrier 200a. The first carrier 200a can then be used as a support for the interposer structure. A chip 300 is formed on the side of the wiring layer 220 facing away from the interposer substrate 210, and a plastic encapsulation layer 400 is formed to encapsulate the chip 300. The plastic encapsulation layer 400 can then be used as a support to remove the first carrier 200a. The external circuit module 500 is then formed on the side of the interposer structure facing away from the chip 300, effectively completing the fabrication of a packaged device.

[0153] At the same time, the packaged device formed by the method of this embodiment uses an interposer structure to connect the chip 300 and the external circuit module 500, instead of using the traditional wiring layer structure 200 formed by coating a PI film layer and then photolithographically plating copper. This can prevent structural warping due to the excessive thermal expansion coefficient of the PI film layer and copper. At the same time, the interposer technology can achieve a wiring layer 220 with a high degree of integration. Therefore, connecting the chip 300 and the external circuit module 500 through the interposer structure can effectively improve the circuit integration density. Moreover, when the interposer structure is a silicon interposer, the heat dissipation of silicon is relatively good, which can also effectively improve the heat dissipation of the product. Therefore, the method of this embodiment can effectively improve the performance of the packaged device.

[0154] Meanwhile, the present application forms a photoelectric conversion module while forming the chip 300 and / or the external circuit module 500. The photoelectric conversion module can convert electrical signals into optical signals, thereby effectively improving signal transmission speed.

[0155] Meanwhile, the photoelectric conversion module 100 includes a photoelectric conversion unit 110 and an optical interface unit 120. The photoelectric conversion unit 110 is mounted to the wiring layer structure 200, thereby facilitating electrical connection between the photoelectric conversion unit 110 and the wiring layer structure 200. The optical interface unit 120 protrudes relative to the wiring layer structure in the second direction, thereby facilitating connection with an external light receiving device, thereby enabling optical signal transmission between the external device and the optical interface unit 120.

[0156] In one embodiment, the external circuit module 500 includes an external plug-in 520 .

[0157] After step S50, the method further includes:

[0158] Step S61, see Figure 3, a positioning pin 240 is formed on a side of the interposer structure away from the chip 300 .

[0159] A patterned photoresist with an opening may be formed first, and then the opening may be filled with a material for the positioning pins 240 . The photoresist and the material for the positioning pins 240 outside the opening may be removed to form the positioning pins 240 .

[0160] Meanwhile, step S70 includes:

[0161] Step S72, see Figure 3 as well as Figure 21 A first frame structure 810 with positioning holes 40 is formed on the side of the interposer structure away from the chip, and the positioning pins 240 are inserted into the positioning holes 40. The first frame structure 810 includes a first frame 811 and a socket 812 located on the first frame 811.

[0162] Step S73, see Figure 21 An external plug-in 520 is formed on a side of the first frame structure 810 away from the interposer structure, and the external plug-in 520 is connected to the second pad 250 through the socket 812 .

[0163] In this embodiment, the first frame structure 810 can be precisely positioned to the interposer structure by engaging the positioning holes 40 with the positioning pins 240, thereby ensuring the accuracy of the socket position. Then, after the external plug-in 520 is inserted into the socket 812, it can be precisely connected to the interposer structure.

[0164] In one embodiment, the external circuit module 500 further includes a passive component 510 .

[0165] See also Figure 20 , before step S72, the following steps may also be included:

[0166] In step S71 , a passive component 510 is mounted on a portion of the second pad 250 .

[0167] As a part of the external circuit module 500 , the passive component 510 can be directly mounted on the second pad 250 by surface mount mounting.

[0168] Meanwhile, when forming the first frame structure 810 in step S72 , the first frame structure 810 covering the passive device 510 and another portion of the second pad 250 may be formed.

[0169] In one embodiment, see Figure 19 , before step S70, further comprising:

[0170] Step S62 : forming a first fixing hole 20 penetrating the interposer structure and the plastic packaging layer 400 .

[0171] After step S70, please refer to Figure 1 , also includes:

[0172] In step S80 , the fixing member 740 is passed through the first fixing hole 20 to fix the heat dissipation plate 900 on the side of the plastic packaging layer 400 away from the intermediate layer structure.

[0173] The fixing member 740 may include but is not limited to a bolt or the like.

[0174] As an example, the heat sink 900 can be first bonded to the side of the plastic layer 400 away from the interposer structure using adhesive 730 (such as TIM adhesive). Then, the heat sink 900 can be fixed by passing the fixing member 740 through the first fixing hole 20.

[0175] After passing through the first fixing hole 20 , the fixing member 740 may not penetrate the heat dissipation plate 900 , or may penetrate the heat dissipation plate 900 .

[0176] In this embodiment, the fixing member 740 can make the connection between the heat dissipation plate 900 and the plastic packaging layer 400 more reliable.

[0177] In one embodiment, step S20 includes:

[0178] Step S21, please refer to Figure 6 , providing an interposer initial structure 2001, the interposer initial structure 2001 includes an interposer initial sheet 2101, a wiring layer 220 and a conductive initial structure 2301, the wiring layer 220 is located on one side of the interposer initial sheet 2101, and the conductive initial structure 2301 extends inward from the side of the interposer initial sheet 2101 where the wiring layer 220 is provided.

[0179] In the interposer initial structure 2001 , one end of the conductive initial structure 2301 may be connected to the wiring layer 220 , while the other end of the conductive initial structure 2301 may extend into the interposer initial sheet 2101 but not penetrate the interposer initial sheet 2101 .

[0180] Step S22, see Figure 9 , a first pad 240 is formed on the wiring layer 220 , and the side of the interposer initial structure 2001 where the first pad 240 is formed is adhered to the second carrier 200 b.

[0181] The material of the first pad 240 may include, but is not limited to, copper, etc. The first pad 240 may cover at least a portion of the wiring layer 220 , thereby being electrically connected to the wiring layer 220 .

[0182] After the interposer initial structure 2001 is bonded to the second carrier 200 b , the second carrier 200 b may serve as a support for subsequent processes.

[0183] Step S23, please refer to Figure 10 The side of the interposer initial sheet 2101 away from the wiring layer 220 is etched to expose the conductive initial structure 2301 . The remaining interposer initial sheet 2101 forms the interposer substrate 210 . The conductive initial structure 2301 protrudes from the surface of the interposer substrate 210 .

[0184] The interposer initial sheet 2101 may be etched and thinned from the side away from the wiring layer 220 by dry etching, etc., until the thickness of the remaining interposer initial sheet 2101 (interposer substrate 210 ) is less than the height of the conductive initial structure 2301 .

[0185] Step S24, please refer to Figure 11 , forming a protection material layer 6001 covering the conductive initial structure 2301 and the interposer substrate 210 .

[0186] The protective material layer 6001 may be formed by a deposition process (such as chemical vapor deposition or atomic layer deposition, etc.) The material of the protective material layer 6001 may include but is not limited to silicon oxide, silicon nitride, or silicon oxynitride, etc.

[0187] Step S25, see Figure 12 The conductive initial structure 2301 and the protective material layer 6001 are ground to smooth the protruding portion of the conductive initial structure 2301 , and the remaining conductive initial structure 2301 forms the conductive through-hole structure 230 , and the remaining protective material layer 6001 forms the protective layer 600 .

[0188] Before grinding, the surface of the interposer substrate 210 is covered by a protective material layer 6001. Therefore, during the grinding process, the protective material layer 6001 can prevent the metal of the conductive initial structure 2301 from entering the interposer substrate 210, thereby preventing leakage between adjacent conductive via structures 230.

[0189] Step S26, see Figure 14 , forming a second pad 250 covering the conductive through-hole structure 230 and the protection layer 600 to form an interposer structure, and bonding the side of the interposer structure where the second pad 250 is formed to the first carrier 200a.

[0190] The material of the second pad 250 may include, but is not limited to, copper, etc. After the second pad 250 is formed, the preparation of the interposer structure may be completed.

[0191] After the interposer initial structure 2001 is bonded to the first carrier 200 a , the first carrier 200 a and the second carrier 200 b may be disposed opposite to each other.

[0192] Step S27, see Figure 15 , remove the second carrier board 200b.

[0193] The second carrier board 200 b may be removed by laser lift-off or other methods.

[0194] After the second carrier plate 200 b is removed, the first carrier plate 200 a can serve as a support for subsequent processes.

[0195] In this embodiment, in the interposer initial structure 2001 provided initially, the conductive initial structure 2301 does not penetrate the interposer initial sheet 2101. In subsequent processes, through etching, grinding, and other processes, the interposer initial sheet 2101 is formed into the interposer substrate 210. This effectively reduces the thickness of the interposer substrate, and thus the thickness of the packaged device, thereby facilitating increased package integration. Furthermore, during the formation of the conductive initial structure 2301, it is not necessary to form a through hole penetrating the interposer initial sheet 2101, thereby reducing the processing difficulty of the conductive initial structure 2301.

[0196] Furthermore, before the conductive initial structure 2301 and the protective material layer 6001 are polished, a protective material layer 6001 is formed to cover the conductive initial structure 2301 and the interposer substrate 210. Therefore, during the polishing process, the protective material layer 6001 can prevent metal and the like from entering the interposer substrate 210, thereby preventing leakage between adjacent conductive via structures 230.

[0197] In one embodiment, step S22 includes:

[0198] Step S221, please refer to Figure 7 , a first pad 240 is formed on the wiring layer 220 .

[0199] First, a first patterned dielectric layer 260 can be formed using a photolithography process, for example. The first patterned dielectric layer has a first opening. The material of the first patterned dielectric layer 260 can include, but is not limited to, PI. Then, a first patterned photoresist layer can be formed on the first patterned dielectric layer 260. The first patterned photoresist layer has a second opening, which is disposed opposite the first opening. Then, a first pad 240 can be formed within the second opening and the first opening using an electroplating process, for example, and the first patterned photoresist layer can be removed.

[0200] At this time, as an example, step S30 may include: step S31 , die-mounting the chip 300 on the first pad 240 . Alternatively, as an example, step S30 may include: step S32 , hybrid-bonding the chip 300 to the first pad 240 .

[0201] Step S222, please refer to Figure 8 , the structure after the first pad 240 is formed is ring-cut to form a ring-cut space 10.

[0202] During the ring cutting, a portion of the thickness of the edge of the initial interposer sheet 2101 may be cut off.

[0203] As an example, the depth of the cutout of the interposer initial sheet 2101 may be greater than the height of the conductive initial structure 2301 .

[0204] Step S223, please refer to Figure 9 A first adhesive layer 710 is formed on the annular space 10 and the side of the interposer initial structure 2001 where the first pad 240 is formed.

[0205] Step S224, please refer to Figure 9 , the second carrier board 200 b is bonded via the first adhesive layer 710 .

[0206] Thereafter, the first adhesive layer 710 may be cured.

[0207] The formation of the annular space 10 facilitates more firmly adhering the interposer initial structure 2001 to the second carrier board 200 b .

[0208] Also, see Figure 10 In step S23, the side of the interposer initial sheet 2101 away from the wiring layer 220 is etched to expose the conductive initial structure 2301, and the first adhesive layer 710 located in the annular space 10 is etched away. At this time, the annular space 10 can be hollowed out again.

[0209] When the cutting depth of the initial sheet 2101 of the intermediate layer in step S222 can be greater than the height of the conductive initial structure 2301, it can be ensured that the initial sheet 2101 of the intermediate layer can be etched in step S23 to expose the first adhesive layer 710 in the annular space 10, and then the first adhesive layer 710 located in the annular space 10 can be effectively etched and removed.

[0210] Step S26 includes:

[0211] Step S261, please refer to Figure 13 , forming a second pad 250 covering the conductive through-hole structure 230 and the protection layer 600 to form an interposer structure.

[0212] The second pad 250 may be formed in a similar manner to the first pad 240 .

[0213] First, a second patterned dielectric layer 270 can be formed using a photolithography process, for example. The second patterned dielectric layer has a third opening. The material of the second patterned dielectric layer 270 can include, but is not limited to, PI. Then, a second patterned photoresist layer can be formed on the second patterned dielectric layer 270. The second patterned photoresist layer has a fourth opening, which is disposed opposite the third opening. Then, a second pad 250 can be formed within the fourth opening and the third opening using an electroplating process, for example, and the second patterned photoresist layer can be removed.

[0214] When step S61 is further included after step S50 , the height of the positioning pin 240 formed in step S61 may be greater than the height of the second pad 250 .

[0215] Step S262, please refer to Figure 14 A second adhesive layer 720 is formed on the annular space 10 and on a side of the interposer structure where the second pad 250 is formed.

[0216] As an example, before step S262 , the following step may further include: forming positioning pins 240 covering the protection layer 600 .

[0217] At this time, after step S262 , a thicker second adhesive layer 720 may be formed to cover both the positioning pins 240 and the second pads, and step S61 may not be included after step S50 .

[0218] Step S263, please refer to Figure 14 , the first carrier board 200 a is bonded via the second adhesive layer 720 .

[0219] Thereafter, the second adhesive layer 720 may be cured.

[0220] At this time, the annular space 10 facilitates the interposer initial structure 2001 to be more firmly adhered to the first carrier board 200 a .

[0221] After that, the structure in the corresponding area of ​​the annular space 10 can be completely removed. Then, in step S27, the second carrier plate 200b is removed. In step S27, refer to Figure 15 After removing the second carrier board 200 b , the first adhesive layer 710 may be removed to expose the first pads 240 .

[0222] Meanwhile, in the subsequent step S50 , after removing the first carrier board, the second adhesive layer 720 may be removed to expose the second pads 250 .

[0223] In this embodiment, before attaching the second carrier 200b, an annular space 10 is first formed. This allows the initial interposer structure 2001 to be more securely attached to the second carrier 200b through the annular space 10. Simultaneously, while etching and thinning the initial interposer sheet 2101 to form the interposer substrate 210, the first adhesive layer 710 of the annular space 10 is removed, hollowing out the annular space 10 again. This allows the initial interposer structure 2001 to be more securely attached to the first carrier 200a through the annular space 10.

[0224] Of course, in other embodiments, circumcision may not be performed, and this application does not limit this.

[0225] It should be understood that although Figure 1 The steps in the flowchart are shown in sequence as indicated by the arrows, but these steps are not necessarily executed in the order indicated by the arrows. Unless otherwise specified in this document, there is no strict order restriction for the execution of these steps, and these steps can be executed in other orders. In addition, Figure 1 At least part of the steps may include multiple steps or multiple stages. These steps or stages are not necessarily performed at the same time, but can be performed at different times. The order of execution of these steps or stages is not necessarily one by one, but can be performed in turn or alternately with other steps or at least part of the steps or stages in other steps.

[0226] Throughout this specification, references to terms such as "some embodiments," "other embodiments," and "desired embodiments" indicate that a particular feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of the present invention. Although these terms are used interchangeably throughout this specification, they do not necessarily refer to the same embodiment or example.

[0227] The technical features of the above-mentioned embodiments can be combined arbitrarily. In order to make the description concise, not all possible combinations of the technical features of the above-mentioned embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0228] The above-described embodiments merely represent several implementation methods of the present application. While the descriptions are relatively specific and detailed, they should not be construed as limiting the scope of the patent application. It should be noted that a person of ordinary skill in the art may make various modifications and improvements without departing from the spirit of the present application, and these modifications and improvements fall within the scope of protection of the present application. Therefore, the scope of protection of the present patent application shall be determined by the appended claims.

Claims

1. A packaged device, characterized in that: include: Wiring layer structure; A chip is located on one side of the wiring layer structure in a first direction, where the first direction is a thickness direction of the wiring layer structure; an external circuit module, located on a side of the wiring layer structure away from the chip in a first direction; a photoelectric conversion module, mounted on the same side of the wiring layer structure as the chip and / or the external circuit module, and comprising a photoelectric conversion portion and an optical interface portion; the photoelectric conversion portion being mounted to the wiring layer structure; the optical interface portion being connected to the photoelectric conversion portion along a second direction, and the optical interface portion protruding relative to the wiring layer structure in the second direction, the second direction being perpendicular to the first direction; The wiring layer structure includes an interposer structure, the interposer structure includes an interposer substrate, a wiring layer, and a conductive through-hole structure, the wiring layer is located on one side of the interposer substrate, and the conductive through-hole structure penetrates the interposer substrate and connects the wiring layer; The chip is located on a side of the wiring layer away from the interposer substrate; The interposer structure further includes: A first pad is located on the surface of the wiring layer, and the chip is mounted on the first pad; a second pad located on a side of the interposer substrate away from the wiring layer and covering the conductive through-hole structure, the external circuit module being mounted on the second pad; The photoelectric conversion unit is connected to the first pad and / or the second pad; The packaged device further comprises: a plastic packaging layer, covering the chip and the interposer structure; A heat dissipation plate, located on a side of the plastic packaging layer away from the interposer structure; a first fixing hole, passing through the interposer structure and the plastic packaging layer; A fixing member passes through the first fixing hole to fix the heat dissipation plate.

2. The packaged device according to claim 1, wherein: The photoelectric conversion module and the chip are mounted on the same side of the wiring layer structure; The packaging device further includes a plastic packaging layer, which covers the chip, the wiring layer structure and at least a portion of the photoelectric conversion unit.

3. The packaged device according to claim 2, wherein: A height of the optical interface portion in the first direction is greater than a height of the photoelectric conversion portion in the first direction.

4. The packaged device according to claim 1, wherein: The photoelectric conversion module and the external circuit module are installed on the same side of the wiring layer structure; The packaging device also includes a first frame structure, which includes a first frame and a socket located on the first frame. The photoelectric conversion part is located on a side of the first frame away from the wiring layer structure and is connected to the wiring layer structure through the socket; alternatively, the photoelectric conversion part is welded to the wiring layer structure.

5. The packaged device according to claim 1, wherein: The photoelectric conversion unit includes an electric chip and an optical chip. The electric chip is mounted on the wiring layer structure. The optical chip is stacked on the electric chip along a first direction. The optical interface unit is at least connected to the optical chip.

6. The packaged device according to claim 1, wherein: The packaging device includes a first frame structure, the first frame structure includes a first frame and a socket located on the first frame, and the first frame structure is provided with a positioning hole; The wiring layer structure further includes a positioning pin, which is located on a side of the wiring layer structure away from the chip in a first direction, and the positioning pin is inserted into the positioning hole.

7. The packaged device according to claim 6, wherein: The first frame structure further includes an ear piece connected to the first frame, and the positioning hole is located in the ear piece.

8. The packaged device according to claim 1, wherein: The heat dissipation plate is bonded to the plastic sealing layer by adhesive.

9. A method for preparing a packaged device, characterized in that: include: providing a first carrier board; forming an interposer structure on the first carrier, the interposer structure comprising an interposer substrate, a wiring layer, and a conductive via structure, wherein the wiring layer is located on a side of the interposer substrate away from the first carrier, and the conductive via structure penetrates the interposer substrate along a first direction to connect the wiring layer, wherein the first direction is a thickness direction of the interposer substrate; forming a chip on a side of the wiring layer away from the interposer substrate; forming a plastic encapsulation layer covering the chip and the interposer structure; removing the first carrier plate; forming an external circuit module on a side of the interposer structure away from the chip, wherein the external circuit module is connected to the chip through the interposer structure; Wherein, while a chip is formed on a side of the wiring layer away from the interposer substrate, a photoelectric conversion module is also formed on a side of the wiring layer away from the interposer substrate; and / or, while an external circuit module is formed on a side of the interposer structure away from the chip, a photoelectric conversion module is also formed on a side of the interposer structure away from the chip; the photoelectric conversion module includes a photoelectric conversion part and an optical interface part; the photoelectric conversion part is installed to the wiring layer structure; the optical interface part is connected to the photoelectric conversion part along a second direction, and the optical interface part protrudes relative to the wiring layer structure in the second direction, and the second direction is perpendicular to the first direction.

10. The method for preparing a packaged device according to claim 9, wherein: The external circuit module includes an external plug-in, and after removing the first carrier board, further includes: forming a positioning pin on a side of the interposer structure away from the chip; The forming of an external circuit module on a side of the interposer structure away from the chip includes: A first frame structure having a positioning hole is formed on a side of the interposer structure away from the chip, and the positioning pin is inserted into the positioning hole, wherein the first frame structure includes a first frame and a socket located on the first frame; An external plug-in is formed on a side of the first frame structure away from the interposer structure, and the external plug-in is connected to the second pad through the socket.

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