Bus type CRC (Cyclic Redundancy Check) method and system

Abstract

The invention relates to the technical field of CRC (Cyclic Redundancy Check), and discloses a bus type CRC method and system. The bus type CRC verification system comprises a bus, a read-write module and a read-write register which are communicated with the bus, and a CRC verification module which is communicated with the bus and the read-write module, wherein the CRC verification module is at least used for periodically calculating a current CRC value according to current register data of the read-write register, and comparing the CRC value calculated last time with the current CRC value so as to detect whether the register data in the read-write register is accidentally changed or not according to a comparison result. According to the invention, periodic CRC verification is carried out on the register data in the read-write register, whether the register data is accidentally changed or not can be detected in time, and the safety and reliability of an automobile electronic system are improved.

Description

Technical Field

[0001] The present invention relates to the technical field of CRC verification, and in particular to a bus type CRC verification method and system. Background Art

[0002] With the increasing complexity of modern automotive electronic systems and under the guidance of the ISO 26262 functional safety standard, it is crucial to improve the overall safety performance of the vehicle. Among them, the reliability and integrity of data transmission and storage between various electronic control units (Electronic Control Unit, referred to as ECU) is one of the factors affecting the overall safety performance of the vehicle. Therefore, how to detect and correct errors in the data transmission and storage process has become a problem that needs to be solved.

[0003] At present, the most widely used error detection technology is cyclic redundancy check (CRC), which generates a check code by performing polynomial division on the data and attaches it to the data. When the data is transmitted between different modules, the receiving end recalculates the CRC value of the data with the check code attached and compares it with the previous check code to verify whether the data has changed during the transmission process. However, the above method cannot detect unexpected changes in the data during storage and use in a timely manner, has a delay, and thus cannot guarantee the reliability and integrity of the data in the automotive electronic system. Summary of the invention

[0004] In view of this, the present invention provides a bus-type CRC verification method and system to solve the problem that the automotive electronic system cannot timely detect unexpected changes in data, affecting the overall safety and reliability of the vehicle.

[0005] In a first aspect, the present invention provides a bus-type CRC verification method, which includes: periodically calculating a current CRC value based on current stored data in a read-write register, and comparing a last calculated CRC value with the current CRC value to detect whether an unexpected change occurs to the stored data in the read-write register based on the comparison result.

[0006] The embodiment of the present invention provides a bus type CRC verification method, which periodically calculates the CRC value of the stored data in the read-write register, and then compares the CRC value calculated last time with the current CRC value, so as to detect whether the stored data in the read-write register has been accidentally changed according to the comparison result. Since the calculation of the CRC value is periodic, and each CRC value is compared with the CRC value calculated last time after calculation, and the comparison result is obtained in time, therefore, the unexpected change of the data can be quickly discovered according to the comparison result, which is timely, thereby ensuring the reliability and integrity of the data.

[0007] In an optional implementation, during the periodic calculation of the current CRC value according to the current stored data of the read / write register, the bus type CRC verification method further includes:

[0008] Monitor whether the read / write module has a read operation or a write operation on the read / write register.

[0009] In an optional implementation, after monitoring whether the read / write module has a read operation or a write operation on the read / write register, the bus type CRC verification method further includes:

[0010] When it is detected that the read / write module performs a write operation on the read / write register, the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle is stopped;

[0011] Monitor whether the write operation of the read-write module to the read-write register is completely completed. When it is monitored that the write operation of the read-write module to the read-write register is completely completed, calculate the CRC value according to the updated stored data of the read-write register, and use the calculated CRC value to update the CRC value calculated last time.

[0012] In an optional implementation, after monitoring whether the read / write module has a read operation or a write operation on the read / write register, the bus type CRC verification method further includes:

[0013] When it is detected that the read / write module performs a read operation on the read / write register, the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle is suspended;

[0014] Monitor whether the read operation of the read-write module on the read-write register is completely completed. When it is monitored that the read operation of the read-write module on the read-write register is completely completed, restore the current cycle to calculate the current CRC value according to the current stored data of the read-write register.

[0015] In an optional implementation, when it is detected that the read / write module performs a read operation on the read / write register, pausing the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle includes:

[0016] When it is detected that the read / write module performs a read operation on the read / write register, the cycle time limit timing for the current cycle is suspended, the calculation of the current CRC value is suspended, and the register address information for calculating the current CRC value is maintained;

[0017] When it is monitored that the read-write module has completed all read operations on the read-write register, the current CRC value calculated based on the current stored data in the read-write register in the current cycle is restored, including: restoring the cycle deadline timing for the current cycle, and continuing to calculate the current CRC value based on the current stored data in the read-write register in the current cycle according to the maintained register address information for calculating the current CRC value.

[0018] In a second aspect, the present invention provides a bus-type CRC check system, the bus-type CRC check system comprising: a bus, a read-write module and a read-write register communicating with the bus, and a CRC check module communicating with the bus and the read-write module;

[0019] The CRC check module is at least used to periodically calculate the current CRC value based on the current stored data of the read-write register, and compare the last calculated CRC value with the current CRC value to detect whether the stored data in the read-write register is accidentally changed based on the comparison result.

[0020] In an optional implementation, the CRC check module is further used to monitor whether the read-write module has a read operation or a write operation on the read-write register.

[0021] In an optional embodiment, the CRC check module is also used to stop calculating the current CRC value based on the current stored data of the read-write register in the current cycle when it is monitored that the read-write module performs a write operation on the read-write register, and to monitor whether the write operation of the read-write register by the read-write module is completed. When it is monitored that the write operation of the read-write register by the read-write module is completed, the CRC value is calculated based on the updated stored data of the read-write register, and the calculated CRC value is used to update the CRC value calculated last time.

[0022] In an optional embodiment, the CRC check module is also used to suspend the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle when it is detected that the read-write module performs a read operation on the read-write register, and to monitor whether the read operation of the read-write register by the read-write module is completely completed; when it is detected that the read-write module performs a read operation on the read-write register, the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle is resumed.

[0023] In an optional embodiment, the CRC check module communicates with the read-write module, and the CRC check module is also used to receive instructions for read operations or write operations sent by the read-write module, and monitor whether the read-write module has a read operation or a write operation on the read-write register based on the instructions for read operations or write operations sent by the read-write module.

[0024] In an optional implementation, the CRC check module further includes a read-write counter, configured to count between a preset count start value and a count end value;

[0025] The CRC check module is also used to control the read-write counter to start counting from a count start value when it is detected that the read-write module has a read operation or a write operation on the read-write register, and when the count reaches a count end value, determine that the read operation or the write operation of the read-write module on the read-write register is completely completed.

[0026] In an optional implementation, the CRC check module further includes a periodic timer;

[0027] The periodic timer is used to cyclically time according to a preset periodic limit;

[0028] The CRC check module is further used to start the periodic calculation of the current CRC value according to the current stored data of the read / write register according to the timing result of the periodic timer; and / or,

[0029] The CRC check module is further used to suspend the timing of the periodic timer, suspend the calculation of the current CRC value, and maintain the register address information for calculating the current CRC value when the read-write module is detected to perform a read operation on the read-write register; and / or,

[0030] The CRC check module is also used to restore the timing of the cycle timer when it is detected that the read operation of the read-write module on the read-write register is completely completed, and continue to calculate the current CRC value according to the current stored data of the read-write register in the current cycle according to the register address information for calculating the current CRC value; and / or,

[0031] The CRC check module is also used to clear the timing of the cycle timer for the current cycle when it is detected that the read-write module performs a write operation on the read-write register, and after it is detected that the read-write module completes all write operations on the read-write register, calculate the CRC value according to the updated stored data of the read-write register, use the calculated CRC value to update the CRC value calculated last time, and start the cycle timer to start timing for the next cycle.

[0032] In an optional implementation, the system further comprises a gating module, wherein the gating module communicates with the read / write module, the CRC check module and the bus respectively;

[0033] The CRC check module is also used to generate a valid gating signal and output it to the control end of the gating module when the count of the read-write counter reaches the count termination value;

[0034] The gating module is used to enable the CRC check module to communicate with the read-write register via a bus when the control end of the gating module receives the valid gating signal; or to enable the read-write module to communicate with the read-write register via a bus when the control end of the gating module does not receive the valid gating signal. BRIEF DESCRIPTION OF THE DRAWINGS

[0035] In order to more clearly illustrate the specific implementation methods of the present invention or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0036] Figure 1 1 is a flow chart of a bus type CRC verification method according to an embodiment of the present invention;

[0037] Figure 2 is a flow chart of another bus type CRC verification method according to an embodiment of the present invention;

[0038] Figure 3 is a flow chart of another bus type CRC verification method according to an embodiment of the present invention;

[0039] Figure 4 is a structural block diagram of a bus type CRC check system according to an embodiment of the present invention;

[0040] Figure 5 Schematic diagram of a signal interface of a CRC check module in a bus-type CRC check system according to an embodiment of the present invention;

[0041] Figure 6 is a structural block diagram of another bus-type CRC check system according to an embodiment of the present invention;

[0042] Figure 7 4 is a block diagram of a state machine structure of a CRC check module in a bus-type CRC check system according to an embodiment of the present invention. DETAILED DESCRIPTION

[0043] In order to make the purpose, technical solution and advantages of the embodiments of the present invention clearer, the technical solution in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present invention.

[0044] In order to solve the problem that the cyclic redundancy check technology cannot timely detect unexpected changes in data during storage or use, and has a delay, the embodiment of the present invention provides a bus-type CRC verification method, which periodically calculates the CRC value of the stored data in the read-write register, and then compares the last calculated CRC value with the current CRC value to detect whether the stored data in the read-write register has an unexpected change based on the comparison result. Since the calculation of the CRC value is periodic, and each CRC value is compared with the last calculated CRC value after calculation, and the comparison result is obtained in time, it is possible to quickly discover the unexpected changes that may occur in the stored data based on the comparison result, which is timely, thereby ensuring the data reliability and integrity of the automotive electronic system, which will help improve the overall safety and reliability of the vehicle.

[0045] The bus-type CRC verification method provided in an embodiment of the present invention is applied to a bus-type CRC verification system. The bus-type CRC verification system is presented in the form of a functional unit, where the unit refers to an ASIC (Application Specific Integrated Circuit) circuit, a processor and memory that executes one or more software or fixed programs, and / or other devices that can provide the above functions.

[0046] According to an embodiment of the present invention, a bus-type CRC verification method embodiment is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although the logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.

[0047] In this embodiment, a bus type CRC verification method is provided, which is applied to a bus type CRC verification system. Figure 1 Schematic diagram of the process of the bus type CRC verification method according to an embodiment of the present invention, such as Figure 1 As shown, the process includes the following steps:

[0048] Step S101, periodically calculating the current CRC value according to the current stored data of the read / write register.

[0049] In step S101, every time a cycle time is passed, the stored data of the read / write register is read and a CRC value is calculated based on the read stored data. The cycle time can be set according to the specific situation, such as 1ms or 2ms, which is not specifically limited here.

[0050] Step S102, comparing the last calculated CRC value with the current CRC value to detect whether the stored data of the read / write register is accidentally changed according to the comparison result.

[0051] In step S102, in the process of periodically calculating the current CRC value based on the current stored data of the read-write register, the currently calculated CRC value is compared with the CRC value calculated last time, and the comparison result is obtained in time to quickly detect whether the stored data of the read-write register has been accidentally changed based on the comparison result.

[0052] It should be noted that the current CRC value represents the CRC value calculated based on the stored data of the read-write register read in the current cycle, and the last calculated CRC value represents the CRC value calculated based on the stored data of the read-write register read in the last cycle.

[0053] For example, assuming that the cycle is 2ms and the current cycle is n, the CRC value calculated based on the data stored in the read / write register read in the current cycle, that is, the current CRC value is expressed as M n ; The last cycle is n-1, then the CRC value calculated based on the data stored in the read-write register read in the last cycle, that is, the last calculated CRC value is expressed as M n-1 , and so on, the current CRC value calculated periodically based on the current stored data in the read / write register can be expressed as M1, M2, M3, ..., M n-1 、M n 、M n+1 , ..., the time interval for calculating the CRC value each time is 2ms. n The CRC value M calculated last time n-1 A comparison is performed to obtain a comparison result; then, based on the comparison result, it is detected whether the stored data of the read / write register has been accidentally changed.

[0054] For example, the embodiment of the present invention can determine the consistency of the current CRC value with the last calculated CRC value, and then obtain the comparison result. n The CRC value M calculated last time n-1If the two data are the same, it means that the data has not been accidentally changed. Otherwise, it means that the data has been accidentally changed. This makes it easier for the automotive electronic system to take corresponding countermeasures based on the unexpected changes, thereby ensuring its safety and reliability.

[0055] In some optional implementations, during the periodic calculation of the current CRC value based on the current stored data of the read-write register, the bus-type CRC verification method further includes: monitoring whether the read-write module has a read operation or a write operation on the read-write register.

[0056] During the periodic calculation of the current CRC based on the current stored data of the read-write register, there may be a behavior of the read-write module performing a read operation or a write operation on the read-write register. Therefore, during the periodic calculation of the current CRC value based on the current stored data of the read-write register, the embodiment of the present invention monitors whether the read-write module performs a read operation or a write operation on the read-write register, and different execution measures can be taken according to the different operation behaviors of the read-write module on the read-write register, so as to further optimize the periodic CRC check speed and the accuracy of the periodic CRC check result, and can work in coordination with the normal read and write process of the read-write module on the read-write register.

[0057] In this embodiment, a bus type CRC verification method is provided, which is applied to a bus type CRC verification system. Figure 2 is a flow chart of another bus type CRC check method according to an embodiment of the present invention, such as Figure 2 As shown, the process includes the following steps:

[0058] Step S201, periodically calculate the current CRC value based on the current stored data in the read / write register. Figure 1 Step S101 of the illustrated embodiment will not be described in detail here.

[0059] Step S202, monitoring whether the read / write module performs a read operation or a write operation on the read / write register. This has been described in detail above and will not be repeated here.

[0060] Step S203, when it is detected that the read-write module performs a write operation on the read-write register, the calculation of the current CRC value according to the current stored data of the read-write register in the current cycle is stopped.

[0061] Step S204, monitor whether the read-write module's write operation on the read-write register is completely completed. When it is monitored that the read-write module's write operation on the read-write register is completely completed, calculate the CRC value based on the updated stored data of the read-write register, and use the calculated CRC value to update the last calculated CRC value.

[0062] Wherein, during the periodic calculation of the current CRC according to the current stored data of the read-write register, if there is a behavior of the read-write module performing a write operation on the read-write register, the current CRC value of the current stored data according to the read-write register in the current cycle is stopped. At the same time, monitor whether the write operation of the read-write module to the read-write register is fully completed. If it is monitored that the write operation of the read-write module to the read-write register is fully completed, the CRC value is calculated according to the updated stored data of the read-write register, and the calculated CRC value is used to update the CRC value calculated last time. At this time, the CRC value calculated last time is represented as the CRC value calculated according to the current stored data of the read-write register when the write operation has occurred and the write operation is fully completed. Since the stored data is continuously updated during the write operation, the stored data update is completed and remains unchanged when the write operation is fully completed. At this time, the current stored data of the read-write register read can also be represented as the updated stored data; then, a new round of periodic CRC verification process is restarted, that is, the current CRC calculation is performed periodically according to the current stored data of the read-write register.

[0063] In the process of periodically detecting whether the stored data of the read-write register has been accidentally changed in the embodiment of the present invention, the read-write module may perform write operations on the read-write register from time to time. Therefore, after monitoring that all write operations of the read-write module have been completed, the CRC value of the stored data is recalculated, and the stored CRC value of the last calculation is updated, and then a new periodic detection process is started, which can ensure the accuracy of the comparison result and further improve the detection accuracy of unexpected data changes.

[0064] For example, assuming that the cycle is 2 ms, the current cycle is n, and the data stored in the read / write register of the current cycle n is A.

[0065] In the current cycle n, the current CRC value M is calculated based on the current data stored in the read / write register n During this period, the read-write module is monitored to see whether there is a read operation or a write operation on the read-write register. If the read-write module is detected to be writing to the read-write register, the calculation of the current CRC value M is stopped. n That is, between the start of the write operation and the stop of the write operation, stop calculating the current CRC value M n , and stop the last calculated CRC value M n-1 With the current CRC value M nCompare to detect whether the stored data of the read-write register has been accidentally changed according to the comparison result. At the same time, continue to monitor whether the write operation of the read-write module to the read-write register is completed. If it is detected that the write operation of the read-write module to the read-write register is completed, the stored data in the read-write register has changed, updated from A to B. At this time, the current CRC value M is calculated based on the updated stored data B in the read-write register. B , and M B Update the last calculated CRC value M n-1 , and then restart the cycle timing, and when the cycle timing is reached, get the current stored data from the read-write register, calculate the current CRC value M1, and convert M B Compare with the current CRC value M1. If the current CRC value M1 is equal to the last calculated CRC value M B If the data is the same, it means that the data has not been accidentally changed during the storage process. Otherwise, it means that the data has been accidentally changed during the storage process.

[0066] In this embodiment, a bus type CRC verification method is provided, which is applied to a bus type CRC verification system. Figure 3 is a flow chart of another bus type CRC check method according to an embodiment of the present invention, such as Figure 3 As shown, the process includes the following steps:

[0067] Step S301, periodically calculate the current CRC value based on the current stored data in the read / write register. Figure 1 Step S101 of the illustrated embodiment will not be described in detail here.

[0068] Step S302, monitoring whether the read / write module performs a read operation or a write operation on the read / write register. This has been described in detail above and will not be repeated here.

[0069] Step S303, when it is detected that the read / write module performs a read operation on the read / write register, the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle is suspended.

[0070] Step S304, monitoring whether the read operation of the read / write module on the read / write register is completely completed, when monitoring that the read / write module has completed the read / write register, resuming the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle.

[0071] Step S305, comparing the last calculated CRC value with the current CRC value to detect whether the stored data of the read / write register is accidentally changed according to the comparison result.

[0072] During the periodic calculation of the current CRC according to the current stored data of the read-write register, if there is a behavior of the read-write module performing a read operation on the read-write register, the current CRC value of the current stored data of the read-write register in the current cycle is suspended. At the same time, monitor whether the read operation of the read-write register by the read-write module is completely completed. If the read operation of the read-write register by the read-write module is completely completed, the current CRC value calculated according to the current stored data of the read-write register in the current cycle is restored. At this time, the CRC value calculated last time is represented as the CRC value calculated according to the stored data of the read-write register in the previous cycle corresponding to the current cycle at the time of suspension, and the current CRC value is represented as the CRC value calculated according to the stored data of the read-write register in the current cycle at the time of suspension. Then, the current CRC value is compared with the CRC value calculated last time, and the comparison result is obtained in time, so as to quickly detect whether the stored data of the read-write register has been accidentally changed according to the obtained comparison result.

[0073] In some optional embodiments, when it is detected that the read-write module performs a read operation on the read-write register, the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle is suspended, including: when it is detected that the read-write module performs a read operation on the read-write register, the cycle deadline timing for the current cycle is suspended, the calculation of the current CRC value is suspended, and the register address information for calculating the current CRC value is maintained.

[0074] When it is monitored that the read-write module has completed all the read operations on the read-write register, the current CRC value calculated according to the current stored data of the read-write register in the current cycle is restored, including: restoring the cycle deadline timing for the current cycle, and continuing to calculate the current CRC value according to the current stored data of the read-write register in the current cycle according to the register address information for calculating the current CRC value. Since the stored data will not change during the read operation, it means that the CRC values ​​calculated when the read operation is in progress and when the read operation is fully completed are the same. Therefore, when waiting for the read operation to be fully completed, the current CRC value calculation before the pause can be continued, which saves the unnecessary intermediate steps of the periodic CRC check during the read operation, and further improves the processing speed of the periodic CRC check.

[0075] Continuing with the example, assuming that the cycle is still 2ms, the current cycle is n, and the read and write registers of the current cycle n include register addresses Add0, Add1, ...Addm, and the register data stored in each register address are A0, A1, ...Am respectively.

[0076] In the current cycle n, the current CRC value M is calculated based on the current stored data A0, A1, ...Am of the read / write register. nDuring this period, the read-write module is monitored to see whether there is a read operation or a write operation on the read-write register. If the read-write module is detected to be performing a read operation on the read-write register, the calculation of the current CRC value M is suspended. n That is, between the start of the read operation and the completion of the read operation, the calculation of the current CRC value M is suspended. n , and stop the last calculated CRC value M n-1 With the current CRC value M n Compare and keep the register address information Addi of the current CRC value, i is one of 0 to m. At the same time, continue to monitor whether the read-write module has completed all the read operations on the read-write register. If it is monitored that the read-write module has completed all the read operations on the read-write register, start from the address information Addi and continue to calculate the CRC value for the current stored data A0, A1, ... Am, so as to finally obtain the current CRC value M. n . n-1 With the current M n Compare the rows. If M n-1 With M n If the values ​​are the same, it means that the data has not been accidentally changed during the storage process; otherwise, it means that the data has been accidentally changed during the storage process.

[0077] In the present embodiment, a bus type CRC check system 100 is also provided, and this system is used to realize the above-described embodiment and preferred implementation mode, and the description that has been made will not be repeated. As used below, the term "module" can realize the combination of software and / or hardware of predetermined function. Although the system described in the following embodiments is preferably realized with software, the realization of hardware, or the combination of software and hardware is also possible and conceived.

[0078] This embodiment provides a bus type CRC check system 100, such as Figure 4 As shown, the bus type CRC check system includes: a bus, a read-write module and a read-write register communicating with the bus, and a CRC check module communicating with the bus and the read-write module;

[0079] The CRC check module is at least used to periodically calculate the current CRC value based on the current stored data in the read-write register, and compare the last calculated CRC value with the current CRC value to detect whether the stored data in the read-write register is accidentally changed based on the comparison result.

[0080] In some optional implementations, the CRC check module is also used to monitor whether the read-write module has a read operation or a write operation on the read-write register.

[0081] In some optional embodiments, the CRC check module is also used to stop calculating the current CRC value based on the current stored data of the read-write register in the current cycle when it is monitored that the read-write module performs a write operation on the read-write register, and to monitor whether the write operation of the read-write register by the read-write module is completed. When it is monitored that the write operation of the read-write register by the read-write module is completed, the CRC value is calculated based on the updated stored data of the read-write register, and the calculated CRC value is used to update the CRC value calculated last time.

[0082] In some optional embodiments, the CRC check module is also used to suspend the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle when it is detected that the read-write module performs a read operation on the read-write register; and to monitor whether the read operation of the read-write register by the read-write module is completely completed, and when it is detected that the read-write module performs a read operation on the read-write register, resume the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle.

[0083] In some optional embodiments, the CRC check module communicates with the read-write module to receive instructions for read operations or write operations sent by the read-write module. The CRC check module is also used to receive instructions for read operations or write operations sent by the read-write module, and based on the instructions for read operations or write operations sent by the read-write module, monitor whether the read-write module has a read operation or a write operation on the read-write register.

[0084] Figure 5 Schematic diagram of a CRC check module interface signal according to an embodiment of the present invention. Figure 5 As shown, when it is necessary to perform a read operation or a write operation on the stored data of the read-write register, the read-write module will generate an instruction for the read operation or the write operation, and send it to the CRC check module through the apb_cfg_pselx, apb_cfg_penable and apb_cfg_pwrite signal interfaces in the CRC check module. At this time, the CRC check module monitors whether the read-write module has a read operation or a write operation on the read-write register according to the read operation or the write operation instruction sent by the read-write module.

[0085] Among them, apb_cfg_pselx is the slave device Slave selection signal interface, indicating the selection of a currently accessed Slave, and x indicates the number of a currently accessed Slave; apb_cfg_penable is the enable signal interface, indicating that the read-write module's read or write operation on the read-write register is valid. apb_cfg_pwrite is the write signal interface. When the write signal interface is high, it indicates that the read-write module writes to a currently accessed read-write register. When the write signal interface is low, it indicates that the read-write module reads from a currently accessed read-write register.

[0086] In some optional implementations, the CRC check module further includes a read-write counter, and the read-write counter is used to count between a preset count start value and a count end value;

[0087] The CRC check module is also used to control the read-write counter to start counting from the count start value when it is detected that the read-write module has a read operation or a write operation on the read-write register, and when the count reaches the count end value, determine that the read operation or the write operation of the read-write module on the read-write register is completely completed.

[0088] It should be noted that the CRC check module determines whether the read operation or write operation of the read / write module is completed by whether the read / write counter reaches the count end value. The time between the read / write counter continuously counting from the count start value to the count end value can be preset according to the specific application scenario.

[0089] Exemplarily, in the embodiment of the present invention, when the read / write counter starts counting from zero and reaches the maximum value, it indicates that all read operations or write operations performed by the read / write module are completed. The bit width of the read / write counter can be configured in advance according to the maximum value, that is, the read / write counter with a bit width of n has a maximum count value of 2 to the power of n. For example, the read / write counter updata[15:0] represents a read / write counter with a width of 16 bits, where [15:0] indicates that the bit width ranges from the 15th bit to the 0th bit, the highest bit is the 15th bit, and the lowest bit is the 0th bit. The maximum value of the read / write counter is 2 16 -1=65535.

[0090] Then when the read-write counter reaches 65535 from 0, it means that the read operation or write operation of at least one read-write register is completed. In some specific application scenarios, there is a certain time interval when the read-write module performs multiple consecutive read operations or write operations. Therefore, each time the CRC check module receives the read operation or write operation instruction of the read-write module, it controls the read-write counter to be cleared and recounted. In the process of the read-write module not completing all read-write operations, the read-write counter is continuously cleared. After the read-write module completes all read-write operations, the read-write counter is able to continue counting until the maximum value. At this time, the CRC check module confirms that the read-write module has completed all read operations or write operations.

[0091] In some optional implementations, the CRC check module further includes a periodic timer.

[0092] The cycle timer is used to cyclically time according to a preset cycle period.

[0093] The CRC check module is also used to start periodically calculating the current CRC value according to the current stored data of the read-write register according to the timing result of the periodic timer;

[0094] And / or, the CRC check module is further used to suspend the timing of the periodic timer, suspend the calculation of the current CRC value, and maintain the register address information for calculating the current CRC value when it is detected that the read-write module performs a read operation on the read-write register;

[0095] And / or, the CRC check module is also used to restore the timing of the cycle timer when it is detected that the read operation of the read-write module on the read-write register is completely completed, and continue to calculate the current CRC value according to the current stored data of the read-write register in the current cycle according to the register address information of the calculation of the current CRC value that is maintained;

[0096] And / or, the CRC check module is also used to clear the timing of the cycle timer for the current cycle when it is detected that the read-write module performs a write operation on the read-write register, and after it is detected that the read-write module completes all write operations on the read-write register, calculate the CRC value according to the updated stored data of the read-write register, use the calculated CRC value to update the CRC value calculated last time, and start the cycle timer to start timing for the next cycle.

[0097] It should be noted that the preset cycle duration of the cycle counter can be set according to the specific application scenario, such as an interval of 1ms or 2ms, which is not specifically limited here.

[0098] In some optional implementations, the bus-type CRC check system further includes a gating module, which communicates with the read-write module, the CRC check module and the bus respectively;

[0099] The CRC check module is also used to generate a valid strobe signal and output it to the control end of the strobe module when the read-write counter reaches the count termination value;

[0100] The strobe module is used to enable the CRC check module to communicate with the read-write register via the bus when the control end of the strobe module receives a valid strobe signal; or, when the control end of the strobe module does not receive a valid strobe signal, enable the read-write module to communicate with the read-write register via the bus.

[0101] Exemplarily, when the CRC check module detects that the read-write counter reaches the maximum value from 0, that is, when the read-write module completes all write operations or read operations on the read-write register, a valid selection signal is generated to the control end of the selection module to output the value. After the control end receives the valid selection signal, the CRC check module is enabled to communicate with the read-write register via the bus. At this time, the CRC check module can read the current stored data of the read-write register through the bus, and calculate the current CRC value based on the read current stored data; if the control end does not receive a valid selection signal, the CRC check module is enabled to continue monitoring the read-write module's read operation or write operation on the read-write register through the bus.

[0102] In some optional implementations, the CRC check module is further used to generate a valid gating signal and output it to the control end of the gating module when the timing duration of the cycle counter reaches a preset interval duration;

[0103] The gating module is also used to enable the CRC check module to communicate with the read-write register via the bus when the control end of the gating module receives a valid gating signal; or, when the control end of the gating module does not receive a valid gating signal, enable the read-write module to communicate with the read-write register via the bus.

[0104] Exemplarily, when the CRC check module detects that the timing duration of the cycle counter reaches a preset interval duration, it generates a valid selection signal output value to the control end of the selection module. After the control end receives the valid selection signal, it enables the CRC check module to communicate with the read-write register via the bus. At this time, the CRC check module can read the current stored data of the read-write register through the bus, and calculate the current CRC value based on the read current stored data; if the control end does not receive a valid selection signal, the CRC check module is enabled to continue monitoring the read-write module's read operation or write operation on the read-write register through the bus.

[0105] It should be noted that the gating module may be any device with a gating function, such as a MUX data selector, or an arbiter with a fixed priority, which is not specifically limited here.

[0106] The further functional description of each of the above modules and units is the same as that of the above corresponding embodiments and will not be repeated here.

[0107] For example, Figure 6 FIG. 2 shows a structural block diagram of another example of a bus type CRC check system provided by an embodiment of the present invention. Figure 6 In the example, the bus is an APB bus, the selection module is a MUX data selector, the read / write module is an APB_CGF module, the CRC check module is an APB_REG_CRC module, and the APB_CGF module and the APB_REG_CRC module are jointly constructed as the master device Master on the APB bus, and the read / write registers are respectively set in multiple slave devices slave communicating with the bus, such as SLV0, SLV1, SLV2, ..., SLVn. Among them, the APB_CGF module has the read / write function of the read / write registers inside each slave.

[0108] Combination Figure 5 When the read-write module performs a read operation or a write operation on the read-write register of a Slave, the CRC check module detects that apb_cfg_penable and apb_cfg_pselx are valid at the same time. At this time, it continues to monitor the level status of apb_cfg_pwrite. If it is a high level, it means that the read-write module performs a write operation on the read-write register of a Slave currently being accessed; if it is a low level, it means that the read-write module performs a read operation on the read-write register of a Slave currently being accessed.

[0109] The read / write module corresponds to the read / write function, and the read / write module can quickly access and operate the read / write register to read or write the stored data in the read / write register, such as CPU, DMA (Direct Memory Access), etc.

[0110] It is understandable that the read-write register described in the embodiment of the present invention is a read-write (RW) register type, that is, it can be read from and written to, and under normal circumstances, the stored data will not be changed during the process of reading the data. In addition, in some application scenarios, the slave device Slave may also include multiple types of registers, such as read-only (RO) registers, read-clear (RC) registers, etc. At this time, the register addresses inside each slave device can be arranged during the integrated circuit design stage, and the addresses of different types of registers, such as read-write registers, read-only registers, and read-clear registers, can be configured separately, so as to facilitate the above-mentioned periodic CRC calculation and comparison for the read-write registers in this embodiment.

[0111] The bus-type CRC check system is powered on and initialized. The host computer configures the read and write registers inside each Slave through the APB bus, such as setting the count start value and count end value of the read and write registers, setting the interval length of the cycle counter, etc.

[0112] In some embodiments, the bus-type CRC verification system can calculate the current CRC value during the power-on initialization phase. For example, after the power-on initialization is completed, the APB_REG_CRC module controls the read-write counter to start timing, and waits for the read-write counter to reach the termination value, and then generates a valid selection signal to output to the control terminal SEL of the MUX, enabling the APB_REG_CRC module to communicate with the read-write register via the APB bus. At this time, the APB_REG_CRC module reads the stored data of SLVx through the APB bus, and calculates the current CRC value based on the stored data of the read-write register.

[0113] During the operation of the system, the bus-type CRC check system can implement periodic CRC check. The APB_REG_CRC module controls the timing of the cycle counter. When the cycle counter counts to the preset cycle interval, the APB_REG_CRC module generates a valid selection signal and outputs it to the control terminal SEL of the MUX, enabling the APB_REG_CRC module to communicate with the read-write register via the APB bus. At this time, the APB_REG_CRC module reads the stored data of SLVx through the APB bus and performs CRC calculation based on the read stored data. The cycle timer cycles according to a preset cycle period. The APB_REG_CRC module reads the stored data of SLVx through the APB bus once every preset cycle length, and calculates a CRC value based on the current stored data read. Each time the CRC value is calculated, it is compared with the CRC value calculated last time to detect whether the stored data of the read-write register has been accidentally changed based on the comparison result. When an unexpected change occurs, the APB_REG_CRC module generates an interrupt signal so that the automotive electronic system can promptly be informed of the unexpected data change after receiving the interrupt signal and take corresponding measures.

[0114] When performing periodic CRC checks, the APB_REG_CRC module monitors the operation status of the APB_CGF module on the read and write registers through apb_cfg_pselx, apb_cfg_penable, and apb_cfg_pwrite. The operation status includes read operations and write operations. At the same time, it also determines whether the read operation or write operation is completed according to the current count of the read and write counts.

[0115] When the APB_REG_CRC module detects that the APB_CGF module is reading the stored data of SLVx, the APB_REG_CRC module stops generating a valid selection signal to the SEL terminal of MUX, suspends the calculation of the current CRC value based on the stored data of SLVx in the current cycle, saves the address of the CRC calculation, and suspends the timing of the cycle counter; at this time, the MUX enables the APB_CGF module to communicate with SLVx via the bus because it has not received a valid selection signal. When waiting for the APB_CGF module to complete the reading operation, the APB_REG_CRC module outputs a valid selection signal to the SEL terminal of MUX, and according to the address of the CRC calculation, resumes the calculation of the current CRC value based on the stored data of SLVx in the current cycle and compares it with the CRC value calculated last time, and controls the cycle counter to continue timing.

[0116] When the APB_REG_CRC module detects that the APB_CGF module is writing the stored data of SLVx, it stops calculating the current CRC value based on the stored data of SLVx in the current cycle; while waiting for the write operation to be completed, the APB_REG_CRC module generates a valid selection signal and outputs it to the SEL end of MUX, enabling the APB_REG_CRC module to communicate with SLVx via the APB bus. At this time, the APB_REG_CRC module reads the updated stored data of SLVx through the APB bus, and recalculates CRC based on the read stored data, and uses the calculated CRC value to update the CRC value calculated last time, as a comparison object for the CRC value calculated in the first cycle of re-starting the periodic CRC check.

[0117] Continuing with the example, corresponding to Figure 7 The state machine of the APB_REG_CRC module in the bus-type CRC check system 100 provided in the embodiment of the present invention is shown, which includes five states: s_upd, s_cmpt, s_hold, s_done and s_wait.

[0118] In the s_upd state, if the APB_CFG module is detected to perform a read operation or a write operation on the SLVx register data, it is necessary to wait for the read operation or the write operation to be completed, generate an up_cnt_done signal, and jump to the s_cmpt state; after entering the s_cmpt state, start calculating the CRC value.

[0119] At this time, there may be a read operation or a write operation during the calculation of the CRC value. Specifically, during the calculation of the CRC value, if the APB_CFG module writes to a certain SLVx, the w_reg_upd signal is valid (corresponding to Figure 5The apb_cfg_penable and apb_cfg_pselx signals are both valid, and apb_cfg_pwrite is high), and jumps back to the s_upd state. When the write operation is completed again, an up_cnt_done signal is generated again, and the state jumps to the s_cmpt state. After entering the s_cmpt state, the CRC value is calculated again (that is, when the CRC calculation stops and restarts, the updated registered data in the SLV is re-read, and the CRC value is recalculated based on the updated registered data), and the recalculated CRC value is used to update the last calculated CRC value. During the calculation of the CRC value, if the APB_CFG module reads a certain SLVx, the r_reg_upd signal is valid (corresponding to Figure 5 The apb_cfg_penable and apb_cfg_pselx signals are both valid, and apb_cfg_pwrite is at a low level), and jumps to the s_hold state, holds the address position for calculating the CRC, and continues to wait for the SLV read operation to be completed. The up_cnt_done signal is generated to jump back to the s_cmpt state to continue calculating the CRC value (that is, when the CRC calculation process is paused and then resumed, the data stored in the SLV before the read operation is used to continue calculating the CRC value).

[0120] After waiting for the above two current CRC values ​​to be calculated, crc_done is valid and jumps to the s_done state, and the current CRC value is used to update the CRC value calculated last time or compare the current CRC value with the CRC value calculated last time; then, it automatically jumps to the s_wait waiting state to perform a periodic CRC check. When the timing of the cycle counter reaches the preset cycle length, prd_cnt_done is valid at this time, and jumps to the s_cmpt state to continue the CRC value calculation of the current cycle. During the calculation of the CRC value of the current cycle, there may also be read operations or write operations. When a write operation occurs, jump to the s_upd state to wait for all SLV reads and writes to recalculate the CRC and clear the cycle counter. If a read operation occurs, jump to the s_hold state to hold the cycle counter, wait for all SLV read operations to be completed, and then return to s_wait to continue the cycle timing wait.

[0121] When in the s_cmpt state, the MUX data selector outputs the APB_REG_CRC module signal, otherwise it outputs the APB_CFG module signal.

[0122] Although the embodiments of the present invention have been described in conjunction with the accompanying drawings, those skilled in the art may make various modifications and variations without departing from the spirit and scope of the present invention, and such modifications and variations are all within the scope defined by the appended claims.

Claims

1. A bus type CRC verification method, characterized in that: The method comprises: The current CRC value is periodically calculated according to the current stored data of the read-write register, and the last calculated CRC value is compared with the current CRC value to detect whether the stored data of the read-write register is accidentally changed according to the comparison result.

2. The method according to claim 1, characterized in that: During the periodic calculation of the current CRC value according to the current stored data of the read / write register, the method further includes: Monitor whether the read / write module has a read operation or a write operation on the read / write register.

3. The method according to claim 2, characterized in that After monitoring whether the read / write module performs a read operation or a write operation on the read / write register, the method further includes: When it is detected that the read / write module performs a write operation on the read / write register, the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle is stopped; Monitor whether the write operation of the read-write module to the read-write register is completely completed. When it is monitored that the write operation of the read-write module to the read-write register is completely completed, calculate the CRC value according to the updated stored data of the read-write register, and use the calculated CRC value to update the CRC value calculated last time.

4. The method according to claim 2, characterized in that: After monitoring whether the read / write module performs a read operation or a write operation on the read / write register, the method further includes: When it is detected that the read / write module performs a read operation on the read / write register, the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle is suspended; Monitor whether the read operation of the read-write module on the read-write register is completely completed. When it is monitored that the read operation of the read-write module on the read-write register is completely completed, restore the current cycle to calculate the current CRC value according to the current stored data of the read-write register.

5. The method according to claim 4, characterized in that When it is detected that the read / write module performs a read operation on the read / write register, pausing the calculation of the current CRC value according to the current stored data of the read / write register in the current cycle, comprises: When it is detected that the read / write module performs a read operation on the read / write register, the cycle time limit timing for the current cycle is suspended, the calculation of the current CRC value is suspended, and the register address information for calculating the current CRC value is maintained; When it is monitored that the read-write module has completed all read operations on the read-write register, the current CRC value calculated based on the current stored data in the read-write register in the current cycle is restored, including: restoring the cycle deadline timing for the current cycle, and continuing to calculate the current CRC value based on the current stored data in the read-write register in the current cycle according to the maintained register address information for calculating the current CRC value.

6. A bus type CRC check system, characterized in that: The bus-type CRC check system comprises: a bus, a read-write module and a read-write register communicating with the bus, and a CRC check module communicating with the bus and the read-write module; The CRC check module is at least used to periodically calculate the current CRC value based on the current stored data of the read-write register, and compare the last calculated CRC value with the current CRC value to detect whether the stored data in the read-write register is accidentally changed based on the comparison result.

7. The system according to claim 6, characterized in that The CRC check module is also used to monitor whether the read-write module has a read operation or a write operation on the read-write register.

8. The system according to claim 7, characterized in that The CRC check module is also used to stop calculating the current CRC value based on the current stored data of the read-write register in the current cycle when it is detected that the read-write module performs a write operation on the read-write register, and to monitor whether the write operation of the read-write register by the read-write module is completely completed. When it is detected that the write operation of the read-write register by the read-write module is completely completed, the CRC value is calculated based on the updated stored data of the read-write register, and the calculated CRC value is used to update the CRC value calculated last time.

9. The system according to claim 7, characterized in that The CRC check module is also used to suspend the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle when it is detected that the read-write module performs a read operation on the read-write register; and to monitor whether the read operation of the read-write register by the read-write module is completely completed, and when it is detected that the read operation of the read-write register by the read-write module is completely completed, resume the calculation of the current CRC value based on the current stored data of the read-write register in the current cycle.

10. The system according to any one of claims 7 to 9, characterized in that: The CRC check module communicates with the read-write module, and the CRC check module is also used to receive instructions for read operations or write operations sent by the read-write module, and monitor whether the read-write module has a read operation or a write operation on the read-write register according to the instructions for read operations or write operations sent by the read-write module.

11. The system according to any one of claims 7 to 9, characterized in that: The CRC check module also includes a read-write counter, which is used to count between a preset count start value and a count end value; The CRC check module is also used to control the read-write counter to start counting from a count start value when it is detected that the read-write module has a read operation or a write operation on the read-write register, and when the count reaches a count end value, determine that the read operation or the write operation of the read-write module on the read-write register is completely completed.

12. The system according to any one of claims 7 to 9, characterized in that: The CRC check module also includes a periodic timer; The periodic timer is used to cyclically time according to a preset periodic limit; The CRC check module is further used to start the periodic calculation of the current CRC value according to the current stored data of the read / write register according to the timing result of the periodic timer; and / or, The CRC check module is further used to suspend the timing of the periodic timer, suspend the calculation of the current CRC value, and maintain the register address information for calculating the current CRC value when the read-write module is detected to perform a read operation on the read-write register; and / or, The CRC check module is also used to restore the timing of the cycle timer when it is detected that the read operation of the read-write module on the read-write register is completely completed, and continue to calculate the current CRC value according to the current stored data of the read-write register in the current cycle according to the register address information for calculating the current CRC value; and / or, The CRC check module is also used to clear the timing of the cycle timer for the current cycle when it is detected that the read-write module performs a write operation on the read-write register, and after it is detected that the read-write module completes all write operations on the read-write register, calculate the CRC value according to the updated stored data of the read-write register, use the calculated CRC value to update the CRC value calculated last time, and start the cycle timer to start timing for the next cycle.

13. The system according to claim 11, characterized in that The system also includes a gating module, which communicates with the read-write module, the CRC check module and the bus respectively; The CRC check module is also used to generate a valid gating signal and output it to the control end of the gating module when the count start value of the read-write counter reaches the count end value; The gating module is used to enable the CRC check module to communicate with the read-write register via a bus when the control end of the gating module receives the valid gating signal; or to enable the read-write module to communicate with the read-write register via a bus when the control end of the gating module does not receive the valid gating signal.

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