Mapping table reconstruction method, memory controller and memory

Abstract

The invention discloses a mapping table reconstruction method, a controller of a memory and the memory. The method comprises the following steps: receiving a reconstruction command, wherein the reconstruction command comprises an initial address; scanning the plurality of storage units in the storage medium backwards by taking the initial address as a reconstruction starting address, and generating and caching mapping relation data of the plurality of storage units according to the mapping information obtained by scanning, and scanning the plurality of storage units in the storage medium backwards from the reconstruction starting address, mapping relation data of the multiple storage units are generated and cached according to the mapping information obtained through scanning; judging whether the size of the cached mapping relation data or the number of the plurality of storage units is greater than or equal to a set threshold value; and if the size of the cached mapping relation data or the number of the plurality of storage units is greater than or equal to a set threshold value, sending the cached mapping relation data and the physical address of the currently scanned storage unit to a host. According to the embodiment of the invention, repeated scanning caused by abnormal conditions is avoided, so that the reconstruction efficiency is improved.

Description

Technical Field

[0001] The embodiments of the present disclosure relate to the field of storage technology, and in particular to a mapping table reconstruction method, a memory controller, and a memory. Background Art

[0002] Solid State Drives (SSD) are storage hard disks made of solid-state electronic storage chips. SSDs include controllers and storage media. Currently, the most mainstream SSDs use flash memory as a storage medium to store data, such as non-volatile memory such as NAND flash.

[0003] The mapping table is one of the most important modules in the SSD software algorithm, which records the mapping relationship between the logical address accessed from the host and the physical address on the storage medium. Usually, the mapping table is saved in a relatively stable area on the storage medium, and a part of the mapping relationship data of the mapping table is cached in the cache unit of the SSD. When the controller receives a read / write request from the host, it first searches the cache unit to obtain the mapping relationship data required for the read / write request. If the required mapping relationship data is not found in the cache unit, the required mapping relationship data is obtained from the storage medium.

[0004] However, many factors such as service life and environmental impact may damage the storage medium and thus destroy the mapping table stored therein. In this case, the mapping table needs to be rebuilt. In the prior art, a full disk scanning method is used to rebuild the mapping table. This method scans each storage page of each storage block of the storage medium to obtain the mapping information in each storage page, and generates a mapping relationship between the physical address and the logical address of each storage page in each storage block based on the mapping information of each storage page in each storage block. During the reconstruction process, the mapping relationship data generated in real time is cached in the cache unit of the solid-state drive and written to the storage medium after the end. This results in the loss of the reconstructed mapping relationship data if an emergency such as an abnormal power failure occurs. When this occurs, it is necessary to scan the storage medium from the beginning for reconstruction. Summary of the invention

[0005] The purpose of the embodiments of the present disclosure is to provide a mapping table reconstruction method, a memory controller and a memory. The mapping table reconstruction method has a memory capability and can be reconstructed from any starting address.

[0006] According to a first aspect of an embodiment of the present disclosure, a mapping table reconstruction method is provided, which is applied to a memory, wherein the memory includes a controller and a storage medium, and the mapping table reconstruction method is executed by the controller. The mapping table reconstruction method includes the following steps:

[0007] receiving a reconstruction command, wherein the reconstruction command includes a start address;

[0008] Scanning multiple storage units in the storage medium with the starting address as the reconstruction start address, and generating and caching mapping relationship data of the multiple storage units according to the mapping information obtained by the scanning;

[0009] Determine whether the size of the cached mapping relationship data or the number of the plurality of storage units is greater than or equal to a set threshold;

[0010] If the size of the cached mapping relationship data or the number of the multiple storage units is greater than or equal to a set threshold, the cached mapping relationship data and the physical address of the currently scanned storage unit are sent to the host so that the host can save the mapping relationship data and use the physical address as the starting address in the reconstruction command when an exception occurs to continue mapping table reconstruction.

[0011] In some embodiments, it also includes: if the size of the cached mapping relationship data or the number of the multiple storage units is less than a set threshold, determining whether all storage units have been scanned, and if so, sending the cached mapping relationship data to the host so that the host can save the mapping relationship data.

[0012] In some embodiments, the controller has a rebuild mode, a send mode, and an end mode.

[0013] In some embodiments, the controller enters a corresponding mode by setting a corresponding register flag bit.

[0014] In some embodiments, generating and caching mapping relationship data of the plurality of storage units according to the mapping information obtained by scanning includes:

[0015] Retrieving the cached mapping relationship data using the logical address in the mapping information, and if the data exists, obtaining the timestamp of the logical address of the record, and determining whether the timestamp of the logical address of the record is greater than the timestamp of the logical address in the mapping information;

[0016] If the timestamp of the logical address of the record is greater than the timestamp of the logical address in the mapping information, the mapping information is discarded; if not, the mapping relationship data corresponding to the mapping information is used to replace the record.

[0017] In some embodiments, the set threshold is related to the size of the cache unit of the memory and the maximum cache supported by the transmission.

[0018] In some embodiments, the storage medium is a flash memory storage medium, and the storage unit is a storage page of the flash memory storage medium.

[0019] According to the second aspect of an embodiment of the present disclosure, a mapping table reconstruction method is provided, which is applied to a memory and a host, and the controller of the memory executes the above-mentioned mapping table reconstruction method, and the host sends the reconstruction command to the controller of the memory, and receives the cached mapping relationship data from the controller of the memory and saves it.

[0020] According to a third aspect of an embodiment of the present disclosure, a memory controller is provided, including:

[0021] processor;

[0022] A cache unit stores computer executable instructions, and when the computer executable instructions are executed by the processor, the above-mentioned mapping table reconstruction method is executed.

[0023] According to a fourth aspect of an embodiment of the present disclosure, a memory is provided, comprising the above-mentioned controller and a storage medium coupled to the controller.

[0024] In the disclosed embodiment, the controller sends the mapping relationship data to the host, thereby ensuring that the reconstructed mapping relationship data will not be lost even when an abnormal situation such as power failure occurs. At the same time, the host can calculate the starting address of the next reconstruction command based on the received mapping relationship data (or the controller calculates the starting address and sends it to the host) so that the controller can continue to rebuild. Since repeated scanning caused by abnormal situations such as power failure is avoided, the reconstruction efficiency is improved. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] The above and other objects, features and advantages of the embodiments of the present disclosure will become more apparent through the following description of the embodiments of the present disclosure with reference to the accompanying drawings, in which:

[0026] Figure 1 A schematic block diagram of a solid state drive is shown;

[0027] Figure 2 is a block diagram for illustrating a two-level mapping table in a Dram-less solid state drive;

[0028] Figure 3 A block diagram for illustrating a primary mapping table used by a solid state drive having DRAM;

[0029] Figure 4 is an interactive schematic diagram of a mapping table reconstruction method applied to a memory provided by an embodiment of the present disclosure;

[0030] Figure 5is a flow chart of a mapping table reconstruction method applied to a memory provided by an embodiment of the present disclosure;

[0031] Figure 6 is an interactive flow chart for illustrating a process of establishing communication between a controller and a host according to an embodiment of the present disclosure;

[0032] Figure 7 is a flow chart of a controller sending cached mapping relationship data to a host according to an embodiment of the present disclosure;

[0033] Figure 8 This is an example diagram of the data format sent by the controller to the host in the sending mode;

[0034] Fig. 9A and Fig. 9B Schematic diagram for illustrating two forms of full disk scanning methods;

[0035] Fig.10 It is a flowchart of a process of generating mapping relationship data of a storage page according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0036] The embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. In each of the accompanying drawings, the same elements are represented by similar reference numerals. For the sake of clarity, the various parts in the accompanying drawings are not drawn to scale. In addition, some well-known parts may not be shown.

[0037] The following describes the embodiments of the present disclosure based on the embodiments, but the embodiments of the present disclosure are not limited to these embodiments. In the detailed description of the embodiments of the present disclosure below, some specific details are described in detail. For those skilled in the art, the embodiments of the present disclosure can be fully understood without the description of these details. In order to avoid confusing the essence of the embodiments of the present disclosure, well-known methods, processes, processes, components and circuits are not described in detail.

[0038] Unless the context clearly requires otherwise, the words "include", "comprising", and the like throughout the specification and claims should be interpreted as inclusive rather than exclusive or exhaustive; that is, as "including but not limited to". In the description of the embodiments of the present disclosure, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and are not to be understood as indicating or implying relative importance. In addition, in the description of the embodiments of the present disclosure, unless otherwise specified, "plurality" means two or more.

[0039] The specific implementation of the embodiments of the present disclosure will be further described in detail below in conjunction with the accompanying drawings and embodiments. However, before that, it should be pointed out that although the various embodiments of the present disclosure are mostly based on solid-state hard disks as examples, they are also applicable to other storage products such as UFS.

[0040] Figure 1 A schematic block diagram of a solid state drive according to an embodiment of the present invention is shown.

[0041] like Figure 1 As shown, the computer system 100 includes a host 110 and a solid state drive, the solid state drive includes a controller 120 and a storage medium 130, and the controller 120 is connected to the host 110 for exchanging data with the host 110. The controller 120 connects the host 110 and the storage medium 130, and stores the write data of the host 110 in the storage medium 130.

[0042] The controller 120 includes a host interface 121, a processor 123, a cache unit 124 and a memory controller 128. The host interface 121 of the control system 120 is connected to the host 110 to transmit data and read and write instructions. The processor 123 is connected to the host interface 121, the cache unit 124 and the memory controller 128, and the processor 123 parses the read and write instructions and performs read and write operations. The cache unit 124 is, for example, an SRAM for storing a mapping table, and the memory controller 128 controls the transmission and storage of write data. The processor 123 is also used to implement the core software layer of memory control, namely FTL (flash translation layer, flash conversion layer). The FTL consists of several programs. The processor 123 executes the program so that when receiving the read and write instructions, the instructions can be converted to complete the access to the storage medium 130, so that the file system and operating system of the host 110 can access the storage medium like accessing their own memory. The FTL also has the characteristics of supporting bad block management, wear leveling, garbage collection, power failure recovery, write balancing technology, etc.

[0043] The storage medium 130 is, for example, a flash memory chip array. The memory controller 128 of the controller 120 can read and write the flash memory chips of the storage medium 130 via multiple channels (eg, CH0 and CH2), and each channel is connected to a group of flash memory chips.

[0044] The cache unit 124 may use SRAM and / or DRAM. In comparison, SRAM as a cache has a speed advantage, but is more expensive and has a smaller storage capacity per unit space. Therefore, in order to improve the utilization of cache space, DRAM-less solid-state drives (no DRAM) usually use a secondary mapping table for address management.

[0045] Figure 2 FIG. 1 is a block diagram for illustrating a two-level mapping table in a DRAM-less solid state drive. Figure 2As shown, the cache unit 124 includes a buffer 1241 for storing the first-level mapping table and a write buffer 1242 for storing part of the second-level mapping table. First, all logical addresses LAA (logic allocate unit address) are equally divided into (n+1) groups (0 to n), and then the first-level mapping table can be regarded as an array L1[n] with (n+1) elements (the subscript starts from 0). The array L1[n] is used to store (n+1) index addresses, which point to multiple second-level mapping tables stored on the storage medium 130 and / or multiple second-level mapping tables in the write buffer 1242.

[0046] As shown in the figure, each second-level mapping table of the write buffer 1242 is organized by a linked list, and the linked list consists of one or more nodes. The L2P mapping contained in each node consists of LAA, PAA and NEXT. LAA represents the logical address of the mapping relationship, PAA represents the physical address of the mapping relationship, the physical address is the address of the storage page of the storage block, and NEXT represents the index address pointing to the next node. In some embodiments, each physical address is characterized by a first address and an offset. Each second-level mapping table on the storage medium 130 is also composed of one or more L2P mappings.

[0047] When processing a read operation, the controller 120 checks whether the corresponding second-level mapping table data has been refreshed to the storage medium. If not, the second-level mapping table data is read from the storage medium to the cache unit 124 to perform corresponding processing on the second-level mapping table during the read operation. When performing a write operation, the controller 120 first generates a new L2P mapping in the write buffer 1242, then reads the corresponding second-level mapping table on the storage medium 130 into the cache unit 124, then merges the new L2P mapping with the corresponding second-level mapping table data read from the storage medium 130, and finally refreshes the merged data to the storage medium 130.

[0048] Figure 3 It is a block diagram for illustrating a primary mapping table used by a solid-state hard disk with DRAM. As shown in the reference figure, due to the large capacity of DRAM, all mapping relationship data of the primary mapping table are stored in the cache unit 124. At this time, damage to the storage medium will not damage the mapping relationship data, so there is no problem of mapping table reconstruction proposed in the background technology. However, there is another situation, that is, a DRAM-less solid-state hard disk adopts a primary mapping table. Due to the small capacity of SRAM, part of the mapping relationship data of the primary mapping table is stored on the SRAM, and the other part is stored on the storage medium. In this case, the mapping relationship data will also be lost due to damage to the storage medium, so there is also the problem of mapping table reconstruction proposed in the background technology.

[0049] Figure 4 1 is an interactive flow chart of a method for reconstructing a mapping table applied to a memory provided by an embodiment of the present disclosure. The reconstruction method can be used to reconstruct mapping tables including but not limited to the two forms described above. Each step in the interactive chart can be implemented as a computer program and respectively performed by, for example Figure 1 The host 110 and the controller 120 execute.

[0050] refer to Figure 4 As shown, in step S1, the host 110 checks whether the solid state drive has been powered on, and if so, proceeds to step S2.

[0051] In step S2, the host 110 continues to check whether the local data file is valid and determines the starting address. If the local data file is valid, the host 110 determines the starting address according to the records in the local data file. If the local data file is invalid, the host 110 uses the default starting address (storage block 1, storage page 1) as the starting address.

[0052] In step S3 , the host 110 sends a reconstruction command to the controller 120 , where the reconstruction command includes a start address.

[0053] In step S4, the controller 120 scans a plurality of storage units starting from the start address. A storage unit is a read / write unit of a storage medium. When the storage medium is a flash memory chip, a storage unit is a storage page of a storage block.

[0054] In step S5, the controller 120 reconstructs the mapping relationship data according to the mapping information obtained from the plurality of storage units. When the controller 120 writes data to each storage unit, it also writes the mapping information of the storage unit into the storage unit. For example, when the storage medium is a flash memory chip, each storage page includes 16K+Nbyte (redundant space), 16K space stores write data, Nbyte redundant space stores corresponding mapping information, and each time a storage page is read, the mapping information of the storage page is obtained from the redundant space of the storage page, and the mapping relationship data of the logical address and the physical address of the storage page is established according to the mapping information.

[0055] In step S6 , the controller 120 transmits the mapping relationship data and the physical address of the currently scanned storage unit to the host 110 .

[0056] In step S7, the host 110 saves the mapping relationship data into a local data file.

[0057] In step S8 , the host 110 sends a continue reconstruction command to the controller 120 . After receiving the continue reconstruction command, the controller 120 may continue to scan multiple storage units from the current address to continue to rebuild the mapping relationship data.

[0058] According to this embodiment, the controller scans N storage units backward from the starting address provided by the host to read the mapping information of the N storage units, and generates the mapping relationship data of the N storage units, and sends the mapping relationship data of the N storage units to the host to save as a local data file. The host can determine the starting address of the next reconstruction command based on the records in the local data file. As mentioned above, the host can also receive the physical address of the currently scanned storage unit from the controller as the starting address of the next reconstruction command. Here, N can be determined based on the size of the cache unit of the solid-state drive. For example, if the cache unit of the current solid-state drive is 512MB and the size of a physical page is 16KB, then N is set to 32768 (512MB / 16K).

[0059] In this embodiment, the controller sends the mapping relationship data to the host, thereby ensuring that the reconstructed mapping relationship data will not be lost even if an abnormal situation such as power failure occurs, and the host continues to send reconstruction commands so that the controller continues to rebuild. Since repeated scanning caused by abnormal situations such as power failure is avoided, the reconstruction efficiency is improved.

[0060] In addition, if the user needs to stop and check during the rebuild process, the host can send a pause command at any stage. The rebuild command, continue rebuild command, pause command, end rebuild command, etc. can be implemented through the standard (vendor command) commands inside the SSD, supporting transmission of different interfaces (SATA, PCIE).

[0061] Figure 5 The flowchart of the mapping table reconstruction method applied to the memory provided by the embodiment of the present disclosure is shown in FIG. Each step in the flowchart can be implemented as a computer program and executed by the controller of the memory.

[0062] In step S510, a rebuild command is received from a host.

[0063] In step S520, a reconstruction mode is entered according to a reconstruction command, and storage pages are scanned backward according to a start address to obtain mapping information, and mapping relationship data is reconstructed according to the mapping information, and the reconstructed mapping relationship data is placed in a cache unit according to a format.

[0064] In step S530, it is determined whether the size of the cached mapping relationship data is greater than or equal to a set threshold. If yes, step S540 is executed, and if no, step S550 is executed.

[0065] In step S540, the sending mode is entered to send the cached mapping relationship data to the host.

[0066] In step S550, it is determined whether all storage pages have been scanned. If yes, step S580 is executed, otherwise step S570 is executed.

[0067] In step S560, the cache is cleared and the process jumps to S510.

[0068] In step S570, the storage page is scanned backward from the current address to obtain mapping information, and the mapping relationship data is reconstructed according to the mapping information, and the reconstructed mapping relationship data is placed in the cache unit according to the format.

[0069] In step S580, the end mode is entered, and the cached mapping relationship data is sent to the host.

[0070] This embodiment proposes that the controller has multiple modes, and enters different modes by setting corresponding register flags, and different modes perform different processing. This embodiment proposes that the controller has a reconstruction mode, a sending mode, and an end mode. The reconstruction mode is mainly responsible for scanning the storage page, reconstructing the mapping relationship data, and placing the reconstructed mapping relationship data into the cache unit. The sending mode is mainly responsible for transmitting the mapping relationship data in the cache to the host for storage. The end mode is that the controller informs the host that the reconstruction is completed and sends the last cached mapping relationship data to the host.

[0071] Figure 6 is an interactive flow chart for illustrating the process of establishing communication between the controller and the host in the embodiment of the present disclosure. Each step in the interactive flow chart can be implemented as a computer program and is respectively performed by, for example Figure 1 The host 110 and the controller 120 execute.

[0072] In step S610 , the host 110 sends a pre-connection request to the controller 120 .

[0073] In step S611, after receiving the pre-connection request, the controller 120 clears the cache, initializes the connection flag, and enters the pre-communication state.

[0074] In step S612 , the controller 120 sends a connectable command to the host 110 .

[0075] In step S613 , the host 110 checks the local data file.

[0076] In step S613, the host 110 determines whether the local data file exists and is valid. If so, step S615 is executed; otherwise, step S616 is executed.

[0077] In step S615, the host 110 obtains the start address according to the record in the file.

[0078] In step S616 , the host 110 creates a backup information file and sets the start address to storage page 1 of storage block 1 .

[0079] In step S617 , the host 110 sends a rebuild command to the controller 120 , where the rebuild command includes a start address.

[0080] In step S618, the controller 120 scans the storage block backward from the starting address to obtain the mapping information, reconstructs the mapping relationship data according to the mapping information, and puts the reconstructed mapping relationship data into the cache unit according to the format. The mapping relationship data in the cache unit will be sent to the host 110 when the set conditions are met. For more detailed information about this step, please refer to the above Figure 4 and Figure 5 The description will not be repeated here.

[0081] Figure 7 The flowchart of the controller of the embodiment of the present disclosure sends cached mapping relationship data to the host.

[0082] In step S710 , the controller 120 sends an instruction to reset the reconstruction flag.

[0083] In step S720 , after receiving the instruction, the host 110 clears its own cache, opens backup.txt and table.txt, and replies to the controller 120 .

[0084] In step S730, after receiving the reply from the host 110, the controller 120 pulls up the sending flag to enter the sending mode, and sends the mapping relationship data in a specified format in the sending mode.

[0085] In step S740, the controller 120 determines whether it is the last mapping relationship data in the cache. If yes, step S750 is executed, and if not, step S760 is executed.

[0086] In step S750, the host 110 receives and saves relevant information (the location and mapping information of the currently scanned storage block (or storage page)), replies to the controller 120 with a continue reconstruction instruction, and closes the file.

[0087] In step S760, the host 110 receives and saves relevant information (the storage block location currently scanned, mapping table information), and replies to the controller 120 to continue sending instructions.

[0088] In step S770 , the controller 120 sets the reconstruction flag to enter the reconstruction mode.

[0089] According to this embodiment, the controller 120 sends an instruction to inform the terminal B to prepare (open the corresponding file, clear the cache). After the host 110 is ready, the controller 120 starts to send the cached mapping relationship data in a specified format. After receiving the mapping relationship data, the host 110 can parse the specific location of the current controller 120 reconstruction according to the physical address in the mapping relationship data (save it in backup.txt), and the mapping relationship data is saved in table.txt. The host 110 and the controller 120 need to specify the amount of data transmitted by both ends in advance. For example, the maximum memory limit of the controller 120 and the host 110 only allows the mapping relationship data of 32768 storage pages to be cached, and only 10 storage pages of mapping table information can be sent in one transmission. In the sending mode of the controller 120, the controller 120 and the host 110 need to transmit 3276 times. Therefore, the controller 120 needs to calculate the total number of transmissions in this round according to the range specified in advance, and determine whether the current transmission is the last one. If the cache unit is not full and needs to be transferred (rebuilt to the last storage page), the host 110 detects that the transferred data is the initial value three times in a row, and also needs to end the current round of transmission and wait for the controller 120 to enter the end mode.

[0090] Figure 8 This is an example diagram of the data format sent by the controller to the host in the sending mode. As shown in the figure, in the sending mode, the command format is to save the command flag (a special identifier used to identify the command, such as 0xffff) + L reconstructed mapping relationship data, where L is related to the cache unit size of the solid-state drive and the maximum cache supported by the transmission.

[0091] Fig. 9A and Fig. 9B Schematic diagram used to illustrate two forms of full disk scanning methods.

[0092] like Fig. 9A As shown, the controller 120 will scan backward from the storage page 1 position in the storage block 1. When all the storage pages in the storage block 1 are scanned, it will switch to the starting position of the storage block 2 and start scanning backward, and so on, until the scanning ends at the storage page m position of the storage block n.

[0093] like Fig. 9B As shown, assuming that the host 120 has recorded the position that has been scanned last time, when the power is turned on again, the scanning can start from the position of storage page w of storage block k and continue until the scanning reaches the position of storage page m of storage block n. It can be seen that after recording the starting point, if the solid state drive has an abnormality during the reconstruction of the mapping table, when the reconstruction is started, the mapping table can be rebuilt using the information of the last reconstruction, thereby effectively reducing the number of scans.

[0094] Fig.10It is a flowchart of a process of generating mapping relationship data of a storage page according to an embodiment of the present disclosure.

[0095] In step S1010 , the current storage page is scanned to obtain corresponding first mapping relationship data.

[0096] In step S1020, the mapping relationship data in the cache is retrieved according to the first logical address in the first mapping relationship data.

[0097] In step S1030, it is determined whether there is second mapping relationship data in the cache that includes the first logical address. If yes, execute S1040; otherwise, execute step S1080.

[0098] In step S1040, a second timestamp of the first logical address in the second mapping relationship data is obtained.

[0099] In step S1050, it is determined whether the second timestamp is greater than the first timestamp of the first logical address in the first mapping relationship data, if yes, step S1070 is executed, if no, step S1060 is executed.

[0100] In step S1060, the second mapping relationship data is replaced with the first mapping relationship data.

[0101] In step S1070, the first mapping relationship data is discarded.

[0102] In step S1080, switch to the next storage page.

[0103] According to this embodiment, when the controller 120 is in reconstruction mode, whenever it obtains the mapping relationship data of a storage page, it needs to check whether the same logical address already exists therein before putting it into the cache unit. If so, it further checks whether the newly created mapping relationship data is newer than the mapping relationship data in the cache. If newer, the newly created mapping relationship data is used to replace the mapping relationship data in the cache. Through this operation, the occupancy of the cache by invalid mapping relationship data and the time consumption in transmission / file reading can be reduced, thereby ensuring that the transmitted mapping relationship data is as up-to-date as possible, thereby improving transmission efficiency.

[0104] In this embodiment, each mapping relationship data records the timestamp information of the logical address, which is used to describe the order in which the data is written to the storage block or storage page. The larger the timestamp, the more likely it is that the mapping relationship data is old or new. The timestamp is in 4K units, which can identify the mapping relationship data more finely and improve the accuracy of determining the old or new of the mapping relationship data.

[0105] In this embodiment, since the mapping relationship data in the cache is not necessarily continuous, when storing the mapping relationship data in the cache, it can be stored in order according to the size of the logical address, and then the mapping relationship data in the cache can be retrieved using binary search based on the logical address in the mapping information, which can speed up the retrieval of the mapping relationship data in the cache.

[0106] Furthermore, the embodiments of the present disclosure further provide a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the steps in the above embodiments are implemented.

[0107] The embodiments according to the embodiments of the present disclosure are described above, and these embodiments do not describe all the details in detail, nor do they limit the invention to the specific embodiments described. Obviously, many modifications and changes can be made based on the above description. This specification selects and specifically describes these embodiments in order to better explain the principles and practical applications of the embodiments of the present disclosure, so that those skilled in the art can make good use of the embodiments of the present disclosure and the modified use based on the embodiments of the present disclosure. The embodiments of the present disclosure are limited only by the claims and their full scope and equivalents.

Claims

1. A mapping table reconstruction method, applied to a memory, the memory comprising a controller and a storage medium, the mapping table reconstruction method being executed by the controller, the mapping table reconstruction method comprising the following steps: receiving a reconstruction command, wherein the reconstruction command includes a start address; Scanning multiple storage units in the storage medium with the starting address as the reconstruction start address, and generating and caching mapping relationship data of the multiple storage units according to the mapping information obtained by the scanning; Determine whether the size of the cached mapping relationship data or the number of the plurality of storage units is greater than or equal to a set threshold; If the size of the cached mapping relationship data or the number of the multiple storage units is greater than or equal to a set threshold, the cached mapping relationship data and the physical address of the currently scanned storage unit are sent to the host so that the host can save the mapping relationship data and use the physical address as the starting address in the reconstruction command when an exception occurs to continue mapping table reconstruction.

2. The mapping table reconstruction method according to claim 1, further comprising: If the size of the cached mapping relationship data or the number of the multiple storage units is less than a set threshold, it is determined whether all storage units have been scanned. If so, the cached mapping relationship data is sent to the host so that the host can save the mapping relationship data.

3. The mapping table reconstruction method according to claim 1, wherein: The controller has a rebuild mode, a send mode and an end mode.

4. The mapping table reconstruction method according to claim 3, wherein: The controller enters a corresponding mode by setting a corresponding register flag bit.

5. The mapping table reconstruction method according to claim 1, wherein: The step of generating and caching the mapping relationship data of the plurality of storage units according to the mapping information obtained by scanning includes: Retrieving the cached mapping relationship data using the logical address in the mapping information, and if the data exists, obtaining the timestamp of the logical address of the record, and determining whether the timestamp of the logical address of the record is greater than the timestamp of the logical address in the mapping information; If the timestamp of the logical address of the record is greater than the timestamp of the logical address in the mapping information, the mapping information is discarded; if not, the mapping relationship data corresponding to the mapping information is used to replace the record.

6. The mapping table reconstruction method according to claim 1, wherein: The set threshold is related to the size of the cache unit of the memory and the maximum cache supported by the transmission.

7. The mapping table reconstruction method according to claim 1, wherein: The storage medium is a flash memory storage medium, and the storage unit is a storage page of the flash memory storage medium.

8. A mapping table reconstruction method, applied to a memory and a host, wherein the controller of the memory executes the mapping table reconstruction method as described in any one of claims 1 to 7, and the host sends the reconstruction command to the controller of the memory, and receives the cached mapping relationship data from the controller of the memory and saves it.

9. A memory controller, comprising: processor; A cache unit, wherein the cache unit stores computer executable instructions, and when the computer executable instructions are executed by the processor, the mapping table reconstruction method according to any one of claims 1 to 7 is executed.

10. A memory comprising the controller according to claim 9 and a storage medium coupled to the controller.

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