Phase-locked loop circuit and display device

Abstract

The embodiment of the invention provides a phase-locked loop circuit and a display device, and in the phase-locked loop circuit, a control circuit outputs corresponding bandwidth gating signals based on different environment temperatures after obtaining a temperature adjustment trigger signal, so that a voltage-controlled oscillator corrects a target voltage frequency adjustment curve currently applied by the voltage-controlled oscillator based on the different environment temperatures, and the target voltage frequency adjustment curve is adjusted according to the target voltage frequency adjustment curve. The target voltage frequency regulation curve can compensate for errors generated by frequency drift, and the voltage-controlled oscillator combines feedback regulation of the regulation and control signal generation circuit based on the voltage frequency regulation curve so that errors between a feedback signal correspondingly generated by a target clock signal output by the voltage-controlled oscillator and a reference clock signal can meet the error standard of the phase-locked loop. And the accurate target clock signal is output, so that the problem of frequency drift of a single voltage frequency regulation curve in a voltage-controlled oscillator during environment temperature change in the prior art can be solved, and the stability of the phase-locked loop circuit is improved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of LED display, and in particular to a phase-locked loop circuit and a display device. Background Art

[0002] The display device includes a controller, a display panel, and a backlight panel. The controller includes a timing controller, and the timing controller includes a phase-locked loop circuit. After the controller obtains image data or video data, based on a clock signal provided by the phase-locked loop circuit, the controller outputs backlight driving data in a timing manner to control the backlight panel to provide backlight, and outputs liquid crystal display driving data in a timing manner to control the display panel to display a corresponding picture.

[0003] The increased temperature of the display device during use and / or the increased ambient temperature may cause the phase-locked loop circuit to generate frequency drift, affecting the timing accuracy of the output data of the timing controller, thereby affecting the accuracy of the displayed image.

[0004] How to improve the stability of the output clock signal of the phase-locked loop circuit has become the focus of research. Summary of the invention

[0005] The present application provides a phase-locked loop circuit and a display device to solve the above technical problems.

[0006] In a first aspect, an embodiment of the present application provides a phase-locked loop circuit, comprising:

[0007] A voltage-controlled oscillator outputs a target clock signal;

[0008] A control signal generating circuit is electrically connected to the reference clock generating circuit and the voltage controlled oscillator, wherein the control signal generating circuit obtains a reference clock signal and a feedback signal and outputs a control voltage signal; the feedback signal is a signal generated based on the target clock signal;

[0009] A control circuit is electrically connected to the control signal generating circuit, wherein the control circuit obtains the control voltage signal, and after obtaining the temperature adjustment trigger signal, outputs a target bandwidth gating signal based on the ambient temperature and the control voltage signal;

[0010] The voltage-controlled oscillator is electrically connected to the control signal generating circuit and the control circuit, the voltage-controlled oscillator obtains the target bandwidth gating signal and the control voltage signal, and corrects the target voltage-frequency adjustment curve applied by the voltage-controlled oscillator based on the target bandwidth gating signal;

[0011] Based on the regulation voltage signal and the target voltage-frequency adjustment curve, the frequency of the target clock signal is adjusted.

[0012] In the above technical scheme, in the phase-locked loop circuit, after obtaining the temperature adjustment trigger signal, the control circuit outputs the corresponding bandwidth selection signal based on different ambient temperatures, so that the voltage-controlled oscillator corrects the target voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator based on different ambient temperatures, so that the target voltage-frequency adjustment curve can compensate for the error caused by the frequency drift. The voltage-controlled oscillator is based on the voltage-frequency adjustment curve, combined with the feedback adjustment of the control signal generating circuit, so that the error between the feedback signal generated by the target clock signal output by the voltage-controlled oscillator and the reference clock signal meets the error standard of the phase-locked loop, and outputs an accurate target clock signal, which can solve the problem of frequency drift caused by the single voltage-frequency adjustment curve in the voltage-controlled oscillator when the ambient temperature changes in the related technology, and improve the stability of the phase-locked loop circuit.

[0013] Optionally, the voltage-controlled oscillator includes a plurality of voltage-frequency adjustment curves, and the plurality of voltage-frequency adjustment curves correspond to a plurality of bandwidth gating signals;

[0014] The voltage-controlled oscillator selects a voltage-frequency adjustment curve corresponding to the target bandwidth gating signal from the multiple voltage-frequency adjustment curves as the target voltage-frequency adjustment curve.

[0015] In the above technical scheme, by setting multiple voltage-frequency adjustment curves in the voltage-controlled oscillator, the corresponding accuracy of the frequency of the control voltage signal and the target clock signal set based on temperature drift under different ambient temperatures can be guaranteed, thereby ensuring the correction accuracy of the target voltage adjustment curve during the operation of the phase-locked loop circuit, so as to improve the accuracy of the target clock signal output by the phase-locked loop circuit.

[0016] Optionally, the control signal generating circuit includes:

[0017] A phase frequency detector is electrically connected to the reference clock generation circuit and the voltage controlled oscillator, the phase frequency detector obtains the reference clock signal and the feedback signal, and outputs an error signal between the reference clock signal and the feedback signal;

[0018] A charge pump is electrically connected to the frequency and phase detector, and the charge pump obtains the error signal and outputs a first voltage signal;

[0019] A signal conditioning circuit is electrically connected to the charge pump, the control circuit, and the voltage-controlled oscillator, and the signal conditioning circuit outputs the regulated voltage signal based on the first voltage signal.

[0020] Optionally, among the plurality of voltage-frequency adjustment curves, two adjacent voltage-frequency adjustment curves include a first voltage-frequency adjustment curve and a second voltage-frequency adjustment curve;

[0021] For the same regulation voltage signal, a first frequency corresponding to the regulation voltage signal in the first voltage-frequency regulation curve is greater than a second frequency corresponding to the regulation voltage signal in the second voltage-frequency regulation curve;

[0022] The minimum frequency of the first voltage-frequency adjustment curve is greater than or equal to the maximum frequency of the second voltage-frequency adjustment curve.

[0023] In the above technical solution, in two adjacent voltage-frequency adjustment curves, when the frequency value determined by the same control voltage signal in the first voltage-frequency adjustment curve is greater than the frequency value determined in the second voltage-frequency adjustment curve, the minimum frequency of the first voltage-frequency adjustment curve is greater than the maximum frequency of the second voltage-frequency adjustment curve, thereby ensuring the continuity of the frequency change between the two curves, thereby ensuring the accuracy of the frequency adjustment of the phase-locked loop.

[0024] Optionally, the first regulation voltage signal corresponds to a third frequency in the first voltage-frequency regulation curve;

[0025] The second regulating voltage signal corresponds to the third frequency in the second voltage-frequency regulating curve;

[0026] The third frequency is greater than or equal to the minimum frequency of the first voltage-frequency adjustment curve;

[0027] The third frequency is less than or equal to the maximum frequency of the second voltage-frequency adjustment curve;

[0028] Each of the voltage-frequency adjustment curves is correspondingly set with a first temperature threshold and a second temperature threshold;

[0029] After obtaining the temperature adjustment trigger signal, the control circuit outputs a first target bandwidth gating signal to enable the voltage controlled oscillator to apply the first voltage frequency adjustment curve when the voltage controlled oscillator applies the second voltage frequency adjustment curve, and the ambient temperature is greater than or equal to the first temperature threshold corresponding to the second voltage frequency adjustment curve, and the control voltage signal is greater than or equal to the second control voltage signal;

[0030] When the voltage-controlled oscillator applies the first voltage-frequency adjustment curve, and the ambient temperature is lower than a second temperature threshold corresponding to the first voltage-frequency adjustment curve, and the control voltage signal is lower than the first control voltage signal, a second target bandwidth selection signal is output to enable the voltage-controlled oscillator to apply the second voltage-frequency adjustment curve.

[0031] In the above technical solution, after the control circuit obtains the temperature adjustment trigger signal, when the ambient temperature is greater than or equal to the first temperature threshold corresponding to the voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator and the control voltage signal is greater than or equal to the second control voltage signal, it is determined that the voltage-frequency adjustment curve has an over-temperature drift, and it is necessary to select an adjacent voltage-frequency adjustment curve with a uniformly increased frequency value as the current voltage-frequency adjustment curve so that the voltage-controlled oscillator outputs a larger frequency to meet the frequency output requirement; when the ambient temperature is lower than the second temperature threshold corresponding to the voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator and the control voltage signal is lower than the first control voltage signal, it is determined that the voltage-frequency adjustment curve has an over-temperature drift, and it is necessary to select an adjacent voltage-frequency adjustment curve with a uniformly decreased frequency value as the current voltage-frequency adjustment curve so that the voltage-controlled oscillator outputs a smaller frequency to meet the frequency output requirement and ensure the accuracy of the output frequency.

[0032] Optionally, after the phase-locked loop circuit is started, if the temperature adjustment trigger signal is not obtained, the control circuit outputs a third target bandwidth gating signal based on the regulation voltage signal;

[0033] The voltage controlled oscillator determines a corresponding third voltage-frequency adjustment curve based on the third target bandwidth gating signal;

[0034] The voltage controlled oscillator adjusts the frequency of the target clock signal based on the third voltage frequency adjustment curve and the control voltage signal so as to lock the phase locked loop circuit;

[0035] When the phase-locked loop circuit is locked, the phase of the feedback signal generated based on the target clock signal is the same as the phase of the reference clock signal, and the frequency of the feedback signal generated based on the target clock signal is the same as the frequency of the reference clock signal.

[0036] In the above technical solution, after the phase-locked loop circuit is started, when the temperature adjustment trigger signal is not obtained, the control circuit controls the voltage-controlled oscillator to select the third voltage-frequency adjustment curve based on the regulation voltage signal, and the target clock signal output based on the third voltage-frequency adjustment curve is fed back to the frequency detector and the phase detector. The feedback signal can achieve the same goal as the reference clock signal, so that the phase-locked loop circuit can quickly achieve the locking of the phase-locked loop circuit without considering the influence of ambient temperature factors, thereby improving the adjustment efficiency of the phase-locked loop circuit.

[0037] Optionally, the control circuit outputs the plurality of bandwidth gating signals one by one in a preset order until the phase-locked loop circuit is locked;

[0038] The preset sequence includes an order in which the values ​​of the bandwidth gating signals increase or an order in which the values ​​of the bandwidth gating signals decrease.

[0039] Optionally, the control circuit includes:

[0040] The temperature sensor outputs an ambient temperature signal after obtaining the temperature adjustment trigger signal;

[0041] A voltage sampler is electrically connected to the signal conditioning circuit and the voltage-controlled oscillator, and the voltage sampler samples the regulation voltage signal and outputs a control voltage signal; wherein the regulation voltage signal is an analog electrical signal, and the control voltage signal is a digital electrical signal;

[0042] A logic controller is electrically connected to the temperature sensor and the voltage sampler. When the ambient temperature signal is not obtained, the logic controller obtains the control voltage signal and outputs bandwidth gating signals in a preset sequence until the target bandwidth gating signal is output;

[0043] After obtaining the ambient temperature signal, the logic controller adjusts the target bandwidth gating control signal based on the ambient temperature signal and the control voltage signal.

[0044] Optionally, the phase-locked loop circuit further includes:

[0045] The frequency divider is electrically connected between the frequency detector and the voltage controlled oscillator. The frequency divider obtains the target clock signal, divides the frequency of the target clock signal, and outputs the feedback signal.

[0046] In the above technical solution, the frequency divider can increase the frequency range of the clock signal that can be processed by the phase-locked loop circuit.

[0047] Optionally, the signal conditioning circuit includes:

[0048] A low-pass filter, electrically connected to the charge pump, wherein the low-pass filter obtains the first voltage signal, filters out high-frequency components of the first voltage signal, and outputs a second voltage signal;

[0049] The regulation voltage signal is a signal determined based on the second voltage signal.

[0050] In the above technical solution, the low-pass filter can filter out high-frequency noise, smooth the control signal, and adjust the loop response time.

[0051] Optionally, the signal conditioning circuit further includes a frequency adjustment module electrically connected between the low-pass filter and the voltage-controlled oscillator;

[0052] The frequency adjustment module outputs a coarse adjustment voltage signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is greater than a preset frequency threshold;

[0053] When the absolute value of the frequency difference between the feedback signal and the reference clock signal is less than or equal to the preset frequency threshold, outputting a fine adjustment voltage signal;

[0054] The control voltage signal includes the coarse control voltage signal or the fine control voltage signal.

[0055] In the above technical solution, when the error between the feedback signal and the reference clock signal is large, the frequency adjustment module outputs a coarse adjustment voltage signal to increase the frequency adjustment speed of the voltage-controlled oscillator; after the error between the feedback signal and the reference clock signal is reduced, the frequency adjustment module outputs a fine adjustment voltage signal to ensure the frequency adjustment accuracy of the voltage-controlled oscillator.

[0056] Optionally, the coarse adjustment voltage signal is a preset voltage signal;

[0057] The fine adjustment voltage signal is the second voltage signal.

[0058] Optionally, the frequency adjustment module includes a first controllable switch device and a second controllable switch device;

[0059] The first end of the first controllable switch device is electrically connected to the low-pass filter, the second end of the first controllable switch device is electrically connected to the voltage-controlled oscillator, the control end of the first controllable switch device is electrically connected to the logic controller, and the logic controller is electrically connected to the frequency and phase detector;

[0060] The logic controller outputs a first on-control signal and a second off-control signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is greater than the preset frequency threshold;

[0061] The logic controller outputs a first turn-off control signal and a second turn-on control signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is less than or equal to the preset frequency threshold;

[0062] The first controllable switch device is turned on when receiving the first turn-on control signal to output the second voltage signal;

[0063] The first controllable switch device is turned off when the first turn-off control signal is obtained;

[0064] The first end of the second controllable switch device is electrically connected to the power supply circuit, the second end of the second controllable switch device is electrically connected to the voltage-controlled oscillator, and the second controllable switch device is turned on when the second turn-on control signal is obtained, and outputs a preset voltage signal provided by the power supply circuit;

[0065] The second controllable switch device is turned off when receiving the second turn-off control signal.

[0066] In a second aspect, the present application provides a display device, including a controller, a display panel, and a backlight panel, wherein the controller is electrically connected to the display panel and the backlight panel;

[0067] The controller includes a timing controller, and the timing controller includes any phase-locked loop circuit described in the first aspect.

[0068] Optionally, the timing controller sequentially outputs a frame header, driving data and a frame tail in each frame display period, and the driving data includes backlight driving data or display driving data;

[0069] The phase-locked loop circuit switches the voltage-frequency adjustment curve applied by the voltage-controlled oscillator at the frame head or frame tail.

[0070] A phase-locked loop circuit and a display device are provided in the embodiments of the present application. In the phase-locked loop circuit, after obtaining a temperature adjustment trigger signal, the control circuit outputs a corresponding bandwidth selection signal based on different ambient temperatures, so that the voltage-controlled oscillator corrects the target voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator based on different ambient temperatures, so that the target voltage-frequency adjustment curve can compensate for the error caused by frequency drift. The voltage-controlled oscillator is based on the voltage-frequency adjustment curve and combines feedback adjustment of the control signal generating circuit so that the error between the feedback signal generated by the target clock signal output by the voltage-controlled oscillator and the reference clock signal meets the error standard of the phase-locked loop, and outputs an accurate target clock signal. This can solve the problem of frequency drift caused by a single voltage-frequency adjustment curve in the voltage-controlled oscillator when the ambient temperature changes in the related art, thereby improving the stability of the phase-locked loop circuit. BRIEF DESCRIPTION OF THE DRAWINGS

[0071] The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the present application and, together with the description, serve to explain the principles of the present application.

[0072] Figure 1 This is a schematic diagram of the structure of a display device provided according to an exemplary embodiment of the present application;

[0073] Figure 2 A circuit structure diagram of a conventional phase-locked loop circuit provided by the present application according to an exemplary embodiment;

[0074] Figure 3 A schematic diagram of the structure of a phase-locked loop circuit provided by the present application according to an exemplary embodiment;

[0075] Figure 4 A schematic diagram of a voltage-frequency adjustment curve provided by the present application according to an exemplary embodiment;

[0076] Figure 5A schematic diagram of the structure of a phase-locked loop circuit provided by the present application according to another exemplary embodiment;

[0077] Figure 6 A schematic diagram of the structure of a phase-locked loop circuit provided by the present application according to another exemplary embodiment;

[0078] Figure 7 It is a schematic structural diagram of a phase-locked loop circuit provided in accordance with another exemplary embodiment of the present application.

[0079] The above drawings have shown clear embodiments of the present application, which will be described in more detail later. These drawings and text descriptions are not intended to limit the scope of the present application in any way, but to illustrate the concept of the present application to those skilled in the art by referring to specific embodiments. DETAILED DESCRIPTION

[0080] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The implementations described in the following exemplary embodiments do not represent all implementations consistent with the present application. Instead, they are merely examples of devices and methods consistent with some aspects of the present application as detailed in the appended claims.

[0081] It should be noted that, in this article, the terms "include", "comprises" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element. In addition, components, features, and elements with the same name in different embodiments of the present application may have the same meaning or different meanings, and their specific meanings need to be determined by their explanation in the specific embodiment or further combined with the context of the specific embodiment.

[0082] It should be understood that the specific embodiments described herein are only used to explain the present application and are not used to limit the present application.

[0083] A display device is a device that can output images or videos, that is, a device that generates corresponding images based on input image data or video data. Figure 1As shown, it includes a controller, a display panel 40 and a backlight panel 10 . The controller and the display panel 40 and the backlight panel 10 are electrically connected. The backlight panel 10 is overlapped with the display panel 40 , and the backlight panel 10 is arranged on a side of the display surface away from the display panel 40 .

[0084] In some embodiments, the controller includes a main controller 30, a timing controller 50, and a dimming controller 20;

[0085] In some embodiments, the circuit connection relationship of the display device is as follows: Figure 1 As shown, the main controller 20 is electrically connected to the timing controller 50 , the timing controller 50 is electrically connected to the display panel 40 , the timing controller 50 is electrically connected to the dimming controller 20 , and the dimming controller 20 is electrically connected to the backlight panel 10 .

[0086] After obtaining the image data or the video data, the main controller 30 outputs the liquid crystal display data to the timing controller 50 . The timing controller 50 outputs the liquid crystal display driving data based on the liquid crystal display data to control the deflection of the liquid crystal molecules in the display panel 40 .

[0087] After the main controller 30 obtains the image data or video data, it outputs the backlight brightness data to the timing controller 50. The timing controller 50 outputs the backlight control data to the dimming controller 20 based on the backlight brightness data, so that the dimming controller 20 outputs the backlight driving data based on the backlight control data, drives the backlight panel 10 to emit light, and the backlight is projected onto the display panel 10 to display the corresponding picture.

[0088] Since the liquid crystal display drive data and backlight control data output by the timing controller 50 are digital electrical signals transmitted based on a serial protocol, it is necessary to regulate the transmission speed of the data electrical signals based on a clock signal, and it is also necessary to regulate the consistency of the display process of the display panel 40 and the light-emitting process of the backlight panel 10 based on the clock signal.

[0089] In some embodiments, a phase-locked loop circuit 501 is provided in the timing controller 50 , and the phase-locked loop circuit 501 provides a clock signal.

[0090] Figure 2 FIG. 1 is a circuit structure diagram of a conventional phase-locked loop circuit provided by the present application according to an exemplary embodiment, such as Figure 2As shown, it includes a control signal generating circuit 500 and a voltage controlled oscillator 505. The input end of the control signal generating circuit 500 is electrically connected to the output end of the voltage controlled oscillator 505, and the output end of the control signal generating circuit 500 is electrically connected to the input end of the voltage controlled oscillator 505. The control signal generating circuit 500 obtains the target clock signal output by the voltage controlled oscillator 505 during the operation of the phase-locked loop circuit, compares it with the reference clock signal obtained, and outputs a control voltage signal to adjust the amplitude and frequency of the signal output by the voltage controlled oscillator 505, so that the phase and frequency of the clock signal output by the voltage controlled oscillator 505 are synchronized with the reference clock signal.

[0091] In some embodiments, the control signal generating circuit 500 includes a phase frequency detector 502 , a charge pump 503 , and a low-pass filter 504 .

[0092] The input end of the frequency detector 502 is electrically connected to the voltage controlled oscillator 505, the input end of the charge pump 503 is electrically connected to the output end of the frequency detector 502, the input end of the low-pass filter 504 is electrically connected to the output end of the charge pump 503, and the output end of the low-pass filter 504 is electrically connected to the input end of the voltage controlled oscillator 505.

[0093] During the operation of the phase-locked loop circuit, the frequency detector 502 obtains the clock signal output by the voltage-controlled oscillator 505, compares it with the reference clock signal obtained, and outputs an error signal, so that the charge pump 503 and the low-pass filter 504 output a control signal after filtering out high-frequency signals, noise and other signals, thereby regulating the phase and frequency synchronization of the clock signal output by the voltage-controlled oscillator 505 and the reference clock signal.

[0094] The temperature of the display device during use and / or the increase in ambient temperature will cause the phase-locked loop circuit to produce frequency drift. More specifically, there is a set of voltage-frequency correspondences in the voltage-controlled oscillator 505. After the temperature rises, the frequency output based on the same control signal is lower than the frequency output before the temperature rises, resulting in the output frequency being inconsistent with the frequency of the reference clock signal, and the inconsistency cannot be corrected by negative feedback regulation of the clock signal, resulting in inaccurate frequency of the output clock signal, affecting the timing accuracy of the output data of the timing controller, thereby affecting the accuracy of the display screen.

[0095] How to improve the stability of the output clock signal of the phase-locked loop circuit has become the focus of research.

[0096] In order to solve the above problems, the present application provides a phase-locked loop circuit and a display device. The technical concept of the present application is: in the phase-locked loop circuit, after obtaining the temperature adjustment trigger signal, the control circuit outputs a corresponding bandwidth selection signal based on different ambient temperatures, so that the voltage-controlled oscillator corrects the target voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator based on different ambient temperatures, so that the target voltage-frequency adjustment curve can compensate for the error caused by the frequency drift. The voltage-controlled oscillator is based on the voltage-frequency adjustment curve, combined with the feedback adjustment of the control signal generation circuit, so that the error between the feedback signal generated by the target clock signal output by the voltage-controlled oscillator and the reference clock signal meets the error standard of the phase-locked loop, and outputs an accurate target clock signal, which can solve the problem of frequency drift caused by the single voltage-frequency adjustment curve in the voltage-controlled oscillator when the ambient temperature changes in the related technology, and improve the stability of the phase-locked loop circuit.

[0097] The circuit structure of the phase-locked loop provided in this application is explained below. Figure 3 Schematic diagram of a phase-locked loop circuit according to an exemplary embodiment of the present application. Figure 3 As shown, the phase-locked loop circuit provided in the embodiment of the present application includes: a voltage-controlled oscillator 505 , a control signal generating circuit 500 , a control circuit 507 , and a voltage-controlled oscillator 505 .

[0098] The voltage controlled oscillator 505 is provided with an output terminal, and the voltage controlled oscillator 505 outputs a target clock signal from its output terminal;

[0099] The control signal generating circuit 500 is provided with a first input terminal, a second input terminal and an output terminal. The first input terminal of the control signal generating circuit 500 is electrically connected or coupled to the reference signal generating circuit, the second input terminal of the control signal generating circuit 500 is electrically connected to the output terminal of the voltage-controlled oscillator 505, the output terminal of the control signal generating circuit 500 is electrically connected to the input terminal of the voltage-controlled oscillator 505, the control signal generating circuit 500 obtains a reference clock signal and a feedback signal, and outputs a control voltage signal, wherein the feedback signal is a signal generated based on the target clock signal.

[0100] In this embodiment, the reference clock generation circuit is a clock and data recovery (CDR) module in the timing controller 50. The CDR module recovers the clock signal and data signal of the SOC signal output by the main controller 30, and the recovered clock signal is used as the reference clock signal. In some embodiments, the reference clock generation circuit includes a crystal oscillator.

[0101] The control voltage signal is an electrical signal determined based on the error between the reference clock signal and the feedback signal, and is used to control at least one of the frequency and phase of the output signal of the voltage controlled oscillator 505 .

[0102] The control circuit 507 is electrically connected to the control signal generating circuit 500, and the control circuit 507 obtains the control voltage signal, and after obtaining the temperature adjustment trigger signal, outputs the target bandwidth gating signal based on the ambient temperature and the control voltage signal;

[0103] In one embodiment, when the ambient temperature increases, the value of the regulation voltage signal obtained by the control circuit 507 increases; when the ambient temperature decreases, the value of the regulation voltage signal obtained by the control circuit 507 decreases.

[0104] The input end of the voltage-controlled oscillator 505 is electrically connected to the control signal generating circuit 500, and the control end of the voltage-controlled oscillator 505 is electrically connected to the control circuit 507. The voltage-controlled oscillator 505 corrects the target voltage-frequency adjustment curve applied by the voltage-controlled oscillator based on the target bandwidth selection signal, and adjusts the frequency of the target clock signal based on the control voltage signal and the target voltage-frequency adjustment curve.

[0105] In the above technical scheme, in the phase-locked loop circuit, after obtaining the temperature adjustment trigger signal, the control circuit outputs the corresponding bandwidth selection signal based on different ambient temperatures, so that the voltage-controlled oscillator corrects the target voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator based on different ambient temperatures, so that the target voltage-frequency adjustment curve can compensate for the error caused by the frequency drift. The voltage-controlled oscillator is based on the voltage-frequency adjustment curve, combined with the feedback adjustment of the control signal generating circuit, so that the error between the feedback signal generated by the target clock signal output by the voltage-controlled oscillator and the reference clock signal meets the error standard of the phase-locked loop, and outputs an accurate target clock signal, which can solve the problem of frequency drift caused by the single voltage-frequency adjustment curve in the voltage-controlled oscillator when the ambient temperature changes in the related technology, and improve the stability of the phase-locked loop circuit.

[0106] In some embodiments, the voltage-controlled oscillator 505 includes multiple voltage-frequency adjustment curves, which correspond to multiple bandwidth selection signals. The voltage-controlled oscillator 505 obtains a target bandwidth selection signal and a control voltage signal, and determines the corresponding target voltage-frequency adjustment curve based on the target bandwidth selection signal.

[0107] In the above technical scheme, by setting multiple voltage-frequency adjustment curves in the voltage-controlled oscillator, the corresponding accuracy of the frequency of the control voltage signal and the target clock signal set based on temperature drift under different ambient temperatures can be guaranteed, thereby ensuring the correction accuracy of the target voltage adjustment curve during the operation of the phase-locked loop circuit, so as to improve the accuracy of the target clock signal output by the phase-locked loop circuit.

[0108] Continue to refer Figure 3 As shown in the circuit structure, in some embodiments, the control signal generating circuit 500 includes a frequency detector 502 , a charge pump 503 , and a signal conditioning circuit 506 .

[0109] The phase frequency detector 502 has a first input terminal and a second input terminal. The first input terminal of the phase frequency detector 502 is electrically connected or coupled to the reference clock generation circuit, and the second input terminal of the phase frequency detector 502 is electrically connected to the output terminal of the voltage controlled oscillator 505.

[0110] The frequency detector 502 obtains a reference clock signal from its first input terminal, obtains a feedback signal from its second input terminal, and outputs an error signal between the reference clock signal and the feedback signal; the feedback signal is a signal generated based on the target clock signal;

[0111] In some embodiments, the error signal includes at least one of a phase error signal and a frequency error signal.

[0112] In some embodiments, the phase frequency detector 502 is electrically connected to the voltage controlled oscillator 505 , the phase of the feedback signal is the same as the phase of the target clock signal, and the frequency of the feedback signal is the same as the frequency of the target clock signal.

[0113] In some embodiments, the frequency detector 502 and the voltage-controlled oscillator 505 are coupled, and a signal processing circuit is electrically connected in the middle. The signal processing circuit obtains a target clock signal and generates a feedback signal. The frequency of the feedback signal is determined based on the target clock signal and a preset frequency processing rule, and the phase of the feedback signal is determined based on the target clock signal and a preset phase processing rule.

[0114] In some embodiments, the frequency of the feedback signal is a sub-clock signal in the target clock signal that is within a preset frequency range;

[0115] In some embodiments, the phase of the feedback signal is the same as the phase of the target clock signal;

[0116] In some embodiments, there is a preset phase difference between the phase of the feedback signal and the phase of the target clock signal.

[0117] The input end of the charge pump 503 is electrically connected to the output end of the frequency detector 502, and the charge pump 503 obtains the error signal and outputs a first voltage signal; wherein the first voltage signal is an initial electrical signal for regulating the frequency of the clock signal output by the voltage-controlled oscillator 505;

[0118] In some embodiments, the first voltage signal corresponds to the error signal, and the larger the absolute value of the error signal is, the larger the absolute value of the first voltage signal is.

[0119] The input end of the signal conditioning circuit 506 is electrically connected to the output end of the charge pump 503 , and the signal conditioning circuit 506 obtains the first voltage signal and outputs a control voltage signal; wherein the control voltage signal is a control signal generated based on the first voltage signal.

[0120] The effect of the voltage controlled oscillator 505 regulating the frequency of the target clock signal based on the regulation voltage signal is better than the effect of the voltage controlled oscillator 505 regulating the frequency of the target clock signal based on the first voltage signal.

[0121] The following further explains the setting relationship of multiple voltage-frequency adjustment curves in the voltage-controlled oscillator, the control circuit, and the frequency regulation process of the voltage-controlled oscillator based on the voltage-frequency adjustment curves.

[0122] The schematic diagram of setting the multiple voltage frequency adjustment curves in the voltage controlled oscillator 505 is as follows: Figure 4 shown.

[0123] The bandwidth selection signal provided by the control circuit 507 is an n-bit digital electrical signal, and the number of bandwidth selection signals is 2. n .

[0124] Correspondingly, the number of voltage-frequency adjustment curves set in the voltage-controlled oscillator 505 is less than or equal to the number of bandwidth gating signals.

[0125] exist Figure 4 In the schematic diagram shown, the number of voltage-frequency adjustment curves set in the voltage-controlled oscillator 505 is 2 n When n is 6, the corresponding relationship between the bandwidth gating signal and the name of the corresponding voltage-frequency adjustment curve (VF curve) is shown in Table 1.

[0126] Table 1

[0127]

[0128] The voltage ranges of the control voltage signals corresponding to the multiple voltage-frequency adjustment curves are the same. For the same control voltage signal, different voltage-frequency adjustment curves have different frequencies determined based on the control voltage signal.

[0129] In some embodiments, reference Figure 4 In the schematic diagram shown, for the same regulation voltage signal, the larger the value of the bandwidth gating signal corresponding to the voltage-frequency regulation curve is, the larger the frequency value determined by the regulation voltage signal in the voltage-frequency regulation curve is;

[0130] In other embodiments, for the same regulation voltage signal, the smaller the value of the bandwidth gating signal corresponding to the voltage-frequency regulation curve is, the smaller the frequency value of the regulation voltage signal determined in the voltage-frequency regulation curve is;

[0131] In some embodiments, the value variation trend of the bandwidth gating signal corresponding to the voltage-frequency adjustment curve and the frequency value variation trend of the same regulation voltage signal determined in the voltage-frequency adjustment curve follow a preset rule.

[0132] In some embodiments, among the multiple voltage-frequency adjustment curves, two adjacent voltage-frequency adjustment curves include a first voltage-frequency adjustment curve and a second voltage-frequency adjustment curve, and for the same control voltage signal, a first frequency corresponding to the control voltage signal in the first voltage-frequency adjustment curve is greater than a second frequency corresponding to the control voltage signal in the second voltage-frequency adjustment curve;

[0133] The minimum frequency of the first voltage-frequency adjustment curve is greater than or equal to the maximum frequency of the second voltage-frequency adjustment curve.

[0134] For example, in the adjacent first voltage-frequency adjustment curve VF(1) and the second voltage-frequency adjustment curve VF(0), for the same control voltage signal, the frequency value determined on VF(1) is always greater than the frequency value determined on VF(0), and the minimum frequency value of VF(1) (the value of the minimum control voltage signal VL on VF(1)) is less than or equal to the maximum frequency value of VF(0) (the value of the maximum control voltage signal VH on VF(0)).

[0135] In the above technical solution, in two adjacent voltage-frequency adjustment curves, when the frequency value determined by the same control voltage signal in the first voltage-frequency adjustment curve is greater than the frequency value determined in the second voltage-frequency adjustment curve, the minimum frequency of the first voltage-frequency adjustment curve is greater than the maximum frequency of the second voltage-frequency adjustment curve, thereby ensuring the continuity of the frequency change between the two curves, thereby ensuring the accuracy of the frequency adjustment of the phase-locked loop.

[0136] In some embodiments, the first regulated voltage signal corresponds to a third frequency in the first voltage-frequency regulation curve;

[0137] The second regulating voltage signal corresponds to a third frequency in the second voltage-frequency regulating curve,

[0138] The third frequency is greater than or equal to the minimum frequency of the first voltage-frequency adjustment curve;

[0139] The third frequency is less than or equal to the maximum frequency of the second voltage-frequency adjustment curve.

[0140] Continue to refer Figure 4 As shown in the curve diagram, the frequency of the control voltage signal V1 determined in the second voltage-frequency adjustment curve VF(0) is equal to the frequency of the control voltage signal V2 determined in the first voltage-frequency adjustment curve VF(1), and the frequency is the third frequency. The third frequency is less than or equal to the maximum frequency of the maximum control voltage signal VH determined in the second voltage-frequency adjustment curve VF(0), and greater than or equal to the minimum frequency of the minimum control voltage signal VL determined in the first voltage-frequency adjustment curve VF(1).

[0141] In some embodiments, the voltage-frequency regulation curves are parallel.

[0142] In some embodiments, in the voltage-frequency adjustment curve, the voltage value and frequency of the regulated voltage signal are in a linear relationship.

[0143] In some embodiments, V1=VL+a×(VHVL); V2=VL+b×(VHVL).

[0144] In some embodiments, a+b=1;

[0145] In some embodiments, V1 = VL + 0.9 × (VHVL), V2 = VL + 0.1 × (VHVL).

[0146] In some embodiments, each voltage-frequency adjustment curve is correspondingly set with a first temperature threshold and a second temperature threshold;

[0147] After obtaining the temperature adjustment trigger signal, the control circuit 507 outputs a first target bandwidth gating signal to enable the voltage-controlled oscillator 505 to apply the first voltage-frequency adjustment curve when the voltage-controlled oscillator 505 applies the second voltage-frequency adjustment curve, and the ambient temperature is greater than or equal to the first temperature threshold corresponding to the second voltage-frequency adjustment curve, and the control voltage signal is greater than or equal to the second control voltage signal;

[0148] Otherwise, when the voltage-controlled oscillator 505 applies the second voltage-frequency adjustment curve and the ambient temperature is less than the first temperature threshold corresponding to the second voltage-frequency adjustment curve, the voltage-controlled oscillator 505 is kept applying the second voltage-frequency adjustment curve, and the control voltage signal exceeding the second control voltage signal is still determined to have a corresponding frequency in the second voltage-frequency adjustment curve;

[0149] Alternatively, when the voltage-controlled oscillator 505 applies the second voltage-frequency adjustment curve and the control voltage signal is less than the second control voltage signal, the voltage-controlled oscillator 505 continues to apply the second voltage-frequency adjustment curve; and no curve change occurs when the ambient temperature is greater than or equal to the first temperature threshold corresponding to the second voltage-frequency adjustment curve.

[0150] When the voltage-controlled oscillator 505 applies the first voltage-frequency adjustment curve, and the ambient temperature is lower than the second temperature threshold corresponding to the first voltage-frequency adjustment curve, and the control voltage signal is lower than the first control voltage signal, a second target bandwidth selection signal is output to enable the voltage-controlled oscillator 505 to apply the second voltage-frequency adjustment curve.

[0151] Otherwise, when the voltage-controlled oscillator 505 applies the first voltage-frequency adjustment curve and the ambient temperature is greater than or equal to the second temperature threshold corresponding to the second voltage-frequency adjustment curve, the voltage-controlled oscillator 505 is kept applying the first voltage-frequency adjustment curve, and the control voltage signal lower than the first control voltage signal still determines the corresponding frequency in the first voltage-frequency adjustment curve;

[0152] Alternatively, when the voltage-controlled oscillator 505 applies the first voltage-frequency adjustment curve and the control voltage signal is greater than or equal to the first control voltage signal, the voltage-controlled oscillator 505 maintains the application of the first voltage-frequency adjustment curve; no curve change will occur when the ambient temperature is less than the second temperature threshold corresponding to the first voltage-frequency adjustment curve.

[0153] For example: The relationship between the frequency change and the bandwidth gating signal change in the voltage-frequency adjustment curve is as Figure 4 shown as a positive correlation. When the ambient temperature rises, when the ambient temperature ≥ the first temperature threshold corresponding to VF(i), it is judged whether the control voltage signal Vctrol ≥ the V1(i) value of VF(i). When the control voltage signal Vctrol ≥ V1(i), the bandwidth gating signal output by the control circuit 507 is +1, and the voltage-frequency adjustment curve applied in the voltage-controlled oscillator 505 changes from the curve VF(i) to the curve VF(i + 1);

[0154] When the control voltage signal Vctrol < V1(i), the bandwidth gating signal output by the control circuit 507 remains unchanged, and the voltage-controlled oscillator 505 continues to maintain the curve VF(i).

[0155] When the ambient temperature rise < the first temperature threshold, the bandwidth gating signal output by the control circuit 507 remains unchanged, and the voltage-controlled oscillator 505 continues to maintain the curve VF(i).

[0156] When the ambient temperature drops, when the ambient temperature ≤ the second temperature threshold corresponding to VF(i), it is judged whether the control voltage signal Vctrol ≤ the V2(i) value of VF(i). When the control voltage signal Vctrol ≤ V2(i), the bandwidth gating signal output by the control circuit 507 is -1, and the voltage-frequency adjustment curve applied in the voltage-controlled oscillator 505 changes from the curve VF(i) to the curve VF(i - 1);

[0157] When the control voltage signal Vctrol > V2(i), the bandwidth gating signal output by the control circuit 507 remains unchanged, and the control circuit 507 continues to maintain the curve VF(i).

[0158] When the ambient temperature > the second temperature threshold, the bandwidth gating signal output by the control circuit 507 remains unchanged, and the control circuit 507 continues to maintain the curve VF(i).

[0159] In the above technical solution, after the control circuit obtains the temperature adjustment trigger signal, when the ambient temperature is greater than or equal to the first temperature threshold corresponding to the voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator and the control voltage signal is greater than or equal to the second control voltage signal, it is determined that the voltage-frequency adjustment curve has an over-temperature drift, and it is necessary to select an adjacent voltage-frequency adjustment curve with a uniformly increased frequency value as the current voltage-frequency adjustment curve so that the voltage-controlled oscillator outputs a larger frequency to meet the frequency output requirement; when the ambient temperature is lower than the second temperature threshold corresponding to the voltage-frequency adjustment curve currently applied by the voltage-controlled oscillator and the control voltage signal is lower than the first control voltage signal, it is determined that the voltage-frequency adjustment curve has an over-temperature drift, and it is necessary to select an adjacent voltage-frequency adjustment curve with a uniformly decreased frequency value as the current voltage-frequency adjustment curve so that the voltage-controlled oscillator outputs a smaller frequency to meet the frequency output requirement and ensure the accuracy of the output frequency.

[0160] In some embodiments, after the phase-locked loop circuit is started, no temperature adjustment trigger signal is obtained, and the control circuit 507 outputs a third target bandwidth gating signal based on the control voltage signal;

[0161] In some embodiments, the phase-locked loop circuit is located in the display device. When the display device is started, the phase-locked loop circuit is started, the control circuit 507 does not obtain the temperature adjustment trigger signal, and the control circuit 507 only outputs the third target bandwidth selection signal based on the control voltage signal.

[0162] The voltage controlled oscillator 505 determines a corresponding third voltage-frequency adjustment curve based on the third target bandwidth gating signal;

[0163] The voltage controlled oscillator 505 adjusts the frequency of the target clock signal based on the third voltage frequency adjustment curve and the control voltage signal so that the phase locked loop circuit is locked;

[0164] When the phase-locked loop circuit is locked, the phase of the feedback signal generated based on the target clock signal is the same as the phase of the reference clock signal, and the frequency of the feedback signal generated based on the target clock signal is the same as the frequency of the reference clock signal.

[0165] After the phase-locked loop circuit is locked, the control circuit 507 obtains the temperature adjustment trigger signal, so that the phase-locked loop circuit performs corresponding regulation based on the frequency regulation method after obtaining the temperature adjustment trigger signal in the above-mentioned embodiment.

[0166] In some embodiments, the voltage controlled oscillator 505 does not output a locking signal when the phase-locked loop circuit is not locked; the voltage controlled oscillator 505 outputs a locking signal after the phase-locked loop circuit is locked. The locking signal can be used as a temperature adjustment trigger signal.

[0167] In the above technical solution, after the phase-locked loop circuit is started, when the temperature adjustment trigger signal is not obtained, the control circuit controls the voltage-controlled oscillator to select the third voltage-frequency adjustment curve based on the regulation voltage signal, and the target clock signal output based on the third voltage-frequency adjustment curve is fed back to the frequency detector and the phase detector. The feedback signal can achieve the same goal as the reference clock signal, so that the phase-locked loop circuit can quickly achieve the locking of the phase-locked loop circuit without considering the influence of ambient temperature factors, thereby improving the adjustment efficiency of the phase-locked loop circuit.

[0168] In some embodiments, the control circuit 507 outputs a plurality of bandwidth gating signals one by one in a preset sequence until the phase-locked loop circuit is locked;

[0169] The preset order includes an order in which the values ​​of the bandwidth gating signals increase or an order in which the values ​​of the bandwidth gating signals decrease.

[0170] In some embodiments, the control circuit 507 is provided with a frequency direction selection module, and the frequency direction selection module is used to set the preset order, wherein the preset order is adjustable.

[0171] In some embodiments, when the preset sequence set by the frequency direction selection module is the order of increasing values, after the display device starts the voltage-controlled oscillator 505, the control circuit 507 outputs the n-bit bandwidth selection signal in sequence from 0 based on the preset sequence set by the frequency direction selection module. Then, the voltage-frequency adjustment curve of the voltage-controlled oscillator 505 changes successively according to VF(0), VF(1), VF(2), VF(3)... until the phase-locked loop circuit is locked. When the phase-locked loop circuit is locked, the voltage-controlled oscillator 505 determines the third voltage-frequency adjustment curve.

[0172] In some embodiments, the third voltage-frequency adjustment curve is 2 from small to large. n The first one of the voltage-frequency adjustment curves is a curve that can achieve the target frequency of the target clock signal corresponding to the reference frequency set by the reference clock signal.

[0173] For example, the phase frequency detector 502 and the voltage controlled oscillator 505 are electrically connected or coupled, and when the phase-locked loop circuit is locked, the frequency of the feedback signal generated based on the reference clock signal is the same as the frequency of the target clock signal, and the phase of the reference clock signal is the same as the phase of the feedback signal. Then, the third voltage-frequency adjustment curve is a curve with the smallest corresponding bandwidth gating signal among the multiple voltage-frequency adjustment curves that can realize the frequency of the reference clock signal.

[0174] In other embodiments, when the preset sequence set by the frequency direction selection module is the order of decreasing values, after the voltage controlled oscillator 505 is started up on the display device, the control circuit 507 selects the voltage controlled oscillator 505 from (2 n-1) and output n bit bandwidth selection signals in descending order, the voltage-frequency adjustment curve of the voltage-controlled oscillator 505 is as follows: VF(2 n -1)、VF(2 n -2)、VF(2 n -3)、VF(2 n -4) ...changes are made successively until the phase-locked loop circuit is locked. When the phase-locked loop circuit is locked, the voltage-controlled oscillator 505 determines the third voltage-frequency adjustment curve.

[0175] In some embodiments, the third voltage-frequency adjustment curve is 2 from large to small. n The first one of the voltage-frequency adjustment curves is a curve that can achieve the target frequency of the target clock signal corresponding to the reference frequency set by the reference clock signal.

[0176] For example, the phase frequency detector 502 and the voltage controlled oscillator 505 are electrically connected or coupled, and when the phase-locked loop circuit is locked, the frequency of the feedback signal generated based on the reference clock signal is the same as the frequency of the target clock signal, and the phase of the reference clock signal is the same as the phase of the feedback signal. Then, the third voltage-frequency adjustment curve is the curve with the largest corresponding bandwidth gating signal among the multiple voltage-frequency adjustment curves that can realize the frequency of the reference clock signal.

[0177] In some embodiments, the timing controller sequentially outputs a frame header, driving data, and a frame tail in each frame display period, and the driving data includes backlight driving data or display driving data;

[0178] The phase-locked loop circuit switches the voltage-frequency adjustment curve applied by the voltage-controlled oscillator at the beginning or end of the frame.

[0179] In some embodiments, reference Figure 5 In the circuit structure shown, the control circuit 507 includes a temperature sensor 5071. After obtaining a temperature adjustment trigger signal, the temperature sensor 5071 outputs an ambient temperature signal;

[0180] When the temperature sensor 5071 does not receive the temperature adjustment trigger signal, it does not work or works but does not output the ambient temperature signal.

[0181] In some embodiments, the control circuit 507 includes a voltage sampler 5072 and a logic controller 5073. The input end of the voltage sampler 5072 is electrically connected to the output end of the signal conditioning circuit 506 and the input end of the voltage controlled oscillator 505. The output end of the voltage sampler 5072 is electrically connected to the input end of the logic controller 5073. The voltage sampler 5072 samples the control voltage signal and outputs the control voltage signal. The control voltage signal is an analog electrical signal, and the control voltage signal is a digital electrical signal.

[0182] In some embodiments, the voltage sampling circuit 5072 includes an analog-to-digital conversion circuit for converting the sampled analog electrical signal (regulating voltage signal) into a digital electrical signal to meet the input requirements of the logic controller 5073 .

[0183] In some embodiments, the voltage sampling circuit 5072 also includes a voltage divider circuit, the input end of the voltage divider circuit is electrically connected to the output end of the signal conditioning circuit 506, the output end of the voltage divider circuit is electrically connected to the input end of the analog-to-digital conversion circuit, the voltage divider circuit divides the voltage value of the control voltage signal, and the divided electrical signal is used as the sampled voltage value to meet the input range of the analog-to-digital conversion circuit.

[0184] The input end of the logic controller 5073 is also electrically connected to the temperature sensor 5071. When the ambient temperature signal is not obtained, the logic controller 5073 obtains the control voltage signal and outputs the bandwidth selection signal in a preset order until the target bandwidth selection signal is output. This processing process is the same as the process of determining the third voltage-frequency adjustment curve based on the frequency direction selection module in the aforementioned embodiment, and will not be repeated here.

[0185] After obtaining the ambient temperature signal, the logic controller 5073 adjusts the target bandwidth gating control signal based on the ambient temperature signal and the control voltage signal. This processing process is the same as the process in the aforementioned embodiment where the control circuit 507 outputs the target bandwidth gating signal based on the ambient temperature and the control voltage signal after obtaining the temperature trigger signal, and will not be described in detail here.

[0186] In some embodiments, reference Figure 6 In the circuit structure shown, the phase-locked loop circuit further includes a frequency divider 508 .

[0187] The input end of the frequency divider 508 is electrically connected to the output end of the voltage controlled oscillator 505, and the output end of the frequency divider 508 is electrically connected to the second input end of the frequency detector 502. The frequency divider 508 obtains the target clock signal, divides the target clock signal, and outputs a feedback signal.

[0188] In some embodiments, the frequency of the feedback signal output by the frequency divider 508 is less than the frequency of the target clock signal.

[0189] In the above technical solution, the frequency divider 508 can increase the frequency range of the clock signal that can be processed by the phase-locked loop circuit.

[0190] In some embodiments, the signal conditioning circuit 506 includes a low-pass filter 504, the input end of the low-pass filter 504 is electrically connected to the output end of the charge pump 503, the low-pass filter 504 obtains the first voltage signal, filters out the high-frequency component of the first voltage signal, and outputs a second voltage signal;

[0191] The regulation voltage signal is a signal determined based on the second voltage signal.

[0192] In the above technical solution, the low-pass filter can filter out high-frequency noise, smooth the control signal, and adjust the loop response time.

[0193] In some embodiments, the output end of the low-pass filter 504 is used as the output end of the signal conditioning circuit 506, and the regulated voltage signal is a second voltage signal.

[0194] In some embodiments, reference Figure 7 In the circuit structure shown, the signal conditioning circuit 506 further includes a frequency adjustment module 509, a first end of the frequency adjustment module 509 is electrically connected to the output end of the low-pass filter 504, and a second end of the frequency adjustment module 509 is electrically connected to the input end of the voltage-controlled oscillator 505;

[0195] The frequency adjustment module 509 outputs a coarse adjustment voltage signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is greater than a preset frequency threshold;

[0196] When the absolute value of the frequency difference between the feedback signal and the reference clock signal is less than or equal to a preset frequency threshold, outputting a fine adjustment voltage signal;

[0197] The regulation voltage signal includes a coarse regulation voltage signal or a fine regulation voltage signal.

[0198] In the above technical solution, when the error between the feedback signal and the reference clock signal is large, the frequency adjustment module outputs a coarse adjustment voltage signal to increase the frequency adjustment speed of the voltage-controlled oscillator; after the error between the feedback signal and the reference clock signal is reduced, the frequency adjustment module outputs a fine adjustment voltage signal to ensure the frequency adjustment accuracy of the voltage-controlled oscillator.

[0199] In some embodiments, the coarse adjustment voltage signal is a preset voltage signal;

[0200] The fine adjustment voltage signal is a second voltage signal.

[0201] In some embodiments, the frequency adjustment module 509 includes a first controllable switch device S1 and a second controllable switch device S2;

[0202] A first end of the first controllable switch device S1 is electrically connected to an output end of the low-pass filter 504, a second end of the first controllable switch device S1 is electrically connected to an input end of the voltage-controlled oscillator 505, a control end of the first controllable switch device S1 is electrically connected to a logic controller 5073, and the logic controller 5073 is electrically connected to a first input end and a second input end of the frequency and phase detector 502;

[0203] The logic controller 5073 outputs a first on control signal and a second off control signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is greater than a preset frequency threshold;

[0204] The logic controller 5073 outputs a first turn-off control signal and a second turn-on control signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is less than or equal to a preset frequency threshold;

[0205] The first controllable switch device S1 is turned on when receiving the first turn-on control signal to output a second voltage signal;

[0206] The first controllable switch device S1 is turned off when receiving the first turn-off control signal;

[0207] A first end of the second controllable switch device S2 is electrically connected to the power circuit Vref, a second end of the second controllable switch device S2 is electrically connected to the voltage-controlled oscillator 505, and the second controllable switch device S2 is turned on when receiving the second turn-on control signal, and outputs a preset voltage signal provided by the power circuit Vref;

[0208] The second controllable switch device S2 is turned off when receiving the second turn-off control signal.

[0209] The present application also provides a display device, the circuit structure of the display device is as follows Figure 1 As shown, it includes a controller, a display panel 40, and a backlight panel 10, and the controller is electrically connected to the display panel 40 and the backlight panel 10;

[0210] In some embodiments, the controller includes a main controller 30 and a timing controller 50 , and the timing controller 50 includes the phase-locked loop circuit 501 in the aforementioned embodiments.

[0211] In some embodiments, the timing controller 50 sequentially outputs a frame header, driving data, and a frame tail in each frame display period, and the driving data includes backlight driving data or display driving data;

[0212] The phase-locked loop circuit 501 switches the voltage-frequency adjustment curve applied by the voltage-controlled oscillator at the beginning or the end of the frame.

[0213] In the above technical solution, the phase-locked loop circuit switches the voltage-frequency adjustment curve applied by the voltage-controlled oscillator at the beginning or end of the frame, thereby avoiding the phenomenon that the voltage-frequency adjustment curve changes during data transmission and causes data transmission loss or abnormality.

[0214] Those skilled in the art will readily appreciate other embodiments of the present application after considering the specification and practicing the invention disclosed herein. The present application is intended to cover any modification, use or adaptation of the present application, which follows the general principles of the present application and includes common knowledge or customary techniques in the art that are not disclosed in the present application. The specification and examples are intended to be exemplary only, and the true scope and spirit of the present application are indicated by the following claims.

[0215] It should be understood that the present application is not limited to the precise structures that have been described above and shown in the drawings, and that various modifications and changes may be made without departing from the scope thereof. The scope of the present application is limited only by the appended claims.

Claims

1. A phase-locked loop circuit, characterized in that: include: A voltage-controlled oscillator outputs a target clock signal; A control signal generating circuit is electrically connected to the reference clock generating circuit and the voltage-controlled oscillator, wherein the control signal generating circuit obtains a reference clock signal and a feedback signal and outputs a control voltage signal; The feedback signal is a signal generated based on the target clock signal; A control circuit is electrically connected to the control signal generating circuit, wherein the control circuit obtains the control voltage signal, and after obtaining the temperature adjustment trigger signal, outputs a target bandwidth gating signal based on the ambient temperature and the control voltage signal; The voltage-controlled oscillator is electrically connected to the control signal generating circuit and the control circuit, the voltage-controlled oscillator obtains the target bandwidth gating signal and the control voltage signal, and corrects the target voltage-frequency adjustment curve applied by the voltage-controlled oscillator based on the target bandwidth gating signal; Based on the regulation voltage signal and the target voltage-frequency adjustment curve, the frequency of the target clock signal is adjusted.

2. The phase-locked loop circuit according to claim 1, characterized in that: The voltage-controlled oscillator includes a plurality of voltage-frequency adjustment curves, and the plurality of voltage-frequency adjustment curves correspond to a plurality of bandwidth gating signals; The voltage-controlled oscillator selects a voltage-frequency adjustment curve corresponding to the target bandwidth gating signal from the multiple voltage-frequency adjustment curves as the target voltage-frequency adjustment curve.

3. The phase-locked loop circuit according to claim 2, characterized in that: The control signal generating circuit comprises: A phase frequency detector is electrically connected to the reference clock generation circuit and the voltage controlled oscillator, the phase frequency detector obtains the reference clock signal and the feedback signal, and outputs an error signal between the reference clock signal and the feedback signal; A charge pump is electrically connected to the frequency and phase detector, and the charge pump obtains the error signal and outputs a first voltage signal; A signal conditioning circuit is electrically connected to the charge pump, the control circuit, and the voltage-controlled oscillator, and the signal conditioning circuit outputs the regulated voltage signal based on the first voltage signal.

4. The phase-locked loop circuit according to claim 2 or 3, characterized in that: Among the plurality of voltage-frequency adjustment curves, two adjacent voltage-frequency adjustment curves include a first voltage-frequency adjustment curve and a second voltage-frequency adjustment curve; For the same regulation voltage signal, a first frequency corresponding to the regulation voltage signal in the first voltage-frequency regulation curve is greater than a second frequency corresponding to the regulation voltage signal in the second voltage-frequency regulation curve; The minimum frequency of the first voltage-frequency adjustment curve is greater than or equal to the maximum frequency of the second voltage-frequency adjustment curve.

5. The phase-locked loop circuit according to claim 4, characterized in that: The first regulating voltage signal corresponds to a third frequency in the first voltage-frequency regulating curve; The second regulating voltage signal corresponds to the third frequency in the second voltage-frequency regulating curve; The third frequency is greater than or equal to the minimum frequency of the first voltage-frequency adjustment curve; The third frequency is less than or equal to the maximum frequency of the second voltage-frequency adjustment curve; Each of the voltage-frequency adjustment curves is correspondingly set with a first temperature threshold and a second temperature threshold; After obtaining the temperature adjustment trigger signal, the control circuit outputs a first target bandwidth gating signal to enable the voltage controlled oscillator to apply the first voltage frequency adjustment curve when the voltage controlled oscillator applies the second voltage frequency adjustment curve, and the ambient temperature is greater than or equal to the first temperature threshold corresponding to the second voltage frequency adjustment curve, and the control voltage signal is greater than or equal to the second control voltage signal; When the voltage-controlled oscillator applies the first voltage-frequency adjustment curve, and the ambient temperature is lower than a second temperature threshold corresponding to the first voltage-frequency adjustment curve, and the control voltage signal is lower than the first control voltage signal, a second target bandwidth selection signal is output to enable the voltage-controlled oscillator to apply the second voltage-frequency adjustment curve.

6. The phase-locked loop circuit according to claim 3, characterized in that: After the phase-locked loop circuit is started, if the temperature adjustment trigger signal is not obtained, the control circuit outputs a third target bandwidth gating signal based on the regulation voltage signal; The voltage controlled oscillator determines a corresponding third voltage-frequency adjustment curve based on the third target bandwidth gating signal; The voltage controlled oscillator adjusts the frequency of the target clock signal based on the third voltage frequency adjustment curve and the control voltage signal so as to lock the phase locked loop circuit; When the phase-locked loop circuit is locked, the phase of the feedback signal generated based on the target clock signal is the same as the phase of the reference clock signal, and the frequency of the feedback signal generated based on the target clock signal is the same as the frequency of the reference clock signal.

7. The phase-locked loop circuit according to claim 6, characterized in that: The control circuit outputs the plurality of bandwidth gating signals one by one in a preset sequence until the phase-locked loop circuit is locked; The preset sequence includes an order in which the values ​​of the bandwidth gating signals increase or an order in which the values ​​of the bandwidth gating signals decrease.

8. The phase-locked loop circuit according to claim 6, characterized in that: The control circuit comprises: The temperature sensor outputs an ambient temperature signal after obtaining the temperature adjustment trigger signal; A voltage sampler is electrically connected to the signal conditioning circuit and the voltage-controlled oscillator, and the voltage sampler samples the regulation voltage signal and outputs a control voltage signal; wherein the regulation voltage signal is an analog electrical signal, and the control voltage signal is a digital electrical signal; A logic controller is electrically connected to the temperature sensor and the voltage sampler. When the ambient temperature signal is not obtained, the logic controller obtains the control voltage signal and outputs bandwidth gating signals in a preset sequence until the target bandwidth gating signal is output; After obtaining the ambient temperature signal, the logic controller adjusts the target bandwidth gating control signal based on the ambient temperature signal and the control voltage signal.

9. The phase-locked loop circuit according to claim 3, characterized in that: The phase-locked loop circuit also includes: The frequency divider is electrically connected between the frequency detector and the voltage controlled oscillator. The frequency divider obtains the target clock signal, divides the frequency of the target clock signal, and outputs the feedback signal.

10. The phase-locked loop circuit according to claim 3, characterized in that: The signal conditioning circuit comprises: A low-pass filter, electrically connected to the charge pump, wherein the low-pass filter obtains the first voltage signal, filters out high-frequency components of the first voltage signal, and outputs a second voltage signal; The regulation voltage signal is a signal determined based on the second voltage signal.

11. The phase-locked loop circuit according to claim 10, characterized in that: The signal conditioning circuit further includes a frequency adjustment module electrically connected between the low-pass filter and the voltage-controlled oscillator; The frequency adjustment module outputs a coarse adjustment voltage signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is greater than a preset frequency threshold; When the absolute value of the frequency difference between the feedback signal and the reference clock signal is less than or equal to the preset frequency threshold, outputting a fine adjustment voltage signal; The control voltage signal includes the coarse control voltage signal or the fine control voltage signal.

12. The phase-locked loop circuit according to claim 11, wherein: The coarse adjustment voltage signal is a preset voltage signal; The fine adjustment voltage signal is the second voltage signal.

13. The phase-locked loop circuit according to claim 11, characterized in that: The frequency adjustment module includes a first controllable switch device and a second controllable switch device; The first end of the first controllable switch device is electrically connected to the low-pass filter, the second end of the first controllable switch device is electrically connected to the voltage-controlled oscillator, the control end of the first controllable switch device is electrically connected to the logic controller, and the logic controller is electrically connected to the frequency and phase detector; The logic controller outputs a first on-control signal and a second off-control signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is greater than the preset frequency threshold; The logic controller outputs a first turn-off control signal and a second turn-on control signal when the absolute value of the frequency difference between the feedback signal and the reference clock signal is less than or equal to the preset frequency threshold; The first controllable switch device is turned on when receiving the first turn-on control signal to output the second voltage signal; The first controllable switch device is turned off when the first turn-off control signal is obtained; The first end of the second controllable switch device is electrically connected to the power supply circuit, the second end of the second controllable switch device is electrically connected to the voltage-controlled oscillator, and the second controllable switch device is turned on when the second turn-on control signal is obtained, and outputs a preset voltage signal provided by the power supply circuit; The second controllable switch device is turned off when receiving the second turn-off control signal.

14. A display device, characterized in that: It includes a controller, a display panel and a backlight panel, wherein the controller is electrically connected to the display panel and the backlight panel; The controller comprises a timing controller, and the timing controller comprises a phase-locked loop circuit as claimed in any one of claims 1 to 13.

15. The display device according to claim 14, characterized in that: The timing controller sequentially outputs a frame header, driving data and a frame tail in each frame display period, wherein the driving data includes backlight driving data or display driving data; The phase-locked loop circuit switches the voltage-frequency adjustment curve applied by the voltage-controlled oscillator at the frame head or frame tail.

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