Large-bit-width-oriented LFSR construction method and system

Abstract

The invention discloses a large-bit-width-oriented LFSR construction method and system, and relates to the password and data security technology, and the method comprises the steps: configuring the internal state of the t-th step of a linear feedback shift register (LFSR) and an update function of the LFSR, and determining the state update of the LFSR according to the internal state and the update function; updating and selecting l m-level irreducible polynomials according to the state of the LFSR; calculating corresponding bit transformation matrixes according to the root of the irreducible polynomial, and calculating a diagonal matrix according to each bit transformation matrix; selecting l-dimensional permutation sigma, and constructing a block matrix formed by l * l m-dimensional matrixes according to the permutation sigma; and constructing a matrix G based on the block matrix and a unit matrix with a set dimension, and outputting the matrix G as a state transition matrix of the LFSR under the condition that a characteristic polynomial of the matrix G is a primitive polynomial. The method supports parallel computing, and has lower computing complexity and software and hardware implementation cost than LFSR in LOL.

Description

Technical Field

[0001] The present application relates to the field of cryptography and data security technology, and in particular to a method and system for constructing a large-bit-width LFSR. Background Art

[0002] With the continuous development of new technologies such as the Internet of Things, cloud computing, and big data, as well as the implementation of a series of application scenarios such as large-scale data centers, ultra-high-speed communications, and software-defined storage, more and more emerging fields have an increasingly urgent demand for cryptographic technology, especially ultra-high-speed cryptographic technology. Serial ciphers are an important type of symmetric encryption system that is easy to implement in software and hardware and has fast encryption and decryption speeds. They are suitable for new application scenarios such as encryption in environments with huge amounts of encrypted data and limited resources.

[0003] In 1949, Shannon published a paper titled "Communication Theory of Confidential Systems" in which he proposed the "one-time pad" cryptographic system and proved that the "one-time pad" cipher is theoretically unbreakable and absolutely secure under ciphertext-only attacks. Since the "one-time pad" cryptographic system faces many complex problems in actual application scenarios, such as key generation and management, people began to design various sequence ciphers to replace the "one-time pad" cryptographic system.

[0004] In the prior art, in 2000, NESSIE evaluated a total of six stream cipher algorithms, namely BMGL, Leviathan, LILI-128, SNOW 1.0, SOBER-t16 and SOBER-t32. However, these six algorithms had some security issues and ultimately did not recommend any stream cipher algorithm as an encryption standard.

[0005] In 2023, Feng Dengguo and others proposed a high-performance serial cryptographic design framework LOL (League of Legends) suitable for general platforms. The framework can meet the ultra-high-speed software encryption and decryption requirements in 5G / 6G virtual networks and resist quantum attacks. The LOL framework can be flexibly expanded according to the application scenario requirements, supports high parallel operations and SIMD / AES-NI instruction sets, and the software implementation rates of the two given LOL-MINI and LOL-DOUBLE instances can reach 89Gbps ​​and 135Gbps.

[0006] The research on sequence cipher mainly focuses on the linear feedback shift register (LFSR) and its extended sequence. As the core linear component of the sequence cipher algorithm, the main purpose of LFSR is to generate an initial random source with a large period. A linear random source sequence with good cryptographic properties needs to have the characteristics of large period, high linear complexity, and good correlation properties. The maximum period of the sequence generated by an n-level LFSR is 2n -1, if its period reaches 2 n -1, then this sequence is called m-sequence, and this LFSR is called the longest LFSR. LFSR mainly includes two forms: Fibonacci LFSR and Galois LFSR. The theory and method of the generating function based on the Galois field can fully characterize the period and linear complexity of the linear feedback shift register.

[0007] Although the traditional Fibonacci-type LFSR can generate a sequence that reaches the maximum period, it is not conducive to parallel implementation because its state is updated sequentially. In addition, there are problems such as the low throughput of the bit-based LFSR and the difficulty of the byte-based LFSR to reach the maximum period of its bit sequence. Summary of the invention

[0008] The embodiment of the present application provides a large-bit-width LFSR construction method and system, which is used to propose a new LFSR construction method based on the LFSR construction method proposed by LOL, which can support parallel computing when the generated sequence reaches the maximum period, and has lower computational complexity and software and hardware implementation cost than the LFSR in LOL.

[0009] The present application provides a method for constructing a large-bit-width LFSR, including:

[0010] Configure the internal state of the t-th step of a linear feedback shift register (LFSR) and an update function of the LFSR, and determine the state update of the LFSR according to the internal state and the update function;

[0011] Select l m-level irreducible polynomials according to the state update of LFSR;

[0012] According to the roots of the irreducible polynomial, a corresponding bit transformation matrix is ​​calculated, and a diagonal matrix is ​​calculated according to each bit transformation matrix;

[0013] Select an l-dimensional permutation σ, and construct a block matrix consisting of l×l m-dimensional matrices according to the permutation σ, so that the constructed block matrix satisfies the block position condition;

[0014] A matrix G is constructed based on the block matrix and a unit matrix of a set dimension, and when the characteristic polynomial of the matrix G is a primitive polynomial, the matrix G is output as the state transfer matrix of the LFSR, otherwise l m-level irreducible polynomials are repeatedly selected according to the state update of the LFSR.

[0015] Optionally, configuring the internal state of the LFSR at step t and the update function of the LFSR includes:

[0016] The internal state of the specified LFSR step t is divided into: in:

[0017]

[0018] Among them, a 4l-1 ,…,a 0 ∈F is a total of 4l (l>0) m-bit blocks, F is a finite field;

[0019] The update function of LFSR satisfies:

[0020]

[0021] Among them, C is a vector consisting of l m-order irreducible polynomial roots, and σ is an l-dimensional word-based permutation.

[0022] Optionally, according to the internal state and the update function, it is determined that the state update of the LFSR satisfies:

[0023]

[0024] Optionally, l m-level irreducible polynomials are selected according to the state update of the LFSR, including:

[0025] Select l m-level irreducible polynomials according to the state update of LFSR:

[0026] g 0 (y),…,g l (y), g i (y) = y m +b i,m-1 y m-1 +…+b i,0 ,0≤i≤m-1

[0027] Among them, g i (y) is a polynomial.

[0028] Optionally, calculating a corresponding bit transformation matrix according to the roots of the irreducible polynomial, and calculating a diagonal matrix according to each bit transformation matrix includes:

[0029] According to the irreducible polynomial g i The root α of (y) i Calculate the corresponding bit transformation matrix

[0030]

[0031] according to Compute the diagonal matrix Where 0 is an m-dimensional matrix of all zeros.

[0032] Optionally, selecting an l-dimensional permutation σ, and constructing a block matrix consisting of l×l m-dimensional matrices according to the permutation σ, so that the constructed block matrix satisfies the block position condition including:

[0033] Randomly select an l-dimensional permutation σ and construct a block matrix M consisting of l×l m-dimensional matrices based on the permutation σ σ , where the block matrix M σ When the block position is ((σ(i),i)(i=0,…,l-1), the block is the m-dimensional identity matrix I 16 , otherwise the block is a matrix of all 0s;

[0034] according to Compute the diagonal matrix Where 0 is an m-dimensional matrix of all zeros.

[0035] Optionally, a matrix G is constructed based on the block matrix and a unit matrix of a set dimension to satisfy:

[0036]

[0037] Among them, I lm is the lm-dimensional identity matrix;

[0038] Calculate the characteristic polynomial of the matrix G η(x) = det(xI 2lm -G), if η(x) is a primitive polynomial, the output matrix G is used as the state transfer matrix of LFSR.

[0039] The embodiment of the present application also proposes a large-bit-width LFSR construction system, including a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the large-bit-width LFSR construction method as described above are implemented.

[0040] The method of the embodiment of the present application proposes a new LFSR construction method based on the LFSR construction method proposed by LOL, which can support parallel computing when the generated sequence reaches the maximum period, and has lower computational complexity and software and hardware implementation cost than the LFSR in LOL.

[0041] The above description is only an overview of the technical solution of the present application. In order to more clearly understand the technical means of the present application, it can be implemented in accordance with the contents of the specification. In order to make the above and other purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0042] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present application. Also, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0043] Figure 1 The basic process diagram of the large-bit-width LFSR construction method according to the embodiment of the present application is shown;

[0044] Figure 2 This is a schematic diagram of the LFSR update function of an embodiment of the present application. DETAILED DESCRIPTION

[0045] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0046] The present application embodiment provides a method for constructing a large-bit-width LFSR. Figure 1 As shown, the following steps are included:

[0047] In step S101, the internal state of the t-th step of the linear feedback shift register (LFSR) and the update function of the LFSR are configured, and the state update of the LFSR is determined according to the internal state and the update function. The LFSR constructed in the embodiment of the present application is defined in the finite field F 2m The Galois LFSR on the 4l -1,…,a 0 ∈F, composition.

[0048] In some embodiments, configuring the internal state of the LFSR at step t and the update function of the LFSR includes: specifying that the internal state of the LFSR at step t is divided into: in:

[0049]

[0050] Among them, a 4l-1 ,…,a 0 ∈F is a total of 4l (l>0) m-bit blocks, F is a finite field;

[0051] The update function of LFSR satisfies:

[0052]

[0053] Among them, C is a vector consisting of l m-order irreducible polynomial roots, and σ is an l-dimensional word-based permutation.

[0054] In a specific example, according to the internal state and the update function, such as Figure 2 As shown, it is determined that the state update of the LFSR satisfies:

[0055]

[0056] In step S102, l m-level irreducible polynomials are selected according to the state update of the LFSR;

[0057] In some embodiments, selecting l m-level irreducible polynomials according to the state update of the LFSR includes:

[0058] Select l m-level irreducible polynomials according to the state update of LFSR:

[0059] g 0 (y),…,g l (y), g i (y) = y m +b i,m-1 y m-1 +…+b i,0 ,0≤i≤m-1

[0060] Among them, g i (y) is a polynomial.

[0061] In step S103, the corresponding bit transformation matrix is ​​calculated according to the roots of the irreducible polynomial, and the diagonal matrix is ​​calculated according to each bit transformation matrix.

[0062] Specifically, according to the irreducible polynomial g i The root α of (y) i Calculate the corresponding bit transformation matrix

[0063]

[0064] according to Compute the diagonal matrix Where 0 is an m-dimensional matrix of all zeros.

[0065] In step S104, an l-dimensional permutation σ is selected, and a block matrix consisting of l×l m-dimensional matrices is constructed according to the permutation σ, so that the constructed block matrix satisfies the block position condition.

[0066] Specifically, a random l-dimensional permutation σ is selected, and a block matrix M consisting of l×l m-dimensional matrices is constructed according to the permutation σ σ , where the block matrix Mσ When the block position is ((σ(i),i)(i=0,…,l-1), the block is the m-dimensional identity matrix I 16 , otherwise the block is a matrix of all 0s;

[0067] according to Compute the diagonal matrix Where 0 is an m-dimensional matrix of all zeros.

[0068] In step S105, a matrix G is constructed based on the block matrix and a unit matrix of a set dimension, and when the characteristic polynomial of the matrix G is a primitive polynomial, the matrix G is output as the state transfer matrix of the LFSR, otherwise l m-level irreducible polynomials are repeatedly selected according to the state update of the LFSR.

[0069] In some embodiments, constructing a matrix G based on the block matrix and a unit matrix of a set dimension satisfies:

[0070]

[0071] Among them, I lm is the lm-dimensional identity matrix;

[0072] Calculate the characteristic polynomial of the matrix G η(x) = det(xI 2lm -G), if η(x) is a primitive polynomial, the output matrix G is used as the state transfer matrix of LFSR.

[0073] The LFSR constructed based on this method supports parallel implementation of software and hardware, which is mainly reflected in the following two parts:

[0074] 1) Can be implemented in parallel;

[0075] 2) Can be split into l Parallel implementation of multiplication on .

[0076] The method of the embodiment of the present application proposes a new LFSR construction method based on the LFSR construction method proposed by LOL, which can support parallel computing when the generated sequence reaches the maximum period, and has lower computational complexity and software and hardware implementation cost than the LFSR in LOL. The method of the present application can construct LFSRs of different periods according to the value of l. When l=4, the LFSR period constructed by the method of the present application can reach 2 256 -1, when l=8, the constructed LFSR period can reach 2 512 -1.

[0077] The embodiment of the present application also proposes a specific example of a large-bit-width LFSR construction method. This example includes two construction examples of a 256-level LFSR and a 512-level LFSR. The construction steps of the 256-level LFSR are as follows:

[0078] Step 1: Let l = 4, and select 4 irreducible polynomials, which are

[0079] g 0 (y) = x 16 +x 14 +x 13 +x 12 +x 11 +x 8 +1

[0080] g 1 (y) = x 16 +x 15 +x 12 +x 10 +1

[0081] g 2 (y) = x 16 +x 13 +x 12 +x 11 +1

[0082] g 3 (y) = x 16 +x 14 +x 13 +x 11 +1

[0083] Step 2: Based on the irreducible polynomial g 0 (y),g 1 (y),g 2 (y),g 3 The root α of (y) 0 ,α 1 ,α 2 ,α 3 , construct the matrix And the diagonal matrix

[0084] Step 3: Select the replacement satisfy, Constructing the Matrix

[0085] Step 4: Construct the matrix Calculate the characteristic polynomial of G η(x) = det(xI 256 -G), we can get the primitive polynomial as:

[0086]

[0087] The construction steps of 512-level LFSR are as follows:

[0088] According to the above steps, when l=8, a 512-level LFSR can be constructed. The irreducible polynomial and permutation σ of the 512-level LFSR instance are selected as follows:

[0089] The irreducible polynomial is:

[0090] g 0 (y) = x 16 +x 13 +x 9 +x 5 +x 2 +x+1

[0091] g 1 (y) = x 16 +x 15 +x 13 +x 12 +x 11 +x 10 +x 7 +x 6 +x 5 +x 4 +1

[0092] g 2 (y) = x 16 +x 13 +x 11 +x 10 +x 7 +x 6 +x 5 +x+1

[0093] g 3 (y) = x 16 +x 15 +x 12 +x 6 +x 2 +x+1

[0094] g 4 (y) = x 16 +x 11 +x 9 +x 8 +x 6 +x 4 +1

[0095] g 5 (y) = x 16 +x 15 +x 14 +x 10 +x 8 +x7 +x 5 +x 4 +x 2 +x+1

[0096] g 6 (y) = x 16 +x 12 +x 11 +x 10 +x 9 +x 7 +x+1

[0097] g 7 (y) = x 16 +x 13 +x 10 +x 8 +x 2 +1

[0098] The permutation σ is:

[0099]

[0100] The corresponding characteristic polynomial is the primitive polynomial:

[0101]

[0102] This application proposes a LFSR construction method suitable for parallel implementation of software and hardware, and provides construction examples of 256-level LFSR and 512-level LFSR. The LFSR constructed based on this method has the advantages of supporting parallel operations, fast state update speed, and high throughput when the generated sequence reaches the maximum period, solving the problems of insufficient throughput and difficulty in parallel implementation of traditional LFSR. It further improves the efficiency of linear random source generation in the sequence cipher algorithm and provides new options for the diversity design of the sequence cipher algorithm.

[0103] The method of the present application has lower computational complexity and software and hardware implementation cost than LFSR in LOL when the generated sequence reaches the maximum period, further improving the efficiency of generating linear random sources in the sequence encryption algorithm.

[0104] The embodiment of the present application also proposes a large-bit-width LFSR construction system, including a processor and a memory, wherein the memory stores a computer program, and when the computer program is executed by the processor, the steps of the large-bit-width LFSR construction method as described above are implemented.

[0105] It should be noted that in the various embodiments of the present application, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "includes a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element.

[0106] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.

[0107] Through the description of the above implementation methods, those skilled in the art can clearly understand that the above-mentioned embodiment methods can be implemented by means of software plus a necessary general hardware platform, and of course by hardware, but in many cases the former is a better implementation method. Based on such an understanding, the technical solution of the present application, or the part that contributes to the prior art, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, a magnetic disk, or an optical disk), and includes a number of instructions for a terminal (which can be a mobile phone, a computer, a server, an air conditioner, or a network device, etc.) to execute the methods described in each embodiment of the present application.

[0108] The embodiments of the present application are described above in conjunction with the accompanying drawings, but the present application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of the present application, ordinary technicians in this field can also make many forms without departing from the purpose of the present application and the scope of protection of the claims, all of which are within the protection of the present application.

Claims

1. A method for constructing a large bit-width LFSR, characterized in that: include: Configure the internal state of the t-th step of a linear feedback shift register (LFSR) and an update function of the LFSR, and determine the state update of the LFSR according to the internal state and the update function; Select l m-level irreducible polynomials according to the state update of LFSR; According to the roots of the irreducible polynomial, a corresponding bit transformation matrix is ​​calculated, and a diagonal matrix is ​​calculated according to each bit transformation matrix; Select an l-dimensional permutation σ, and construct a block matrix consisting of l×l m-dimensional matrices according to the permutation σ, so that the constructed block matrix satisfies the block position condition; A matrix G is constructed based on the block matrix and a unit matrix of a set dimension, and when the characteristic polynomial of the matrix G is a primitive polynomial, the matrix G is output as the state transfer matrix of the LFSR, otherwise l m-level irreducible polynomials are repeatedly selected according to the state update of the LFSR.

2. The method for constructing a large bit width LFSR according to claim 1, wherein: The internal state of the LFSR at step t and the update function of the LFSR include: The internal state of the specified LFSR step t is divided into: in: Among them, a 4l-1 ,…,a0∈F is a total of 4l (l>0) m-bit blocks, F is a finite field; The update function of LFSR satisfies: Among them, C is a vector consisting of l m-order irreducible polynomial roots, and σ is an l-dimensional word-based permutation.

3. The method for constructing a large bit width LFSR according to claim 2, wherein: According to the internal state and the update function, it is determined that the state update of the LFSR satisfies:

4. The method for constructing a large bit width LFSR according to claim 3, wherein: According to the state update of LFSR, l m-level irreducible polynomials are selected, including: Select l m-level irreducible polynomials according to the state update of LFSR: g0(y),…,g l (y),g i (y)=y m +b i,m-1 y m-1 +…+b i,0 ,0≤i≤m-1 Among them, g i (y) is a polynomial.

5. The method for constructing a large bit width LFSR according to claim 4, wherein: According to the roots of the irreducible polynomial, the corresponding bit transformation matrix is ​​calculated, and the diagonal matrix is ​​calculated according to each bit transformation matrix, including: According to the irreducible polynomial g i The root α of (y) i Calculate the corresponding bit transformation matrix according to Compute the diagonal matrix Where 0 is an m-dimensional matrix of all zeros.

6. The method for constructing a large bit width LFSR according to claim 5, characterized in that: Select an l-dimensional permutation σ, and construct a block matrix consisting of l×l m-dimensional matrices according to the permutation σ, so that the constructed block matrix satisfies the block position conditions including: Randomly select an l-dimensional permutation σ and construct a block matrix M consisting of l×l m-dimensional matrices based on the permutation σ σ , where the block matrix M σ When the block position is ((σ(i),i)(i=0,…,l-1), the block is the m-dimensional identity matrix I 16 , otherwise the block is a matrix of all 0s; according to Compute the diagonal matrix Where 0 is an m-dimensional matrix of all zeros.

7. The method for constructing a large bit width LFSR according to claim 6, wherein: The matrix G is constructed based on the block matrix and the identity matrix of the set dimension to satisfy: Among them, I lm is the lm-dimensional identity matrix; Calculate the characteristic polynomial of the matrix G η(x) = det(xI 2lm -G), if η(x) is a primitive polynomial, the output matrix G is used as the state transfer matrix of LFSR.

8. A system for constructing a large bit width LFSR, characterized in that: The invention comprises a processor and a memory, wherein a computer program is stored in the memory, and when the computer program is executed by the processor, the steps of the large-bit-width LFSR construction method according to any one of claims 1 to 7 are implemented.

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