Simulator-based OS network data processing mechanism simulation system and simulation method

Abstract

The invention provides an OS network data processing mechanism simulation system and simulation method based on a simulator. The simulation system comprises a node, network equipment, a channel, an application program, a protocol stack, a data packet structure, a hardware resource management module and a processing simulation module. The hardware resource management module is used for providing hardware resources and corresponding hardware parameters for the processing simulation module; the processing simulation module generates a simulation model of the OS network data under a preset processing mechanism based on the preset processing mechanism and functions of functions in a simulator, and generates a simulation instance according to the simulation model, the hardware resources and the corresponding hardware parameters; the nodes comprise the hardware resources, the network device, the application program, the data packet structure, the protocol stack and the simulation instance, and the nodes are connected through the channels. According to the method, the simulation process of network data processing is relatively high in flexibility and expandability.

Description

Technical Field

[0001] The present invention relates to the field of network simulation, and in particular to a simulator-based OS network data processing mechanism simulation system and simulation method. Background Art

[0002] With the development of Internet of Things technology, various intelligent terminals need to be connected through the network, and these intelligent terminals have high requirements for the real-time performance of network data. The operating systems on existing intelligent terminals have added various new network technologies to improve network performance. In order to verify the improvement of network performance by these technologies and make subsequent improvements, it is necessary to test in a network environment. However, testing in a real environment will incur a large cost. For example, building an intelligent industrial robot platform requires a lot of resources and manpower. Therefore, in order to reduce testing costs and improve efficiency, a network simulator is needed to perform simulation testing.

[0003] There are many network simulation simulators, such as ns-3, OPNET, GloMoSim, SSFNet, etc. However, in the process of modeling the network environment, the existing simulators still have inaccurate modeling, especially when processing OS network data, and the simulation results are quite different from the results of the real network environment, which reduces the accuracy and efficiency of the test. Summary of the invention

[0004] In order to solve the above problems, the present invention proposes a simulator-based OS network data processing mechanism simulation system and simulation method.

[0005] According to the first aspect, the present invention provides an OS network data processing mechanism simulation system based on a simulator, comprising: nodes, network devices, channels, applications, protocol stacks and data packet structures, and also comprising a hardware resource management module and a processing simulation module; the hardware resource management module is used to provide hardware resources and corresponding hardware parameters for the processing simulation module; the processing simulation module generates a simulation model of the OS network data under the preset processing mechanism based on the preset processing mechanism and the functions of the functions in the simulator, and generates a simulation instance based on the simulation model, the hardware resources and the corresponding hardware parameters; the node includes the hardware resources, the network device, the application, the data packet structure, the protocol stack and the simulation instance, and each node is connected through the channel.

[0006] Preferably, the hardware resource management module includes a resource unit, a resource management unit and a resource processing unit; the resource unit includes hardware resources and their corresponding hardware parameters; the resource management unit is used to manage the total amount of each type of hardware resources and their current available amount; the resource processing unit is used to apply for hardware resources and their corresponding hardware parameters from the resource management unit.

[0007] Preferably, the hardware resources include a processor, a cache memory, a memory, a network card and a bus; the hardware parameters include a cache line size, a bus bandwidth, a memory bandwidth, a memory space, and a processing rate of the processor.

[0008] Preferably, the processing simulation module includes a processing function simulation unit and a storage function simulation unit; the processing function simulation unit includes a number of sub-units with different processing functions; according to the working principle of the preset processing mechanism, a combination is selected from the sub-units, and the functions in the selected sub-units are set based on the functions in the simulator to generate a simulation model simulating the processing function in the preset processing mechanism; the storage function simulation unit includes: a control structure, a storage space block; according to the working principle of the preset processing mechanism, the combination and interaction form of the control structure and the storage space block are determined to generate a simulation model simulating the storage function in the preset processing mechanism; the simulation model of the processing function and the simulation model of the storage function constitute a simulation model of the OS network data under the preset processing mechanism.

[0009] Preferably, the processing function unit includes: a network card processing subunit, an interrupt processing subunit, a polling processing subunit, a data copy processing subunit, a protocol stack processing subunit, and an application processing subunit; the network card processing unit is used to pass the data packet to the data copy processing unit; the interrupt processing unit is used to simulate the interrupt processing process triggered after the data packet is transferred to the buffer; the polling processing unit is used to simulate the process of polling and reading the data packet from the buffer after the interrupt processing is completed; the data copy unit is used to simulate the process of data packet transmission from the network card to the memory, or the process of data packet transmission from the network card to the cache memory, or the process of data packet transmission from the memory to the cache memory; the protocol stack processing unit is used to simulate the processing process of the protocol stack; the application processing unit is used to simulate the processing process of the application.

[0010] According to the second aspect, the present invention provides a method for managing hardware resources of the simulation system in the first aspect, comprising: the resource processing unit sends a hardware resource request to the resource management unit, the hardware resource request includes the required hardware resources, their demand quantities and their corresponding hardware parameters; the resource management module allocates the hardware resources to the resource processing module according to the demand quantity based on the current available quantity corresponding to the hardware resources in the hardware resource request, and updates the current available quantity corresponding to the hardware resources; and reads the hardware parameters of the hardware resources from the resource module and returns them to the resource processing module.

[0011] Preferably, it also includes: if the resource processing module holds excess hardware resources, it sends a release signal to the resource management module and releases the excess hardware resources currently held; after receiving the release signal, the resource management module recycles the released excess hardware resources and updates the current available amount corresponding to the hardware resources.

[0012] According to the third aspect, the present invention provides a method for the simulation system in the first aspect, comprising: selecting the combined sub-units and their functions according to the processing function simulation unit, determining the hardware resources required for the simulation model of the processing function, their demand quantities and their corresponding hardware parameters, generating a hardware resource request for the processing function simulation, and sending it to the resource processing unit; determining the combination and interaction form of the control structure and the storage space block according to the storage function simulation unit, determining the hardware resources required for the simulation model of the storage function, their demand quantities and their corresponding hardware parameters, generating a hardware resource request for the storage function simulation, and sending it to the resource processing unit; the resource processing unit interacts with the resource management unit and the resource unit to provide hardware resources and corresponding hardware parameters for the processing simulation module.

[0013] According to the fourth aspect, the present invention provides a simulation method for a simulator-based OS network data processing mechanism simulation system, comprising: generating a simulation instance according to a preset processing mechanism using the hardware resource management module and the processing simulation module; adding the simulation instance into a simulator network topology structure composed of the nodes, the network devices, the applications, the data packet structures, the protocol stacks and the channels, and running the simulation instance.

[0014] According to a fifth aspect, the present invention provides a storage medium, wherein the storage medium stores computer executable instructions, and when the computer executable instructions are loaded and executed by a processor, the steps of the method described in any one of the second to fourth aspects are implemented.

[0015] The present invention realizes the complete simulation process of network data processing, adds the modeling of hardware resources and the modeling of network data processing mechanism on the original basis of the simulator, improves the reliability of the simulation, and can simulate various hardware environments and network data processing mechanisms, with strong flexibility and scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 This is a schematic diagram of the module structure of the ns-3 simulator.

[0017] Figure 2 This is a schematic diagram of the network topology of the ns-3 simulator.

[0018] Figure 3 This is a flow chart of the simulation process of network data processing under the NAPI mechanism.

[0019] Figure 4 FIG. 4 is an architecture diagram of a hardware resource management module according to an embodiment of the present invention.

[0020] Figure 5 The figure is a schematic diagram of a method for implementing a hardware resource management module according to an embodiment of the present invention.

[0021] Figure 6 The module architecture diagram for simulating OS network data processing mechanism according to an embodiment of the present invention.

[0022] Figure 7 The figure is a schematic diagram of the interaction between the processing simulation module and the hardware resource module according to an embodiment of the present invention.

[0023] Figure 8 The present invention is an OS network data processing mechanism simulation system based on a simulator according to an embodiment of the present invention.

[0024] Fig. 9 The present invention discloses a simulation method for a simulator-based OS network data processing mechanism simulation system according to an embodiment of the present invention.

[0025] Fig.10 The flowchart of network data processing after adding the OS network data processing mechanism simulation architecture in the embodiment of the present invention. DETAILED DESCRIPTION

[0026] The specific embodiments of the present invention will be described in detail below. It should be noted that the embodiments herein are only used for illustration and are not intended to limit the present invention. In the following description, a large number of specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be apparent to those of ordinary skill in the art that these specific details are not necessarily used to implement the present invention. In other examples, in order to avoid confusing the present invention, known procedures, materials or methods are not specifically described.

[0027] Figure 1 The figure shows a schematic diagram of the module structure of the existing network simulator ns-3 simulator, including nodes, network devices, channels, applications, protocol stacks and data packet structures. Figure 2 The figure shows the network topology diagram of the ns-3 simulator. The computer is modeled as a node, network devices, protocol stacks, and applications are added to the node, and finally several nodes are connected through channels to form a complete network topology.

[0028] In a real network environment, after a data packet arrives at the network card from the network, it needs to be processed by an OS-based network data processing mechanism. Common mechanisms include NAPI, Netmap, DPDK, etc. Taking NAPI as an example, the processing process is roughly as follows: after the data packet arrives at the network card, it is transferred to the ring buffer in the memory through DMA, and then a hard interrupt is triggered to notify the CPU that a new data packet has arrived. The CPU responds to the interrupt and then performs polling processing, takes out the data packet from the buffer and performs subsequent protocol stack processing, and finally copies the data packet to the user space to wait for the application to process. In order to better understand the present invention, the network data processing process in a real network environment is described in detail below using the NAPI mechanism as an example.

[0029] First, the NIC driver registers information after the system starts. The system allocates the RX (receive data) ring structure and the TX (transmit data) ring structure and the corresponding memory area to store data packets, and also allocates the skb (socket buffer) structure for protocol stack processing. The NIC driver writes the bus address (i.e., descriptor) of the memory area corresponding to the RX ring and the TX ring into the NIC register. When the data packet arrives at the NIC, it is written into the NIC's receive queue. DMA (Direct Memory Access) searches for the next available descriptor in the RX ring, and then transfers the data packet in the receive queue to the data buffer pointed to by the descriptor in the memory through the I / O bus. The NIC triggers a hard interrupt to notify the CPU that a data packet has arrived. The hard interrupt handler puts the interrupt request corresponding to the RX ring into the polling queue of a processor core, and then calls the soft interrupt handler. The soft interrupt handler calls the net_rx_action() function to take out the first item in the polling queue, and then calls the poll() function to take out the data packet from the data area corresponding to the RX ring and send it to the kernel network stack handler. After processing, it is copied to the buffer of the corresponding process (in the user area), and then the user process can process the data content of the data packet. If there are no data packets in the data area corresponding to the RX ring, the poll() function returns, and net_rx_action() calls the napi_complete() function to remove the first item of the polling queue and then returns. If there are still items in the polling queue, the net_rx_action() function continues to take out the current first item of the polling queue, and then continues to call the poll() function. If the number of packets processed by the poll() function has reached the set weight value, it returns, and net_rx_action() re-adds the item corresponding to the RX ring to the end of the polling queue and waits for the next access; among them, the weight value indicates the number of packets contained in a RX ring that can be processed at most each time. When the weight value is exceeded, the packets on the next RX ring are processed. The purpose of this is to allow the packets on each RX ring to be processed in time, rather than always processing packets on a certain RX ring. If the net_rx_action() function has processed a preset number of packets or the processing time exceeds the set value, it returns and exits the soft interrupt process to wait for the next scheduling.

[0030] When simulating the data processing process under the NAPI mechanism in an existing simulator (such as the ns-3 simulator), the data packet directly calls the function to trigger the protocol stack processing after arriving at the network card, and the above operating system-based processing process is not simulated. Figure 3As shown in the figure: after the data packet arrives at the channel, the network card is notified that a new data packet has arrived, the packet receiving function of the network card is called, the corresponding packet header processing is performed, the data packet is passed to the protocol stack handler added by the node for processing, the data packet processed by the protocol stack is placed in the socket buffer, and the application is notified to read the data packet from the socket buffer and process it. Therefore, simulating directly in the simulator fails to fully reproduce the real network environment, and the simulation results may be greatly different from the results in the real environment.

[0031] The inventors have found that in a real network environment, the hardware of the computer itself will also have a certain impact on the speed and results of network data processing, such as the delay caused by the CPU processing rate to the access of the storage device. The hardware involved in network data processing mainly includes: processor, cache, memory, network card and bus, while the existing simulator focuses on the processing of the protocol stack, and does not consider the impact of hardware parameters in different environments, nor does it simulate the network data processing mechanism based on OS (Operating System, a computer program that manages computer hardware and software resources), which will lead to a large difference between the overall simulation performance and the performance of the real environment. Therefore, if the impact of computer hardware parameters can be fully considered during the simulation process, it will bring higher precision simulation results.

[0032] Based on the above analysis, the inventors proposed a simulator-based OS network data processing mechanism simulation architecture to solve the problem of lack of hardware resource simulation function and network data processing mechanism simulation function in existing simulators.

[0033] According to an embodiment of the present invention, the hardware resources involved in the OS network data processing process are modeled as resource units; in order to manage the above hardware resources, a resource management unit and a resource processing unit are designed, thereby proposing a hardware resource management module. The architecture of the hardware resource management module is as follows: Figure 4As shown, it includes a resource unit, a resource management unit and a resource processing unit. Among them, the resource unit includes the required hardware resources and the hardware parameters contained in each hardware resource; in some embodiments, the hardware resources include a processor, a cache memory (cache), a memory, a network card and a bus; in some embodiments, the hardware parameters include cache line size, bus bandwidth, memory bandwidth, memory space, processor rate, etc. The resource management unit is used to manage the usage of hardware resources, that is, the total amount corresponding to each type of hardware resources and the current available amount. The resource processing unit is used to apply for hardware resources and obtain the corresponding hardware parameters. The unit contains a list of required hardware resource quantities and a list of currently owned resource quantities. Specifically, according to an embodiment of the present invention, a total of 5 types of hardware resources are set in the resource unit, including processor, cache, memory, network card and bus. Each hardware resource is implemented by a C++ class, namely processor resource class cpu_core_resource, cache resource class cache_resource, memory resource class memory_resource, network card resource class nic_resource, and bus resource class bu_resource; a specific parameter list of the hardware resource is set in each class, which is implemented through a structure, and two public member functions Init() and get_parameter() are set. Users can set specific parameter values ​​through the Init() function, and the get_parameter() function is used to obtain the parameters of the hardware resource and is called by the resource management unit. The resource management unit is implemented by a C++ class Resource Manager. First, the member variable resource is set, which is implemented by a structure, which contains the total number and current available number of five hardware resources; three member functions AllocateResource(), RecycleResource(), and Getparameter() are also set. Among them, AllocateResource() is responsible for allocating resources to the resource processing unit; RecycleResource() is responsible for recycling resources released by the resource processing unit; Getparameter() is responsible for processing parameter requests from the resource processing unit.The resource processing unit is implemented by a C++ class process_unit, which mainly includes four functions: RequestBufferResource(), RequestResource(), ReleaseResource(), and get_xx_para(); among them, RequestBufferResource() is used to apply for buffer resources, that is, to apply for part of the space in the memory or cache according to the required space; RequestResource() is used to apply for other hardware resources, such as CPU, network card and bus; ReleaseResource() is used to release hardware resources; get_xx_para() is used to apply for the required hardware parameters, where xx represents the hardware type, such as get_cpu_para(), get_cache_para(), etc.

[0034] Based on the above hardware resource management module, the embodiment of the present invention proposes a method for implementing the hardware resource management module (i.e., the interaction process between the units in the hardware resource management module), such as Figure 5 As shown, it includes: the resource processing unit sends a hardware resource request to the resource management unit, and the hardware resource request includes the required hardware resources, their demand quantities and their corresponding hardware parameters (i.e., requested resources and parameters); the resource management unit allocates the hardware resources to the resource processing unit according to the current available quantities of various hardware resources, modifies the current available quantities of various hardware resources, and reads the hardware parameters from the resource unit and returns them to the resource processing unit. In some embodiments, if the resource processing unit holds excess hardware resources (i.e., hardware resources that are not currently in use), a release signal is sent to the resource management unit, and the excess hardware resources currently held by the resource processing unit are released (i.e., resources are released); after receiving the release signal, the resource management unit recycles the released hardware resources and modifies the current available quantities of various hardware resources. Specifically, according to one embodiment of the present invention, when the resource processing unit needs to apply for hardware resources, it calls

[0035] RequestBufferResource(int flag, int size) function or RequestResource(intflag) function, and pass in the parameter flag in the function, which represents the type of hardware resources required. When applying for storage resources, you need to give size to represent the size of the required storage space. When applying for CPU, network card, and bus resources, you can only apply for one at a time, and there is no need to specify the number of resources.

[0036] The RequestBufferResource function and the RequestResource function will call the AllocateResource() function in ResourceManager. AllocateResource() searches the resource list resource according to the required hardware resource type flag and quantity num, and determines whether the currently available resources meet the requirements, that is, whether the currently available quantity of this type of hardware resources is greater than or equal to the requested quantity num. If it does, it will be allocated and the currently available quantity of resources will be updated. Returning true indicates that the allocation is successful; if it does not meet the requirements, it will return false to indicate that the current resources are insufficient. When the resource processing unit no longer needs to use a certain hardware resource, it will call the ReleaseResource(int flag, int size) function to release the hardware resource. The input parameters flag and size represent the type and quantity of hardware resources, respectively. This function will call the RecycleResource() function in ResourceManager. RecycleResource() determines the returned hardware resources and quantity according to flag and size, and updates the currently available quantity of this type of hardware resources. When the resource processing unit needs the parameters of a certain type of hardware resources, it will call the get_xx_parameter() function, such as get_cache_parameter(). Get_xx_parameter() will call Getparameter() in ResourceManger(). Getparameter() determines which type of hardware resource parameters are needed based on the function name. For example, according to get_cache_parameter(), it can be known that the current parameters needed are cache parameters, so get_parameter in cache_resource is called to obtain the corresponding parameter list.

[0037] In response to the problem of missing hardware resource simulation function, the embodiment of the present invention models the various hardware resources involved in the network data processing process, manages each hardware resource and its hardware parameters, and assigns different parameters to the hardware resources according to different hardware environments, thereby simulating various real environments and having good flexibility.

[0038] According to an embodiment of the present invention, a module for simulating OS network data processing mechanism (hereinafter referred to as processing simulation module) is proposed. Figure 6As shown, it includes: a processing function simulation unit and a storage function simulation unit. Among them, the processing function simulation unit contains several sub-units with different functions, and the combination form between the sub-units and the functional functions in the sub-units are determined according to the working principle of the preset processing mechanism, so as to completely simulate the process of processing OS network data of the preset processing mechanism. In some embodiments, the several sub-units with different functions are determined according to the processing purpose of each stage in the OS network data processing process, including a network card processing sub-unit, an interrupt processing sub-unit, a polling processing sub-unit, a data copy processing sub-unit, a protocol stack processing sub-unit, and an application processing sub-unit. In some embodiments, the data copy processing sub-unit includes at least one of the following functions: copying data from the network card to the memory, copying data from the network card to the buffer, and copying data from the memory to the buffer. The specific functions of each processing unit are shown in Table 1.

[0039] Table 1 Functions of each processing unit in the data processing system

[0040]

[0041]

[0042] The storage function simulation unit designs the storage structure required for data processing according to the working principle of the preset processing mechanism. It can be divided into a control structure and a storage space block according to the function. The control structure determines whether the storage space block has storage space. If so, the data packet is stored in the corresponding storage space block. The specific form of the control structure and the storage space block is determined by the preset processing mechanism. The hardware resources and hardware parameters required by the storage module include memory space and memory bandwidth. Specifically, the storage structure mainly contains three structures: RX_Ring, descriptor, buffer, and the specific contents are as follows:

[0043]

[0044]

[0045]

[0046]

[0047] Each descriptor represents the control structure of a data packet and corresponds to a buffer. Multiple descriptors are managed by one RX_Ring. When a data packet arrives, first query the use_count in RX_Ring to see if there is an idle descriptor. If there is, use NextToUse to find the currently required descriptor, and then store the data packet in the corresponding buffer.

[0048] Since the processing function simulation unit and the storage function simulation unit require hardware resources and corresponding hardware parameters during the simulation process, an interaction method between the hardware management module and the processing simulation module is provided in an embodiment of the present invention, that is, the interaction between the processing function simulation unit, the storage function simulation unit and the resource processing unit. Figure 7 As shown, the processing function simulation unit and the storage function simulation unit respectively include the required hardware resource lists and required hardware parameters, generate hardware resource requests according to the required hardware resource lists and the required hardware parameters, and send the hardware resource requests to the resource processing unit. The resource processing unit interacts with the resource unit and the resource management unit in the hardware resource management module according to the implementation method of the hardware resource management module to realize the application for resources, release of resources and request parameters, thereby achieving the purpose of interaction.

[0049] In order to solve the problem of missing simulation function of network data processing mechanism, the complete workflow is divided into several sub-units according to the working principle of the processing mechanism, and each sub-unit is combined according to the preset processing mechanism, and a storage function simulation unit for the preset processing mechanism is designed. At the same time, the interaction between the processing function simulation unit, the storage function simulation unit and the resource processing unit is designed to improve the authenticity of the simulation. Users can set the mechanism used in the application, that is, input the parameter mechanism. After the system starts running, it will judge the value of mechanism. Each value represents a mechanism, such as 0 for NAPI mechanism, 1 for Netmap mechanism, etc. Then the system creates an instance corresponding to the mechanism (each mechanism is implemented by a class, such as class NAPI, class Netmap, and the class contains storage structures and initialization functions unique to each mechanism. The C++ program will instantiate the class into an object during operation).

[0050] According to an embodiment of the present invention, a simulator-based OS network data processing mechanism simulation system is proposed. Figure 8 As shown, it includes nodes, network devices, channels, applications, protocol stacks, data packet structures, hardware resource management modules, and processing simulation modules. Figure 8It is a topological structure of two interconnected nodes, mainly to show the main content contained in the topological structure (corresponding to the real environment), in which the mechanism is the processing simulation module, the CPU and the like are hardware resources, and the hardware resource management module does not need to be reflected in the figure. The processing simulation module generates a simulation model of the OS network data under the preset processing mechanism based on the preset processing mechanism and the function of the function in the simulator, and generates a simulation instance according to the simulation model, the hardware resources and the corresponding hardware parameters. This part of the content is what was said before, and the instance object of the corresponding mechanism is generated according to the mechanism value set by the user in the application, including the processing function of the mechanism (such as Init, Receive) and the unique data structure. At the same time, it is necessary to generate instance objects of all hardware resources and instance objects of all processing units, and the specific process will not be repeated here.

[0051] A node represents a computer, in which the hardware resources, the network device, the application, the data packet structure, the protocol stack and the simulation instance are added, and each node is connected by the channel to form an OS network data processing mechanism simulation architecture based on a simulator.

[0052] According to an embodiment of the present invention, a simulation method of an OS network data processing mechanism simulation system based on a simulator is proposed. Fig. 9As shown, it includes: modeling hardware resources, establishing a hardware resource management module, and the hardware resource management module is implemented according to the aforementioned method; establishing a processing simulation module, and the processing simulation module is implemented according to the aforementioned method; according to the preset processing mechanism, using the hardware resource management module and the processing simulation module to generate a simulation instance; adding the simulation instance to the simulator network topology structure composed of the node, the network device, the application, the data packet structure, the protocol stack and the channel, and running the simulation instance. The content of this part has been explained in the previous content. The mechanism itself is a class, and the class contains the corresponding processing function (the processing flow of the mechanism is linked by a series of processing units), such as class NAPI, and then creates the corresponding instance object during the operation process, which contains its unique storage structure and processing function. A pointer to the mechanism class can also be added to the original node. By pointing the pointer to the instantiated mechanism object, the mechanism can be added to the node. Taking the ns-3 simulator as an example, the simulation method of the simulation architecture of the OS network data processing mechanism based on the simulator is described. The processing mechanism to be used is obtained from the application (i.e., the preset processing mechanism is determined); the data processing module in the data processing simulation model determines the combination form of the processing unit according to the function function in the ns-3 simulator and the preset processing mechanism; taking the NAPI mechanism as an example, the combination form of the processing unit includes the network card processing unit, the interrupt processing unit, the polling processing unit, the protocol stack processing unit, the application processing unit and the data replication processing unit; taking the Netmap mechanism as an example, unlike NAPI, the protocol stack processing unit is not required, and the polling processing process of this mechanism is also different from NAPI, and the function corresponding to the Netmap mechanism needs to be set in the polling processing unit. The storage module determines the storage structure according to the preset processing mechanism; according to the combination form of the processing unit, the storage structure and the hardware management module, an instance corresponding to the preset processing mechanism is created, and the instance is added to the network topology structure of the ns-3 simulator for processing data.

[0053] Taking the NAPI mechanism as an example, the simulation process of the simulator-based OS network data processing mechanism simulation architecture is as follows: Fig.10 As shown, it includes: after the data packet is transmitted from the sending end to the receiving end network card, the network card processing unit transmits the data packet from the network card to the buffer in the memory through the bus and triggers the interrupt processing unit; the interrupt processing unit adds the current buffer to the queue to be processed and then triggers the polling processing unit; the polling processing unit takes out the data packet from the buffer and transmits it to the protocol stack processing unit; the protocol stack processing unit transmits the data packet to the application processing unit after processing it.

[0054] The various embodiments of this specification are described in a progressive manner, and each embodiment describes the differences from other embodiments or implementations. The same or similar parts between the various embodiments of the present invention can be referred to each other, and the implementation principles and technical effects produced around the inventive concept can be referred to each other, which will not be repeated here. In the absence of conflict, the various embodiments or implementations of the present invention can be combined with each other.

[0055] It should be noted that although the above describes the various steps in a specific order, it does not mean that the various steps must be executed in the above specific order. In fact, some of these steps can be executed concurrently or even in a different order as long as the required functions can be achieved.

[0056] The present invention may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present invention.

[0057] Computer readable storage medium can be a tangible device that holds and stores instructions used by an instruction execution device. Computer readable storage medium can include, for example, but is not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination thereof. More specific examples (non-exhaustive list) of computer readable storage medium include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, for example, a punch card or a protruding structure in a groove on which instructions are stored, and any suitable combination thereof.

[0058] The embodiments of the present invention have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or technical improvements in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A simulator-based OS network data processing mechanism simulation system, comprising: Nodes, network devices, channels, applications, protocol stacks, and data packet structures, characterized in that they also include a hardware resource management module and a processing simulation module; The hardware resource management module is used to provide hardware resources and corresponding hardware parameters for the processing simulation module; The processing simulation module generates a simulation model of the OS network data under the preset processing mechanism based on the preset processing mechanism and the functions of the functions in the simulator, and generates a simulation instance according to the simulation model, the hardware resources and the corresponding hardware parameters; The node includes the hardware resources, the network device, the application, the data packet structure, the protocol stack and the simulation instance, and each node is connected through the channel.

2. The simulation system according to claim 1, characterized in that: The hardware resource management module includes a resource unit, a resource management unit and a resource processing unit; The resource unit includes hardware resources and their corresponding hardware parameters; The resource management unit is used to manage the total amount of each type of hardware resources and their current available amount; The resource processing unit is used to apply for hardware resources and their corresponding hardware parameters from the resource management unit.

3. The simulation system according to claim 2, characterized in that: The hardware resources include processor, cache memory, memory, network card and bus; The hardware parameters include cache line size, bus bandwidth, memory bandwidth, memory space, and processing rate of the processor.

4. The simulation system according to claim 1, characterized in that: The processing simulation module includes a processing function simulation unit and a storage function simulation unit; The processing function simulation unit includes a plurality of subunits with different processing functions; according to the working principle of the preset processing mechanism, a combination is selected from the subunits, and the functions in the selected subunits are set based on the functions in the simulator to generate a simulation model simulating the processing functions in the preset processing mechanism; The storage function simulation unit includes: a control structure and a storage space block; according to the working principle of the preset processing mechanism, the combination and interaction form of the control structure and the storage space block are determined to generate a simulation model simulating the storage function in the preset processing mechanism; The simulation model of the processing function and the simulation model of the storage function constitute a simulation model of the OS network data under the preset processing mechanism.

5. The simulation system according to claim 4, characterized in that: The processing function unit includes: a network card processing subunit, an interrupt processing subunit, a polling processing subunit, a data replication processing subunit, a protocol stack processing subunit, and an application processing subunit; The network card processing unit is used to transfer the data packet to the data replication processing unit; The interrupt processing unit is used to simulate the interrupt processing process triggered after the data packet is transmitted to the buffer; The polling processing unit is used to simulate the process of polling and reading data packets from the buffer after the interrupt processing is completed; The data replication unit is used to simulate the process of data packets being transmitted from the network card to the memory, or the process of data packets being transmitted from the network card to the high-speed cache memory, or the process of data packets being transmitted from the memory to the high-speed cache memory; The protocol stack processing unit is used to simulate the processing process of the protocol stack; The application processing unit is used to simulate the processing process of the application.

6. A method for managing hardware resources of the simulation system of claim 2, characterized in that: include: The resource processing unit sends a hardware resource request to the resource management unit, wherein the hardware resource request includes the required hardware resources, the required amount thereof, and the corresponding hardware parameters thereof; The resource management module allocates the hardware resource to the resource processing module according to the demand quantity according to the current available quantity corresponding to the hardware resource in the hardware resource request, and updates the current available quantity corresponding to the hardware resource; The hardware parameters of the hardware resources are read from the resource module and returned to the resource processing module.

7. The method according to claim 6, characterized in that Also includes: If the resource processing module holds redundant hardware resources, a release signal is sent to the resource management module to release the redundant hardware resources currently held; After receiving the release signal, the resource management module recycles the released redundant hardware resources and updates the current available amount corresponding to the hardware resources.

8. A method for the simulation system of claim 4, characterized in that, include: Determine the hardware resources required for the simulation model of the processing function, the required amount thereof and the corresponding hardware parameters thereof according to the sub-units and their functions selected and combined by the processing function simulation unit, generate a hardware resource request for the processing function simulation, and send it to the resource processing unit; Determine the combination and interaction form of the control structure and the storage space block according to the storage function simulation unit, determine the hardware resources required by the simulation model of the storage function, the required amount thereof and the corresponding hardware parameters thereof, generate a hardware resource request for the storage function simulation, and send it to the resource processing unit; The resource processing unit interacts with the resource management unit and the resource unit to provide hardware resources and corresponding hardware parameters for the processing simulation module.

9. A simulation method for a simulator-based OS network data processing mechanism simulation system according to any one of claims 1 to 5, characterized in that: include: Generate a simulation instance using the hardware resource management module and the processing simulation module according to a preset processing mechanism; The simulation instance is added into the simulator network topology structure composed of the nodes, the network devices, the application programs, the data packet structure, the protocol stack and the channel, and the simulation instance is run.

10. A storage medium, characterized in that: The storage medium stores computer executable instructions, and when the computer executable instructions are loaded and executed by the processor, the steps of the method as claimed in any one of claims 6 to 9 are implemented.

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