Preparation method of front surface local passivation contact solar cell

Abstract

The invention provides a preparation method of a front local passivation contact solar cell, and belongs to the technical field of solar photovoltaics. The preparation method comprises the following steps: providing a silicon substrate; preparing a tunneling layer on the front surface of the silicon substrate; preparing an amorphous silicon layer on the tunneling layer; performing first heat treatment on the target part; removing a non-target part region to obtain a local passivation contact structure on the front surface of the silicon substrate; and preparing the solar cell by using the local passivation contact structure on the front surface of the silicon substrate, namely the front surface local passivation contact solar cell. And fluorine-containing gas etching is adopted, so that the process can be simplified.

Description

Technical Field

[0001] The invention belongs to the technical field of solar photovoltaics, and in particular relates to a method for preparing a front local passivation contact solar cell. Background Art

[0002] With the continuous development of photovoltaic technology, crystalline silicon solar cell technology has become increasingly mature, and its conversion efficiency is approaching the theoretical limit. At present, the main factors affecting the open circuit voltage and conversion efficiency of crystalline silicon solar cells are: carrier recombination in the contact area between the metal electrode and the crystalline silicon surface.

[0003] In order to reduce the carrier recombination in the contact area between the metal electrode and the crystalline silicon surface on the front of the solar cell, a local passivation contact structure can be made in the area where the crystalline silicon front surface contacts the metal electrode, effectively achieving a balance between contact resistance, emitter recombination and metal recombination.

[0004] At present, the main local passivation contact technology preparation solutions in the industry generally include photolithography, laser method, wax printing method, etc. The photolithography method uses photolithography to cover the polysilicon layer in the contact area, and uses chemical solution etching to remove the remaining polysilicon layer, thereby forming a local passivation contact structure; the laser method uses laser to directly remove the polysilicon layer outside the contact area; the wax printing method prepares a patterned wax film on the surface of the entire polysilicon layer, and uses chemical solution etching to remove the remaining polysilicon layer, thereby forming a local passivation contact structure.

[0005] Chemical solution etching will etch uniformly in all directions, resulting in undesirable side corrosion, reducing the resolution and integrity of the pattern, and making it difficult to clean the side corrosion pits. In contrast, gas etching can significantly reduce side corrosion and improve the integrity and resolution of the pattern due to the directionality of the gas energy impact. Summary of the invention

[0006] In order to solve the above technical problems, the present invention proposes a method for preparing a solar cell to reduce the difficulty of preparing a local passivation contact structure and improve the preparation efficiency.

[0007] To achieve the above object, the present invention provides the following technical solutions:

[0008] A method for preparing a front-side local passivation contact solar cell comprises the following steps:

[0009] Providing a silicon substrate;

[0010] Preparing a tunneling layer on the front side of the silicon substrate;

[0011] preparing an amorphous silicon layer on the tunneling layer;

[0012] performing a first heat treatment on the target portion;

[0013] Removing the non-target partial area to obtain a local passivation contact structure located on the front side of the silicon substrate;

[0014] The solar cell prepared by using the local passivation contact structure located on the front side of the silicon substrate is a front-side local passivation contact solar cell.

[0015] The present invention processes only the target part, so that the amorphous silicon surface of the target part is oxidized to generate a layer of silicon oxide or the doped silicon oxide layer structure of the target part is crystallized or the grains are coarsened. Subsequently, the non-target area can be conveniently removed by utilizing the difference in the selective etching of silicon oxide and amorphous silicon and doped silicon oxide with different structures by fluorine-containing gas etching.

[0016] Furthermore, the amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer, and there is an obvious selectivity difference between the amorphous silicon layer and the silicon oxide layer during the fluorine-containing gas etching process, and the amorphous silicon layer can be easily removed.

[0017] Further, when the amorphous silicon layer is a doped amorphous silicon layer, the first heat treatment is a single-step heat treatment, and the single-step heat treatment is a laser heat treatment.

[0018] In another preferred scheme, when the amorphous silicon layer is a doped amorphous silicon layer, the first heat treatment is a multi-step heat treatment, and the multi-step heat treatment includes: first annealing the doped amorphous silicon layer to form a doped polycrystalline silicon layer and a doped silicon oxide layer on the surface, and then performing a second heat treatment on the target portion of the doped silicon oxide layer.

[0019] Furthermore, when the amorphous silicon layer is an intrinsic amorphous silicon layer, the first heat treatment is a multi-step heat treatment, which includes: first performing diffusion doping treatment on the amorphous silicon layer to form a doped polysilicon layer and a doped silicon oxide layer on the surface, and then performing a second heat treatment on the target portion of the doped silicon oxide layer.

[0020] Furthermore, the second heat treatment is laser heat treatment. The laser can accurately locate the target portion of the amorphous silicon layer or the doped silicon oxide layer, so that only the target portion is processed, and the amorphous silicon layer portion or the doped silicon oxide layer portion other than the target portion is not processed. Based on this, when laser heat treatment is used, no mask process is required, which can not only simplify the process steps and improve the processing efficiency of local heat treatment, but also avoid the cost increase caused by the mask process.

[0021] Furthermore, the laser used in the laser heat treatment is any one of infrared laser, green laser and ultraviolet laser, and the laser wavelength is 190nm to 545nm.

[0022] Furthermore, the laser power used in the laser heat treatment is 5W to 100W. The laser power in this range can not only ensure that the laser used in the laser heat treatment has enough heat to transform the amorphous silicon of the target part into polycrystalline silicon, but also avoid excessive heat from damaging the surface of the target part of the amorphous silicon layer.

[0023] Furthermore, the energy injection value of the laser heat treatment is 5mJ / cm 2 ~50mJ / cm 2 Energy implantation in this range can ensure that the amorphous silicon in the target portion is transformed into polycrystalline silicon.

[0024] Furthermore, the process used to remove the non-oxidized amorphous silicon region is fluorine-containing gas etching. During fluorine-containing gas etching, the etching gas in the fluorine-containing gas includes at least one of HF, F2, XeF2, CIF, CIF3, IF5, BrF5, BrF3, or a mixed gas of at least one gas and water vapor; or at least one of CF4, C2F6, C3F8, C4F8, C4F6, C5F8, CHF3 or SF6.

[0025] The process used to remove the oxidized amorphous silicon in non-target areas is also fluorine-containing gas etching. The optional fluorine-containing gases include but are not limited to at least one of HF, F2, CIF, IF5, BrF5, BrF3, or a combination of at least one of them and water vapor.

[0026] These fluorine-containing gases have a selectivity of at least 100 for silicon oxide and amorphous silicon, so that even a very small thickness of silicon oxide can achieve a good protection effect on the underlying amorphous silicon or polycrystalline silicon layer. The protective effect of silicon oxide in the fluorine-containing gas etching process is much greater than that in the wet etching process. This is because wet etching of silicon usually uses strong alkaline solutions such as NaOH, KOH or TMAH to corrode silicon, and these strong alkaline solutions are also corrosive to silicon oxide. For example, the corrosion rate of SiO2 in 44% (mass fraction) KOH solution at 85°C is 1.4nm / min. In order to ensure the protection of the underlying amorphous silicon / polycrystalline silicon during wet etching, a thicker and denser SiO2 layer is required, which undoubtedly increases the process time and production cost. In fluorine-containing gas etching, even very thin SiO2 will not be corroded, and has better selectivity.

[0027] Furthermore, after removing the non-oxidized amorphous silicon region, the method for preparing the solar cell further includes an annealing treatment. The annealing temperature is 900-1100° C., and the holding time is 0.5-3 hours. The annealing treatment converts all the doped amorphous silicon under the silicon oxide layer into polycrystalline silicon, or converts all the amorphous silicon that has not been completely converted into polycrystalline silicon by laser heat treatment into polycrystalline silicon.

[0028] Furthermore, the material of the tunneling layer is one or more of silicon oxynitride, silicon carbide, silicon nitride, aluminum oxide and silicon oxide.

[0029] Furthermore, after removing the non-oxidized amorphous silicon region, the method for preparing a solar cell further includes: removing the tunneling layer of the non-target region; wherein the process for removing the tunneling layer of the non-target region is substantially the same as the process for removing the non-oxidized amorphous silicon region. At this time, only a small amount of water vapor needs to be added to the introduced gas, and the non-crystalline silicon region and the tunneling layer portion covered by the amorphous silicon region are successively removed using the same fluorine-containing gas etching equipment, thereby simplifying the process and improving efficiency. Furthermore, when removing the portion of the tunneling layer covered by the amorphous silicon layer, the heat treatment atmosphere contains water vapor. The flow rate of the water vapor is 1 sccm to 500 sccm.

[0030] Furthermore, after preparing the local passivation contact structure, the method for preparing the solar cell further includes: preparing an electrode on the local passivation contact structure. At this time, on the one hand, the electrode is in direct contact with the doped polysilicon region instead of the silicon substrate, which can reduce the carrier recombination between the semiconductor and the electrode; on the other hand, the doped polysilicon region is only prepared at a local position corresponding to the electrode on the front side of the silicon substrate, which can reduce the strong absorption of sunlight by the doped polysilicon and ensure the absorption rate of sunlight by the solar cell.

[0031] Compared with the prior art, the present invention has the following advantages and technical effects:

[0032] The present invention processes only the target part, so that the amorphous silicon surface of the target part is oxidized to generate a layer of silicon oxide or the doped silicon oxide layer structure of the target part is crystallized or the grains are coarsened. Subsequently, the non-target area can be conveniently removed by utilizing the difference in the selective etching of silicon oxide and amorphous silicon and doped silicon oxide with different structures by fluorine-containing gas etching.

[0033] During fluorine-containing gas etching, the etching gas in the fluorine-containing gas includes one or a combination of HF, F2, XeF2, CIF, CIF3, IF5, BrF5, BrF3, or a mixture of one of them and water vapor, or a mixture of a combination of more than one gas and water vapor; or a combination of one or more of CF4, C2F6, C3F8, C4F8, C4F6, C5F8, CHF3 and SF6, the etching pressure is 0.2-8 torr, and the etching temperature is room temperature. These fluorine-containing gases have a selectivity of at least 100 to silicon oxide and amorphous silicon / polycrystalline silicon, so that even a very small thickness of silicon oxide can achieve a good protection effect on the underlying amorphous silicon / polycrystalline silicon layer. The protective effect of silicon oxide in the fluorine-containing gas etching process is much greater than that in the wet etching process. This is because wet etching of silicon usually uses strong alkaline solutions such as NaOH, KOH or TMAH to corrode silicon, and these strong alkaline solutions are also corrosive to silicon oxide. For example, the corrosion rate of SiO2 in 44% (mass fraction) KOH solution at 85°C is 1.4nm / min. In order to ensure the protection of the underlying amorphous silicon / polycrystalline silicon during the wet etching process, a thicker and denser SiO2 layer is required, which undoubtedly increases the process time and production cost. In the fluorine-containing gas etching of the present application, even very thin SiO2 will not be corroded, and has better selectivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] The drawings constituting a part of the present application are used to provide a further understanding of the present application. The illustrative embodiments and descriptions of the present application are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:

[0035] Figure 1 It is a schematic diagram of the structure of a front-side local passivation contact solar cell according to Example 1 of the present invention. DETAILED DESCRIPTION

[0036] Various exemplary embodiments of the present invention will now be described in detail. This detailed description should not be considered as limiting the present invention, but should be understood as a more detailed description of certain aspects, features, and embodiments of the present invention.

[0037] It should be understood that the terms described in the present invention are only for describing special embodiments and are not intended to limit the present invention. In addition, for the numerical range in the present invention, it should be understood that each intermediate value between the upper and lower limits of the scope is also specifically disclosed. Each smaller range between the intermediate value in any stated value or stated range and any other stated value or intermediate value in the described range is also included in the present invention. The upper and lower limits of these smaller ranges can be independently included or excluded in the scope.

[0038] Unless otherwise indicated, all technical and scientific terms used herein have the same meanings as those generally understood by those skilled in the art. Although the present invention describes only preferred methods and materials, any methods and materials similar or equivalent to those described herein may also be used in the implementation or testing of the present invention. All documents mentioned in this specification are incorporated by reference to disclose and describe the methods and / or materials associated with the documents. In the event of a conflict with any incorporated document, the content of this specification shall prevail.

[0039] It will be apparent to those skilled in the art that various modifications and variations may be made to the specific embodiments of the present invention description without departing from the scope or spirit of the present invention. Other embodiments derived from the present invention description will be apparent to those skilled in the art. The present invention description and examples are exemplary only.

[0040] The words “include,” “including,” “have,” “contain,” etc. used in this document are open-ended terms, meaning including but not limited to.

[0041] In the embodiments of the present invention, the processes not described in detail are conventional means in the art and are not the focus of the present invention, and will not be described in detail here.

[0042] The room temperature in the embodiments of the present invention refers to 25±2°C.

[0043] In some embodiments of the present invention, a method for preparing a front-side local passivation contact solar cell is provided, and the method for preparing the solar cell comprises the following steps:

[0044] Providing a silicon substrate;

[0045] preparing a tunneling layer on the front side of the silicon substrate;

[0046] preparing an amorphous silicon layer on the tunneling layer;

[0047] performing a first heat treatment on the target portion;

[0048] The non-target partial area is removed to obtain a local passivation contact structure located on the front side of the silicon substrate.

[0049] The solar cell prepared by using the local passivation contact structure located on the front side of the silicon substrate is a front-side local passivation contact solar cell.

[0050] When the above technical solution is adopted, only the target part is processed to oxidize the surface of the amorphous silicon of the target part to form a layer of silicon oxide or to crystallize or coarsen the grains of the doped silicon oxide layer of the target part. Subsequently, the non-target area can be conveniently removed by utilizing the difference in the selective etching of silicon oxide and amorphous silicon and doped silicon oxide of different structures by fluorine-containing gas etching.

[0051] In some embodiments, the tunneling layer and the intrinsic amorphous silicon are prepared by LPCVD process, and the thicknesses thereof are 0.5-3 nm and 50-300 nm, respectively.

[0052] In some embodiments, the amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer. No matter the intrinsic amorphous silicon layer or the doped amorphous silicon layer, there is an obvious selectivity difference between the intrinsic amorphous silicon layer and the silicon oxide layer during the fluorine-containing gas etching process, and the amorphous silicon layer can be easily removed.

[0053] In some embodiments, when the amorphous silicon layer is a doped amorphous silicon layer, the first heat treatment is a single-step heat treatment, and the single-step heat treatment is a laser heat treatment. Processing the non-target portion includes: annealing the doped amorphous silicon layer to form a doped polycrystalline silicon layer and a doped silicon oxide layer on the surface. The target portion of the amorphous silicon layer is oxidized on the surface to prepare silicon oxide, and the bottom is still amorphous silicon (mainly amorphous silicon, and partly a mixed phase of microcrystalline silicon and / or polycrystalline silicon) or the bottom is converted into polycrystalline silicon, and the rest of the amorphous silicon layer is still amorphous silicon. At this time, the heat treatment operation for the target portion of the amorphous silicon layer can prepare silicon oxide + amorphous silicon regions or silicon oxide + doped polycrystalline silicon regions and amorphous silicon regions with different materials, thereby facilitating the removal of the amorphous silicon regions therein.

[0054] In other preferred embodiments, when the amorphous silicon layer is a doped amorphous silicon layer, the first heat treatment is a multi-step heat treatment, which includes: first annealing the doped amorphous silicon layer to form a doped polycrystalline silicon layer and a doped silicon oxide layer on the surface, and then performing a second heat treatment on the target portion of the doped silicon oxide layer.

[0055] In some embodiments, when the amorphous silicon layer is an intrinsic amorphous silicon layer, the first heat treatment is a multi-step heat treatment, and the multi-step heat treatment includes: firstly performing a diffusion doping treatment on the amorphous silicon layer to form a doped polysilicon layer and a doped silicon oxide layer on the surface, and then performing a second heat treatment on a target portion of the doped silicon oxide layer. The doping treatment process may also be an ion implantation process or a doping source coating and advancing process.

[0056] When the above technical solution is adopted, the doping treatment and heat treatment operation of the target part of the amorphous silicon layer can prepare doped amorphous silicon regions and non-doped amorphous silicon regions with different materials, thereby facilitating the removal of the non-doped amorphous silicon regions. In addition, both the ion implantation process and the doping source coating and advancing process can locally dope the amorphous silicon layer.

[0057] In some embodiments, the second heat treatment is laser heat treatment. The laser can accurately locate the target portion of the amorphous silicon layer, so that only the target portion is processed, and the amorphous silicon layer portion other than the target portion is not processed. Based on this, when laser heat treatment is used, no mask process is required, which can not only simplify the process steps and improve the processing efficiency of local heat treatment, but also avoid the cost increase caused by the mask process.

[0058] In some embodiments, the laser used in the laser heat treatment is any one of infrared laser, green laser and ultraviolet laser, and the laser wavelength is 190nm to 545nm.

[0059] In some embodiments, the laser power used in the laser heat treatment is 5W to 100 W. The laser power in this range can not only ensure that the laser used in the laser heat treatment has sufficient heat to convert the amorphous silicon of the target part into polycrystalline silicon, but also avoid excessive heat from damaging the surface of the target part of the amorphous silicon layer.

[0060] In some embodiments, the energy injection value of the laser heat treatment is 5mJ / cm 2 ~50mJ / cm 2 Energy implantation in this range can ensure that the amorphous silicon in the target portion is transformed into polycrystalline silicon.

[0061] In some embodiments, the process of removing the amorphous silicon region is fluorine-containing gas etching, and the etching gas in the fluorine-containing gas includes at least one of HF, F2, XeF2, CIF, CIF3, IF5, BrF5, BrF3, or a mixture of at least one gas and water vapor; or at least one of CF4, C2F6, C3F8, C4F8, C4F6, C5F8, CHF3 or SF6. The etching pressure is 0.2-8 torr, and the etching temperature is room temperature. At least one of oxygen, argon and nitrogen can be added to some etching gases, wherein oxygen can improve the selectivity of etching amorphous silicon / polycrystalline silicon to silicon oxide on the one hand, and can assist etching on the other hand, releasing more fluorine atoms, so that the etching effect of the etching gas is improved, and argon and nitrogen can act as carrier gases on the one hand, and can adjust the concentration of the etching gas on the other hand; Ar and He are usually used as auxiliary dilution, which can increase the plasma potential during plasma etching reaction, and can also play a directional bombardment role on polycrystalline silicon, thereby improving the resolution and integrity of the pattern. Optional combinations include but are not limited to CF4+O2, SF6 and +O2+Ar; CHF3+SF6+O2, BrF3+N2, BrF5+N2, CIF3+N2, F2+N 2+ Water vapor and F2+N2.

[0062] These fluorine-containing gases have a selectivity of at least 100 for silicon oxide and amorphous silicon, so that even a very small thickness of silicon oxide can achieve a good protection effect on the underlying amorphous silicon layer. The protective effect of silicon oxide in the fluorine-containing gas etching process is much greater than that in the wet etching process. This is because wet etching of silicon usually uses strong alkaline solutions such as NaOH, KOH or TMAH to corrode silicon, and these strong alkaline solutions are also corrosive to silicon oxide. For example, the corrosion rate of SiO2 in a 44% (mass fraction) KOH solution at 85°C is 1.4nm / min. In order to ensure the protection of the underlying amorphous silicon / polycrystalline silicon during wet etching, a thicker and denser SiO2 layer is required, which undoubtedly increases the process time and production cost. In fluorine-containing gas etching, even very thin SiO2 will not be corroded, and has better selectivity.

[0063] In some embodiments, after removing the amorphous silicon region, the method for preparing a solar cell further includes annealing to convert all doped amorphous silicon under the silicon oxide layer into polycrystalline silicon, or convert all amorphous silicon that has not been completely converted into polycrystalline silicon by laser processing into polycrystalline silicon.

[0064] In some embodiments, the material of the tunneling layer is one or more of silicon oxynitride, silicon carbide, silicon nitride, aluminum oxide and silicon oxide.

[0065] In some embodiments, after removing the amorphous silicon region, the method for preparing a solar cell further includes: removing the portion of the tunneling layer covered by the amorphous silicon layer; wherein the process for removing the portion of the tunneling layer covered by the amorphous silicon layer is substantially the same as the process for removing the non-oxidized amorphous silicon region. At this time, it is only necessary to add a small amount of water vapor to the introduced gas, and use the same etching equipment to successively remove the amorphous silicon region and the portion of the tunneling layer covered by the amorphous silicon region, thereby simplifying the process and improving efficiency. When removing the portion of the tunneling layer covered by the amorphous silicon layer, the heat treatment atmosphere contains water vapor. The flow rate of water vapor is 1 sccm to 500 sccm.

[0066] In some embodiments, after preparing the local passivation contact structure, the method for preparing a solar cell further includes: preparing an electrode on the local passivation contact structure. The front electrode and the back electrode are prepared by screen printing and sintering in the prior art, and silver paste is printed on both the front and back sides, or silver aluminum paste is printed on the front side and silver paste is printed on the back side. At this time, on the one hand, the electrode is in direct contact with the doped polysilicon area rather than the silicon substrate, which can reduce the carrier recombination of the semiconductor in contact with the electrode; on the other hand, the doped polysilicon area is only prepared at the local position corresponding to the electrode on the front side of the silicon substrate, which can reduce the strong absorption of sunlight by the doped polysilicon and ensure the absorption rate of sunlight by the solar cell.

[0067] In contrast, in some embodiments of the present invention, another method for preparing a solar cell is provided, and the method for preparing a solar cell comprises the following steps:

[0068] Providing a silicon substrate;

[0069] Preparing a tunneling layer on the front side of the silicon substrate;

[0070] preparing an amorphous silicon layer on the tunneling layer;

[0071] Annealing, wherein the amorphous silicon layer is converted into a polycrystalline silicon layer;

[0072] printing an organic mask on a target portion of the polysilicon layer to prepare a masked area and a non-masked area;

[0073] The organic mask is not resistant to alkali corrosion and can be easily removed in an alkaline solution. For example, a 1.5% to 5% (mass fraction) NaOH or KOH solution can completely remove the organic mask within 30 seconds to 5 minutes. The printed pattern of the organic mask corresponds to the electrode design pattern, and the ratio of the printed width to the electrode design width is between 1:1 and 1:5, which is convenient for alignment and positioning during subsequent electrode printing. The mask printing height is between 1μm and 10μm. Since the fluorine etching of fluorine-containing gas has a selectivity ratio of more than 100 for the organic mask and silicon oxide, a very thick mask is not required to achieve a good protection effect, which also saves the material cost of the mask and the subsequent cleaning pressure.

[0074] The polysilicon in the unmasked area is removed by etching with fluorine-containing gas to obtain a local passivation contact structure located on the front side of the silicon substrate. The etching method of the fluorine-containing gas is the same as that described above.

[0075] In the preparation method of the solar cell used as a comparison, the preparation method of the solar cell also includes: removal and cleaning of the organic mask. The removal of the organic mask uses an alkaline etchant, the etching temperature is 25°C to 80°C, and the etching time is 1min to 5min; wherein the alkaline etchant includes one or more of NaOH, KOH or organic alkaline reagents. Under the etching parameters, the organic mask can be removed quickly and efficiently, and the removal described here can include the organic mask being completely or partially dissolved in the alkaline solution, and the non-dissolved part floating in the solution in the form of strips or flocs, and being collected by the filter through overflow cleaning.

[0076] In the preparation method of solar cells used as a comparison, the cleaning includes deionized water cleaning and alkali + hydrogen peroxide or ozone cleaning. The deionized water cleaning is used to rinse the residual alkali solution on the surface of the silicon wafer; the alkali + hydrogen peroxide / ozone cleaning is to remove the residual organic matter or organic groups on the surface of the silicon wafer, and the organic matter is decomposed by the oxidation of hydrogen peroxide or ozone. The alkali cleaning temperature here is 25℃~80℃, and the cleaning time is 1min~5min; wherein, the alkali includes one or more of NaOH, KOH or organic alkali reagents, and the alkali concentration is 1%~3% (mass fraction).

[0077] The technical solution of the present invention is further illustrated by the following examples.

[0078] Example 1

[0079] Figure 1 It is a schematic diagram of the structure of a front-side local passivation contact solar cell according to Example 1 of the present invention.

[0080] A P-type single crystal silicon wafer is selected as a silicon substrate (the surface of the silicon substrate is doped with boron by high-temperature diffusion at 1000° C. to form a doped layer, which is the same as in the following embodiments). A 1 nm tunneling layer is prepared on the front side of the silicon substrate by a low pressure chemical vapor deposition (LPCVD) process (the material of the tunneling layer is silicon oxynitride). A 150 nm intrinsic amorphous silicon layer is prepared on the tunneling layer by the LPCVD process. Then, boron is diffused into the silicon substrate at a diffusion temperature of 900° C. and a diffusion time of 2 hours, so that the intrinsic amorphous silicon layer is diffused and doped into a doped polycrystalline silicon layer, and a boron-doped silicon oxide layer is formed on the surface. The target portion of the boron-doped silicon oxide layer is subjected to infrared laser heat treatment. The laser wavelength is 545 nm, the laser power is 70 W, and the energy injection value of the laser heat treatment is 30 mJ / cm 2 The target surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is grown, and the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched by fluorine-containing gas. The gas for etching the doped silicon oxide layer in the non-target area is HF with a flow rate of 10 sccm, and the gas for etching the doped polysilicon layer in the non-target area is F2+N2 (with flow rates of 10 sccm and 50 sccm, respectively), the etching pressure is 0.5 torr, and the etching temperature is room temperature; the part of the tunneling layer covered by the amorphous silicon layer is etched with F2+N 2+Water vapor (flow rates are 5sccm, 10sccm, and 100sccm respectively), the etching pressure is 0.5torr, and the etching temperature is room temperature; a local passivation contact structure located on the front side of the silicon substrate is obtained; then a trough-type wet process equipment is used to remove the doped silicon oxide layer on the surface of the silicon substrate, and then a tubular ALD equipment is used to deposit 5nm thick aluminum oxide on the front and back sides of the silicon wafer, and PECVD is used to deposit 70nm thick silicon nitride on the front side and 85nm thick silicon nitride on the back side, and metal slurry is screen-printed on the front and back sides of the silicon wafer respectively and sintered to form front and back electrodes, thereby obtaining a front local passivation contact solar cell.

[0081] The fill factor of the solar cell prepared in this embodiment is 81.3%, the photoelectric conversion efficiency η is 23.3%, the open circuit voltage Voc is 702.7 mV, and the short circuit current Jsc is 40.1 mA / cm 2 , the reverse current is 0.2A.

[0082] Example 2

[0083] A P-type single crystal silicon wafer was selected as the silicon substrate. A 3nm tunneling layer (the material of the tunneling layer was silicon carbide) was prepared on the front side of the silicon substrate by the LPCVD process. A 50nm intrinsic amorphous silicon layer was prepared on the tunneling layer by the LPCVD process. Then, boron was diffused into the silicon substrate at a diffusion temperature of 850°C and a diffusion time of 3 hours, so that the intrinsic amorphous silicon layer was diffused and doped into a doped polysilicon layer. A boron-doped silicon oxide layer was formed on the surface. The target part of the boron-doped silicon oxide layer was subjected to infrared laser heat treatment. The laser wavelength was 532nm, the laser power was 100W, and the energy injection value of the laser heat treatment was 50mJ / cm 2 , the target part surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is grown; the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched by fluorine-containing gas, the doped silicon oxide layer in the non-target area is etched by F2+water vapor (flow rates are 5 and 100 sccm, respectively), the doped polysilicon in the non-target area is etched by CIF3+nitrogen (flow rates are 10 sccm and 10 sccm, respectively), the etching pressure is 3 torr, the etching temperature is room temperature, and a local passivation contact structure located on the front side of the silicon substrate is obtained; then a trough-type wet process equipment is used to remove the doped silicon oxide layer on the surface of the silicon substrate, and then a tubular ALD equipment is used to deposit 6 nm thick aluminum oxide on the front and back sides of the silicon wafer, and PECVD is used to deposit 75 nm thick silicon nitride on the front side and 88 nm thick silicon nitride on the back side, and metal slurry is screen-printed on the front and back sides of the silicon wafer respectively and sintered to form a front electrode and a back electrode, so as to obtain a front local passivation contact solar cell.

[0084] The fill factor of the solar cell prepared in this embodiment is 81.5%, the photoelectric conversion efficiency is 23.1%, the open circuit voltage is 702.1mV, and the short circuit current is 40.2mA / cm 2 .

[0085] Example 3

[0086] A P-type single crystal silicon wafer was selected as the silicon substrate, and a 0.5 nm tunneling layer (the material of the tunneling layer was silicon nitride) was prepared on the front side of the silicon substrate by the LPCVD process. A 50 nm boron-doped amorphous silicon layer was prepared on the tunneling layer by the LPCVD in-situ doping deposition process. Then, the silicon substrate was annealed at a temperature of 950°C for 2 hours, so that the boron-doped amorphous silicon layer was transformed into a boron-doped polysilicon layer, and a boron-doped silicon oxide layer was formed on the surface. The target part of the boron-doped silicon oxide layer was subjected to green laser heat treatment, with a laser wavelength of 515 nm, a laser power of 10 W, and an energy injection value of 5 mJ / cm 2 The target part surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is grown, and the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched away by fluorine-containing gas. The gas for etching the doped silicon oxide layer in the non-target area is CIF+water vapor (with flow rates of 10 sccm and 100 sccm, respectively), and the gas for etching the doped polysilicon in the non-target area is a mixed gas of HF and CF4 (with flow rates of 10 sccm and 20 sccm, respectively); then a trough-type wet process equipment is used to remove the doped silicon oxide layer on the surface of the silicon substrate, and then a tubular ALD equipment is used to deposit 4 nm thick aluminum oxide on the front and back of the silicon wafer, and PECVD is used to deposit 78 nm thick silicon nitride on the front and 90 nm thick silicon nitride on the back, and metal slurry is screen-printed on the front and back of the silicon wafer respectively and sintered to form a front electrode and a back electrode, thereby obtaining a front local passivation contact solar cell.

[0087] The fill factor of the solar cell prepared in this embodiment is 82.1%, the photoelectric conversion efficiency is 23.5%, the open circuit voltage is 703.1mV, and the short circuit current is 40.0mA / cm 2 .

[0088] Example 4

[0089] A P-type single crystal silicon wafer was selected as the silicon substrate. A 2nm tunneling layer (the material of the tunneling layer was aluminum oxide) was prepared on the front of the silicon substrate using the LPCVD process. An ion implantation process was used to locally dope the tunneling layer to prepare a doped amorphous silicon layer (the ion implantation dose was 1e15-2e16 / cm 2), the target part of the amorphous silicon layer (i.e., the doped amorphous silicon layer, the same below) is subjected to ultraviolet laser heat treatment, the laser wavelength is 400nm, the laser power is 50W, and the energy injection value of the laser heat treatment is 25mJ / cm 2 , the target part of the amorphous silicon layer is oxidized to prepare silicon oxide, the bottom is still amorphous silicon (mainly amorphous silicon, partly a mixed phase of microcrystalline silicon and / or polycrystalline silicon), the rest of the amorphous silicon layer is still amorphous silicon, and an oxidized amorphous silicon region and a non-oxidized amorphous silicon region are prepared; the non-oxidized amorphous silicon region of the non-target region is removed by etching with a fluorine-containing gas, the etching gas is BrF5+N2, the flow rate is 10sccm and the etching pressure is 50sccm, the etching temperature is 8torr, and the etching temperature is room temperature, to obtain a local passivation contact structure located on the front side of the silicon substrate; the non-oxidized amorphous silicon region is removed After that, annealing treatment at 1000℃ was carried out to convert all the doped amorphous silicon under the silicon oxide layer into polycrystalline silicon. The holding time was 1.5h, and then the surface oxide layer was removed by a trough wet process equipment. Then, a tubular ALD equipment was used to deposit 6nm thick aluminum oxide on the front and back of the silicon wafer, and PECVD was used to deposit 65nm thick silicon nitride on the front and 80nm thick silicon nitride on the back. Metal slurry was screen-printed on the front and back of the silicon wafer respectively and sintered to form front and back electrodes, thus obtaining a front locally passivated contact solar cell.

[0090] The fill factor of the solar cell prepared in this embodiment is 81.2%, the photoelectric conversion efficiency is 23.1%, the open circuit voltage is 702.5mV, and the short circuit current is 40.0mA / cm 2 .

[0091] Example 5

[0092] A P-type single crystal silicon wafer was selected as the silicon substrate. A 1nm tunneling layer (the material of the tunneling layer was silicon oxide) was prepared on the front side of the silicon substrate by the LPCVD process. A 150nm intrinsic amorphous silicon layer was prepared on the tunneling layer by the LPCVD process. Then, boron was diffused into the silicon substrate at a diffusion temperature of 1100°C and a diffusion time of 0.5 hours, so that the intrinsic amorphous silicon layer was diffused and doped into a doped polysilicon layer. A boron-doped silicon oxide layer was formed on the surface. The target part of the boron-doped silicon oxide layer was subjected to ultraviolet laser heat treatment. The laser wavelength was 350nm, the laser power was 60W, and the energy injection value of the laser heat treatment was 35mJ / cm 2, the target part surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is grown; the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched away by fluorine-containing gas, the gas for etching the doped silicon oxide layer in the non-target area is IF5+water vapor, the flow rates are 10sccm and 100sccm respectively, the gas for etching the doped polysilicon in the non-target area is BrF3+N2, the flow rates are 5sccm and 20sccm respectively, the etching pressure is 5torr, the etching temperature is room temperature, and a local passivation contact structure located on the front side of the silicon substrate is obtained; then a trough-type wet process equipment is used to remove the doped silicon oxide layer on the surface of the silicon substrate, and then a tubular ALD equipment is used to deposit 5.5nm thick aluminum oxide on the front and back sides of the silicon wafer, and PECVD is used to deposit 75nm thick silicon nitride on the front side and 90nm thick silicon nitride on the back side, and metal slurry is screen-printed on the front and back sides of the silicon wafer respectively and sintered to form a front electrode and a back electrode, to obtain a front local passivation contact solar cell.

[0093] The fill factor of the solar cell prepared in this embodiment is 82.1%, the photoelectric conversion efficiency is 23.6%, the open circuit voltage is 704.2mV, and the short circuit current is 40.3mA / cm 2 .

[0094] Example 6

[0095] A P-type single crystal silicon wafer was selected as the silicon substrate. A 1 nm tunneling layer (the material of the tunneling layer was silicon carbide) was prepared on the front side of the silicon substrate by the LPCVD process. A 200 nm intrinsic amorphous silicon layer was prepared on the tunneling layer by the LPCVD process. Then, boron was diffused into the silicon substrate at a diffusion temperature of 1000°C and a diffusion time of 1 hour, so that the intrinsic amorphous silicon layer was diffused and doped into a doped polysilicon layer. A boron-doped silicon oxide layer was formed on the surface. The target part of the boron-doped silicon oxide layer was subjected to green laser heat treatment. The laser wavelength was 515 nm, the laser power was 50 W, and the energy injection value of the laser heat treatment was 30 mJ / cm 2; The target part of the surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is enlarged; the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched by fluorine-containing gas, the doped silicon oxide layer in the non-target area is BrF5+water vapor, and the doped polysilicon in the non-target area is CF4 and O2 mixed gas, the flow rate is 20sccm and 6sccm respectively, the etching pressure is 15mTorr, and the etching temperature is room temperature. A local passivation contact structure located on the front side of the silicon substrate is obtained; after removing the amorphous silicon in the non-target area, the tunneling layer in the non-target area is removed, the etching gas is CIF+water vapor, the etching pressure is 7torr, the etching temperature is room temperature, the water vapor flow rate is 300sccm, and the CIF flow rate is 10sccm, and an electrode is prepared on the local passivation contact structure (the method is the same as in Example 1, the same below), and a front local passivation contact solar cell is obtained.

[0096] The fill factor of the solar cell prepared in this embodiment is 81.8%, the photoelectric conversion efficiency is 23.5%, the open circuit voltage is 703.2mV, and the short circuit current is 40.4mA / cm 2 .

[0097] Example 7

[0098] A P-type single crystal silicon wafer was selected as the silicon substrate, and a 1nm tunneling layer (the material of the tunneling layer was silicon oxynitride) was prepared on the front side of the silicon substrate by the LPCVD process. A 50nm intrinsic amorphous silicon layer was prepared on the tunneling layer by the LPCVD process. Then, boron was diffused into the silicon substrate at a diffusion temperature of 1000°C and a diffusion time of 1 hour, so that the intrinsic amorphous silicon layer was diffused and doped into a doped polysilicon layer, and a boron-doped silicon oxide layer was formed on the surface. The target part of the boron-doped silicon oxide layer was subjected to ultraviolet laser heat treatment, with a laser wavelength of 190nm, a laser power of 60W, and an energy injection value of 40mJ / cm 2 , the target part surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is grown; the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched and removed by fluorine-containing gas, the gas for etching the doped silicon oxide layer in the non-target area is F2+water vapor (the flow rate of water vapor is 300sccm, and the flow rate of F2 is 10sccm), and the gas for etching the doped polysilicon in the non-target area is a mixed gas of CHF3, SF6 and O2 (the flow rates are all 10sccm, 6sccm and 2sccm), and a local passivation contact structure located on the front side of the silicon substrate is obtained; after removing the amorphous silicon in the non-target area, the tunneling layer in the non-target area is removed, the etching gas is BrF3+H2O, the etching pressure is 5torr, the etching temperature is room temperature, the flow rate of H2O is 100sccm, and the flow rate of BrF3 is 5sccm, and an electrode is prepared on the local passivation contact structure to obtain a front local passivation contact solar cell.

[0099] The fill factor of the solar cell prepared in this embodiment is 81.5%, the photoelectric conversion efficiency is 23.3%, the open circuit voltage is 703.4mV, and the short circuit current is 40.1mA / cm 2 .

[0100] Example 8

[0101] A P-type single crystal silicon wafer was selected as the silicon substrate. A 1 nm tunneling layer (the material of the tunneling layer was silicon oxynitride) was prepared on the front side of the silicon substrate by the LPCVD process. A 100 nm intrinsic amorphous silicon layer was prepared on the tunneling layer by the LPCVD process. Then, boron was diffused into the silicon substrate at a diffusion temperature of 1000°C and a diffusion time of 1 hour, so that the intrinsic amorphous silicon layer was diffusely doped into a doped polysilicon layer. A boron-doped silicon oxide layer was formed on the surface. The target part of the boron-doped silicon oxide layer was subjected to ultraviolet laser heat treatment. The laser wavelength was 200 nm, the laser power was 30 W, and the energy injection value of the laser heat treatment was 30 mJ / cm 2 , the target part surface of the boron-doped silicon oxide layer is modified, the degree of crystallization is improved or the grain size is grown; the doped silicon oxide layer and the doped polysilicon layer in the non-target area are etched and removed by fluorine-containing gas, the gas for etching the doped silicon oxide layer in the non-target area is BrF3+water vapor (flow rates are 10sccm and 200sccm respectively), the gas for etching the doped polysilicon in the non-target area is a mixed gas of SF6, O2 and Ar (flow rates are 15 / 5 / 20sccm respectively), and the etching pressure is 3mTorr to obtain a local passivation contact structure located on the front side of the silicon substrate; after removing the amorphous silicon in the non-target area, the tunneling layer in the non-target area is removed, the etching gas is XeF2+water vapor, the etching pressure is 3torr, the etching temperature is room temperature, the water vapor flow rate is 50sccm, and the XeF2 flow rate is 5sccm, and an electrode is prepared on the local passivation contact structure to obtain a front local passivation contact solar cell.

[0102] The fill factor of the solar cell prepared in this embodiment is 82.3%, the photoelectric conversion efficiency is 23.5%, the open circuit voltage is 703.8mV, and the short circuit current is 40.6mA / cm 2 .

[0103] Comparative Example 1

[0104] A P-type single crystal silicon wafer was selected as the silicon substrate. A 1nm tunneling layer was prepared on the front of the silicon substrate using the LPCVD process. A 150nm intrinsic amorphous silicon layer was prepared on the tunneling layer using the LPCVD process. The amorphous silicon layer was converted into a polycrystalline silicon layer by annealing at 950℃ for 3h. An organic mask (0915A acid-resistant ink from SunChemical, USA) was printed on the target part of the polycrystalline silicon layer to prepare a mask area and a non-mask area. The organic mask is not resistant to alkali corrosion and can be easily removed in an alkaline solution. For example, a 1.5% to 5% (mass fraction) NaOH or KOH solution can completely remove the organic mask within 30 seconds to 5 minutes. The printed pattern of the organic mask corresponds to the electrode design pattern, and the ratio of the printed width to the electrode design width is 1:3, which is convenient for alignment and positioning during subsequent electrode printing. The mask printing height is 3μm. The polysilicon in the unmasked area is removed by etching with fluorine-containing gas to obtain a local passivation contact structure located on the front side of the silicon substrate. The etching method of the fluorine-containing gas is the same as that of Example 1.

[0105] The solar cell prepared in this comparative example has a fill factor of 80.2.0%, a photoelectric conversion efficiency of 22.5%, an open circuit voltage of 700 mV, and a short circuit current of 39.8 mA / cm 2 , the reverse current is 1.2A.

[0106] Comparative Example 2

[0107] A P-type single crystal silicon wafer was selected as the silicon substrate. A 1nm tunneling layer (the material of the tunneling layer was silicon oxynitride) was prepared on the front side of the silicon substrate using the LPCVD process. A 150nm intrinsic amorphous silicon layer was prepared on the tunneling layer using the LPCVD process. The target part of the amorphous silicon layer was subjected to infrared laser heat treatment. The laser wavelength was 545nm, the laser power was 70W, and the energy injection value of the laser heat treatment was 30mJ / cm 2The target part of the amorphous silicon layer is oxidized to prepare silicon oxide, and the bottom is still amorphous silicon, preparing an oxidized amorphous silicon region and a non-oxidized amorphous silicon region; the non-oxidized amorphous silicon region is removed by wet etching, and the specific method is: a 5% concentration (mass concentration) sodium hydroxide solution is reacted at 75°C for 3 minutes to remove the non-oxidized amorphous silicon region, and the oxidized amorphous silicon region is protected by the surface silicon oxide layer and the amorphous silicon below is not corroded by the alkaline solution, thereby obtaining a local passivation contact structure located on the front side of the silicon substrate; after removing the non-oxidized amorphous silicon region, an annealing treatment at 1000°C is performed. The amorphous silicon that was not completely converted into polycrystalline silicon by laser heat treatment was completely converted into polycrystalline silicon, and then the surface oxide layer was removed by a trough wet process equipment. Then, a tubular ALD equipment was used to deposit 6.5nm thick aluminum oxide on the front and back of the silicon wafer, and PECVD was used to deposit 80nm thick silicon nitride on the front and 85nm thick silicon nitride on the back. Metal slurry was screen-printed on the front and back of the silicon wafer respectively and sintered to form front and back electrodes, thus obtaining a front locally passivated contact solar cell.

[0108] In this comparative example, since wet etching is used, polysilicon is corroded to a certain extent during the etching process. The performance of the prepared solar cell is lower than that of the fluorine-containing gas etching, with a fill factor of 80.1%, a photoelectric conversion efficiency of 22.3%, an open circuit voltage of 700.2mV, and a short circuit current of 39.5mA / cm 2 , the reverse current is 1.8A.

[0109] The above are only preferred specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present application should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A method for preparing a front-side locally passivated contact solar cell, characterized in that: The following steps are involved: Providing a silicon substrate; Prepare a tunneling layer on the front side of the silicon substrate; preparing an amorphous silicon layer on the tunneling layer; performing a first heat treatment on the target portion; Removing the non-target partial area to obtain a local passivation contact structure located on the front side of the silicon substrate; The solar cell prepared by using the local passivation contact structure located on the front side of the silicon substrate is a front-side local passivation contact solar cell.

2. The method for preparing a front-side local passivation contact solar cell according to claim 1, characterized in that: The amorphous silicon layer is an intrinsic amorphous silicon layer or a doped amorphous silicon layer.

3. The method for preparing a front-side local passivation contact solar cell according to claim 1, characterized in that: When the amorphous silicon layer is a doped amorphous silicon layer, the first heat treatment is a single-step heat treatment, and the single-step heat treatment is a laser heat treatment.

4. The method for preparing a front-side local passivation contact solar cell according to claim 1, characterized in that: When the amorphous silicon layer is a doped amorphous silicon layer, the first heat treatment is a multi-step heat treatment, which includes: first annealing the doped amorphous silicon layer to form a doped polysilicon layer and a doped silicon oxide layer on the surface, and then performing a second heat treatment on the target portion of the doped silicon oxide layer.

5. The method for preparing a front-side local passivation contact solar cell according to claim 1, characterized in that: When the amorphous silicon layer is an intrinsic amorphous silicon layer, the first heat treatment is a multi-step heat treatment, which includes: firstly performing diffusion doping treatment on the amorphous silicon layer to form a doped polysilicon layer and a doped silicon oxide layer on the surface, and then performing a second heat treatment on the target portion of the doped silicon oxide layer.

6. The method for preparing a front-side local passivated contact solar cell according to claim 4 or 5, characterized in that: The second heat treatment is laser heat treatment.

7. The method for preparing a front-side local passivation contact solar cell according to claim 1, characterized in that: The process used to remove the non-target area is fluorine-containing gas etching.

8. The method for preparing a front-side local passivation contact solar cell according to claim 7, characterized in that: During fluorine-containing gas etching, the etching gas in the fluorine-containing gas includes at least one of HF, F2, XeF2, CIF, CIF3, IF5, BrF5, BrF3, or a mixture of at least one gas and water vapor; or at least one of CF4, C2F6, C3F8, C4F8, C4F6, C5F8, CHF3 or SF6.

9. The method for preparing a front-side local passivation contact solar cell according to claim 1, characterized in that: After removing the amorphous silicon in the non-target area, the method for preparing a solar cell further includes: removing the tunneling layer in the non-target area.

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