Display device

Abstract

A display device according to an embodiment includes: a display unit having a plurality of light emitting regions and non-light emitting regions between adjacent light emitting regions; and a color conversion unit overlapping with the display unit and including a bank layer and a spacer, the bank layer having an opening corresponding to the light emitting area and a bank hole corresponding to the non-light emitting area, the bank hole overlapping with the spacer in a plane, and at least a portion of an edge of the bank layer around the bank hole including a low liquid repellent portion, the low liquid repellency portion has a liquid repellency lower than a liquid repellency of a remaining portion of the surface of the bank layer.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to and the benefit of Korean Patent Application No. 10-2023-0108939 filed in the Korean Intellectual Property Office on August 21, 2023, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present disclosure relates to a display device and a method for manufacturing the same. Background Art

[0004] An organic light emitting device (OLED) is a device that forms excitons when positive holes supplied from an anode and electrons supplied from a cathode are recombined in a light emitting layer disposed between the anode and the cathode, and emits light as the excitons are stabilized.

[0005] Since the light emitting device provides various desirable characteristics such as a wide viewing angle, a fast response speed, a thin thickness, and low power consumption, it is widely used in various electric and electronic devices such as televisions, monitors, and mobile phones.

[0006] Recently, in order to realize a display device having high display quality, a display device including a color conversion layer has been proposed.

[0007] The color conversion layer can convert incident light into light of different colors. Summary of the invention

[0008] Embodiments are directed to preventing display defects caused by impurities such as moisture penetrating into a display device through defects in a layer of the display device.

[0009] According to an embodiment, a display device includes: a display unit having a plurality of light-emitting areas and a non-light-emitting area located between adjacent light-emitting areas; and a color conversion unit overlapping the display unit and including a dam layer and a spacer, the dam layer having openings corresponding to the light-emitting areas and dam holes corresponding to the non-light-emitting areas, the dam holes overlapping the spacer on a plane, and at least a portion of an edge of the dam layer around the dam holes including a low liquid-repellent portion having a liquid repellency lower than that of the rest of the surface of the dam layer.

[0010] The low liquid repellency portion may be formed along the periphery of the bank hole.

[0011] The color conversion unit may further include a color conversion layer located in the opening, and a material layer having a material included in the color conversion layer may be located in the bank hole.

[0012] The thickness of the material layer may be smaller than the thickness of the color conversion layer.

[0013] The material layer may include semiconductor nanocrystals.

[0014] The display unit may include a pixel insulating layer having a pixel opening defining a light emitting area and overlapping a non-light emitting area, and the color conversion unit may further include a substrate and a plurality of color filters between the substrate and the bank layer.

[0015] The spacer may include a portion located inside the dam hole and a portion located outside the dam hole and covering the dam hole.

[0016] The bank layer may be located between the spacer and the plurality of color filters, and the color conversion unit may further include a filling layer located between the bank layer and the display unit.

[0017] The spacer may be spaced apart from the dike hole.

[0018] The spacer may be located between the bank layer and the plurality of color filters, and the color conversion unit may further include a filling layer located between the bank layer and the plurality of color filters.

[0019] The display unit may further include a light emitting device and an encapsulation part covering the light emitting device, and the bank layer may be formed on the encapsulation part.

[0020] The low liquid repellency portion may form an inclined surface or a recessed portion along the periphery of the bank hole.

[0021] The dam hole may have a long side and a short side shorter than the long side in a plane, and a length of the short side of the dam hole may be smaller than a radius of the spacer overlapping the dam hole.

[0022] According to an embodiment, a display device includes: a display unit having a plurality of light-emitting areas and a non-light-emitting area located between adjacent light-emitting areas; and a color conversion unit overlapping the display unit and including a dam layer and a spacer, the dam layer having openings corresponding to the light-emitting areas and dam holes corresponding to the non-light-emitting areas, the dam holes overlapping the spacers on a plane, and the dam holes having a long side and a short side shorter than the long side on a plane, wherein the length of the short side of the dam hole is less than the radius of the spacer overlapping the dam hole.

[0023] The length of the long side of the dike hole may be longer than the diameter of the overlapping spacers.

[0024] At least a portion of an edge of the bank layer around the bank hole may include a low liquid-repellent portion having liquid repellency lower than that of a remaining portion of a surface of the bank layer.

[0025] The low liquid repellent portion may be formed along the periphery of the bank hole. The low liquid repellent portion may be formed in a closed curve form in a plan view.

[0026] A manufacturing method of a display device according to an embodiment includes: forming a dam layer having a plurality of openings and a plurality of dam holes by stacking and patterning an organic material layer on a substrate; forming a color conversion layer and a transmission layer in the plurality of openings; and forming a spacer overlapping the dam holes, wherein the formation of the dam layer includes: forming a low liquid-repellent portion on at least a portion of an edge of the dam layer around the dam holes, the low liquid-repellent portion having a liquid repellency lower than that of the rest of the surface of the dam layer.

[0027] The forming of the bank layer may include exposing the bank layer through a photomask having a first portion corresponding to the bank hole, a second portion having transmittance opposite to that of the first portion, and a third portion disposed between the first portion and the second portion and having semi-transmittance.

[0028] The third portion may include a translucent portion or a slit.

[0029] According to the embodiment, impurities such as moisture may be prevented from penetrating into the display device by preventing defects in the layers of the display device, thereby preventing the occurrence of display defects. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 is a plan view of a display device according to an embodiment.

[0031] Figure 2 is a cross-sectional view of a display device according to an embodiment.

[0032] Figure 3 is a plan view of a display area of ​​a display device according to an embodiment.

[0033] Figure 4 is a plan view of a display area of ​​a display device according to an embodiment.

[0034] Figure 5 yes Figure 4 0 is a cross-sectional view of the display device shown in taken along line A1 - A2 .

[0035] Figure 6 yes Figure 4 0 is a cross-sectional view of the display device shown in taken along line A1 - A2 .

[0036] Figure 7 is a cross-sectional view of a display device according to a comparative example.

[0037] Figures 8 to 11 is a cross-sectional view of a display device in each process of a method of manufacturing the display device according to an embodiment.

[0038] Fig.12 is a plan view of a bank layer of a display device according to an embodiment.

[0039] Fig.13 and Fig.14 yes Fig.12 0 is a cross-sectional view of a bank layer of a display device shown in , taken along line C1 - C2 .

[0040] Fig.15 is a plan view of a photomask used in a process of forming a bank layer of a display device according to an embodiment.

[0041] Fig.16 is a plan view of a photomask used in a process of forming a bank layer of a display device according to an embodiment.

[0042] Fig.17 is a plan view of a photomask according to an embodiment.

[0043] Fig.18 yes Fig.17 is a cross-sectional view of the photomask shown in FIG. 1 , taken along line B1 - B2 .

[0044] Fig.19 It is shot from above and dripping in use Fig.17 and Fig.18 Photograph of ink on a bank layer exposed through the photomask shown in FIG.

[0045] Fig. 20 is a photograph taken from above of ink dripping onto a bank barrier exposed in full tone.

[0046] Fig.21 is a perspective view of a bank hole of a display device according to an embodiment.

[0047] Fig. 22 is a plan view illustrating a relationship between a bank hole and a spacer of a display device according to an embodiment.

[0048] Fig.23 and Fig.24 is a plan view illustrating a relationship between a bank hole and a spacer of a display device according to an embodiment. DETAILED DESCRIPTION

[0049] Hereinafter, various embodiments of the inventive concept will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily implement the inventive concept.

[0050] The present disclosure may be embodied in many different forms and is not limited to the embodiments set forth herein.

[0051] In order to clearly describe the disclosure of the present invention, parts irrelevant to the description are omitted, and the same reference numerals are assigned to the same or similar components throughout the specification.

[0052] Furthermore, since the size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, the present invention is not necessarily limited to the shown size and thickness.

[0053] In the drawings, the thickness is shown exaggerated to clearly indicate each layer and region.

[0054] Also, for convenience of explanation, the thicknesses of some layers and regions are exaggerated in the drawings.

[0055] Furthermore, when a component such as a layer, film, region, or plate is referred to as being “on” or “on” another component, this includes not only the case where it is “directly on” the other component but also the case where another component is present therebetween.

[0056] In contrast, when a component is referred to as being “directly on” another component, this means that there are no intervening components.

[0057] Furthermore, “above” or “on” a reference component means located above or below the reference component, and does not necessarily mean located “above” or “on” in an opposite direction of gravity.

[0058] Furthermore, throughout the specification, when a component is referred to as “comprising…”, this means that it may further include other components rather than excluding other components unless stated otherwise.

[0059] Furthermore, throughout the specification, when a “plan view” is mentioned, this means when a target component is viewed from above, and when a “cross-sectional view” is mentioned, this means when a cross section of the target component cut vertically is viewed from the side.

[0060] Will refer to Figures 1 to 4 The structure of the display device according to the embodiment will be described.

[0061] Figure 1 is a plan view of a display device according to an embodiment, Figure 2 is a cross-sectional view of a display device according to an embodiment, Figure 3 is a plan view of a display area of ​​a display device according to an embodiment, and Figure 4 is a plan view of a display area of ​​a display device according to an embodiment.

[0062] refer to Figure 1 , the display device 1000 according to the embodiment includes a display panel 110 including a display area DA capable of displaying an image and a peripheral area PA located around the display area DA.

[0063] The display area DA includes a plurality of pixels PX as a unit for displaying an image, and the peripheral area PA may display an image or may not display an image.

[0064] The peripheral area PA may surround the display area DA, but is not limited thereto.

[0065] The display area DA may have a display surface parallel to a plane defined by the first direction DR1 and the second direction DR2 .

[0066] Herein, a direction perpendicular to a plane of a display surface on which an image is displayed is referred to as a thickness direction of the display panel 110 , and may be parallel to the third direction DR3 .

[0067] The display panel 110 may be a rigid display panel, but is not limited thereto, and may also be a flexible display panel.

[0068] The display panel 110 may be a light-emitting display panel, but the type of the display panel 110 is not limited thereto and may be various types of panels.

[0069] For example, the display panel 110 may include a micro light emitting diode display panel, a quantum dot light emitting diode display panel, a quantum dot organic light emitting diode display panel, and the like.

[0070] refer to Figure 1 and Figure 2 The display panel 110 according to the embodiment includes at least one substrate SUB, and a plurality of pixels PX and Figure 1 The display area DA is correspondingly provided on the substrate SUB.

[0071] The plurality of pixels PX may include a first pixel PA1, a second pixel PA2, and a third pixel PA3 capable of expressing different colors.

[0072] Each pixel PX may include at least one transistor and a light emitting device connected to the at least one transistor.

[0073] The encapsulation part ENC may be located on the plurality of pixels PX.

[0074] The encapsulation portion ENC may cover the light emitting device ED to protect the light emitting device ED from external air or moisture.

[0075] The encapsulation part ENC may overlap the front surface of the display area DA in a direction in which an image is displayed, and may also be partially disposed in the peripheral area PA.

[0076] The first color conversion portion CC1 , the second color conversion portion CC2 , and the transmission portion CC3 may be located on the encapsulation portion ENC.

[0077] The first color conversion portion CC1 overlaps the first pixel PA1, the second color conversion portion CC2 overlaps the second pixel PA2, and the transmission portion CC3 overlaps the third pixel PA3.

[0078] Light emitted from the first pixel PA1 may pass through the first color conversion portion CC1 to provide first color light LR.

[0079] Light emitted from the second pixel PA2 may pass through the second color conversion portion CC2 to provide second color light LG.

[0080] Light emitted from the third pixel PA3 may pass through the transmission portion CC3 to provide third color light LB.

[0081] In one embodiment, the first color light LR may be red light, the second color light LG may be green light, and the third color light LB may be blue light, but the displayed colors are not limited thereto.

[0082] refer to Figure 2 , Figure 3 and Figure 4 , the display area DA according to the embodiment may include a plurality of light emitting areas corresponding to the plurality of pixels PX.

[0083] For example, a first light emitting area LEA1 corresponding to the first pixel PA1, a second light emitting area LEA2 corresponding to the second pixel PA2, and a third light emitting area LEA3 corresponding to the third pixel PA3 may be included.

[0084] In the display area DA, the non-light emitting area NLA may be located between the first light emitting area LEA1 , the second light emitting area LEA2 , and the third light emitting area LEA3 .

[0085] Each of the light emitting areas LEA1, LEA2, and LEA3 is illustrated to have a rectangular shape on a plane, but may have other shapes such as a rhombus, a pentagon, and an octagon, and may have various shapes and areas according to embodiments.

[0086] The bank layer BNK may be located in the non-light emitting area NLA, and the opening OPA may be formed by removing the bank layer BNK from each of the light emitting areas LEA1 , LEA2 , and LEA3 .

[0087] The bank layer BNK may include an organic material such as acrylic resin.

[0088] The bank layer BNK may include a light absorbing material that absorbs light in the visible wavelength band.

[0089] According to an embodiment, the bank blocking layer BNK may serve as a light blocking member by including an organic light blocking material, and may serve as a barrier rib.

[0090] refer to Figure 4 , the bank layer BNK included in the display device 1000 according to the embodiment may have a plurality of bank holes OP located in the non-emission area NLA.

[0091] Each of the bank holes OP may overlap with the corresponding spacer CS in a plane.

[0092] The bank hole OP does not overlap the light emitting areas LEA1, LEA2, and LEA3 of each pixel PX.

[0093] Reference Figures 5 to 7 and the previously described drawings to describe the detailed cross-sectional structure of the display device according to the embodiment.

[0094] Figure 5 yes Figure 4 0 is a cross-sectional view of the display device shown in taken along line A1 - A2 .

[0095] refer to Figure 5 , the display device 1000 according to the embodiment may include a display unit DC and a color conversion unit CC.

[0096] The display unit DC may include a first substrate SUB1, and a plurality of transistors and a plurality of light emitting devices formed on the first substrate SUB1.

[0097] The first substrate SUB1 may include an insulating material, and may include a transparent material.

[0098] For example, the first substrate SUB1 may include glass, quartz, or plastic such as polyimide.

[0099] The first substrate SUB1 may be a rigid substrate, or may have a flexible property that can be bent, folded, or rolled.

[0100] A buffer layer BF may be located on the first substrate SUB1.

[0101] The buffer layer BF may include an organic insulating material or a silicon oxide (SiO x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) of an inorganic insulating material, and may have a single layer or a plurality of layers.

[0102] The semiconductor layer ACT may be located on the buffer layer BF.

[0103] The semiconductor layer ACT may include a semiconductor material such as amorphous silicon, polycrystalline silicon, or an oxide semiconductor.

[0104] The semiconductor layer ACT may include a channel region C, a source region S, and a drain region D.

[0105] The source region S and the drain region D may be disposed at both sides of the channel region C, respectively.

[0106] The channel region C is an intrinsic semiconductor not doped with impurities, and the source region S and the drain region D are impurity semiconductors doped with conductive impurities and may have conductivity.

[0107] A gate insulating layer GI may be located on the semiconductor layer ACT.

[0108] The gate insulating layer GI may include an organic insulating material or a layer containing silicon oxide (SiO x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) of an inorganic insulating material, and may have a single layer or a plurality of layers.

[0109] A first conductive layer including a gate electrode GE may be located on the gate insulating layer GI.

[0110] The first conductive layer may include at least one metal or metal alloy such as aluminum (Al), platinum (Pt), palladium (Pd), silver (Ag), magnesium (Mg), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), calcium (Ca), molybdenum (Mo), titanium (Ti), tungsten (W) or copper (Cu), and it may have a single layer or multiple layers.

[0111] An interlayer insulating layer IL1 may be located on the gate electrode GE.

[0112] The interlayer insulating layer IL1 may include an organic insulating material or a material including silicon oxide (SiO x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) of an inorganic insulating material, and may have a single layer or a plurality of layers.

[0113] A second conductive layer including the source electrode SE and the drain electrode DE may be positioned on the interlayer insulating layer IL1 .

[0114] The source electrode SE and the drain electrode DE may be electrically connected to the source region S and the drain region D of the semiconductor layer ACT, respectively, through contact holes formed in the interlayer insulating layer IL1 .

[0115] A passivation layer IL2 may be on the interlayer insulating layer IL1 , the source electrode SE, and the drain electrode DE.

[0116] The passivation layer IL2 may cover and planarize the interlayer insulating layer IL1 , the source electrode SE, and the drain electrode DE.

[0117] The passivation layer IL2 may include an inorganic insulating material or an organic insulating material such as a polymer derivative, an acrylic polymer, an imide polymer (eg, polyimide), a polyamide, an acrylic polymer, and a siloxane polymer.

[0118] A third conductive layer including the first electrode E1 may be located on the passivation layer IL2 .

[0119] The first electrode E1 may be electrically connected to the drain electrode DE through the contact hole of the passivation layer IL2 .

[0120] The driving transistor composed of the gate electrode GE, the semiconductor layer ACT, the source electrode SE, and the drain electrode DE is electrically connected to the first electrode E1 to apply a driving current to the light emitting device ED which will be described later.

[0121] The display device 1000 according to the embodiment may further include, in addition to the driving transistor, a switching transistor connected to the data line and transmitting a data voltage in response to a scan signal, and a compensation transistor connected to the driving transistor and compensating for a threshold voltage of the driving transistor in response to the scan signal.

[0122] The pixel insulation layer PDL may be located on the passivation layer IL2 and the first electrode E1 .

[0123] The pixel insulating layer PDL may have a pixel opening overlapping the first electrode E1 and defining a light emitting area.

[0124] The pixel insulating layer PDL may include an organic insulating material such as polyimide, polyamide, acrylic resin, benzocyclobutene, or phenolic resin, or a silicon dioxide-based inorganic insulating material.

[0125] The light emitting layer EML may be located on the first electrode E1 to overlap the pixel opening.

[0126] The light emitting layer EML may include a low molecular weight organic material or a high molecular weight organic material such as poly(3,4-ethylenedioxythiophene) (PEDOT).

[0127] The light emitting layer EML includes at least one of a hole injection layer (HIL), a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Further, the light emitting layer EML may be a multi-layer film.

[0128] Most of the light emitting layer EML may be located within the pixel opening, and may include a portion located on the pixel insulating layer PDL or on a side of the pixel insulating layer PDL.

[0129] The second electrode E2 may be located on the light emitting layer EML.

[0130] The second electrode E2 may be formed of a single conductive body across a plurality of pixels PX.

[0131] The first electrode E1, the light emitting layer EML, and the second electrode E2 may constitute a light emitting device ED.

[0132] The first electrode E1 may be an anode as a hole injection electrode, and the second electrode E2 may be a cathode as an electron injection electrode.

[0133] However, the embodiment is not necessarily limited thereto, and according to a driving method of the display device 1000 , the first electrode E1 may be used as a cathode and the second electrode E2 may be used as an anode.

[0134] Holes and electrons are injected into the light emitting layer EML from the first electrode E1 and the second electrode E2, respectively, and light emission occurs when excitons formed by the combination of the injected holes and electrons fall from an excited state to a ground state.

[0135] The encapsulation part ENC may be located on the second electrode E2 .

[0136] The encapsulation part ENC may block the inflow of external moisture and oxygen by covering and sealing the light emitting device ED.

[0137] The encapsulation part ENC may include a plurality of layers, and may be formed of a composite layer including inorganic layers and organic layers alternately stacked.

[0138] For example, the encapsulation part ENC may include an inorganic layer EIL1 , an organic layer EOL, and an inorganic layer EIL2 that are sequentially formed.

[0139] The color conversion unit CC may be located on the encapsulation portion ENC.

[0140] The color conversion unit CC may include a second substrate SUB2 overlapping the first substrate SUB1 and parallel to the first substrate SUB1.

[0141] The second substrate SUB2 may include an insulating material, and may include a transparent material.

[0142] For example, the second substrate SUB2 may include glass, quartz, or plastic such as polyimide.

[0143] The second substrate SUB2 may be a rigid substrate, or may have a flexible property that can be bent, folded, or rolled.

[0144] The color conversion unit CC may include a first color filter CF1, a second color filter CF2, and a third color filter CF3 between the second substrate SUB2 and the display unit DC.

[0145] According to an embodiment, the first color filter CF1, the second color filter CF2, and the third color filter CF3 may be formed under the lower surface of the second substrate SUB2.

[0146] The first color filter CF1 may overlap the color conversion layer CCL corresponding to the first light emitting area LEA1.

[0147] The first color filter CF1 transmits the first color light having passed through the color conversion layer CCL corresponding to the first light emitting area LEA1 and absorbs light of other wavelengths, thereby generating the first color light emitted outside the display device 1000, so that the purity of the first color light can be improved.

[0148] The second color filter CF2 may overlap the color conversion layer CCL corresponding to the second light emitting area LEA2.

[0149] The second color filter CF2 transmits the second color light having passed through the color conversion layer CCL corresponding to the second light emitting area LEA2 and absorbs light of other wavelengths, thereby generating the second color light emitted outside the display device 1000, so that the purity of the second color light can be improved.

[0150] The third color filter CF3 may overlap the transmission layer corresponding to the third light emitting area LEA3.

[0151] The third color filter CF3 transmits the third color light having passed through the transmission layer corresponding to the third light emitting area LEA3 and absorbs light of other wavelengths, thereby generating the third color light emitted outside the display device 1000, so that the purity of the third color light can be improved.

[0152] At least two of the first color filter CF1 , the second color filter CF2 , and the third color filter CF3 may overlap in the non-light emitting area NLA to serve as a light blocking member.

[0153] The non-emission area NLA may overlap the pixel insulation layer PDL of the display cell DC.

[0154] The insulating layer IL may be located between the first, second, and third color filters CF1, CF2, and CF3 and the display cell DC.

[0155] The insulating layer IL may include an organic insulating material or a silicon oxide (SiO x ), Silicon Nitride (SiN x ) and silicon oxynitride (SiO x N y ) of inorganic insulating materials.

[0156] The insulating layer IL may be stacked under lower surfaces of the first, second, and third color filters CF1, CF2, and CF3.

[0157] The bank layer BNK may be located between the insulating layer IL and the display cell DC.

[0158] The bank layer BNK may have an opening OPA aligned with the pixel opening.

[0159] The opening OPA may define light emitting areas LEA1 , LEA2 , and LEA3 of each pixel PX.

[0160] The bank layer BNK may overlap the pixel insulation layer PDL of the display cell DC.

[0161] The color conversion layer CCL corresponding to the first light emitting area LEA1, the color conversion layer CCL corresponding to the second light emitting area LEA2, and the transmission layer corresponding to the third light emitting area LEA3 may be located in the opening OPA.

[0162] According to embodiments, the bank layer BNK may be formed under a lower surface of the insulating layer IL.

[0163] The color conversion layer CCL may convert incident light into first color light or second color light.

[0164] The color conversion layer CCL may include quantum dots.

[0165] In the present specification, quantum dots (also referred to as semiconductor nanocrystals) may include II-VI compounds, III-V compounds, IV-VI compounds, IV elements or compounds, I-III-VI compounds, II-III-VI compounds, I-II-IV-VI compounds, or combinations thereof.

[0166] According to an embodiment, the quantum dot may have a core-shell structure including a core including nanocrystals and a shell surrounding the core.

[0167] The shell of the quantum dot may serve as a protective layer to maintain the semiconductor properties by preventing chemical denaturation of the core and / or as a charging layer for imparting electrophoretic properties to the quantum dot.

[0168] The shell may have a single-layer or multi-layer structure.

[0169] The interface between the core and the shell can have a concentration gradient, where the concentration of the element present in the shell decreases with decreasing distance from the center of the quantum dot.

[0170] Examples of shells of quantum dots include oxides of metals or non-metals, semiconductor compounds, or combinations thereof.

[0171] The semiconductor nanocrystal may have a structure including a single semiconductor nanocrystal core and a multi-layered shell surrounding the core.

[0172] Quantum dots can control the absorption / emission wavelength by controlling their composition and size.

[0173] The maximum emission peak wavelength of the quantum dot may have a wavelength range from an ultraviolet wavelength to an infrared wavelength or wider.

[0174] The transmission layer may include a scattering material, and may transmit light incident from the light emitting device ED.

[0175] The color conversion layer CCL corresponding to the first light emitting area LEA1 may color-convert incident light into first color light and emit it.

[0176] The color conversion layer CCL corresponding to the second light emitting area LEA2 may color-convert incident light into second color light and emit it.

[0177] Light incident to the transmission layer corresponding to the third light emitting area LEA3 may be transmitted without a color change.

[0178] The incident light may include, for example, blue light.

[0179] In this case, the incident light may be blue light alone or a mixture of blue light and green light.

[0180] Alternatively, blue light, green light, and red light may all be included in the incident light.

[0181] The filling layer FLL may be located between the color conversion layer CCL and the display cell DC.

[0182] The filling layer FLL may couple the color conversion cell CC and the display cell DC to each other by serving as an adhesive.

[0183] The filling layer FLL may include a filler.

[0184] Depending on the embodiment, air may be filled at the location of the filling layer FLL.

[0185] The spacer CS may be located between the bank layer BNK and the encapsulation part ENC.

[0186] The spacer CS may be formed directly on the encapsulation portion ENC (not shown in this embodiment), or may be formed as shown in FIG. Figure 5 As shown in FIG. 1 , the bank layer BNK is formed directly below the bank layer BNK.

[0187] exist Figure 5 In the embodiment of the present invention, the spacer CS may be located between the bank layer BNK and the filling layer FLL.

[0188] The spacer CS may maintain a gap between the display cell DC and the color conversion cell CC.

[0189] The bank layer BNK according to an embodiment may have a plurality of bank holes OP spaced apart from the opening OPA.

[0190] The bank hole OP may be filled with the spacer CS and overlap the spacer CS on a plane.

[0191] The spacer CS overlapping the bank hole OP may include a portion located inside the bank hole OP and a portion located outside the bank hole OP and overlapping the bank hole OP on the bank hole OP.

[0192] The bank hole OP and the spacer CS may overlap the pixel insulation layer PDL.

[0193] refer to Figure 5 , the material layer CCM having the material included in the color conversion layer CCL may exist in any one of the plurality of bank holes OP.

[0194] However, this is not a limitation of the present disclosure, and in some embodiments, the material layer CCM may be disposed outside the bank hole OP.

[0195] In the case where the material layer CCM is disposed in the bank hole OP, the thickness of the material layer CCM in the third direction DR3 may be less than the thickness of the color conversion layer CCL in the opening OPA in the third direction DR3.

[0196] At least a portion of the edge of the bank layer BNK around the bank hole OP may include a low liquid-repellent portion having liquid repellency lower than that of the rest of the surface of the bank layer BNK.

[0197] The low liquid repellent portion may be formed in a closed curve form along the periphery of the bank hole OP, but is not limited thereto.

[0198] The capping layer CAPL may be located between the bank layer BNK, the color conversion layer CCL, the transmission layer and the material layer CCM, and the filling layer FLL and the spacer CS.

[0199] The capping layer CAPL may cover the bank layer BNK, the color conversion layer CCL, the transmission layer, and the material layer CCM.

[0200] At least a portion of the capping layer CAPL may be located on inner walls of the bank hole OP and the opening OPA.

[0201] The capping layer CAPL may prevent impurities such as moisture or air from penetrating into the first color filter CF1 , the second color filter CF2 , the third color filter CF3 , the color conversion layer CCL, and the transmission layer.

[0202] The capping layer CAPL may include an inorganic material.

[0203] The filling layer FLL may be located between the bank layer BNK, the color conversion layer CCL, the transmission layer, the material layer CCM, and the capping layer CAPL, and the encapsulation part ENC of the display unit DC.

[0204] The capping layer CAPL may include a portion between the bank layer BNK and the spacer CS.

[0205] Among the bank holes OP, the inner part of the bank holes OP which is not filled with the spacer CS may be filled with the filling layer FLL.

[0206] According to one embodiment, the bank hole OP may be formed to completely penetrate the bank layer BNK to the bottom of the insulating layer IL in the third direction DR3 , or may partially penetrate the bank layer BNK in the third direction DR3 so that a portion of the bank layer BNK may remain at the location of the bank hole OP.

[0207] That is, the thickness of the embankment hole OP in the third direction DR3 may be the same as or similar to the thickness of the embankment layer BNK in the third direction DR3 in which the embankment hole OP or the opening OPA is not formed, or may be smaller than the thickness of the embankment layer BNK in the third direction DR3 in which the embankment hole OP or the opening OPA is not formed.

[0208] Figure 6 yes Figure 4 0 is a cross-sectional view of the display device shown in taken along line A1 - A2 .

[0209] refer to Figure 6 The display device 1000a according to the embodiment is substantially the same as the display device 1000 according to the previous embodiment, but the bank layer BNK, the color conversion layer CCL, the transmission layer, and the material layer CCM may be formed on the encapsulation part ENC of the display unit DC.

[0210] The filling layer FLL may be located between the bank layer BNK, the color conversion layer CCL, the transmission layer, the material layer CCM, the capping layer CAPL, and the insulating layer IL.

[0211] The spacer CS may be located between the insulating layer IL and the filling layer FLL.

[0212] The spacer CS may be formed on the lower surface of the second substrate SUB2.

[0213] The bank hole OP of the bank layer BNK may overlap the spacer CS on a plane, and may face the spacer CS.

[0214] The spacer CS overlapping the bank hole OP may be spaced apart from the bank layer BNK in the third direction DR3 or may be in contact with an upper surface of the bank layer BNK or an upper surface of the capping layer CAPL.

[0215] Depending on the embodiment, a portion of the spacer CS may be located inside the bank hole OP of the bank layer BNK.

[0216] The bank hole OP and the spacer CS may overlap the pixel insulation layer PDL.

[0217] The filling layer FLL may be located between the first, second, and third color filters CF1, CF2, and CF3 and the bank layer BNK.

[0218] Figure 7 is a cross-sectional view of a display device according to a comparative example.

[0219] During the manufacturing process of the display devices 1000 and 1000 a according to the embodiment, the color conversion layer CCL may be formed by, for example, an inkjet printing method.

[0220] In the inkjet printing process, ink used to form the color conversion layer CCL may erroneously fall on an area outside the opening OPA instead of settling in the opening OPA.

[0221] Because according to Figure 7 The display device 1000r of the comparative example shown in FIG. 1 does not include the bank hole OP, so if the ink is misplaced on the surface of the bank layer BNK where the spacer CS is located, the ink layer CCML is formed at an incorrect position on the bank layer BNK. Since the spacer CS is formed on the misplaced ink layer CCML, the height of the spacer CS may become abnormally high.

[0222] Too high a spacer CS may cause the end of the spacer CS to contact the encapsulation part ENC of the display unit DC, and may cause defects such as cracks in the encapsulation part ENC pressed by the spacer CS. Impurities such as moisture and external air may penetrate into the light emitting device ED through the cracks to cause display defects.

[0223] According to the present disclosure, even if ink for forming the color conversion layer CCL is mispositioned, since the mispositioned ink can flow into the bank hole OP of the bank layer BNK, the mispositioned ink does not cause the spacer CS to become too high and cause possible damage to the encapsulation part ENC.

[0224] Accordingly, defects in the encapsulation part ENC can be prevented, and defects in the light emitting device ED and display defects can be prevented.

[0225] Will refer to Figures 8 to 11 The method for manufacturing the display device according to the embodiment will be described with reference to the drawings described previously.

[0226] Figures 8 to 11is a cross-sectional view of a display device in each process of a method of manufacturing the display device according to an embodiment.

[0227] refer to Figure 8 , a first color filter CF1, a second color filter CF2, and a third color filter CF3 are formed on one surface of the second substrate SUB2.

[0228] The first color filter CF1, the second color filter CF2, and the third color filter CF3 may be formed by exposure and development after coating a photosensitive organic material including a color material of a specific color.

[0229] Next, an insulating layer IL is stacked on the first, second, and third color filters CF1, CF2, and CF3, and a bank layer BNK is formed on the insulating layer IL.

[0230] The bank layer BNK may include a photosensitive organic material.

[0231] The bank layer BNK patterned by exposing and developing the bank layer BNK may have a plurality of openings OPA and a plurality of bank holes OP.

[0232] At least a portion of the edge of the bank layer BNK around the bank hole OP may include a low liquid-repellent portion SLP having liquid repellency lower than that of the rest of the surface of the bank layer BNK (a portion not indicated as SLP).

[0233] The low liquid repellent portion SLP may be formed using a semi-transmissive portion of a photomask used in a patterning process of the bank layer BNK.

[0234] The low liquid repellent portion SLP may be formed in a closed curve form along the periphery of the bank hole OP, but is not limited thereto.

[0235] A specific method of forming the low liquid repellency portion SLP will be described later.

[0236] Next, refer to Fig. 9 , a color conversion layer CCL and a transmission layer TL are formed in a plurality of openings OPA defined in the bank layer BNK.

[0237] The color conversion layer CCL may be formed through an inkjet printing process using an ink composition.

[0238] The color conversion layer CCL and the transmission layer TL corresponding to the light emitting areas LEA1, LEA2, and LEA3 representing different colors may be formed of different ink compositions.

[0239] The ink composition of the color conversion layer CCL may include a scatterer SC and quantum dots SN, and the transmission layer TL may include the scatterer.

[0240] The ink CCM1 dripping toward the opening OPA of the bank layer BNK may settle in the opening OPA to form the color conversion layer CCL, but some of the ink CCM1 may fall into the bank hole OP where the spacer CS is located. The dripping ink CCM2 may enter the bank hole OP. The ink CCM3 on the edge of the bank layer BNK around the bank hole OP may flow into the bank hole OP.

[0241] Specifically, when the low liquid repellent portion SLP is formed at the edge of the bank layer BNK around the bank hole OP, the ink CCM3 is more likely to flow into the bank hole OP rather than stay around the edge.

[0242] The ink entering the bank hole OP may form a material layer CCM.

[0243] Next, refer to Fig.10 , the capping layer CAPL may be formed by disposing an inorganic material on the bank layer BNK, the material layer CCM, the color conversion layer CCL, and the transmission layer TL.

[0244] The capping layer CAPL may be formed over the entire area of ​​the second substrate SUB2.

[0245] Next, refer to Fig.11 , a spacer CS is formed on a portion of the bank layer BNK overlapping the bank hole OP.

[0246] The spacer CS may include a portion CSa positioned higher than the upper surface of the bank layer BNK and a portion CSb located inside the bank hole OP.

[0247] Next, if Figure 5 As shown in , the color conversion cell CC thus formed can be combined with and attached to the display cell DC (with the filling layer FLL interposed therebetween) to complete the display device.

[0248] Will refer to Figure 12 to Figure 14 The structure of the low liquid-repellent portion SLP around the bank hole OP of the bank layer BNK is described with reference to the previously described drawings.

[0249] Fig.12 is a plan view of a bank layer of a display device according to an embodiment, and Fig.13 and Fig.14 yes Fig.12 0 is a cross-sectional view of a bank layer of a display device shown in , taken along line C1 - C2 .

[0250] refer to Fig.12At least a portion of an edge of the bank layer BNK of the display device according to the embodiment around the bank hole OP has a low liquid repellency portion SLP having lower liquid repellency than other portions of the surface of the bank layer BNK.

[0251] In a plan view, the low liquid repellent portion SLP may be formed along the periphery of the bank hole OP.

[0252] exist Fig.13 In the embodiment of the present invention, the low liquid repellent portion SLP may include a substantially inclined surface that slopes downward from the upper surface of the bank layer BNK toward the bank hole OP.

[0253] exist Fig.14 In the embodiment of the present invention, the low liquid repellent portion SLP may include a cutout or a recessed portion at an edge of the bank layer BNK, the cutout or the recessed portion forming an entrance into the bank hole OP. The low liquid repellent portion SLP may form a step from the top surface of the bank layer BNK downward into the bank hole OP.

[0254] Figures 12 to 24 The characteristics of the low liquid repellency portion SLP shown in FIG. 1 can also be applied to the above-described Figures 1 to 6 The display devices 1000 and 1000a of the embodiments shown in FIG.

[0255] refer to Fig.15 and Fig.16 The photomask capable of forming the low liquid repellent portion SLP of the bank layer BNK around the bank hole OP is described with reference to the drawings described above.

[0256] Fig.15 is a plan view of a photomask used in a process of forming a bank layer of a display device according to an embodiment, and Fig.16 is a plan view of a photomask used in a process of forming a bank layer of a display device according to an embodiment.

[0257] refer to Fig.15 The photomask 500 used in the patterning process of the dam layer BNK described above has a first portion 501 corresponding to the dam hole OP, a second portion 502 having a light transmittance property opposite to that of the first portion 501, and a third portion SLT located between the first portion 501 and the second portion 502 and having semi-transmittance.

[0258] For example, when the first portion 501 is a light-transmitting portion that substantially transmits most of the light, the second portion 502 may be a light-blocking portion that blocks the light. When the first portion 501 is light-blocking, the second portion 502 may be light-transmitting.

[0259] More specifically, when the photosensitivity of the bank blocking layer BNK is negative, the first portion 501 may be a light blocking portion, the second portion 502 may be a light transmitting portion, and the third portion SLT may be a portion having a transmittance lower than that of the second portion 502 and higher than that of the first portion 501 .

[0260] The third portion SLT of the photo mask 500 may include a semi-transparent portion or a slit.

[0261] For example, when the light transmittance of the second portion 502 is 100%, the light transmittance of the third portion SLT may be approximately 50% or more and less than 100%.

[0262] When the third part SLT includes Fig.15 When the plurality of slits are shown in FIG, a width Oa of an opening portion of the slit may be equal to or greater than a width Ob of a light blocking portion between adjacent opening portions, and the width Ob of the light blocking portion may be greater than zero.

[0263] The plurality of opening portions of the slits may be arranged along the periphery of the first portion 501 to form one row or two rows or more rows.

[0264] Each of the width Oa of the opening portion and the width Ob of the light blocking portion may be approximately 1 micrometer to 2 micrometers, but is not limited thereto.

[0265] refer to Fig.16 The photomask 500a according to this embodiment is different from the photomask 500a according to Fig.15 The photomask 500 of the embodiment shown in FIG. 5 is substantially the same, but the third portion SLT is located around the first portion 501 , and the third portion SLT may include one or more opening portions forming a closed curve band shape.

[0266] The width Oa of the opening portion may be equal to or greater than the width Ob of the light blocking portion between adjacent opening portions, and the width Ob of the light blocking portion may be greater than zero.

[0267] Each of the width Oa of the opening portion and the width Ob of the light blocking portion may be approximately 1 micrometer to 2 micrometers, but is not limited thereto.

[0268] According to the above described Figure 6 The manufacturing method of the display device of the embodiment illustrated in the figure may include Figures 8 to 16 The manufacturing process is shown in FIG. 1 , but the formation position of the bank layer BNK may be different.

[0269] Specifically, the first, second, and third color filters CF1, CF2, and CF3 and the insulating layer IL may be stacked on the second substrate SUB2, and the spacer CS may be formed on top of them.

[0270] In addition, a bank layer BNK may be formed on the encapsulation part ENC of the display cell DC and then patterned to form a plurality of openings OPA and a plurality of bank holes OP.

[0271] Next, a color conversion layer CCL and a transmission layer TL may be formed in a plurality of openings OPA defined by the patterned bank layer BNK.

[0272] Next, a capping layer CAPL may be formed by stacking an inorganic material on the bank layer BNK, the material layer CCM, the color conversion layer CCL, and the transmission layer TL.

[0273] Next, the second substrate SUB2 on which the spacer CS is formed may be coupled to the display unit DC.

[0274] In this case, the spacer CS may be located at a position where the bank hole OP overlaps.

[0275] Reference Figures 17 to 20 The changes in the liquid repellency of the bank layer according to the exposure method are described together with the previously described drawings.

[0276] Fig.17 is a plan view of a photomask according to an embodiment, Fig.18 yes Fig.17 A cross-sectional view of the photomask shown in FIG. 1 obtained by cutting along line B1 - B2 , Fig.19 It is shot from above and dripping in use Fig.17 and Fig.18 A photograph of ink on a bank layer exposed by a photomask as shown in FIG. Fig. 20 is a photograph taken from above of ink dripping onto a bank barrier exposed in full tone.

[0277] refer to Figures 17 to 20 The photo mask MK forms a semi-transmission portion including opening portions EX and light blocking portions BL alternately arranged to form slits, and light is exposed to the bank blocking layer BNK through the photo mask MK.

[0278] The bank layer BNK exposed through the photomask MK forms a bank layer BNK1 having low liquid repellency on the surface (at Fig.19 ). The bank material exposed through the light-transmitting portion having a light transmittance of 100% remains to form a bank layer BNK2 having a higher liquid repellency than the liquid repellency of the surface of BNK1 (in Fig. 20 ).

[0279] Due to the relatively high liquid repellency of the bank barrier layer BNK2, the droplets Fig. 20 The ink INK2 on the surface of the bank barrier layer BNK2 shown in FIG. 1 is difficult to spread, but the ink INK2 dropped on the surface of the bank barrier layer BNK2 is difficult to spread. Fig.19 The ink INK1 on the surface of the bank layer BNK1 shown in FIG. 1 further spreads outward due to the relatively low liquid repellency of the bank layer BNK1 .

[0280] According to one embodiment, at least a portion of an edge of the bank hole OP of the bank layer BNK of the display device may form a low liquid repellency portion SLP, ie, a surface of the bank layer BNK having lower blistering than a surrounding area, by undergoing half exposure.

[0281] Accordingly, ink dropped on the bank layer BNK around the bank hole OP can be more easily spread and flow into the bank hole OP, thereby reducing the possibility that misaligned ink remains on the bank layer BNK.

[0282] Accordingly, it is possible to prevent a high spacer CS from being inadvertently formed due to incorrectly positioned ink, and also prevent a display defect of a display device.

[0283] Reference will be made to the aforementioned drawings and Figure 21 to Figure 24 The shape of the bank hole in the bank layer of the display device according to the embodiment and the relationship with the spacer will be described.

[0284] Fig.21 is a perspective view of a dam hole of a display device according to an embodiment, Fig. 22 is a plan view illustrating a relationship between a bank hole and a spacer of a display device according to an embodiment, and Fig.23 and Fig.24 is a plan view illustrating a relationship between a bank hole and a spacer of a display device according to an embodiment.

[0285] refer to Fig.21 The volume is controlled by adjusting the short side length Wa, height Wb and long side length Wc of the bank hole OP of the bank layer BNK of the display device according to the embodiment in different directions. The three directions may be orthogonal to each other.

[0286] The long side length Wc may be greater than the short side length Wa.

[0287] refer to Fig.21 and Fig. 22 The long side length Wc of the dam hole OP may be greater than, less than or close to the diameter DD of the spacer CS overlapping the dam hole OP, and the short side length Wa of the dam hole OP may be less than the radius DD / 2 of the spacer CS overlapping the dam hole OP.

[0288] refer to Fig.23 and Fig.24 , the dam hole OP can have various planar shapes.

[0289] For example, Fig.23As shown in (a) of FIG. 1 , the planar shape of the bank hole OP is an approximately rectangular shape, and the length of the long side of the bank hole OP is approximately close to the diameter of the spacer CS overlapping the bank hole OP.

[0290] like Fig.23 As shown in (b), the planar shape of the dam hole OP may have a substantially rectangular shape and include a circular portion in the middle.

[0291] like Fig.23 As shown in (c), the planar shape of the bank hole OP may be an elliptical shape, and the length of the major axis may be greater than the diameter of the spacer CS overlapping the bank hole OP.

[0292] like Fig.23 As shown in (d) of FIG. 1 , the planar shape of the bank hole OP may be an elliptical shape, and the length of the major axis may be substantially close to the diameter of the spacer CS overlapping the bank hole OP.

[0293] like Fig.23 As shown in (e), the planar shape of the bank hole OP may be an elliptical shape, and the length of the major axis may be smaller than the diameter of the spacer CS overlapping the bank hole OP.

[0294] like Fig.23 As shown in (f) of FIG. 1 , the planar shape of the bank hole OP may be a circular shape having a diameter smaller than that of the spacer CS overlapping the bank hole OP.

[0295] like Fig.23 As shown in (g), the planar shape of the bank hole OP may be a polygon (eg, a hexagon), and the maximum width of the bank hole OP may be smaller than the diameter of the spacer CS overlapping the bank hole OP.

[0296] like Fig.23 As shown in (h), the planar shape of the bank hole OP may be a polygon (eg, a rectangle), and the length of the long side may be smaller than the diameter of the spacer CS overlapping the bank hole OP.

[0297] For example, Fig.24 As shown in (a), the planar shape of the bank hole OP may have a shape in which two or more rectangles intersect, and the length of the long side of each rectangular portion may be greater than the diameter of the spacer CS overlapping the bank hole OP.

[0298] like Fig.24 As shown in (b), the planar shape of the dam hole OP may have a shape in which two or more rectangles intersect, and the length of the long side of each rectangular portion may be close to the diameter of the spacer CS overlapping the dam hole OP.

[0299] like Fig.24 As shown in (c), the planar shape of the embankment hole OP may have a shape in which two or more rectangles intersect, and the length of the long side of at least one rectangular portion is greater than the diameter of the spacer CS overlapping with the embankment hole OP, and the length of the long side of the remaining rectangular portions may be less than or close to the diameter of the spacer CS.

[0300] like Fig.24 As shown in (d), the planar shape of the embankment hole OP is Fig.24 The planar shape of the dam hole OP of (a) is similar, but may further include a circular portion at the center.

[0301] like Fig.24 As shown in (e), the planar shape of the embankment hole OP is Fig.24 The planar shape of the dam hole OP of (b) is similar, but may further include a circular portion at the center.

[0302] like Fig.24 As shown in (f), the planar shape of the embankment hole OP is Fig.24 The planar shape of the dam hole OP of (c) is similar, but may further include a circular portion at the center.

[0303] like Fig.24 As shown in (g), the planar shape of the embankment hole OP may have a shape in which two or more (for example, three) rectangles intersect near the center of the spacer CS, with the long sides extending outward from the center, and the length of the long side of each rectangular portion may be greater than the radius of the spacer CS overlapping with the embankment hole OP.

[0304] like Fig.24 As shown in (h), the planar shape of the embankment hole OP can have a shape in which two or more (for example, three) rectangles intersect near the center of the spacer CS, with the long sides extending outward from the center and the length of the long side of each rectangular portion is close to the radius of the spacer CS overlapping with the embankment hole OP.

[0305] like Fig.24 As shown in (i), the planar shape of the embankment hole OP is Fig.24 The planar shape of the dam hole OP of (g) is similar, but may further include a circular portion in the middle.

[0306] like Fig.24 As shown in (j), the planar shape of the embankment hole OP is Fig.24 The planar shape of the dam hole OP of (h) is similar, but may further include a circular portion in the middle.

[0307] In order to facilitate the explanation of the planar shape of the embankment retaining hole OP, Fig.23 and Fig.24 Although dotted lines at the boundaries between unit shapes (circular, rectangular, etc.) are shown in FIG. 1 , each of the dam holes OP shown is not a plurality of holes but a hole that can be formed integrally.

[0308] The above examples of the planar shapes of the bank holes OP are not intended to be exhaustive, and the present disclosure covers variations in shape.

[0309] Although the embodiments of the present disclosure are described above in detail, the scope of the present disclosure is not limited thereto, and various modifications and improvements made by those skilled in the art using the basic concept of the present invention defined in the claims are also included in the scope of the present disclosure.

Claims

1. A display device, comprising: A display unit having a plurality of light-emitting areas and a non-light-emitting area between adjacent light-emitting areas; as well as a color conversion unit overlapping the display unit and including a bank layer and a spacer, The barrier layer has an opening corresponding to the light-emitting area and a barrier hole corresponding to the non-light-emitting area. The dam hole overlaps with the spacer in a plane, and At least a portion of an edge of the bank layer around the bank hole includes a low liquid repellency portion having a liquid repellency lower than that of a remaining portion of a surface of the bank layer.

2. The display device according to claim 1, wherein: The low liquid repellency portion is formed along the periphery of the bank hole.

3. The display device according to claim 1, wherein: The color conversion unit further includes a color conversion layer located in the opening, and A material layer having a material included in the color conversion layer is located in the bank hole.

4. The display device according to claim 3, wherein: The thickness of the material layer is smaller than the thickness of the color conversion layer.

5. The display device according to claim 4, wherein: The material layer includes semiconductor nanocrystals.

6. The display device according to any one of claims 1 to 5, wherein: The display unit includes a pixel insulating layer having a pixel opening defining the light emitting area and overlapping the non-light emitting area, and The color conversion unit further includes a substrate and a plurality of color filters between the substrate and the bank layer.

7. The display device according to claim 6, wherein: The spacer includes a portion located inside the dam hole and a portion located outside the dam hole and covering the dam hole.

8. The display device according to claim 7, wherein: The bank layer is located between the spacer and the plurality of color filters, and The color conversion unit further comprises: The filling layer is located between the dam layer and the display unit.

9. The display device according to claim 6, wherein: The spacer is spaced apart from the dam hole.

10. The display device according to claim 9, wherein: The spacer is located between the bank layer and the plurality of color filters, and the color conversion unit further includes: The filling layer is located between the dam layer and the plurality of color filters.

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