Method for evaluating semiconductor wafer and method for manufacturing semiconductor wafer

By performing multiple surface treatments of hydrofluoric acid and ozone water on the surface of the semiconductor wafer, combined with regression analysis, the problem of difficulty in detecting defects caused by microprocessing in the prior art is solved, and effective evaluation of these defects and optimization of manufacturing conditions is achieved.

CN119522479APending Publication Date: 2025-02-25SUMCO CORP
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Patent Information

Application Number
CN202380055383.X
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2022-08-04
Filing Date
2023-05-18
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

The prior art is difficult to detect and evaluate the micro-processing cause defects on the surface of semiconductor wafers, which are usually lower than the detection limit size of the surface defect inspection device.

Method used

The surface of the semiconductor wafer is subjected to multiple surface treatments, including supplying hydrofluoric acid and ozone water to the surface, and performing surface defect inspections after each treatment. The defect conceivable size before the processing was calculated by regression analysis, and the surface treatment number and defect detection size were analyzed.

Benefits of technology

The micro-processing-caused defects on the surface of the semiconductor wafer can be effectively detected and evaluated, providing the envisaged size of the defects, thereby helping to optimize manufacturing conditions to reduce the occurrence of these defects.

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Abstract

A semiconductor wafer evaluation method includes: performing a plurality of surface treatments in which hydrofluoric acid and hydrogen peroxide are supplied to a surface of a semiconductor wafer; performing a surface inspection for inspecting the surface of the semiconductor wafer by a surface defect inspection device before the surface treatment is performed, after each of the surface treatments, and after the completion of the plurality of surface treatments; classifying the LPD detected for the first time in the surface inspection after the surface treatment after the surface treatment as a machining-caused defect, wherein the coordinate point at which the LPD is not detected in the surface inspection prior to the surface treatment is an integer of n-th (n: 1-N-1), and N is the total number of times of the surface treatment); calculating, by regression analysis, an expected size of the processing-causing defect present on the surface of the semiconductor wafer prior to the surface treatment at the coordinate point at which the processing-causing defect has been detected; the regression analysis sets the detection size of the LPD detected in the surface inspection after the completion of the plurality of surface treatments as a target variable, and sets the total number (N-n) of surface treatments performed after the initial detection as an explanatory variable.
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Description

[0001] Cross-references of related applications This application claims the benefit of priority based on Japanese Patent Application No. 2022-124985, filed on August 4, 2022, the entire contents of which are hereby incorporated by reference as a special disclosure. Technical Field

[0002] The present invention relates to a method for evaluating a semiconductor wafer and a method for manufacturing a semiconductor wafer. Background Art

[0003] As a method for evaluating defects in semiconductor wafers, a method based on a bright spot (LPD: Light Point Defect) detected by a surface defect inspection device is widely used (for example, see Patent Documents 1 to 3 (all of which are hereby cited as special disclosures)). According to this method, light is incident on the surface of a semiconductor wafer to be evaluated, and radiated light (scattered light or reflected light) from the surface is detected, thereby being able to evaluate the presence and size of defects on the surface of the semiconductor wafer.

[0004] Patent Document 1: Japanese Patent Application Publication No. 2016-212009 Patent Document 2: Japanese Patent Application Publication No. 2019-47108 Patent Document 3: Japanese Patent Application Publication No. 2020-106399 There may be processing defects on the surface of the semiconductor wafer caused by the processing performed in the manufacturing process. Among these processing defects, there may also be tiny processing defects whose size is lower than the detection limit of the surface defect inspection device. For example, in the previous evaluation methods described in Patent Documents 1 to 3, it is difficult to detect such tiny processing defects. However, if information related to the above-mentioned tiny processing defects can be obtained, then, for example, based on this information, the manufacturing conditions of the semiconductor wafer can be changed in a way to suppress the occurrence of tiny processing defects, thereby manufacturing high-quality semiconductor wafers with fewer tiny processing defects. Summary of the invention

[0005] An object of one embodiment of the present invention is to provide a new evaluation method capable of evaluating minute processing-related defects generated on the surface of a semiconductor wafer due to processing performed in a manufacturing process.

[0006] One embodiment of the present invention is as follows.

[0007] [1] A method for evaluating a semiconductor wafer (hereinafter also referred to as a "wafer"). Including performing multiple surface treatments on the surface of the semiconductor wafer, The surface treatment includes supplying hydrofluoric acid to the surface of the semiconductor wafer, and supplying ozone water to the surface of the semiconductor wafer after the hydrofluoric acid is supplied, or The method comprises supplying ozone water to the surface of the semiconductor wafer, and supplying hydrofluoric acid to the surface of the semiconductor wafer after the ozone water is supplied. The method further includes performing a surface inspection of the surface of the semiconductor wafer by a surface defect inspection device before performing the surface treatment, after each surface treatment, and after the multiple surface treatments are completed. The coordinate points where LPD was not detected in the surface inspection before the surface treatment are classified as processing-caused defects. The total number of times of the surface treatment is N times, where n is an integer greater than or equal to 1 and less than or equal to (N-1). At the coordinate point where the processing-induced defect is detected, the assumed size of the processing-induced defect existing on the surface of the semiconductor wafer before the surface treatment is performed is calculated by regression analysis. The regression analysis sets the detection size of the LPD detected in the surface inspection after the multiple surface treatments as the target variable, and sets the total number of surface treatments performed after the initial detection (Nn) as the explanatory variable.

[0008] [2] The semiconductor chip evaluation method according to [1], wherein the surface treatment includes supplying ozone water to the surface of the semiconductor chip, supplying hydrofluoric acid to the surface of the semiconductor chip after the ozone water is supplied, and supplying ozone water to the surface of the semiconductor chip after the hydrofluoric acid is supplied.

[0009] [3] The semiconductor wafer evaluation method according to [1] or [2], wherein the target variable is set to y, the explanatory variable is set to x, and the following regression equation is used: y=ax+b Carrying out the above regression analysis, In the above regression equation, a is the slope obtained by the above regression analysis, and b is the intercept obtained by the above regression analysis. At the coordinate point where the processing-induced defect is detected, an assumed size of the processing-induced defect existing on the surface of the semiconductor wafer before the surface treatment is performed is obtained as the b.

[0010] [4] The semiconductor wafer evaluation method according to any one of [1] to [3], wherein the ozone water has an ozone concentration of 20 ppm to 30 ppm on a mass basis.

[0011] [5] The semiconductor wafer evaluation method according to any one of [1] to [4], wherein the hydrofluoric acid has a hydrogen fluoride concentration of 0.1 mass % to 1.0 mass %.

[0012] [6] The semiconductor wafer evaluation method according to any one of [1] to [5], wherein the supply time of the hydrofluoric acid is 20 seconds or less.

[0013] [7] A method for manufacturing a semiconductor wafer, comprising: manufacturing semiconductor wafers under manufacturing conditions to be evaluated; Evaluating the manufactured semiconductor wafer using the semiconductor wafer evaluation method described in any one of [1] to [6]; Based on the evaluation result, determining the manufacturing condition that is a modification of the manufacturing condition to be evaluated as the subsequent manufacturing condition, or determining the manufacturing condition to be evaluated as the manufacturing condition to be continuously adopted; and A semiconductor wafer is manufactured under the manufacturing conditions determined above.

[0014] [8] The method for manufacturing a semiconductor wafer according to [7], wherein the manufacturing conditions to which the above-mentioned change is applied are grinding processing conditions of the surface of the semiconductor wafer.

[0015] According to one embodiment of the present invention, it is possible to evaluate minute processing-related defects generated on the surface of a semiconductor wafer due to processing performed in a manufacturing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 The process flow in the above-mentioned evaluation method is shown.

[0017] Figure 2 A schematic diagram showing a specific example of the LPD in-plane distribution on the wafer surface before and after repeated surface treatment.

[0018] Figure 3 This is an illustration of how minute processing-induced defects become more visible due to surface treatment.

[0019] Figure 4 This graph shows the relationship between the LPD detection size of each defect and the number of surface treatment times, in an example in which five defects (defect 1 to defect 5) are randomly selected as LPD detected defects in the surface inspection before surface treatment, after surface inspection before surface treatment is performed on the surface of a silicon wafer (polished wafer).

[0020] Figure 5This graph shows the relationship between the total number of surface treatments performed after the initial inspection and the LPD detection size in the surface inspection after the last surface treatment, for the LPD detected for the first time in the surface inspection after the nth surface treatment, after the surface inspection before surface treatment is performed on the surface of a silicon wafer (polished wafer).

[0021] Figure 6 Shown in Figure 5 In the example shown, the LPD detection size before surface treatment of the LPD detected as a fixed defect (right figure) and the assumed size calculated at the coordinate point where the increased defect was detected (left figure). DETAILED DESCRIPTION

[0022] [Evaluation method of semiconductor wafer] One embodiment of the present invention is a method for evaluating a semiconductor wafer, comprising performing multiple surface treatments on the surface of the semiconductor wafer, wherein the surface treatments include supplying hydrofluoric acid to the surface of the semiconductor wafer and supplying ozone water to the surface of the semiconductor wafer after the hydrofluoric acid is supplied, or supplying ozone water to the surface of the semiconductor wafer and supplying hydrofluoric acid to the surface of the semiconductor wafer after the ozone water is supplied; and further comprising performing a surface inspection of the surface of the semiconductor wafer by a surface defect inspection device before performing the surface treatments, after each surface treatment, and after the multiple surface treatments are completed; and inspecting the surface of the semiconductor wafer before performing the surface treatments. The coordinate point where LPD is not detected in the surface inspection is located at the LPD detected for the first time in the surface inspection after the nth surface treatment and is classified as a processing-induced defect; the total number of the above-mentioned surface treatments is set to N times, and the above-mentioned n is an integer greater than 1 and less than (N-1); at the coordinate point where the above-mentioned processing-induced defect is detected, the assumed size of the above-mentioned processing-induced defect existing on the surface of the semiconductor wafer before the above-mentioned surface treatment is implemented is calculated by regression analysis, and the above-mentioned regression analysis sets the detection size of the LPD detected in the surface inspection after the above-mentioned multiple surface treatments as the target variable, and sets the total number of surface treatments implemented after the above-mentioned initial detection (Nn) as the explanatory variable.

[0023] Hereinafter, the above-mentioned evaluation method will be described in more detail.

[0024] <Semiconductor Wafer to be Evaluated> The semiconductor wafer evaluated by the above evaluation method may be various semiconductor wafers generally used as semiconductor substrates. For example, various silicon wafers may be cited as specific examples of semiconductor wafers. The silicon wafer may be, for example, a single crystal silicon wafer that has been cut out from a single crystal silicon ingot and has undergone various processing steps, such as a polished wafer that has been subjected to a grinding process and has a grinding surface on the surface. The diameter of the semiconductor wafer to be evaluated is, for example, less than 200 mm and more than 200 mm (for example, 200 mm, 300 mm, or 450 mm), but is not limited thereto.

[0025] <Surface inspection using surface defect inspection equipment> As a surface defect inspection device, a known surface defect inspection device that can make light incident on the surface of a semiconductor wafer and detect the radiated light (scattered light or reflected light) from the surface can be used. The above-mentioned surface defect inspection device is generally also referred to as a light scattering type surface defect inspection device, a surface inspection machine, etc. As a specific example of a surface defect inspection device, a laser surface defect inspection device can be cited. The laser surface defect inspection device usually uses a laser to scan the surface of the evaluation object of the semiconductor wafer, and uses the radiated light (scattered light or reflected light) to detect the processing-caused defects and attached particles on the surface of the evaluation object of the wafer as bright spots (LPD). In addition, by measuring the radiated light from the LPD, the processing-caused defects on the surface of the evaluation object of the semiconductor wafer, the position of the attached particles (specifically, the coordinate point) and the size detected as the LPD can be obtained. The above-mentioned LPD detection size is usually output by the analysis unit of the surface defect inspection device by comparing the intensity of the radiated light from the LPD with the radiated light intensity of standard particles such as silica particles. As a laser, ultraviolet light, visible light, etc. can be used, and its wavelength is not particularly limited. Ultraviolet light refers to light in a wavelength range less than 400nm, and visible light refers to light in a wavelength range of 400 to 600nm. The analysis unit of the laser surface defect inspection device is usually able to obtain information on the two-dimensional position coordinates (X coordinate and Y coordinate) on the surface of the evaluation object for each of the multiple LPDs detected, and to produce an LPD map representing the in-plane distribution state of the LPD on the surface of the evaluation object based on the obtained two-dimensional position coordinate information. Specific examples of commercially available laser surface defect inspection devices include Surfscan series SP1, SP2, SP3, SP5, SP7, etc. manufactured by KLA TENCOR. However, these devices are examples, and various other surface defect inspection devices may also be used.

[0026] As described above, micro-processing defects that are below the detection limit size of the surface defect inspection device are difficult to evaluate by conventional surface inspection using the surface defect inspection device. In contrast, according to the above evaluation method, the evaluation of the micro-processing defects can be performed through the following steps.

[0027] <Process flow> Figure 1 The process flow in the above evaluation method is shown below. Figure 1 The process flow shown here explains various steps in the above-mentioned evaluation method.

[0028] (Surface inspection before surface treatment, repeated surface treatment and surface inspection) In the above evaluation method, the semiconductor wafer to be evaluated is subjected to multiple surface treatments ( Figure 1 Before performing multiple surface treatments, a surface inspection of the surface of the semiconductor wafer to be evaluated (surface to be evaluated) is performed ( Figure 1 in, S1).

[0029] After that, the first surface treatment was performed on the surface of the evaluation object ( Figure 1 In S2, a surface inspection of the surface of the evaluation object is performed after the surface treatment ( Figure 1 After that, multiple surface treatments and surface inspections after surface treatments are performed.

[0030] In one embodiment, in the first surface treatment and each subsequent surface treatment, hydrofluoric acid is supplied to the surface of the evaluation object (hereinafter also recorded as "hydrofluoric acid supply process"), and ozone water is supplied to the surface of the evaluation object after the hydrofluoric acid is supplied (hereinafter also recorded as "ozone water supply process for passivation"). This embodiment is recorded as "Method 1". In Method 1, ozone water may also be supplied to the surface of the evaluation object before the hydrofluoric acid supply process (hereinafter also recorded as "ozone water supply process for forming an oxide film"). The implementation of the ozone water supply process for forming an oxide film is arbitrary, but preferably implemented. The preferred reason is described later.

[0031] In another embodiment, in the first surface treatment and each subsequent surface treatment, ozone water is supplied to the surface of the evaluation object (hereinafter also referred to as "ozone water supply process for forming an oxide film"), and hydrofluoric acid is supplied to the surface of the evaluation object after the ozone water is supplied (hereinafter also referred to as "hydrofluoric acid supply process"). This embodiment is described as "Method 2".

[0032] The details of the surface treatments of Method 1 and Method 2 will be described later. In general, after each surface treatment, the surface of the evaluation object may be dried by a known method and then subjected to surface inspection.

[0033] On the surface of the semiconductor wafer, there may be defects such as attached particles that are only attached to the surface and defects caused by processing performed in the manufacturing process as described above. The attached particles on the surface of the evaluation object are usually removed by the first surface treatment. Therefore, if the LPD detected in the surface inspection before the surface treatment is not detected in the surface inspection after the first surface treatment at the coordinate point where the LPD is detected, the LPD can be inferred to be LPD caused by attached particles. Hereinafter, such defects that are not detected as LPD after the first surface treatment are referred to as "vanishing defects."

[0034] In contrast, the LPD detected in the surface inspection before the surface treatment may also be detected in the surface inspection after the first surface treatment and in the surface inspection after the repeated surface treatment at the coordinate point where the LPD is detected. Such LPD can be inferred to be LPD caused by a processing-induced defect that is larger than the detection limit size of the surface defect inspection device. Hereinafter, the above-mentioned processing-induced defect is referred to as a "stationary defect".

[0035] On the other hand, the above-mentioned surface treatment can make the processing-caused defects more obvious. Therefore, a small processing-caused defect that is not detected as LPD in the surface inspection before the surface treatment because it is below the detection limit size of the surface defect inspection device can be detected as LPD in the surface inspection after the first or second or later surface treatment. Hereinafter, such a small processing-caused defect is referred to as an "increased defect". The above-mentioned obviousness is described in detail in the description.

[0036] Figure 2 A schematic diagram showing a specific example of the LPD in-plane distribution on the wafer surface before and after repeated surface treatment. Figure 2 In the figure, both the upper and lower figures include vanishing defects, fixed defects, and increased defects. Figure 2 The position information (coordinate information) of the LPD before and after the surface treatment shown can be estimated as: The only vanishing defects that existed before surface treatment were attached particles; The fixed defect existing in the same position before and after the surface treatment is a large-sized processing-caused defect having a size exceeding the detection limit size of the surface defect inspection device; and The increased defects that did not exist before the surface treatment but existed after the n-th surface treatment are minute processing-induced defects that became apparent through the n-th surface treatment.

[0037] In addition, when the increase defect becomes a disappearance defect by the following surface treatment, it is preferable to remove it as an attached particle. Here, the total number of multiple surface treatments is N, and "n" is an integer greater than or equal to 1 and less than or equal to (N-1).

[0038] Next, the above-mentioned explicitness will be described in more detail.

[0039] Figure 3 This is an explanatory diagram of the clarification of minute processing-induced defects by the surface treatment according to the method 1 described above.

[0040] For example, Figure 3 As schematically shown in (a), the micro-processing-induced defect may be a convex defect. A specific example of the convex defect is PID (Polished Induced Defect). PID is a convex defect introduced into the surface of a semiconductor wafer during a polishing process.

[0041] When ozone water is supplied to the surface of a wafer having minute processing-induced defects (ozone water supply process for forming an oxide film), the surface layer of the wafer is oxidized by the ozone water to form an oxide film ( Figure 3 (b)). In addition, a natural oxide film is usually formed on the surface of the evaluation object before the hydrofluoric acid supply process is performed in the first surface treatment and the second and subsequent surface treatments. Therefore, the implementation of the ozone water supply process for forming the oxide film is optional, but it is preferably implemented. The reason why the ozone water supply process for forming the oxide film is preferably implemented will be described later.

[0042] Preferably, after the ozone water supply step for forming the oxide film is performed, if hydrofluoric acid is supplied to the wafer surface (hydrofluoric acid supply step), at least a portion of the oxide film on the wafer surface is removed (so-called etching) ( Figure 3 (c)). As a result, the size of the micro-processing-induced defects can be increased (i.e., made more obvious). In order to make the micro-processing-induced defects more obvious, it is preferred to perform the hydrofluoric acid supply process in such a way that the oxide film on the surface of the wafer is not completely peeled off but a part of it remains. The above-mentioned hydrofluoric acid supply process will be described later.

[0043] The ozone water supply process (ozone water supply process for passivation) performed thereafter is a process for inhibiting contamination of the wafer surface caused by organic matter, etc., by making the wafer surface inert after the hydrofluoric acid supply process (so-called passivation process). The ozone water supply process for passivation can oxidize the surface of the wafer after the hydrofluoric acid supply process to form an oxide film ( Figure 3 (d)), thereby making the wafer surface inert.

[0044] However, it is not necessary to inertize the wafer surface after the hydrofluoric acid supply process. Therefore, in the case of the surface treatment of the method 2 described above, after the ozone water supply process for forming an oxide film is performed, the hydrofluoric acid supply process is performed, and the surface inspection can be performed without performing the ozone water supply process for passivation.

[0045] (Calculation of the assumed size of micro-machining-related defects based on regression analysis) The size of the above-mentioned micro-processing-caused defects is lower than the detection limit size of the surface defect inspection device used in the surface inspection, and therefore the LPD detection size of the above-mentioned micro-processing-caused defects cannot be obtained as a result of the surface inspection before the surface treatment.

[0046] On the other hand, the present inventors have found in the course of repeated studies that the amount of change in the size of a processing-induced defect caused by each surface treatment performed a plurality of times can be regarded as constant.

[0047] Figure 4 This is a graph showing the relationship between the LPD detection size of each defect and the number of surface treatments in an example where five defects (defects 1 to 5) are randomly selected as LPD-detected defects in the surface inspection before surface treatment after surface inspection before surface treatment on the surface of a silicon wafer (polished wafer). The six surface treatments were performed under the same surface treatment conditions. Figure 4 It was confirmed that the amount of change in the size of the processing-induced defect caused by each surface treatment performed a plurality of times can be regarded as constant.

[0048] Furthermore, as a result of further repeated and in-depth research, the inventors have newly discovered that, under the premise that the amount of change in the size of tiny processing-induced defects caused by each surface treatment performed multiple times is constant, for the tiny processing-induced defects, the size that should be detected by a surface defect inspection device with a smaller detection limit size can be calculated by regression analysis in the following manner.

[0049] First, the LPD detected for the first time in the surface inspection after the nth (n is an integer greater than 1 and less than (N-1) as described above) surface treatment at the coordinate point where the LPD was not detected in the surface inspection before the above-mentioned surface treatment is performed is classified as a processing-caused defect (specifically, the above-mentioned micro-processing-caused defect). At the coordinate point where the micro-processing-caused defect is detected, the assumed size of the micro-processing-caused defect existing on the surface of the semiconductor wafer before the above-mentioned surface treatment is performed is calculated by regression analysis, and the detection size of the LPD in the surface inspection after the completion of multiple surface treatments is set as the target variable, and the total number of surface treatments performed after the initial detection (Nn) is set as the explanatory variable.

[0050] A specific example is shown below, and the steps up to the above-mentioned calculation are described in more detail.

[0051] For evaluation, a polished wafer (single crystal silicon wafer) having a diameter of 300 mm was used as a semiconductor wafer sample.

[0052] Figure 5 This is a graph showing the relationship between the total number of surface treatments performed after the initial detection and the LPD detection size in the surface inspection after the last surface treatment, after the surface inspection before the surface treatment is repeated on the surface of the sample wafer. As a surface defect inspection device, SP7 of the Surfscan series (laser surface defect inspection device) manufactured by KLA TENCOR was used; as a measurement mode, High Sensitivity Oblique Mode (HSO Mode) was used. Each channel of the HSO Mode has the following sensitivity.

[0053] DW1O (Dark-Field Wide1 Oblique) channel: 15nm DW2O (Dark-Field Wide2 Oblique) channel: 25nm DNO (Dark-Field Narrow Oblique) channel: 31nm The channel with the highest sensitivity among the above channels is DW1O. DW1O is highly sensitive to particles. On the other hand, DW2O and DNO are highly sensitive to processing-related defects.

[0054] exist Figure 5 In the example shown, the total number of surface treatments is 6 (N=6). Therefore, for example Figure 5 The mark with the horizontal axis "1 time" is a mark related to LPD that was first detected in the surface inspection after the 5th surface treatment and then subjected to one more surface treatment (6th to 5th time), and the mark with the horizontal axis "2 times" is a mark related to LPD that was first detected in the surface inspection after the 4th surface treatment and then subjected to two more surface treatments (6th to 4th time). The same applies to the marks with the horizontal axes "3rd time", "4th time", and "5th time". Figure 5 The horizontal axis shows a straight line that linearly approximates the average values ​​of the 1st to 5th times. Figure 5 The results shown show the following trend: the smaller the number of times the LPD is first detected during the surface treatment, the larger the LPD detection size is in the surface inspection after the last surface treatment. Based on this result, it can be considered that there is a trend that the larger the size of the wafer surface before the surface treatment of the micro-processing cause defect, the earlier it becomes obvious with fewer surface treatments, and the larger the final LPD detection size is. Furthermore, by statistically calculating the change, the size change caused by one surface treatment can be estimated. For example, if the size of the LPD detected during the last surface treatment (in Figure 5 In the example shown, the LPD detection size in the surface inspection after the sixth surface treatment (i.e., after multiple surface treatments have been completed) is set as the target variable, the total number of surface treatments performed after the initial inspection (Nn) is set as the explanatory variable, and Figure 5 The linear equation of the approximate straight line shown is taken as the regression equation "y=ax+b", and the slope a and the intercept b can be obtained by univariate regression analysis. At the coordinate point where the micro-processing defect is detected, the assumed size of the micro-processing defect existing on the surface of the semiconductor wafer before the above-mentioned surface treatment can be calculated as the above-mentioned b, for example. For example, by pre-preparing a regression equation for each surface treatment condition, thereafter, when performing surface treatment under the surface treatment condition, the pre-prepared regression equation can be used to calculate the assumed size of the micro-processing defect existing on the surface of the semiconductor wafer before the surface treatment under the surface treatment condition is performed by regression analysis, and the regression analysis sets the LPD detection size in the surface inspection after multiple surface treatments as the target variable, and the total number of surface treatments performed after the initial detection (Nn) as the explanatory variable.

[0055] Figure 6 Shown in Figure 5 In the example shown, the LPD detection size before surface treatment of the LPD detected as a fixed defect (right figure) and the assumed size calculated at the coordinate point where the increased defect was detected (left figure). Figure 6 It can be confirmed that the above evaluation method can Figure 5 In the example shown, micro-processing-caused defects with an LPD detection size of 25 nm or less, which cannot be detected by the surface defect inspection device used in general, are made apparent, and are detected by the surface defect inspection device, and the assumed size can be calculated by the method described above.

[0056] <Surface treatment> As described above, in the surface treatment performed multiple times in the above evaluation method, the surface treatment of the above method 1 or the above method 2 is performed. The multiple surface treatments are preferably performed under the same surface treatment conditions. Here, regarding the "same surface treatment conditions", changes in conditions that are inevitably generated in the preparation of the liquid for surface treatment, surface treatment, etc. are allowed.

[0057] The total number of times N of the surface treatments performed multiple times may be 2 or more, 3 or more, 4 or more, or 5 or more. In addition, N may be, for example, 10 or less, 9 or less, 8 or less, 7 or less, or 6 or less. However, the more the number of surface treatments is increased, the more subtle processing-induced defects can be made apparent, so the number of surface treatments is not limited to the number exemplified here, and a larger number of surface treatments may be performed.

[0058] As ozone water, for example, ozone water having a mass-based ozone concentration of 20 ppm or more and 30 ppm or less can be used. As hydrofluoric acid, for example, hydrofluoric acid having a hydrogen fluoride concentration of 0.1 mass % or more and 1.0 mass % or less can be used. The supply of ozone water and hydrofluoric acid to the surface of the evaluation object can be carried out in the same manner as the cleaning process usually performed on semiconductor wafers. Figure 4 as well as Figure 5 In the example shown, ozone water having a mass-based ozone concentration of 25 ppm and hydrofluoric acid having a hydrogen fluoride concentration of 1.0 mass % are used, and an ozone water supply process for forming an oxide film, a hydrofluoric acid supply process, and an ozone water supply process for passivation are carried out in the same manner as the cleaning process normally performed on semiconductor wafers.

[0059] Regarding the supply of ozone water, from the perspective of passivation treatment after the hydrofluoric acid supply process, it is preferred that the ozone water supply process for passivation be performed for a longer time than the ozone water supply process for forming an oxide film. For example, the supply time of ozone water can be about 10 seconds to 60 seconds in the ozone water supply process for forming an oxide film, and can be about 20 seconds to 60 seconds in the ozone water supply process for passivation. Figure 4 as well as Figure 5 In the example shown, the supply time of ozone water is 15 seconds in the ozone water supply step for forming an oxide film and 30 seconds in the ozone water supply step for passivation.

[0060] In the hydrofluoric acid supply process, the supply time of the hydrofluoric acid can be, for example, more than 1 second, more than 2 seconds, or more than 3 seconds. As described above, in order to make the micro-processing-induced defects obvious, it is preferred to carry out the hydrofluoric acid supply process in such a way that the oxide film formed before the hydrofluoric acid supply process is not completely peeled off but a part of it remains. From this point of view, the supply time of the hydrofluoric acid is preferably less than 20 seconds. Figure 4 as well as Figure 5 In the example shown, the supply time of hydrofluoric acid in the hydrofluoric acid supply process is 4 seconds. In addition, as mentioned above, it is preferred that the oxide film formed after the hydrofluoric acid supply process and before the hydrofluoric acid supply process is not completely peeled off and a part remains. Therefore, in the surface treatment of the method 1 described above, it is preferred to implement an ozone water supply process for forming an oxide film before the hydrofluoric acid supply process.

[0061] [Method for manufacturing semiconductor wafer] One embodiment of the present invention relates to a method for manufacturing a semiconductor chip, comprising: manufacturing a semiconductor chip under manufacturing conditions of an evaluation object; evaluating the manufactured semiconductor chip by the semiconductor chip evaluation method; based on the evaluation result, determining manufacturing conditions that have been modified for the manufacturing conditions of the evaluation object as subsequent manufacturing conditions, or determining the manufacturing conditions of the evaluation object as manufacturing conditions to be continued; and manufacturing a semiconductor chip under the manufacturing conditions determined above.

[0062] As specific aspects of the above-mentioned production method, the following aspects can be exemplified.

[0063] The semiconductor wafer is manufactured under manufacturing condition A.

[0064] In addition, the semiconductor wafer is manufactured under manufacturing condition B which is different from manufacturing condition A.

[0065] The manufacturing condition to be evaluated is defined as “manufacturing condition B”.

[0066] Evaluation wafers were extracted from each of the wafer group manufactured under manufacturing condition A and the wafer group manufactured under manufacturing condition B, and were evaluated by the evaluation method described above.

[0067] For example, as a result of the evaluation, when the total number of micro-processing defects classified as process-caused defects in the evaluation method described above is smaller than the number of evaluation wafers extracted from the wafer group manufactured under the manufacturing condition A than the number of evaluation wafers extracted from the wafer group manufactured under the manufacturing condition B, it can be determined that the manufacturing condition A is a manufacturing condition that is less likely to cause micro-processing defects than the manufacturing condition B. In this case, the manufacturing condition B can be changed to be closer to the manufacturing condition A, and the manufacturing condition to which the change is applied can be used as the improved manufacturing condition B to perform subsequent semiconductor wafer manufacturing.

[0068] Furthermore, for example, as a result of the evaluation, regarding the representative value (average value, maximum value, etc.) of the assumed size of the micro-processing-caused defects classified as the process-caused defects calculated in the evaluation method described above, when the evaluation wafers extracted from the wafer group manufactured under the manufacturing condition B are larger than the evaluation wafers extracted from the wafer group manufactured under the manufacturing condition A, it can be determined that the manufacturing condition B is a manufacturing condition that is more likely to cause a larger micro-processing-caused defect than the manufacturing condition A. In this case, the manufacturing condition B can be changed to be closer to the manufacturing condition A, and the manufacturing condition to which the above change is applied can be used as the improved manufacturing condition B to perform subsequent semiconductor wafer manufacturing.

[0069] Furthermore, as specific aspects of the above-mentioned production method, the following aspects can also be exemplified.

[0070] In order to determine manufacturing conditions for manufacturing semiconductor wafers that are actually shipped as products (hereinafter referred to as “actual manufacturing conditions”), first, test manufacturing conditions are determined.

[0071] Semiconductor wafers were manufactured under the test manufacturing conditions.

[0072] The semiconductor wafer manufactured under the test manufacturing conditions was evaluated by the evaluation method described above.

[0073] Based on the evaluation results, the manufacturing conditions obtained by modifying the test manufacturing conditions can be determined as the actual manufacturing conditions, or the test manufacturing conditions themselves can be determined as the actual manufacturing conditions. Then, the semiconductor wafer can be manufactured under the determined actual manufacturing conditions.

[0074] For example, if, as a result of evaluation, the total number of minute processing defects classified as processing defects in the evaluation method described above in a semiconductor wafer manufactured under the test manufacturing conditions exceeds a predetermined target value, it is possible to determine as the actual manufacturing conditions the manufacturing conditions in which changes are made to the test manufacturing conditions in a manner that suppresses the occurrence of minute processing defects.

[0075] In addition, for example, as a result of evaluation, if the representative value (average value, maximum value, etc.) of the assumed size of minute processing-induced defects classified as processing-induced defects calculated in the evaluation method described above in a semiconductor chip manufactured under the test manufacturing conditions exceeds a preset target value, it is also possible to determine as the actual manufacturing condition the manufacturing condition in which changes are made to the test manufacturing conditions in a manner that suppresses the occurrence of minute processing-induced defects.

[0076] Regarding the manufacturing process of semiconductor wafers, for example, the manufacturing process of polishing wafers can be manufactured by the following manufacturing process, which includes cutting (slicing) wafers from semiconductor ingots such as single crystal silicon ingots, chamfering, rough grinding (such as grinding), etching, mirror grinding (fine grinding), and cleaning processes performed between or after the above-mentioned processing steps. PID, which is one form of micro-processing-induced defects, is a defect generated during the grinding process, so the manufacturing conditions to which the above-mentioned changes are applied can be the grinding process conditions of the semiconductor wafer surface. Specifically, various changes in grinding conditions such as replacement of grinding slurry, change of the composition of grinding slurry, replacement of grinding pad, change of the type of grinding pad, change of the operating conditions of the grinding device can be cited.

[0077] One embodiment of the present invention is useful in the field of manufacturing various semiconductor wafers for polishing wafers.

Claims

1. A method for evaluating a semiconductor wafer, characterized in that: Including performing multiple surface treatments on the surface of the semiconductor wafer, The surface treatment includes supplying hydrofluoric acid to the surface of the semiconductor wafer, and supplying ozone water to the surface of the semiconductor wafer after the hydrofluoric acid is supplied, or The method comprises supplying ozone water to the surface of the semiconductor wafer, and supplying hydrofluoric acid to the surface of the semiconductor wafer after the ozone water is supplied. The method further includes performing a surface inspection of the surface of the semiconductor wafer by a surface defect inspection device before performing the surface treatment, after each surface treatment, and after the multiple surface treatments are completed. The LPD detected for the first time in the surface inspection after the n-th surface treatment is classified as a processing-caused defect at a coordinate point where the LPD was not detected in the surface inspection before the surface treatment is performed, The total number of times of the surface treatment is N times, where n is an integer greater than or equal to 1 and less than or equal to (N-1). At the coordinate point where the processing-induced defect is detected, the assumed size of the processing-induced defect existing on the surface of the semiconductor wafer before the surface treatment is performed is calculated by regression analysis, and the regression analysis sets the detection size of the LPD detected in the surface inspection after the multiple surface treatments are completed as the target variable, and sets the total number of surface treatments performed after the initial detection (Nn) as the explanatory variable.

2. The semiconductor wafer evaluation method according to claim 1, wherein: The surface treatment includes supplying ozone water to the surface of the semiconductor wafer, supplying hydrofluoric acid to the surface of the semiconductor wafer after the ozone water is supplied, and supplying ozone water to the surface of the semiconductor wafer after the hydrofluoric acid is supplied.

3. The semiconductor wafer evaluation method according to claim 1, wherein: The target variable is set to y, the explanatory variable is set to x, and the following regression equation is used: y=ax+b Perform the regression analysis, In the regression equation, a is the slope obtained by the regression analysis, and b is the intercept obtained by the regression analysis. At the coordinate point where the processing-caused defect is detected, an assumed size of the processing-caused defect existing on the surface of the semiconductor wafer before the surface treatment is performed is obtained as b.

4. The semiconductor wafer evaluation method according to claim 1, wherein: The ozone water has an ozone concentration of 20 ppm or more and 30 ppm or less based on mass.

5. The semiconductor wafer evaluation method according to claim 1, wherein: The hydrofluoric acid is a hydrofluoric acid having a hydrogen fluoride concentration of 0.1 mass % or more and 1.0 mass % or less.

6. The semiconductor wafer evaluation method according to claim 1, wherein: The supply time of the hydrofluoric acid is 20 seconds or less.

7. The semiconductor wafer evaluation method according to claim 1, wherein: The surface treatment includes supplying ozone water to the surface of the semiconductor wafer, supplying hydrofluoric acid to the surface of the semiconductor wafer after the ozone water is supplied, and supplying ozone water to the surface of the semiconductor wafer after the hydrofluoric acid is supplied, The target variable is set to y, the explanatory variable is set to x, and the following regression equation is used: y=ax+b Perform the regression analysis, In the regression equation, a is the slope obtained by the regression analysis, and b is the intercept obtained by the regression analysis. At the coordinate point where the processing-caused defect is detected, an assumed size of the processing-caused defect existing on the surface of the semiconductor wafer before the surface treatment is performed is obtained as b, The ozone water is ozone water having a mass-based ozone concentration of 20 ppm or more and 30 ppm or less. The hydrofluoric acid is a hydrofluoric acid having a hydrogen fluoride concentration of 0.1 mass % or more and 1.0 mass % or less, and The supply time of the hydrofluoric acid is 20 seconds or less.

8. A method for manufacturing a semiconductor wafer, characterized in that: include: manufacturing semiconductor wafers under manufacturing conditions to be evaluated; evaluating the manufactured semiconductor wafer by the semiconductor wafer evaluation method according to any one of claims 1 to 7; Based on the evaluation result, determining the manufacturing condition that is a modification of the manufacturing condition of the evaluation object as the subsequent manufacturing condition, or determining the manufacturing condition of the evaluation object as the manufacturing condition to be continuously adopted; as well as A semiconductor wafer is manufactured under the determined manufacturing conditions.

9. The method for manufacturing a semiconductor wafer according to claim 8, wherein: The manufacturing conditions to which the above-mentioned changes are applied are the polishing conditions of the surface of the semiconductor wafer.

Citation Information

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