Transistor and manufacturing method of transistor

Abstract

Provided is a transistor having a fine size. The transistor comprises a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, a second insulating layer and a semiconductor layer. The first insulating layer is disposed on the first conductive layer and includes an opening reaching the first conductive layer and a recess surrounding the opening when viewed from a plane. The second conductive layer is provided so as to cover the inner wall of the recess, and has a region facing the semiconductor layer with the first insulating layer interposed therebetween. The semiconductor layer is provided so as to have a region overlapping the opening, and is in contact with the top surface of the first conductive layer, the side surface of the first insulating layer, the side surface of the second conductive layer, and the top surface of the second conductive layer. The second insulating layer is provided in contact with the top surface of the semiconductor layer. The third conductive layer is provided on the second insulating layer so as to cover an inner wall of the opening, and has a region facing the semiconductor layer across the second insulating layer.

Description

Technical Field

[0001] One embodiment of the present invention relates to a transistor, a semiconductor device, a display device, a display module, and an electronic device. One embodiment of the present invention relates to a method for manufacturing a transistor, a method for manufacturing a semiconductor device, and a method for manufacturing a display device.

[0002] Note that one embodiment of the present invention is not limited to the above-mentioned technical field. As an example of the technical field of one embodiment of the present invention, a transistor, a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, a lighting device, an input device (such as a touch sensor), an input-output device (such as a touch panel), a display module, and electronic devices equipped with the same, and their driving methods or manufacturing methods can be cited. Background Art

[0003] Semiconductor devices including transistors are widely used in display devices and electronic devices, and semiconductor devices need to be highly integrated and high-speed. For example, when a semiconductor device is used in a high-definition display device, a highly integrated semiconductor device is required. As one of the methods for increasing the integration of transistors, transistors of fine size are being developed.

[0004] In recent years, there has been a high demand for display devices that can be used for virtual reality (VR), augmented reality (AR), alternative reality (SR), or mixed reality (MR). VR, AR, SR, and MR are collectively referred to as XR (Extended Reality). In order to enhance the sense of reality and immersion, XR display devices are required to have high clarity and high color reproducibility. As devices that can be used for the above-mentioned display devices, for example, liquid crystal display devices, light-emitting devices having light-emitting devices (also called light-emitting elements) such as organic EL (Electro Luminescence) devices or light-emitting diodes (LEDs).

[0005] Patent Document 1 discloses a display device for VR using an organic EL device (also referred to as an organic EL element). [Prior technical literature] [Patent Document]

[0006] [Patent Document 1] International Patent Application Publication No. 2018 / 087625 Summary of the invention Technical problem to be solved by the invention

[0007] One of the purposes of one embodiment of the present invention is to provide a transistor of fine size and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a transistor with large on-state current and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a transistor with good electrical characteristics and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a transistor with high reliability and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a transistor with high productivity and a method for manufacturing the same. In addition, one of the purposes of one embodiment of the present invention is to provide a novel transistor and a method for manufacturing the same.

[0008] Note that the description of these purposes does not prevent the existence of other purposes. One embodiment of the present invention does not need to achieve all of the above purposes. Purposes other than the above can be extracted from the description of the specification, drawings, claims, etc. Solutions to technical problems

[0009] One embodiment of the present invention is a transistor, comprising a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, a second insulating layer and a semiconductor layer, wherein the first insulating layer is arranged on the first conductive layer and comprises an opening reaching the first conductive layer and a recess surrounding the opening when viewed from a plane, the second conductive layer is arranged in a manner covering an inner wall of the recess and having a region opposite to the semiconductor layer with the first insulating layer separated therefrom, the semiconductor layer is arranged in a manner contacting with the inner wall and bottom surface of the opening, the second insulating layer is arranged in a manner contacting with the top surface of the semiconductor layer, and the third conductive layer is arranged on the second insulating layer in a manner covering the inner wall of the opening and having a region opposite to the semiconductor layer with the second insulating layer separated therefrom.

[0010] In the above structure, the semiconductor layer preferably includes an oxide semiconductor.

[0011] In the above structure, preferably, the first insulating layer has a stacked structure of a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer, and the third insulating layer and the fifth insulating layer have regions whose film density is higher than that of the fourth insulating layer.

[0012] In the above structure, it is preferred that when viewed from a cross section, the width of the second conductive layer side of the opening is greater than the width of the first conductive layer side, and when viewed from a cross section, the width of the second conductive layer side of the recess is greater than the width of the first conductive layer side.

[0013] In the above structure, when viewed from the cross section, the width of the opening on the second conductive layer side is greater than the width on the first conductive layer side, and when viewed from the cross section, the width of the recess on the second conductive layer side is less than the width on the first conductive layer side.

[0014] In the above structure, it is preferred that when the length of the side of the first insulating layer contacting the semiconductor layer as viewed from the cross section is set to L1, and the length of the area in the second conductive layer opposite to the semiconductor layer across the first insulating layer as viewed from the cross section is set to L2, L2 is greater than 0.5 times and less than 1.0 times L1.

[0015] In addition, one embodiment of the present invention is a transistor, including a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, a second insulating layer and a semiconductor layer, wherein the first insulating layer is arranged on the first conductive layer and includes a first opening reaching the first conductive layer and a recess surrounding the opening when viewed from a plane, the semiconductor layer is in contact with the inner wall and bottom surface of the opening and the top surface of the first insulating layer, the second conductive layer is arranged in a manner covering the inner wall of the recess and has a region in contact with the top surface of the semiconductor layer and a region opposite to the semiconductor layer across the first insulating layer, the second insulating layer is arranged in a manner contacting the top surface of the semiconductor layer, and the third conductive layer is arranged on the second insulating layer in a manner covering the inner wall of the opening and has a region opposite to the semiconductor layer across the second insulating layer.

[0016] In the above structure, the semiconductor layer preferably includes an oxide semiconductor.

[0017] In the above structure, preferably, the first insulating layer has a stacked structure of a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer, and the third insulating layer and the fifth insulating layer have regions whose film density is higher than that of the fourth insulating layer.

[0018] In the above structure, it is preferred that when viewed from a cross section, the width of the second conductive layer side of the opening is greater than the width of the first conductive layer side, and when viewed from a cross section, the width of the second conductive layer side of the recess is greater than the width of the first conductive layer side.

[0019] In the above structure, it is preferred that when viewed from a cross section, the width of the second conductive layer side of the opening is greater than the width of the first conductive layer side, and when viewed from a cross section, the width of the second conductive layer side of the recess is smaller than the width of the first conductive layer side.

[0020] In the above structure, it is preferred that when the length of the side of the first insulating layer contacting the semiconductor layer as viewed from the cross section is set to L1, and the length of the area in the second conductive layer opposite to the semiconductor layer across the first insulating layer as viewed from the cross section is set to L2, L2 is greater than 0.5 times and less than 1.0 times L1.

[0021] In addition, one embodiment of the present invention is a method for manufacturing a transistor, comprising the following steps: forming a first conductive layer; forming a first insulating layer on the first conductive layer; processing the first insulating layer to form a recess in the first insulating layer; forming a second insulating layer in a manner covering the top surface of the first insulating layer; forming a first conductive film on the second insulating layer; processing the first conductive film to form a second conductive layer, and then, forming an opening reaching the first conductive layer in an area surrounded by the recess when viewed from a plane; forming a metal oxide film in a manner covering the top surface of the second conductive layer, the inner wall of the opening and the bottom surface of the opening; processing the metal oxide film to form a semiconductor layer in a manner having an area overlapping with the inner wall of the opening; forming a third insulating layer in a manner covering the semiconductor layer and the top surface of the second conductive layer; forming a second conductive film on the third insulating layer; and processing the second conductive film to form a third conductive layer in a manner having an area overlapping with the opening.

[0022] In the above manufacturing method, it is preferable that a process of supplying oxygen to the first insulating layer is performed after the first insulating layer is formed.

[0023] In the above-mentioned production method, the metal oxide film is preferably formed using a sputtering method.

[0024] In the above-mentioned manufacturing method, the metal oxide film is preferably formed using an ALD method. Effects of the Invention

[0025] According to one embodiment of the present invention, a transistor with a fine size and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a transistor with a large on-state current and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a transistor with good electrical characteristics and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a transistor with high reliability and a method for manufacturing the same can be provided. In addition, according to one embodiment of the present invention, a method for manufacturing a transistor with high productivity can be provided. In addition, according to one embodiment of the present invention, a novel transistor and a method for manufacturing the same can be provided.

[0026] Note that the description of these effects does not prevent the existence of other effects. One embodiment of the present invention does not necessarily have all of the above effects. Effects other than the above effects can be extracted from the description of the specification, drawings, and claims. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1A is a plan view showing an example of a transistor. Figure 1B is a cross-sectional view showing an example of a transistor. Figure 2A and Figure 2B is a cross-sectional view showing an example of a transistor. Figure 3A and Figure 3B is a cross-sectional view showing an example of a transistor. Figure 4A and Figure 4B is a cross-sectional view showing an example of a transistor. Figure 5A and Figure 5B is a cross-sectional view showing an example of a transistor. Fig. 6A and Figure 6B is a cross-sectional view showing an example of a transistor. Fig. 7A and Figure 7B is a cross-sectional view showing an example of a transistor. Fig. 8A is a plan view showing an example of a transistor. Figure 8B is a cross-sectional view showing an example of a transistor. 9A to 9C is a cross-sectional view showing an example of a method for manufacturing a transistor. FIG. 10A to FIG. 10C is a cross-sectional view showing an example of a method for manufacturing a transistor. FIG. 11A to FIG. 11C is a cross-sectional view showing an example of a method for manufacturing a transistor. Fig.12 It is a perspective view showing an example of a display device. Fig.13 is a cross-sectional view showing an example of a display device. Fig.14 is a cross-sectional view showing an example of a display device. Fig.15 is a cross-sectional view showing an example of a display device. Fig.16 is a cross-sectional view showing an example of a display device. Fig.17 is a cross-sectional view showing an example of a display device. Fig.18 is a cross-sectional view showing an example of a display device. Fig.19 is a cross-sectional view showing an example of a display device. FIG. 20A to FIG. 20F This is a cross-sectional view showing an example of a method for manufacturing a display device. Fig.21A and Fig.21B is a circuit diagram of a pixel circuit. Fig.22A and Fig. 22B is a circuit diagram of a pixel circuit. Fig.23is a circuit diagram of a pixel circuit. Fig.24 is a diagram showing a configuration example of a sequential circuit. FIG. 25A to FIG. 25D is a diagram showing an example of an electronic device. FIG. 26A to FIG. 26F is a diagram showing an example of an electronic device. FIG. 27A to FIG. 27G is a diagram showing an example of an electronic device. Modes for Carrying Out the Invention

[0028] The embodiments are described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the following description, and a person skilled in the art can easily understand that the mode and details can be transformed into various forms without departing from the purpose and scope of the present invention. Therefore, the present invention should not be interpreted as being limited to the contents described in the embodiments shown below.

[0029] Note that in the invention structure described below, the same symbol is shared in different drawings to show the same part or part with the same function, and repeated description is omitted. In addition, when representing a part with the same function, the same hatching is sometimes used without adding a special reference numeral.

[0030] For ease of understanding, the position, size, and range of each component shown in the drawings may not represent its actual position, size, and range. Therefore, the disclosed invention is not necessarily limited to the position, size, and range disclosed in the drawings.

[0031] In addition, depending on the situation or state, the "film" and the "layer" may be interchanged. For example, the "conductive layer" may be replaced with the "conductive film". Also, the "insulating film" may be replaced with the "insulating layer".

[0032] In this specification, etc., a device manufactured using a metal mask or FMM (Fine Metal Mask) is sometimes referred to as a device having an MM (Metal Mask) structure. In addition, in this specification, etc., a device manufactured without using a metal mask or FMM is sometimes referred to as a device having an MML (Metal Mask Less) structure.

[0033] In this specification, etc., a structure in which at least the light-emitting layers are manufactured separately in light-emitting devices with different emission wavelengths is sometimes referred to as an SBS (Side By Side) structure. Since the SBS structure can optimize the materials and structures of each light-emitting device, the freedom of choice of materials and structures is increased, and it is easy to achieve improved brightness and reliability.

[0034] In this specification, holes or electrons are sometimes referred to as "carriers". Specifically, a hole injection layer or an electron injection layer is sometimes referred to as a "carrier injection layer", a hole transport layer or an electron transport layer is sometimes referred to as a "carrier transport layer", and a hole blocking layer or an electron blocking layer is sometimes referred to as a "carrier blocking layer". Note that the above-mentioned carrier injection layer, carrier transport layer, and carrier blocking layer are sometimes not clearly distinguishable based on their cross-sectional shape or characteristics. In addition, sometimes one layer has the functions of two or three of a carrier injection layer, a carrier transport layer, and a carrier blocking layer.

[0035] In this specification, etc., a light-emitting element includes an EL layer between a pair of electrodes. The EL layer includes at least a light-emitting layer. Here, as layers included in the EL layer (also referred to as functional layers), there can be cited a light-emitting layer, a carrier injection layer (hole injection layer and electron injection layer), a carrier transport layer (hole transport layer and electron transport layer) and a carrier blocking layer (hole blocking layer and electron blocking layer).

[0036] In this specification and the like, a light-receiving device (also referred to as a light-receiving element) includes at least an active layer serving as a photoelectric conversion layer between a pair of electrodes.

[0037] In this specification, etc., "island-shaped" means a state where two or more layers formed in the same process and using the same material are physically separated. For example, an island-shaped light-emitting layer means a state where the light-emitting layer is physically separated from an adjacent light-emitting layer.

[0038] In this specification, etc., a conical shape refers to a shape in which at least a portion of the side surface of a constituent element is inclined relative to a substrate surface or a formed surface. For example, preferably, the angle (also referred to as a cone angle) formed by the inclined side surface and the substrate surface or the formed surface is less than 90 degrees, including a region where the above angle is 45 degrees or more and less than 90 degrees, more preferably including a region where the above angle is 50 degrees or more and less than 90 degrees, more preferably including a region where the above angle is 55 degrees or more and less than 90 degrees, more preferably including a region where the above angle is 60 degrees or more and less than 90 degrees, more preferably including a region where the above angle is 60 degrees or more and less than 85 degrees, more preferably including a region where the above angle is 65 degrees or more and less than 85 degrees, more preferably including a region where the above angle is 65 degrees or more and less than 80 degrees, more preferably including a region where the above angle is 70 degrees or more and less than 80 degrees. Here, the side surface, substrate surface and formed surface of the constituent element do not necessarily have to be completely flat, and may also be a nearly planar shape with a fine curvature or a nearly planar shape with fine concave-convex.

[0039] In this specification, etc., a sacrificial layer (also referred to as a mask layer) is located at least above a light-emitting layer (more specifically, a layer processed into an island shape among layers constituting the EL layer) and has a function of protecting the light-emitting layer during the manufacturing process.

[0040] In this specification and the like, disconnection refers to a phenomenon in which a layer, a film, or an electrode is disconnected due to the shape of a formed surface (for example, a step, etc.).

[0041] In this specification, the plane shape refers to the shape when viewed from a plane, that is, the shape when viewed from above. In addition, in this specification, "the plane shape is roughly consistent" means that at least a portion of the edge of each layer in the stack overlaps. For example, it includes the case where the upper layer and the lower layer are processed by the same mask pattern or a portion of the same mask pattern. However, in fact, there are cases where the edges do not overlap, and sometimes the upper layer is located on the inner side of the lower layer or the upper layer is located on the outer side of the lower layer. In this case, it can also be said that "the plane shape is roughly consistent".

[0042] Note that in this specification, etc., “substantially the same height” means a structure in which the heights from a reference surface (for example, a flat surface such as a substrate surface) are substantially the same when viewed in cross section.

[0043] (Implementation Method 1) In this embodiment, a transistor which is one embodiment of the present invention, a method for manufacturing the transistor, and the like are described.

[0044] <Structural Example of Transistor> A transistor which is one embodiment of the present invention will be described. Figure 1A A plan view (also called a top view) of transistor 100 is shown. Figure 1B Shown along Figure 1A The cross-sectional view along the dotted line A1-A2 shown in FIG. Figure 2A Shown along Figure 1A A cross-sectional view along the dashed line B1-B2 is shown. Figure 2B Show Figure 1B An enlarged view of region 144 is shown. Note that Figure 1A A portion of the components of the transistor 100 (such as an insulating layer) is omitted in the figure. The plan view of the transistor and the like is also shown in the following drawings. Figure 1A Similarly, some of the components are omitted.

[0045] The transistor 100 is provided on a substrate 102. The transistor 100 includes a conductive layer 104, an insulating layer 106, a semiconductor layer 108, a conductive layer 112a, a conductive layer 112b, and an insulating layer 110 (insulating layer 110a, insulating layer 110b, and insulating layer 110c). The conductive layer 104 is used as a first gate electrode. A portion of the insulating layer 106 is used as a first gate insulating layer. The conductive layer 112a is used as one of a source electrode and a drain electrode, and the conductive layer 112b is used as the other of the source electrode and the drain electrode. In the semiconductor layer 108, the entire region where the source electrode and the drain electrode overlap with the first gate electrode with the first gate insulating layer interposed therebetween is used as a channel formation region. In addition, in the semiconductor layer 108, the region in contact with the source electrode is used as a source region, and the region in contact with the drain electrode is used as a drain region.

[0046] The conductive layer 112b is used as a second gate electrode (also called a back gate electrode). In addition, a portion of the insulating layer 110 is used as a second gate insulating layer. In other words, in a transistor of one embodiment of the present invention, the conductive layer 112b can have the function of the other of the source electrode and the drain electrode and the function of the second gate electrode. The saturation of the Id-Vd characteristic of the transistor can thereby be improved. Note that in this specification, etc., a situation in which the current change in the saturation region of the Id-Vd characteristic of the transistor is small (the slope is small) is sometimes expressed as "high saturation". In addition, the reliability of the transistor can also be improved. Furthermore, compared with the case in which the other of the source electrode and the drain electrode and the second gate electrode are separately provided, the number of wirings can be reduced in a circuit including the transistor. Therefore, the overall simplification of the circuit can be achieved. In addition, the number of steps during manufacturing is reduced, and productivity can be improved.

[0047] like Figure 1B and Figure 2A As shown, a conductive layer 112a is provided on the substrate 102. An insulating layer 110 (insulating layer 110a, insulating layer 110b, and insulating layer 110c) is provided on the conductive layer 112a. A conductive layer 112b is provided on the insulating layer 110. A semiconductor layer 108 is provided in contact with a portion of the top surface of the conductive layer 112a, a side surface of the insulating layer 110, a side surface of the conductive layer 112b, and a portion of the top surface of the conductive layer 112b. An insulating layer 106 is provided in contact with the top surface and side surface of the semiconductor layer 108 and the top surface of the conductive layer 112b. The conductive layer 104 is provided on the top surface of the insulating layer 106 so as to have a region overlapping with the top surface of the semiconductor layer 108 and the side surface of the insulating layer 110.

[0048] The insulating layer 110 and the conductive layer 112b are provided with an opening 141 that reaches the conductive layer 112a. The opening 141 is Figure 1A ) has an approximately circular shape. Figure 1AIn FIG. 1 , the opening 141 is represented by a substantially circular shape having a diameter and a width D141 and a center at the intersection of the dashed line A1 - A2 and the dashed line B1 - B2 .

[0049] In addition, the insulating layer 110b is provided with a recess 143. The recess 143 is Figure 1A ) has an annular shape with a width S143 in a manner including the opening 141. In other words, it can be said that the recess 143 is provided in a manner surrounding the opening 141. In addition, when the bottom surface of the recess 143 is viewed from a cross section (refer to Figure 1B and Figure 2A ) is located above the top surface of the conductive layer 112a. That is, in the insulating layer 110b, the recess 143 is formed shallower than the opening 141. Note that Figure 1B and Figure 2A In FIG. 14 , an angle formed by the side surface and the top surface of the insulating layer 110 b in the region where the recess 143 is formed is represented as an angle θ143 .

[0050] The insulating layer 110a is provided below the insulating layer 110b. That is, the insulating layer 110a and the insulating layer 110b are sequentially stacked on the conductive layer 112a. The insulating layer 110c is provided in contact with the side surface of the insulating layer 110b in the region overlapping with the recess 143 of the insulating layer 110b (which may also be referred to as the inner wall of the recess 143), the top surface of the insulating layer 110b in the region overlapping with the recess 143 (which may also be referred to as the bottom surface of the recess 143), and the top surface of the insulating layer 110b in the region not overlapping with the recess 143.

[0051] Conductive layer 112b is provided on insulating layer 110c. Conductive layer 112b is provided to cover the inner wall and bottom surface of recess 143. Conductive layer 112b is preferably provided to have a region overlapping (facing) semiconductor layer 108 via insulating layer 110c in recess 143.

[0052] In addition, the semiconductor layer 108 is provided so as to have a region overlapping with the opening 141 and so as to be in contact with the top surface of the conductive layer 112a (which may also be referred to as the bottom surface of the opening 141), the side surfaces of the insulating layer 110 and the conductive layer 112b (which may also be referred to as the inner wall of the opening 141), and the top surface of the conductive layer 112b. The insulating layer 106 is provided so as to be in contact with the top surface and side surfaces of the semiconductor layer 108 and the top surface of the conductive layer 112b. The conductive layer 104 is provided on the insulating layer 106 so as to have a region overlapping with the opening 141. The conductive layer 104 is provided so as to cover the inner wall and the bottom surface of the opening 141. The conductive layer 104 is preferably provided so as to have a region overlapping (facing) the semiconductor layer 108 via the insulating layer 106 in the opening 141.

[0053] The transistor of one embodiment of the present invention has the above structure, and the conductive layer 112a can be used as one of the source electrode and the drain electrode. In addition, the conductive layer 112b can be used as the other of the source electrode and the drain electrode. In addition, the conductive layer 104 can be used as a first gate electrode. In addition, a portion of the insulating layer 106 (a region located at a height between the conductive layer 112a and the conductive layer 112b and overlapping with the conductive layer 104) can be used as a first gate insulating layer. In addition, the portion of the semiconductor layer 108 that overlaps with the first gate insulating layer can be used as a channel formation region.

[0054] In addition, the conductive layer 112b can be used as a second gate electrode. In addition, a portion of the insulating layer 110 (the region of the insulating layer 110b and the insulating layer 110c sandwiched between the conductive layer 112b and the semiconductor layer 108. It can also be said that it is a region sandwiched between the opening 141 and the recess 143 when viewed from a plane) can be used as a second gate insulating layer.

[0055] That is, in the transistor 100 , the conductive layer 112 b can be used as the other of the source electrode and the drain electrode, and can also be used as the second gate electrode.

[0056] A portion of the conductive layer 112b that overlaps (opposes) the semiconductor layer 108 with the insulating layer 110 interposed therebetween serves as a second gate electrode. Figure 2B In FIG. 1 , a length L112b of a portion of the conductive layer 112b serving as the second gate electrode is indicated by a dotted double arrow.

[0057] When the conductive layer 112 b is used as a second gate electrode, the potential of a region of the semiconductor layer 108 opposite to the conductive layer 112 b (also referred to as a back channel region) is fixed, whereby the saturation of the Id-Vd characteristic of the transistor 100 can be improved.

[0058] Since the transistor of one embodiment of the present invention includes the second gate electrode, the controllability of the threshold voltage is improved compared to the case where the transistor does not include the second gate electrode, and the normally-off characteristic can be more reliably achieved.

[0059] Furthermore, since the transistor according to one embodiment of the present invention includes the second gate electrode, it is possible to reduce variation in characteristics among a plurality of transistors. For example, it is possible to reduce variation in threshold values ​​among a plurality of transistors.

[0060] The conductive layer 112b used as the second gate electrode is preferably supplied with a potential on the lower side of the source potential and the drain potential. Therefore, preferably, when the transistor of one embodiment of the present invention is an n-channel transistor, the conductive layer 112b is used as the source electrode and the conductive layer 112a is used as the drain electrode. When the transistor of one embodiment of the present invention is an n-channel transistor, by making one conductive layer (conductive layer 112b) have both the function of the source electrode and the function of the second gate electrode, the influence of electron traps on the back channel region can be suppressed, thereby improving the reliability of the transistor.

[0061] Alternatively, when the transistor of one embodiment of the present invention is an n-channel transistor, the conductive layer 112a may be used as a source electrode and the conductive layer 112b may be used as a drain electrode. In this case, for example, by electrically connecting the conductive layer 104 serving as the first gate electrode to the conductive layer 112b, the transistor of one embodiment of the present invention can be used as a diode.

[0062] In addition, when the transistor of one embodiment of the present invention is a p-channel transistor, the conductive layer 112b is preferably used as a drain electrode and the conductive layer 112a is preferably used as a source electrode. When the transistor of one embodiment of the present invention is a p-channel transistor, the reliability of the transistor can sometimes be improved by making one conductive layer (conductive layer 112b) have both the function of the drain electrode and the function of the second gate electrode.

[0063] Alternatively, when the transistor of one embodiment of the present invention is a p-channel transistor, the conductive layer 112b may be used as a source electrode and the conductive layer 112a may be used as a drain electrode. In this case, for example, by electrically connecting the conductive layer 104 serving as the first gate electrode to the conductive layer 112a, the transistor of one embodiment of the present invention can be used as a diode.

[0064] In addition, by extending the conductive layer 112b, it can also be used as a wiring. That is, by extending the conductive layer 112b, the conductive layer 112b can have three functions: the function of the other of the source electrode and the drain electrode of the transistor 100, the function of the second gate electrode, and the function of the wiring. As a result, the number of wirings can be reduced in the circuit including the transistor, so that the overall circuit can be simplified. In addition, the number of steps during manufacturing is reduced, and productivity can be improved.

[0065] like Figure 1BAs shown in FIG. 1 , in a transistor of one embodiment of the present invention, the source electrode and the drain electrode have different heights relative to the substrate surface, so the drain current flows in the height direction (vertical direction). Therefore, the transistor of one embodiment of the present invention may also be called a vertical transistor, a vertical channel transistor, or a VFET (Vertical Field Effect Transistor).

[0066] In addition, in the transistor 100, the bottom surface (surface on the substrate 102 side) of the semiconductor layer 108 is in contact with the top surface of the conductive layer 112a used as one of the source electrode and the drain electrode and the top surface of the conductive layer 112b used as the other of the source electrode and the drain electrode. Therefore, the transistor 100 can also be called a bottom contact type transistor.

[0067] Next, the channel length and channel width of the transistor 100 will be described.

[0068] The channel length of transistor 100 is the distance between the source region and the drain region. Figure 2B The dotted double arrow in FIG. 1 represents a channel length L100 of the transistor 100. The channel length L100 can also be regarded as the length of the side surface of the insulating layer 110 (insulating layer 110a, insulating layer 110b, and insulating layer 110c) between the source electrode and the drain electrode and in contact with the semiconductor layer 108.

[0069] Here, the channel length L100 of the transistor 100 is determined by the thickness of the insulating layer 110 (insulating layer 110a, insulating layer 110b, and insulating layer 110c), the angle θ141 formed by the side surface of the insulating layer 110 and the formed surface of the insulating layer 110a (the top surface of the conductive layer 112a), etc., and is not affected by the performance of the exposure device used for manufacturing the transistor. Therefore, for example, the channel length L100 can be set to a value smaller than the limiting resolution of the exposure device, and a transistor of a fine size can be realized.

[0070] As described above, in the transistor 100, a portion of the conductive layer 112b is used as a second gate electrode. Therefore, the electric field applied from the conductive layer 112b to the semiconductor layer 108 side is preferably applied to at least half of the back channel region. For example, the length L112b of the portion of the conductive layer 112b used as the second gate electrode is preferably at least half the length of the channel length L100 of the transistor 100. That is, L112b is preferably more than 0.5 times L100, more preferably more than 0.5 times and less than 1.0 times. Thus, the effect of the conductive layer 112b being used as the second gate electrode can be further improved.

[0071] The channel length L100 is, for example, preferably less than 2 μm, less than 1 μm, less than 750 nm, less than 500 nm, less than 400 nm, less than 300 nm, less than 200 nm, less than 100 nm, less than 75 nm, less than 60 nm, less than 50 nm, less than 40 nm, less than 30 nm, less than 20 nm, less than 15 nm, less than 12 nm or less than 10 nm and greater than 2 nm, greater than 3 nm, greater than 5 nm or greater than 8 nm.

[0072] By reducing the channel length L100, the on-state current of the transistor 100 can be increased. By using the transistor 100 with a large on-state current, a circuit capable of high-speed operation can be manufactured. Furthermore, the area occupied by the circuit can be reduced. Therefore, by applying a transistor of one embodiment of the present invention to a semiconductor device, the device can be miniaturized.

[0073] Furthermore, for example, by applying a transistor of one embodiment of the present invention to a display device, the frame of the display device can be reduced. Furthermore, for example, when a transistor of one embodiment of the present invention is applied to a large display device or a high-definition display device, signal delay in each wiring can be reduced even if the number of wirings increases, thereby suppressing display unevenness.

[0074] Generally, when the channel length is small, the saturation of the Id-Vd characteristic of the transistor tends to decrease. However, since the transistor of one embodiment of the present invention includes the second gate electrode, high saturation can be achieved.

[0075] In the transistor of one embodiment of the present invention, the semiconductor layer 108 is provided along the inner wall and the bottom surface of the opening 141. Therefore, in this specification and the like, the width (length) of the region where the semiconductor layer 108 and the conductive layer 112b are in contact in a direction orthogonal to the channel length direction is described as the channel width of the transistor 100. Figure 1A , Figure 1B and Figure 2A In FIG. 1 , a double solid arrow indicates a channel width W100 of the transistor 100. The channel width W100 is Figure 1A ) is equivalent to the circumference of the opening 141.

[0076] The channel width W100 is determined by the planar shape of the opening 141. Figure 1A In FIG. 1 , the double-pointed arrow indicates a width D141 corresponding to the diameter of the approximately circular opening 141. When the planar shape of the opening 141 is approximately circular, as in the transistor 100, the channel width W100 can be calculated as approximately "D141×π". The width D141 is, for example, not less than 0.20 μm and less than 5.0 μm.

[0077] As described above, in a transistor of one embodiment of the present invention, the channel length can be set to an extremely small value by controlling the thickness of the insulating layer 110 or the like. In addition, by controlling the diameter of the opening 141, the channel width can be set to a large value without significantly increasing the occupied area of ​​the transistor in the substrate surface. Therefore, by appropriately setting the channel length and the channel width, the on-state current of the transistor 100 can be further increased.

[0078] Materials that can be used for the transistor of one embodiment of the present invention are described below.

[0079] [Semiconductor layer 108] There is no particular limitation on the semiconductor material that can be used for the semiconductor layer 108. For example, a single material semiconductor or a compound semiconductor can be used. As a single material semiconductor, for example, silicon or germanium can be used. As a compound semiconductor, for example, gallium arsenide and silicon germanium can be cited. As a compound semiconductor, an organic substance having semiconductor characteristics or a metal oxide having semiconductor characteristics (also called an oxide semiconductor) can be used. These semiconductor materials may also contain impurities as dopants.

[0080] There is no particular limitation on the crystallinity of the semiconductor material used for the semiconductor layer 108, and an amorphous semiconductor or a crystalline semiconductor (a single crystal semiconductor, a polycrystalline semiconductor, a microcrystalline semiconductor, or a semiconductor having a crystalline region in part thereof) can be used. When a crystalline semiconductor is used, degradation of transistor characteristics can be suppressed, so it is preferred.

[0081] Silicon can be used for the semiconductor layer 108. Examples of silicon include single crystal silicon, polycrystalline silicon, microcrystalline silicon, and amorphous silicon. Examples of polycrystalline silicon include low temperature polycrystalline silicon (LTPS: Low Temperature Poly Silicon).

[0082] A transistor using amorphous silicon as the semiconductor layer 108 can be formed on a large glass substrate and can be manufactured at low cost. A transistor using polycrystalline silicon as the semiconductor layer 108 has high field effect mobility and can operate at high speed. In addition, a transistor using microcrystalline silicon as the semiconductor layer 108 has higher field effect mobility than a transistor using amorphous silicon and can operate at high speed.

[0083] The semiconductor layer 108 preferably includes a metal oxide. Examples of metal oxides that can be used for the semiconductor layer 108 include indium oxide, gallium oxide, and zinc oxide. The metal oxide preferably includes at least indium or zinc. In addition, the metal oxide preferably includes two or three selected from indium, element M, and zinc. Note that element M is a metal element or a semi-metal element having a high bond energy with oxygen, for example, a metal element or a semi-metal element having a higher bond energy with oxygen than indium. Specifically, as element M, aluminum, gallium, tin, yttrium, titanium, vanadium, chromium, manganese, iron, cobalt, nickel, zirconium, molybdenum, hafnium, tantalum, tungsten, lanthanum, cerium, neodymium, magnesium, calcium, strontium, barium, boron, silicon, germanium, and antimony can be cited. The element M included in the metal oxide is preferably one or more of the above elements, more preferably one or more selected from aluminum, gallium, tin, and yttrium, and further preferably gallium. Note that in this specification, etc., metal elements and semi-metal elements are sometimes collectively referred to as "metal elements", and the "metal elements" described in this specification, etc. sometimes include semi-metal elements.

[0084] The semiconductor layer 108 can be made of, for example, indium zinc oxide (In-Zn oxide), indium tin oxide (In-Sn oxide), indium titanium oxide (In-Ti oxide), indium gallium oxide (In-Ga oxide), indium gallium aluminum oxide (In-Ga-Al oxide), indium gallium tin oxide (In-Ga-Sn oxide), gallium zinc oxide (Ga-Zn oxide, also referred to as GZO), aluminum zinc oxide (Al-Zn oxide), indium aluminum zinc oxide (In-Al-Zn oxide, also referred to as IAZO), indium tin zinc oxide (In-Sn-Zn oxide, also referred to as ITZO (registered trademark)), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium zinc oxide (In-Ga-Zn oxide, also referred to as IGZO), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide, also referred to as IGZTO), indium gallium aluminum zinc oxide (In-Ga-Al-Zn oxide, also referred to as IGAZO, IGZAO, or IAGZO), or the like. Alternatively, indium tin oxide, gallium tin oxide (Ga—Sn oxide), aluminum tin oxide (Al—Sn oxide), or the like containing silicon may be used.

[0085] The metal oxide can be formed by sputtering or atomic layer deposition (ALD) as appropriate. Note that when the metal oxide is formed by sputtering, the atomic ratio of the target material is sometimes different from the atomic ratio of the metal oxide. In particular, the atomic ratio of zinc in the metal oxide is sometimes smaller than the atomic ratio of zinc in the target material. Specifically, the atomic ratio of zinc is sometimes about 40% or more and 90% or less of the atomic ratio of zinc in the target material.

[0086] As a specific example of forming the semiconductor layer 108 by the ALD method, it is preferred to use a deposition method such as a thermal ALD method or a PEALD (Plasma Enhanced ALD: plasma enhanced atomic layer deposition) method. The thermal ALD method has extremely high step coverage, so it is preferred. In addition, the PEALD method not only has high step coverage but also can perform low-temperature deposition, so it is preferred.

[0087] The composition of the metal oxide included in the semiconductor layer 108 has a significant influence on the electrical characteristics and reliability of the transistor 100 .

[0088] For example, by increasing the indium content in the metal oxide, a transistor with a large on-state current can be realized.

[0089] When In-Zn oxide is used as the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is greater than the atomic ratio of zinc. For example, a metal oxide in which the atomic ratio of metal elements is In:Zn=1:1, In:Zn=2:1, In:Zn=3:1, In:Zn=4:1, In:Zn=5:1, In:Zn=7:1, In:Zn=10:1 or a metal oxide in the vicinity thereof can be used as the semiconductor layer 108.

[0090] When In-Sn oxide is used as the semiconductor layer 108, it is preferable to use a metal oxide in which the atomic ratio of indium is greater than the atomic ratio of tin. For example, a metal oxide in which the atomic ratio of metal elements is In:Sn=1:1, In:Sn=2:1, In:Sn=3:1, In:Sn=4:1, In:Sn=5:1, In:Sn=7:1, In:Sn=10:1 or a metal oxide in the vicinity thereof can be used as the semiconductor layer 108.

[0091] When In-Sn-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than the atomic ratio of tin can be used. Furthermore, a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of tin is preferably used. For example, as the semiconductor layer 108, metal elements having an atomic ratio of In:Sn:Zn=2:1:3, In:Sn:Zn=3:1:2, In:Sn:Zn=4:2:3, In:Sn:Zn=4:2:4.1, In:Sn:Zn=5:1:3, In:Sn:Zn=5:1:6, In:Sn:Zn=5:1:7, In:Sn:Zn=5:1:8, In: Sn:Zn=6:1:6、In:Sn:Zn=10:1:3、In:Sn:Zn=10:1:6、In:Sn:Zn=10:1:7、In:Sn:Zn=10:1:8、 In: Sn: Zn = 5: 2: 5, In: Sn: Zn = 10: 1: 10, In: Sn: Zn = 20: 1: 10, In: Sn: Zn = 40: 1: 10 or metal oxides in the vicinity.

[0092] When In-Al-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than the atomic ratio of aluminum can be used. Furthermore, a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of aluminum is preferably used. For example, as the semiconductor layer 108, metal elements having an atomic ratio of In:Al:Zn=2:1:3, In:Al:Zn=3:1:2, In:Al:Zn=4:2:3, In:Al:Zn=4:2:4.1, In:Al:Zn=5:1:3, In:Al:Zn=5:1:6, In:Al:Zn=5:1:7, In:Al:Zn=5:1:8, In: Al:Zn=6:1:6, In:Al:Zn=10:1:3, In:Al:Zn=10:1:6, In:Al:Zn=10:1:7, In:Al:Zn=10:1:8, In:Al:Zn=5:2:5, In:Al:Zn=10:1:10, In:Al:Zn=20:1:10, In:Al:Zn=40:1:10 or metal oxides thereabouts.

[0093] When In-Ga-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium relative to the atomic number of the metal element is higher than the atomic ratio of gallium can be used. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of gallium. For example, as the semiconductor layer 108, metal oxides having atomic ratios of metal elements of In:Ga:Zn=2:1:3, In:Ga:Zn=3:1:2, In:Ga:Zn=4:2:3, In:Ga:Zn=4:2:4.1, In:Ga:Zn=5:1:3, In:Ga:Zn=5:1:6, In:Ga:Zn=5:1:7, In:Ga:Zn=5:1:8, In: Ga:Zn=6:1:6, In:Ga:Zn=10:1:3, In:Ga:Zn=10:1:6, In:Ga:Zn=10:1:7, In:Ga:Zn=10:1:8, In:Ga:Zn=5:2:5, In:Ga:Zn=10:1:10, In:Ga:Zn=20:1:10, In:Ga:Zn=40:1:10 or metal oxides thereabouts.

[0094] When In-M-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium relative to the atomic number of the metal element is higher than the atomic ratio of the element M can be used. Furthermore, it is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of the element M. For example, as the semiconductor layer 108, metal oxides having atomic ratios of metal elements of In:M:Zn=2:1:3, In:M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4.1, In:M:Zn=5:1:3, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5:1:8, In: M:Zn=6:1:6, In:M:Zn=10:1:3, In:M:Zn=10:1:6, In:M:Zn=10:1:7, In:M:Zn=10:1:8, In:M:Zn=5:2:5, In:M:Zn=10:1:10, In:M:Zn=20:1:10, In:M:Zn=40:1:10 or metal oxides thereabouts.

[0095] Note that, in the case where a plurality of metal elements are included as the element M, the sum of the atomic ratios of the metal elements may be the atomic ratio of the element M. For example, when an In-Ga-Al-Zn oxide including gallium and aluminum as the element M is used, the sum of the atomic ratio of gallium and the atomic ratio of aluminum may be the atomic ratio of the element M. In addition, the atomic ratio of indium, the element M, and zinc is preferably within the above range. For example, when an In-Ga-Sn-Zn oxide including gallium and tin as the element M is used, the sum of the atomic ratio of gallium and the atomic ratio of tin may be the atomic ratio of the element M. In addition, the atomic ratio of indium, the element M, and zinc is preferably within the above range.

[0096] It is preferable to use a metal oxide in which the ratio of the number of atoms of indium to the number of atoms of the metal element contained in the metal oxide is 30 atomic % or more and 100 atomic % or less, preferably 30 atomic % or more and 95 atomic % or less, more preferably 35 atomic % or more and 95 atomic % or less, more preferably 35 atomic % or more and 90 atomic % or less, more preferably 40 atomic % or more and 90 atomic % or less, more preferably 45 atomic % or more and 90 atomic % or less, more preferably 50 atomic % or more and 80 atomic % or less, more preferably 60 atomic % or more and 80 atomic % or less, more preferably 70 atomic % or more and 80 atomic % or less. For example, when In-Ga-Zn oxide is used as the semiconductor layer 108, the ratio of the number of atoms of indium to the total number of atoms of indium, element M, and zinc is preferably within the above range.

[0097] In this specification and the like, the ratio of the number of indium atoms to the number of atoms of a metal element contained may be described as the indium content. The same applies to other metal elements.

[0098] By increasing the indium content of the metal oxide, a transistor with a large on-state current can be realized. By using this transistor for a transistor requiring a large on-state current, a semiconductor device with excellent electrical characteristics can be realized.

[0099] The composition of metal oxides can be analyzed, for example, using energy dispersive X-ray analysis (EDX: Energy Dispersive X-ray Spectrometry), X-ray photoelectron spectroscopy (XPS: X-ray Photoelectron Spectroscopy), inductively coupled plasma mass spectrometry (ICP-MS: Inductively Coupled Plasma-Mass Spectrometry) or inductively coupled plasma atomic emission spectrometry (ICP-AES: Inductively Coupled Plasma-Atomic Emission Spectrometry). Alternatively, multiple of the above methods can be combined for analysis. Note that elements with low contents are sometimes affected by the accuracy of analysis, and the actual contents are different from the contents obtained by analysis. For example, when the content of element M is low, the content of element M obtained by analysis is sometimes lower than the actual content.

[0100] In this specification, etc., the composition in the vicinity includes a range of ±30% of the desired atomic ratio. For example, when the atomic ratio is In:M:Zn=4:2:3 or a composition in the vicinity thereof, the following cases are included: when the atomic ratio of indium is 4, the atomic ratio of M is greater than 1 and less than 3, and the atomic ratio of zinc is greater than 2 and less than 4. In addition, when the atomic ratio is In:M:Zn=5:1:6 or a composition in the vicinity thereof, the following cases are included: when the atomic ratio of indium is 5, the atomic ratio of M is greater than 0.1 and less than 2, and the atomic ratio of zinc is greater than 5 and less than 7. In addition, when the atomic ratio is In:M:Zn=1:1:1 or a composition in the vicinity thereof, the following cases are included: when the atomic ratio of indium is 1, the atomic ratio of M is greater than 0.1 and less than 2, and the atomic ratio of zinc is greater than 0.1 and less than 2.

[0101] Here, the reliability of the transistor is explained. As one of the indicators for evaluating the reliability of the transistor, there is a GBT (Gate Bias Temperature) stress test in which an electric field is applied to the gate at a high temperature. Among them, the test in which a positive potential (positive bias) is applied to the gate relative to the source potential and the drain potential at a high temperature is called a PBTS (Positive Bias Temperature Stress) test, and the test in which a negative potential (negative bias) is applied to the gate at a high temperature is called an NBTS (Negative Bias Temperature Stress) test. In addition, the PBTS test and the NBTS test performed under the state of irradiation with light are respectively called the PBTIS (Positive Bias Temperature Illumination Stress) test and the NBTIS (Negative Bias Temperature Illumination Stress) test.

[0102] In an n-type transistor, a positive potential is applied to the gate when the transistor is turned on (a state where current flows), so the variation in threshold voltage in the PBTS test is one of the important factors to be focused on as a reliability index of the transistor.

[0103] By using a metal oxide that does not contain gallium or has a low gallium content in the semiconductor layer 108, a transistor with high reliability for forward bias application can be realized. In other words, a transistor with a small change in threshold voltage in a PBTS test can be realized. In addition, when a metal oxide containing gallium is used, the gallium content is preferably lower than the indium content. Thus, a transistor with high reliability can be realized.

[0104] As one of the reasons for the change in threshold voltage in the PBTS test, the capture of carriers (here, electrons) caused by defect states at or near the interface between the semiconductor layer and the gate insulating layer can be cited. The greater the defect state density, the more carriers are captured at the above interface, and thus the more significant the degradation in the PBTS test. By reducing the gallium content in the area of ​​the semiconductor layer that contacts the gate insulating layer, the generation of the defect state can be suppressed, and thus the change in threshold voltage in the PBTS test can be suppressed.

[0105] As a reason why the change in threshold voltage in the PBTS test can be suppressed by using a metal oxide that does not contain gallium or has a low gallium content as a semiconductor layer, for example, the following can be considered. Gallium contained in the metal oxide is more likely to absorb oxygen than other metal elements (such as indium or zinc). Therefore, it can be inferred that at the interface between the metal oxide containing more gallium and the gate insulating layer, carrier (here, electron) trap sites are easily generated due to the bonding of gallium with excess oxygen in the gate insulating layer. Therefore, when a positive potential is applied to the gate, carriers are captured at the interface between the semiconductor layer and the gate insulating layer, and the threshold voltage will change.

[0106] More specifically, when In-Ga-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium is higher than the atomic ratio of gallium can be used for the semiconductor layer 108. It is more preferable to use a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of gallium. In other words, it is preferable to use a metal oxide in which the atomic ratio of the metal elements satisfies In>Ga and Zn>Ga for the semiconductor layer 108.

[0107] The semiconductor layer 108 preferably uses a metal oxide in which the ratio of the number of atoms of gallium to the number of atoms of the metal element contained is higher than 0 atomic % and is less than 50 atomic %, preferably greater than 0.1 atomic % and less than 40 atomic %, more preferably greater than 0.1 atomic % and less than 35 atomic %, more preferably greater than 0.1 atomic % and less than 30 atomic %, more preferably greater than 0.1 atomic % and less than 25 atomic %, more preferably greater than 0.1 atomic % and less than 20 atomic %, more preferably greater than 0.1 atomic % and less than 15 atomic %, more preferably greater than 0.1 atomic % and less than 10 atomic %. By reducing the gallium content in the semiconductor layer, a transistor with high resistance to the PBTS test can be realized. Note that by including gallium in the metal oxide, it is less likely to generate oxygen vacancies (V O : Oxygen Vacancy) effect.

[0108] As the semiconductor layer 108, a metal oxide that does not contain gallium can also be used. For example, In-Zn oxide can be used for the semiconductor layer 108. At this time, when the atomic number ratio of indium relative to the atomic number of the metal element contained in the metal oxide is increased, the field effect mobility of the transistor can be improved. On the other hand, when the atomic number ratio of zinc relative to the atomic number of the metal element contained in the metal oxide is increased, the metal oxide has high crystallinity, so the change in the electrical characteristics of the transistor is suppressed, and the reliability can be improved. In addition, as the semiconductor layer 108, a metal oxide such as indium oxide that does not contain gallium and zinc can also be used. By using a metal oxide that does not contain gallium, the change in the threshold voltage in the PBTS test can be made extremely small.

[0109] For example, an oxide containing indium and zinc can be used as the semiconductor layer 108. In this case, for example, a metal oxide in which the atomic ratio of the metal elements is In:Zn=2:3 or in the vicinity thereof can be used.

[0110] Note that although gallium is used as an example for the description, the present invention can also be applied to a case where element M is used instead of gallium. A metal oxide in which the atomic ratio of indium is higher than the atomic ratio of element M is preferably used as the semiconductor layer 108. In addition, a metal oxide in which the atomic ratio of zinc is higher than the atomic ratio of element M is preferably used.

[0111] A transistor having high reliability under forward bias application can be realized by using a metal oxide having a low content of the element M as the semiconductor layer 108. By using this transistor as a transistor that needs to have high reliability under forward bias application, a semiconductor device having high reliability can be realized.

[0112] Next, the reliability of transistors with respect to light will be described.

[0113] When light enters a transistor, the electrical characteristics of the transistor may change. It is particularly preferred that the transistor used in an area where light may enter has small changes in electrical characteristics under light irradiation and high reliability to light. Reliability to light can be evaluated, for example, by the change in threshold voltage in an NBTIS test.

[0114] By increasing the content of the element M in the metal oxide, a transistor with high reliability to light can be realized. In other words, a transistor with a small change in threshold voltage in the NBTIS test can be realized. Specifically, the band gap of the metal oxide in which the atomic number ratio of the element M is greater than the atomic number ratio of indium is larger, and the change in threshold voltage in the NBTIS test of the transistor can be reduced. The band gap of the metal oxide contained in the semiconductor layer 108 is preferably greater than 2.0 eV, more preferably greater than 2.5 eV, more preferably greater than 3.0 eV, more preferably greater than 3.2 eV, more preferably greater than 3.3 eV, more preferably greater than 3.4 eV, and more preferably greater than 3.5 eV.

[0115] For example, the semiconductor layer 108 may use a metal oxide having an atomic ratio of metal elements of In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In:M:Zn=1:3:2, In:M:Zn=1:3:3, In:M:Zn=1:3:4 or thereabouts.

[0116] The semiconductor layer 108 can particularly appropriately use the following metal oxide: the ratio of the number of atoms of element M relative to the number of atoms of the metal element contained is greater than 20 atomic % and less than 70 atomic %, preferably greater than 30 atomic % and less than 70 atomic %, more preferably greater than 30 atomic % and less than 60 atomic %, more preferably greater than 40 atomic % and less than 60 atomic %, and more preferably greater than 50 atomic % and less than 60 atomic %.

[0117] When In-Ga-Zn oxide is used as the semiconductor layer 108, a metal oxide in which the atomic ratio of indium to the atomic number of the metal element contained is less than the atomic ratio of gallium can be used. For example, a metal oxide in which the atomic ratio of the metal element is In:Ga:Zn=1:1:1, In:Ga:Zn=1:1:1.2, In:Ga:Zn=1:3:2, In:Ga:Zn=1:3:3, In:Ga:Zn=1:3:4 or a metal oxide in the vicinity thereof can be used.

[0118] The semiconductor layer 108 particularly preferably uses a metal oxide in which the ratio of the number of atoms of gallium to the number of atoms of the metal element contained is greater than 20 atomic % and less than 60 atomic %, preferably greater than 20% atomic % and less than 50 atomic %, more preferably greater than 30 atomic % and less than 50 atomic %, more preferably greater than 40% atomic % and less than 60 atomic %, and more preferably greater than 50% atomic % and less than 60 atomic %.

[0119] A transistor having high reliability with respect to light can be realized by using a metal oxide having a high content of the element M for the semiconductor layer 108. By using this transistor as a transistor that needs to have high reliability with respect to light, a semiconductor device having high reliability can be realized.

[0120] As described above, the electrical characteristics and reliability of the transistor differ depending on the composition of the metal oxide used for the semiconductor layer 108. Therefore, by varying the composition of the metal oxide according to the electrical characteristics and reliability required for the transistor, a semiconductor device having both excellent electrical characteristics and high reliability can be achieved.

[0121] The semiconductor layer 108 may also have a stacked structure including two or more metal oxide layers. The compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be the same or substantially the same as each other. By adopting a stacked structure of metal oxide layers with the same composition, for example, the same sputtering target can be used to form them, thereby reducing manufacturing costs.

[0122] The compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be different from each other. For example, a stacked structure of a first metal oxide layer having a composition of In:M:Zn=1:3:4 [atomic ratio] or a composition close thereto and a second metal oxide layer having a composition of In:M:Zn=1:1:1 [atomic ratio] or a composition close thereto disposed on the first metal oxide layer may be appropriately used. In addition, gallium or aluminum is particularly preferably used as the element M. For example, a stacked structure of any one selected from indium oxide, indium gallium oxide, and IGZO and any one selected from IAZO, IAGZO, and ITZO (registered trademark) may also be used.

[0123] A crystalline metal oxide layer is preferably used as the semiconductor layer 108. For example, a metal oxide layer having a CAAC (c-axis aligned crystal) structure, a polycrystalline structure, a microcrystalline (nc: nano-crystal) structure, or the like can be used. By using a crystalline metal oxide layer for the semiconductor layer 108, the defect state density in the semiconductor layer 108 can be reduced, thereby realizing a transistor with high reliability.

[0124] The higher the crystallinity of the metal oxide layer used for the semiconductor layer 108, the lower the defect state density in the semiconductor layer 108. On the other hand, by using a metal oxide layer with low crystallinity, a transistor capable of passing a large current can be realized.

[0125] The semiconductor layer 108 may also have a stacked structure of two or more metal oxide layers with different crystallinity. For example, a stacked structure may have a first metal oxide layer and a second metal oxide layer disposed on the first metal oxide layer, and the second metal oxide layer may include a region with higher crystallinity than the first metal oxide layer. Alternatively, the second metal oxide layer may include a region with lower crystallinity than the first metal oxide layer. The compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be the same or substantially the same as each other. By adopting a stacked structure of metal oxide layers with the same composition, for example, the same sputtering target can be used to form them, thereby reducing manufacturing costs. For example, by using the same sputtering target and making the oxygen flow ratio or oxygen partial pressure different, a stacked structure of two or more metal oxide layers with different crystallinity can be formed. Note that the compositions of the two or more metal oxide layers included in the semiconductor layer 108 may also be different from each other.

[0126] The thickness of the semiconductor layer 108 is preferably greater than 3 nm and less than 100 nm, more preferably greater than 5 nm and less than 100 nm, more preferably greater than 10 nm and less than 100 nm, more preferably greater than 10 nm and less than 70 nm, more preferably greater than 15 nm and less than 70 nm, more preferably greater than 15 nm and less than 50 nm, more preferably greater than 20 nm and less than 50 nm, more preferably greater than 20 nm and less than 40 nm, more preferably greater than 25 nm and less than 40 nm.

[0127] Here, oxygen vacancies that may be formed in the semiconductor layer 108 are described.

[0128] When an oxide semiconductor is used for the semiconductor layer 108, hydrogen in the oxide semiconductor reacts with oxygen bonded to a metal atom to form water, thereby forming an oxygen vacancy (V) in the oxide semiconductor. O In addition, sometimes hydrogen enters the defect in the oxygen vacancy (hereinafter referred to as V O H) is used as a donor to generate electrons as carriers. In addition, sometimes electrons as carriers are generated due to the bonding of a portion of hydrogen to oxygen bonded to metal atoms. Therefore, transistors using oxide semiconductors containing a large amount of hydrogen tend to have a normally-on characteristic. In addition, because the hydrogen in the oxide semiconductor is easily moved due to heat, electric field, etc., when the oxide semiconductor contains a large amount of hydrogen, the reliability of the transistor may be reduced.

[0129] V O H can be used as a donor of oxide semiconductors. However, it is difficult to quantitatively evaluate this defect. Therefore, in oxide semiconductors, sometimes the evaluation is not based on the donor concentration but on the carrier concentration. Therefore, in this specification, etc., sometimes as a parameter of the oxide semiconductor, instead of the donor concentration, the carrier concentration in a state where no electric field is applied is used. That is to say, the "carrier concentration" recorded in this specification, etc. can sometimes be referred to as the "donor concentration".

[0130] Therefore, when an oxide semiconductor is used as the semiconductor layer 108, it is preferable to minimize the V O H to make it high purity intrinsic or substantially high purity intrinsic. In order to obtain this V O In order to prepare an oxide semiconductor in which H is sufficiently reduced, it is important to: remove impurities such as water and hydrogen in the oxide semiconductor (sometimes referred to as dehydration or dehydrogenation treatment); and supply oxygen to the oxide semiconductor to repair oxygen vacancies (V O ). By setting V O An oxide semiconductor in which impurities such as H are sufficiently reduced is used in a channel formation region of a transistor to impart stable electrical characteristics. Note that oxygen may be supplied to an oxide semiconductor to repair oxygen vacancies (VO ) is recorded as oxidation treatment.

[0131] When an oxide semiconductor is used as the semiconductor layer 108, the carrier concentration of the oxide semiconductor in a region serving as a channel formation region is preferably 1×10 18 cm -3 Below, more preferably below 1×10 17 cm -3 , more preferably less than 1×10 16 cm -3 , more preferably less than 1×10 13 cm -3 , and more preferably less than 1×10 12 cm -3 The lower limit of the carrier concentration of the oxide semiconductor in the region serving as the channel formation region is not particularly limited, and can be set to 1×10 -9 cm -3 .

[0132] Compared with transistors using amorphous silicon, transistors using oxide semiconductors (hereinafter referred to as OS transistors) have very high field effect mobility. In addition, the leakage current between the source and the drain in the off state of the OS transistor (hereinafter also referred to as the off-state current) is extremely small, and the charge stored in the capacitor connected in series with the transistor can be maintained for a long period of time. In addition, by using OS transistors in semiconductor devices, the power consumption of the semiconductor device can be reduced.

[0133] OS transistors can be applied to display devices, for example. When increasing the luminous brightness of a light-emitting device included in a pixel circuit of a display device, it is necessary to increase the amount of current flowing through the light-emitting element. To this end, it is necessary to increase the source-drain voltage of a driving transistor included in the pixel circuit. Because the source-drain withstand voltage of an OS transistor is higher than that of a transistor using silicon (hereinafter referred to as a Si transistor), a high voltage can be applied between the source and drain of the OS transistor. Thus, by using an OS transistor as a driving transistor in a pixel circuit, the amount of current flowing through the light-emitting element can be increased to increase the luminous brightness of the light-emitting element.

[0134] When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage smaller than the Si transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so the amount of current flowing through the light-emitting element can be densely controlled. As a result, the number of grayscales of the pixel circuit can be increased.

[0135] Regarding the saturation characteristics of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even if the source-drain voltage is gradually increased. Therefore, by using the OS transistor as a driving transistor, even if, for example, the current-voltage characteristics of the light-emitting element are uneven, a stable current can flow through the light-emitting element. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is increased, the source-drain current remains almost unchanged, so the light-emitting brightness of the light-emitting element can be stabilized.

[0136] As described above, by using an OS transistor as a driving transistor included in a pixel circuit, “suppression of black blur”, “increase in light emission brightness”, “multi-grayscale”, “suppression of unevenness in light emitting elements”, etc. can be achieved.

[0137] OS transistors have little change in electrical characteristics due to exposure to radiation, that is, they have high tolerance to radiation, so they can be appropriately used in environments where radiation may be incident. OS transistors can also be said to have high reliability with respect to radiation. For example, OS transistors can be appropriately used as pixel circuits of flat-panel detectors for X-rays. In addition, OS transistors can be appropriately used in semiconductor devices used in outer space. Examples of radiation include electromagnetic radiation (e.g., X-rays and gamma rays) and particle radiation (e.g., alpha rays, beta rays, proton radiation, and neutron radiation).

[0138] [Insulating layer 110, insulating layer 106] In the transistor of one embodiment of the present invention and a semiconductor device, a display device, etc. using the transistor of one embodiment of the present invention, an inorganic insulating material or an organic insulating material can be used as the insulating layer (insulating layer 110, insulating layer 106). In addition, a stacked structure of an inorganic insulating material and an organic insulating material can be used as the insulating layer (insulating layer 110, insulating layer 106).

[0139] As the inorganic insulating material, one or more of oxide, oxynitride, oxynitride, and nitride can be used.

[0140] Note that in this specification and the like, oxynitride refers to a material containing more oxygen than nitrogen in its composition. Nitride oxide refers to a material containing more nitrogen than oxygen in its composition. For example, silicon oxynitride refers to a material containing more oxygen than nitrogen in its composition, and silicon nitride oxide refers to a material containing more nitrogen than oxygen in its composition.

[0141] For example, the oxygen and nitrogen contents can be analyzed using analytical techniques such as secondary ion mass spectrometry (SIMS) or X-ray photoelectron spectroscopy (XPS). When the content of the target element is high (for example, 0.5 atomic% or more or 1 atomic%), it is preferred to use XPS for analysis. On the other hand, when the content of the target element is low (for example, less than 0.5 atomic% or less than 1 atomic%), it is preferred to use SIMS for analysis. When comparing the element contents, it is more preferred to use a composite analysis using both SIMS and XPS analytical techniques.

[0142] In addition, the evaluation of the film density of the insulating layer, etc. can be performed, for example, using Rutherford Backscattering Spectrometry (RBS) or X-ray Reflection (XRR). In addition, the difference in film density can sometimes be evaluated from a cross-sectional transmission electron microscope (TEM) image. In TEM observation, when the film density is high, the transmission electron (TE) image is dark (dark), and when the film density is low, the transmission electron (TE) image is light (bright). Note that even when the insulating layer uses the same material, when the film density is different, these boundaries can sometimes be observed as different contrasts in the cross-sectional TEM image.

[0143] The nitrogen content of the insulating layer can be confirmed by using EDX, for example. For example, when the insulating layer uses silicon nitride, silicon oxynitride, etc., the nitrogen content can be evaluated by the ratio of the peak height of nitrogen relative to the peak height of silicon. Note that in EDX, the peak of an element refers to the point where the count of the element takes a maximum value in the spectrum in which the horizontal axis represents the energy of the characteristic X-ray and the vertical axis represents the count (detection value) of the characteristic X-ray. Alternatively, the difference in nitrogen content can be confirmed by using the count at the energy of the characteristic X-ray inherent to the element as a ratio of the nitrogen count relative to the silicon count. For example, the count at 1.739 keV (Si-Kα) can be used for silicon, and the count at 0.392 keV (N-Kα) can be used for nitrogen.

[0144] The hydrogen concentration of the insulating layer can be evaluated by, for example, SIMS.

[0145] By using an insulating layer that releases oxygen as an insulating layer in contact with the semiconductor layer 108 or an insulating layer located near the semiconductor layer 108, oxygen can be supplied from the insulating layer to the semiconductor layer 108. By supplying oxygen to the channel formation region of the semiconductor layer 108, oxygen vacancies (V O ) and V O H, a transistor having good electrical characteristics and high reliability can be realized. Note that as a treatment for supplying oxygen to the semiconductor layer 108, there is heat treatment in an atmosphere containing oxygen, plasma treatment in an atmosphere containing oxygen, or the like.

[0146] When hydrogen diffuses into the semiconductor layer 108, it reacts with oxygen atoms contained in the oxide semiconductor to form water, and oxygen vacancies (V O ). Furthermore, V O H, sometimes the carrier density becomes high. By using a barrier film that suppresses hydrogen diffusion as an insulating layer in contact with the semiconductor layer 108 or an insulating layer located near the semiconductor layer 108, oxygen vacancies (V O ) and V O H, thereby achieving a transistor with good electrical characteristics and high reliability.

[0147] Oxygen vacancies (V O ) and V O In particular, when the channel length L is small, the oxygen vacancies (V O ) and V O H has a great impact on electrical characteristics and reliability. For example, in V O When H diffuses from the source region or the drain region to the channel formation region, the carrier concentration in the channel formation region may increase, causing a change in the threshold voltage of the transistor 100 or a decrease in reliability. The smaller the channel length L100 of the transistor 100, the smaller the V O The greater the impact of H diffusion on electrical characteristics and reliability, the greater the impact of H diffusion on electrical characteristics and reliability. By reducing the oxygen vacancies (V O ) and V O H, a transistor with a small channel length having good electrical characteristics and high reliability can be realized.

[0148] Preferably, the insulating layer in contact with the semiconductor layer 108 or the insulating layer located near the semiconductor layer 108 releases less impurities (for example, water and hydrogen). By reducing the released impurities, diffusion of impurities into the semiconductor layer 108 can be suppressed, thereby realizing a transistor having good electrical characteristics and high reliability.

[0149] Oxygen may be released from the semiconductor layer 108 due to heat applied in a step after forming the semiconductor layer 108. However, since oxygen is supplied to the semiconductor layer 108 from an insulating layer in contact with the semiconductor layer 108 or an insulating layer located near the semiconductor layer 108, oxygen vacancies (V O ) and V O H is increased. In addition, the degree of freedom of the processing temperature can be increased in the process after forming the semiconductor layer 108. Specifically, the processing temperature can also be increased in the process after forming the semiconductor layer 108. Therefore, the transistor 100 having good electrical characteristics and high reliability can be formed.

[0150] An inorganic insulating material or an organic insulating material can be used as the insulating layer 110. The insulating layer 110b may have a stacked-layer structure of an inorganic insulating material and an organic insulating material.

[0151] An inorganic insulating material may be used as appropriate as the insulating layer 110. As the inorganic insulating material, one or more of oxides, oxynitrides, nitride oxides, and nitrides may be used. As the insulating layer 110, for example, one or more of silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, yttrium oxide, zirconium oxide, gallium oxide, tantalum oxide, magnesium oxide, lanthanum oxide, cerium oxide, neodymium oxide, silicon nitride, silicon oxynitride, and aluminum nitride may be used.

[0152] The insulating layer 110 may also have a stacked structure of two or more layers. Figure 1B In the embodiment of the present invention, the insulating layer 110 has a three-layer stacked structure of an insulating layer 110a, an insulating layer 110b on the insulating layer 110a, and an insulating layer 110c on the insulating layer 110b. The insulating layer 110a, the insulating layer 110b, and the insulating layer 110c can all use the above-mentioned materials. Note that the insulating layer 110ba, the insulating layer 110b, and the insulating layer 110c can use the same material or different materials.

[0153] It is preferable that the amount of impurities (for example, water and hydrogen) released from the insulating layer 110a, the insulating layer 110b, and the insulating layer 110c themselves is small.

[0154] The thickness of the insulating layer 110b may be greater than the thickness of the insulating layer 110a. In addition, the thickness of the insulating layer 110b may be greater than the thickness of the insulating layer 110c. The deposition speed of the insulating layer 110b is preferably fast. By increasing the deposition speed of a thick film, productivity can be improved.

[0155] The insulating layer 110a and the insulating layer 110c are used as barrier films for inhibiting gas from escaping from the insulating layer 110b. The insulating layer 110a and the insulating layer 110c preferably use a material that does not easily diffuse gas. The insulating layer 110a preferably includes a region with a higher film density than the insulating layer 110b. In addition, the insulating layer 110c preferably includes a region with a higher film density than the insulating layer 110b. By increasing the film density of the insulating layer, the barrier property of impurities (such as water and hydrogen) can be improved. By reducing the deposition rate of the insulating layer, the film density becomes higher, and the barrier property of impurities can be improved.

[0156] As the insulating layer 110 b, oxide or oxynitride is preferably used. As the insulating layer 110 b, a film that releases oxygen by heating is preferably used. As the insulating layer 110 b, for example, silicon oxide or silicon oxynitride can be appropriately used.

[0157] Oxygen is released through the insulating layer 110b, and oxygen can be supplied from the insulating layer 110b to the semiconductor layer 108. The insulating layer 110b preferably has a high oxygen diffusion coefficient. By increasing the oxygen diffusion coefficient, oxygen can easily diffuse in the insulating layer 110b, so that oxygen can be efficiently supplied to the semiconductor layer 108.

[0158] The insulating layer 110 a , the insulating layer 110 b , and the insulating layer 110 c are preferably formed by a deposition method such as a sputtering method, an ALD method, or a plasma CVD method.

[0159] In particular, by depositing by a deposition method using a sputtering method without using hydrogen gas as a deposition gas, a film containing a very small amount of hydrogen can be deposited. Therefore, it is possible to suppress the supply of hydrogen to the semiconductor layer 108 and achieve stabilization of the electrical characteristics of the transistor 100. When silicon oxide is deposited by sputtering, for example, a silicon target can be used for deposition in an atmosphere containing oxygen gas. In addition, in the case of forming silicon nitride by sputtering, for example, a silicon target can be used for deposition in an atmosphere containing nitrogen gas. When aluminum oxide is deposited by sputtering, for example, an aluminum target can be used for deposition in an atmosphere containing oxygen gas.

[0160] In addition, silicon oxide and silicon nitride can be deposited by, for example, PEALD. In addition, aluminum oxide and hafnium oxide can be deposited by, for example, thermal ALD. By depositing the insulating layer by PEALD and thermal ALD, a dense insulating layer can be formed, thereby improving the barrier properties to oxygen and hydrogen.

[0161] The insulating layer 110a may be made of a material having a higher nitrogen content than the insulating layer 110b. Alternatively, the insulating layer 110c may be made of a material having a higher nitrogen content than the insulating layer 110b. By increasing the nitrogen content of the insulating layer, the barrier property against impurities (such as water and hydrogen) can be improved.

[0162] The insulating layer 110a and the insulating layer 110c are preferably not easily permeable to oxygen. The insulating layer 110a and the insulating layer 110c are both used as barrier films for inhibiting oxygen from escaping from the insulating layer 110b. Furthermore, the insulating layer 110a and the insulating layer 110c are preferably not easily permeable to hydrogen. The insulating layer 110a and the insulating layer 110c are both used as barrier films for inhibiting hydrogen from diffusing from the outside of the transistor through the insulating layer 110a and the insulating layer 110c to the semiconductor layer 108. The film density of the insulating layer 110a and the insulating layer 110c is preferably high. By increasing the film density, the barrier property of oxygen and hydrogen can be improved. When silicon oxide or silicon oxynitride is used as the insulating layer 110b, silicon nitride or silicon oxynitride can be used for the insulating layer 110a and the insulating layer 110c. In addition, hafnium oxide or aluminum oxide can be appropriately used as the insulating layer 110a and the insulating layer 110c.

[0163] Note that the insulating layer 110 a and the insulating layer 110 c may have a structure in which two or more selected from silicon nitride, silicon nitride oxide, hafnium oxide, and aluminum oxide are stacked.

[0164] When oxygen included in the insulating layer 110b diffuses upward from a region of the insulating layer 110b that is not in contact with the semiconductor layer 108 (for example, the top surface of the insulating layer 110b), the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 may decrease. By providing the insulating layer 110c on the insulating layer 110b, it is possible to suppress the oxygen included in the insulating layer 110b from diffusing upward from a region of the insulating layer 110b that is not in contact with the semiconductor layer 108. Similarly, by providing the insulating layer 110a under the insulating layer 110b, it is possible to suppress the oxygen included in the insulating layer 110b from diffusing downward from a region of the insulating layer 110b that is not in contact with the semiconductor layer 108. Therefore, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 is increased, and thus the oxygen vacancies (V vacancies) in the semiconductor layer 108 can be reduced. O ) and V O H.

[0165] Sometimes, due to the oxygen contained in the insulating layer 110b, the conductive layer 112a and the conductive layer 112b are oxidized, so that the resistance becomes higher. Due to the oxidation of the conductive layer 112a and the conductive layer 112b, sometimes the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 becomes less. By providing the insulating layer 110a between the insulating layer 110b and the conductive layer 112a, it is possible to suppress the conductive layer 112a from being oxidized and the resistance from becoming higher. Similarly, by providing the insulating layer 110c between the insulating layer 110b and the conductive layer 112b, it is possible to suppress the conductive layer 112b from being oxidized and the resistance from becoming higher. At the same time, the amount of oxygen supplied from the insulating layer 110b to the semiconductor layer 108 is increased, and the oxygen vacancies (V O ) and V O H.

[0166] Furthermore, by providing the insulating layer 110a and the insulating layer 110c, diffusion of hydrogen into the semiconductor layer 108 can be suppressed, thereby reducing oxygen vacancies (V O ) and V O H.

[0167] The insulating layer 110a and the insulating layer 110c preferably have a thickness that can be used as a barrier film for oxygen and hydrogen. When the thickness is small, the function as a barrier film is sometimes reduced. On the other hand, when the thickness is large, the area of ​​the semiconductor layer 108 in contact with the insulating layer 110b becomes smaller, and the amount of oxygen supplied to the semiconductor layer 108 sometimes decreases. The thickness of the insulating layer 110a and the insulating layer 110c is preferably 1 nm or more, 2 nm or more, preferably 200 nm or less, 100 nm or less, 60 nm or less, 50 nm or less, 40 nm or less, 30 nm or less, 20 nm or less, 10 nm or less, or 5 nm or less.

[0168] The insulating layer 106 serving as a gate insulating layer preferably has a low defect density. When the defect density of the insulating layer 106 is low, a transistor having good electrical characteristics can be realized. Furthermore, the insulating layer 106 preferably has a high dielectric strength voltage. Since the dielectric strength voltage of the insulating layer 106 is high, a transistor with high reliability can be formed.

[0169] The insulating layer 106 may be made of, for example, one or more of an oxide, an oxynitride, an oxynitride, and a nitride having insulating properties. The insulating layer 106 may be made of, for example, one or more of silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, hafnium oxide, hafnium oxynitride, gallium oxide, gallium oxynitride, yttrium oxide, yttrium oxynitride, and Ga-Zn oxide. The insulating layer 106 may also be a single layer or a stacked layer. The insulating layer 106 may also have, for example, a stacked layer structure of an oxide and a nitride.

[0170] Note that in a transistor of fine size, when the thickness of the gate insulating layer is small, the leakage current sometimes increases. By using a material with a high relative dielectric constant (also called a high-k material) for the gate insulating layer, it is possible to achieve low voltage when the transistor is operating while maintaining the physical thickness. Examples of high-k materials include gallium oxide, hafnium oxide, zirconium oxide, oxides containing aluminum and hafnium, oxynitrides containing aluminum and hafnium, oxides containing silicon and hafnium, oxynitrides containing silicon and hafnium, or nitrides containing silicon and hafnium.

[0171] It is preferable that a small amount of impurities (for example, water and hydrogen) is released from the insulating layer 106 itself. Since a small amount of impurities is released from the insulating layer 106, diffusion of impurities into the semiconductor layer 108 can be suppressed, thereby achieving a transistor having good electrical characteristics and high reliability.

[0172] Since the insulating layer 106 is formed on the semiconductor layer 108, it is preferable to form the film under the condition that the damage to the semiconductor layer 108 is small. For example, it can be formed under the condition that the deposition speed (also called deposition rate) is sufficiently low. For example, when the insulating layer 106 is formed by the plasma CVD method, it can be formed under the condition of low power to reduce the damage to the semiconductor layer 108.

[0173] Here, the insulating layer 106 is specifically described by taking a structure in which the semiconductor layer 108 is made of metal oxide as an example.

[0174] In order to improve the interface characteristics with the semiconductor layer 108, oxide or oxynitride is preferably used for at least one side of the insulating layer 106 that is in contact with the semiconductor layer 108. For example, one or more of silicon oxide and silicon oxynitride can be appropriately used for the insulating layer 106. In addition, the insulating layer 106 is preferably made of a film that releases oxygen by heating.

[0175] Note that the insulating layer 106 may have a stacked-layer structure. The insulating layer 106 may have a stacked-layer structure of an oxide film in contact with the semiconductor layer 108 side and a nitride film in contact with the conductive layer 104 side. As the oxide film, for example, one or more of silicon oxide and silicon oxynitride can be appropriately used. As the nitride film, for example, silicon nitride can be appropriately used.

[0176] The thickness of the insulating layer 106 is preferably 0.5 nm to 20 nm, more preferably 0.5 nm to 15 nm, and even more preferably 0.5 nm to 10 nm. At least a portion of the insulating layer 106 may include a region having the above thickness.

[0177] In addition, the insulating layer 106 preferably has a function of supplying oxygen to the semiconductor layer 108 .

[0178] [Conductive layer 112a, conductive layer 112b, conductive layer 104] The conductive layer 112a used as one of the source electrode and the drain electrode, and the conductive layer 112b used as the other of the source electrode and the drain electrode and the second gate electrode can be formed using one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, niobium and ruthenium, or an alloy containing one or more of the above metals as components. Both the conductive layer 112a and the conductive layer 112b can appropriately use a low-resistance conductive material containing one or more of copper, silver, gold and aluminum. Copper or aluminum is particularly advantageous in mass production and is therefore preferred.

[0179] Conductive metal oxides (also referred to as oxide conductors) may be used for both the conductive layer 112a and the conductive layer 112b. Examples of oxide conductors (OC) include In-Sn oxide (ITO), In-W oxide, In-W-Zn oxide, In-Ti oxide, In-Ti-Sn oxide, In-Zn oxide, In-Sn-Si oxide (ITSO), and In-Ga-Zn oxide.

[0180] Here, an oxide conductor (OC) is described. For example, oxygen vacancies (V O ), hydrogen is added to the oxygen vacancy to form a donor level near the conduction band. As a result, the conductivity of the metal oxide increases, and it becomes a conductor. Metal oxides that can become conductors are called oxide conductors.

[0181] The conductive layers 112a and 112b may have a stacked-layer structure of a conductive film containing the above-mentioned oxide conductor (metal oxide) and a conductive film containing a metal or an alloy. By using a conductive film containing a metal or an alloy, resistance can be reduced.

[0182] A Cu-X alloy film (X is Mn, Ni, Cr, Fe, Co, Mo, Ta or Ti) may be used as the conductive layer 112a and the conductive layer 112b. By using the Cu-X alloy film, processing can be performed by a wet etching process, thereby reducing manufacturing costs.

[0183] Note that the conductive layer 112a and the conductive layer 112b can be formed using the same material or different materials from each other.

[0184] Here, taking a structure in which a metal oxide is used as the semiconductor layer 108 as an example, the conductive layer 112a and the conductive layer 112b are specifically described.

[0185] When an oxide semiconductor is used as the semiconductor layer 108, the conductive layer 112a and the conductive layer 112b are oxidized by oxygen contained in the semiconductor layer 108, and the resistance may increase. The conductive layer 112a and the conductive layer 112b are oxidized by oxygen contained in the semiconductor layer 108, and oxygen vacancies (V O )Increase.

[0186] The conductive layer 112a and the conductive layer 112b are preferably made of a material that is not easily oxidized, a conductive material that maintains low resistance even if oxidized, or an oxide conductor. For example, In-Sn oxide (ITO) or In-Sn-Si oxide (ITSO) can be used appropriately. The conductive layer 112a and the conductive layer 112b can also use a nitride conductor. As nitride conductors, tantalum nitride and titanium nitride can be cited. The conductive layer 112a and the conductive layer 112b can also have a stacked structure of the above materials.

[0187] By using a material that is not easily oxidized for the conductive layers 112a and 112b, it is possible to suppress an increase in resistance of the conductive layers 112a and 112b due to oxidation of oxygen contained in the semiconductor layer 108. In addition, the increase in oxygen vacancies (V O ) increase.

[0188] As described above, the conductive layers 112a and 112b that are in contact with the semiconductor layer 108 preferably use a material that is not easily oxidized. However, when a material that is not easily oxidized is used, the resistance of the conductive layers 112a and 112b sometimes becomes high. For example, when the conductive layers 112a and 112b are extended and used as wiring, the resistance of the conductive layers 112a and 112b is preferably low. Therefore, when both the conductive layers 112a and 112b have a stacked structure, by using a material that is not easily oxidized on the side of the conductive layer having the region in contact with the semiconductor layer 108 and using a low-resistance material on the side of the conductive layer that does not have the region in contact with the semiconductor layer 108, the overall resistance of the conductive layers 112a and 112b can be reduced. In addition, the oxygen vacancies (V O ) and V O H.

[0189] As described above, especially when the channel length L100 is small, the oxygen vacancies (V O ) and V O H has a great influence on the electrical characteristics and reliability. When the conductive layer 112a and the conductive layer 112b are made of materials that are not easily oxidized, the oxygen vacancies (V O ) and V O H increases. Therefore, a transistor with a small channel length having good electrical characteristics and high reliability can be realized.

[0190] When the conductive layer 112a and the conductive layer 112b have a stacked structure, as the conductive layer on the side having the region in contact with the semiconductor layer 108, one or more of an oxide conductor and a nitride conductor can be appropriately used. On the other hand, as the conductive layer on the side having the region not in contact with the semiconductor layer 108, it is preferred to use a material having a lower resistance than the above-mentioned materials. For example, one or more of copper, aluminum, titanium, tungsten and molybdenum or an alloy containing one or more of the above-mentioned metals as components can be appropriately used. For example, as the conductive layer on the side having the region in contact with the semiconductor layer 108, In-Sn-Si oxide (ITSO) can be appropriately used, and as the conductive layer on the side having the region not in contact with the semiconductor layer 108, tungsten can be appropriately used.

[0191] Note that the structure of the conductive layer 112a may be determined according to the wiring resistance required of the conductive layer 112a. For example, when the length of the wiring (conductive layer 112a) is short and a higher wiring resistance is required, a single-layer structure and a material that is not easily oxidized may be used as the conductive layer 112a. On the other hand, when the length of the wiring (conductive layer 112a) is long and a lower wiring resistance is required, a stacked structure of a material that is not easily oxidized and a low-resistance material is preferably used as the conductive layer 112a.

[0192] The conductive layer 104 used as the first gate electrode may be formed using, for example, one or more of chromium, copper, aluminum, gold, silver, zinc, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt, molybdenum, and niobium, or an alloy containing one or more of the above metals. Alternatively, the conductive layer 104 may be formed using the nitrides and oxides that can be used for the conductive layers 112a and 112b.

[0193] In addition, the conductive layer 104 may also adopt a two-layer stacked structure. For example, a nitride or an oxide may be used as the lower conductive layer, and one or more of chromium, copper, aluminum, gold, silver, zinc, molybdenum, tantalum, titanium, tungsten, manganese, nickel, iron, cobalt and niobium or an alloy containing one or more of the above metals as a component may be used as the upper conductive layer.

[0194] [Substrate 102] Although there is no particular limitation on the material of the substrate 102, it is at least required to have heat resistance sufficient to withstand subsequent heat treatment. For example, a single crystal semiconductor substrate or a polycrystalline semiconductor substrate made of silicon or silicon carbide, a compound semiconductor substrate such as silicon germanium, an SOI (Silicon On Insulator) substrate, a glass substrate, a quartz substrate, a sapphire substrate, a ceramic substrate, or an organic resin substrate can be used as the substrate 102. In addition, a substrate having a semiconductor element disposed thereon can also be used as the substrate 102. Note that the shape of the semiconductor substrate and the insulating substrate can be circular or angular.

[0195] As the substrate 102, a flexible substrate may be used, and the transistor 100 and the like may be directly formed on the flexible substrate. Alternatively, a peeling layer may be provided between the substrate 102 and the transistor 100 and the like. The peeling layer may be used when a part or all of a semiconductor device is manufactured on the peeling layer, and then separated from the substrate 102 and transferred to another substrate. In this case, the transistor 100 and the like may also be transferred to a substrate with low heat resistance or a flexible substrate.

[0196] Hereinafter, a modified example of the above transistor will be described. Note that, regarding the parts that overlap with the above, reference may be made to the parts and the description thereof may be omitted.

[0197] <Transistor Variation Example 1> Figure 3A The transistor 100A shown in the figure is different from the transistor 100A in the cross-sectional shapes of the opening 141 and the recess 143. Figure 1B The transistor 100 shown is different.

[0198] Specifically, in transistor 100, the inner walls of the opening 141 (the sides of the insulating layer 110a, the insulating layer 110b, the insulating layer 110c and the conductive layer 112b) and the inner walls of the recess 143 (the sides of the insulating layer 110b) are formed to be approximately perpendicular to the substrate surface, while in transistor 100A, the inner walls of the opening 141 and the inner walls of the recess 143 have a conical shape.

[0199] The opening 141 has a shape in which the width (the diameter of the opening 141 when viewed from a plane) becomes smaller as it approaches the bottom surface. That is, in the opening 141, the width on the conductive layer 112a side is smaller than the width on the conductive layer 112b side. In this specification, etc., an opening having a shape in which the width becomes smaller as it approaches the bottom surface when viewed from a cross section is sometimes referred to as an opening of a "positive tapered shape". When the opening 141 has a positive tapered shape, the angle θ141 is greater than 0 degrees and less than 90 degrees.

[0200] Similarly, recess 143 also has a forward tapered shape. That is, in recess 143, the width on the conductive layer 112a side (the diameter of recess 143 when viewed from a plane) is smaller than the width on the conductive layer 112b side. In this case, angle θ143 is greater than 90 degrees and less than 180 degrees.

[0201] Since both the opening 141 and the recess 143 have a forward tapered shape, the coverage of the film deposited in the opening 141 and the recess 143 can be improved. In addition, the range of choices for deposition equipment can be expanded.

[0202] <Transistor Variation Example 2> Figure 3BThe transistor 100B shown in the figure is different from the transistor 100B in the cross-sectional shapes of the opening 141 and the recess 143. Figure 1B The transistor 100 and Figure 3A The transistor 100A shown is different.

[0203] Specifically, in the transistor 100, the inner wall of the opening 141 and the inner wall of the recess 143 are formed to be substantially perpendicular to the substrate surface, while in the transistor 100B, the inner wall of the opening 141 and the inner wall of the recess 143 have a tapered shape. In addition, in the transistor 100A, the opening 141 and the recess 143 both have a forward tapered shape, while in the transistor 100B, the tapered shapes of the opening 141 and the recess 143 are different.

[0204] As in the transistor 100A, the opening 141 has a forward tapered shape. That is, the angle θ141 is greater than 0 degrees and less than 90 degrees.

[0205] On the other hand, the concave portion 143 has a shape in which the width (the diameter of the concave portion 143 when viewed from a plane) increases as it approaches the bottom surface. That is, in the concave portion 143, the width on the conductive layer 112a side is greater than the width on the conductive layer 112b side. In this specification, etc., a concave portion having a shape in which the width increases as it approaches the bottom surface when viewed from a cross section is sometimes referred to as a "reverse tapered shape". When the concave portion 143 has a reverse tapered shape, the angle θ143 is greater than 0 degrees and less than 90 degrees.

[0206] That is, in the transistor 100B, the opening 141 has a forward tapered shape, and the recess 143 has a reverse tapered shape. Figure 3B In the transistor 100B, the angle θ141 and the angle θ143 are substantially the same. In other words, the inner wall of the opening 141 and the inner wall of the concave portion 143 facing the inner wall are substantially parallel.

[0207] When the inner wall of the opening 141 is roughly parallel to the inner wall of the recess 143, the thickness of the second gate insulating layer of the transistor 100B (the region between the insulating layer 110b and the insulating layer 110c and the conductive layer 112b and the semiconductor layer 108. It can also be said that it is the region between the opening 141 and the recess 143 when viewed from a plane) can be made roughly uniform. As a result, the electric field from the conductive layer 112b used as the second gate electrode can be roughly uniformly applied to the back channel region of the semiconductor layer 108 opposite to the conductive layer 112b. As a result, a transistor with stable electrical characteristics and reliability can be realized.

[0208] <Transistor Variation Example 3> Figure 4A The transistor 100C shown is mainly different from the Figure 1B The transistor 100 shown is different.

[0209] Specifically, in transistor 100, the bottom surface of recess 143 is located in the film of insulating layer 110b, while in transistor 100C, the bottom surface of recess 143 is located on the top surface of insulating layer 110a. That is, in transistor 100C, recess 143 is deeper than in transistor 100.

[0210] In the transistor 100C, the length L112b of the portion of the conductive layer 112b that functions as the second gate electrode is longer than the length L112b in the transistor 100. Therefore, an electric field from the conductive layer 112b can be applied to substantially the entire surface of the back channel region of the semiconductor layer 108. Thus, a transistor having stable electrical characteristics and reliability can be realized.

[0211] <Transistor Variation Example 4> Figure 4B The transistor 100D shown in the figure is different from the transistor 100D in terms of the shape of the conductive layer 112a and the depth of the recess 143. Figure 1B The transistor 100 and Figure 4A The transistor 100C shown is different.

[0212] Specifically, in transistors 100 and 100C, a conductive layer 112a is provided on the entire surface of the substrate 102 between the dot-dash line A1-A2, and an opening 141 and a recess 143 are provided on the conductive layer 112a. On the other hand, in transistor 100D, a conductive layer 112a is provided only on a portion of the substrate 102 between the dot-dash line A1-A2, and an insulating layer 103 is provided in a manner embedded in the conductive layer 112a. In addition, the opening 141 is provided on the conductive layer 112a, and the recess 143 is provided in a region not including the conductive layer 112a. Furthermore, the bottom surface of the recess 143 is located in the film of the insulating layer 103 below the insulating layer 110a, and the insulating layer 110c and the conductive layer 112b are provided in a manner embedded in the recess 143. In addition, the insulating layer 103 can use the above-mentioned materials that can be used for the insulating layer 110 and the insulating layer 106.

[0213] That is, in the transistor 100D, it can be said that the depth of the recess 143 is deeper than that of the transistor 100 and the transistor 100C. Therefore, in the transistor 100D, the length L112b of the portion of the conductive layer 112b used as the second gate electrode is longer than the length L112b in the transistor 100 and the length L112b in the transistor 100C. Therefore, the electric field from the conductive layer 112b can be reliably applied to the entire surface of the back channel region of the semiconductor layer 108. Thus, a transistor having stable electrical characteristics and reliability can be realized.

[0214] <Transistor Variation Example 5> Figure 5A The transistor 100E shown in FIG. 1 is different from the transistor 100E mainly in the width of the recess 143 (the diameter of the recess 143 when viewed from a plane). Figure 1B The transistor 100 shown is different.

[0215] Specifically, in the transistor 100E, the width S143 of the recess 143 is smaller than that of the transistor 100 .

[0216] For example, when viewed from a plane (see Figure 1A ) by reducing the width S143 of the concave portion 143 (i.e., reducing the diameter of the outer circumference of the concave portion 143), the occupied area of ​​the transistor in the substrate surface can be reduced. Thus, miniaturization of the transistor can be achieved, and high integration of the semiconductor device including the transistor can be achieved.

[0217] In addition, for example, by looking at it from a plane (refer to Figure 1A ) by making the width S143 of the recess 143 smaller in such a way that the diameter of the inner circumference of the recess 143 is enlarged, it is possible to reduce the influence of misalignment that may occur when the opening 141 is formed later. Note that a method for manufacturing a transistor according to one embodiment of the present invention will be described later.

[0218] <Transistor Variation Example 6> Figure 5B The transistor 100F shown in FIG. 1 is different from the transistor 100F mainly in the width of the recess 143 (the diameter of the recess 143 when viewed from a plane). Figure 1B The transistor 100 and Figure 5A The transistor 100E shown is different.

[0219] Specifically, in the transistor 100F, the width S143 of the recess 143 is larger than those of the transistor 100 and the transistor 100E.

[0220] By increasing the width S143 of the recess 143 , the insulating layer 110 c , the conductive layer 112 b , and the insulating layer 106 can be reliably formed to the bottom surface of the recess 143 , and the space such as voids generated between these layers and the bottom surface of the recess 143 can be reduced.

[0221] <Transistor Variation Example 7> Fig. 6A The transistor 100G shown is different from the transistor 100G mainly in the shape of the conductive layer 104 used as the first gate electrode. Figure 1B The transistor 100 shown is different.

[0222] Specifically, in the transistor 100, the end of the conductive layer 104 extends to the outside of the opening 141 and is located on the substantially flat top surface of the insulating layer 106 (on the overlapping region of the insulating layer 110, the conductive layer 112b, and the semiconductor layer 108). On the other hand, in the transistor 100G, the end of the conductive layer 104 is located on the inner side of the transistor 100 (on the side of the opening 141).

[0223] In the transistor 100, the region where the conductive layer 104 overlaps the conductive layer 112b can be used as a parasitic capacitor. Therefore, as in the transistor 100G, by minimizing the region of the conductive layer 104 extending to the outside of the opening 141, the parasitic capacitance generated between the conductive layer 104 and the conductive layer 112b can be reduced. Thus, the negative impact of the parasitic capacitance on the electrical characteristics of the transistor can be suppressed.

[0224] <Transistor Variation Example 8> Figure 6B The transistor 100H shown is different from the transistor 100H in the shape of the conductive layer 104 used as the first gate electrode. Figure 1B The transistor 100 and Fig. 6A The transistor 100G shown is different.

[0225] Specifically, in the transistors 100 and 100G, the conductive layer 104 has a shape along the inner wall and bottom surface of the opening 141, and the top surface of the conductive layer 104 has a recessed portion inside the opening 141. On the other hand, in the transistor 100H, the conductive layer 104 is provided so as to completely fill the opening 141, and the top surface of the conductive layer 104 has a substantially flat shape.

[0226] By forming the conductive layer 104 in such a shape, the unevenness of the top surface of the transistor can be reduced, thereby improving coverage of the layers formed over the transistor.

[0227] <Transistor Variation Example 9> Fig. 7A The transistor 100I shown is mainly similar to the transistor 100I in the structure of a conductive layer used as one of a source electrode and a drain electrode. Figure 1B The transistor 100 shown is different.

[0228] Specifically, in the transistor 100, the conductive layer serving as one of the source electrode and the drain electrode has a single-layer structure consisting of only the conductive layer 112a. On the other hand, in the transistor 100I, a portion of the conductive layer serving as one of the source electrode and the drain electrode has a stacked-layer structure of the conductive layer 112a and the conductive layer 112c.

[0229] The conductive layer 112c is provided on the conductive layer 112a so as to sandwich the opening 141. The insulating layer 110a is provided so as to be in contact with the bottom surface (the surface on the back channel region side) of the semiconductor layer 108, a portion of the top surface of the conductive layer 112a, and the side surface and top surface of the conductive layer 112c opposite to the opening 141.

[0230] In the transistor 100I, a stack of the conductive layer 112a and the conductive layer 112c is used as one of a source electrode and a drain electrode.

[0231] The conductive layer 112a is a conductive layer having a region in contact with the semiconductor layer 108. Therefore, it is preferable to use a material that is not easily oxidized as the conductive layer 112a. On the other hand, a material having a lower resistance than the conductive layer 112a can be used as the conductive layer 112c that does not have a region in contact with the semiconductor layer 108. In addition, for details of the material that is not easily oxidized that can be used for the conductive layer 112a and the material with low resistance that can be used for the conductive layer 112c, refer to the above description. As in the transistor 100I, by using a stack of a conductive layer that is not easily oxidized (conductive layer 112a) and a conductive layer with low resistance (conductive layer 112c) as one of the source electrode and the drain electrode, the stack can also be used as a wiring.

[0232] <Transistor Modification Example 10> Figure 7B The transistor 100J shown in FIG. 1 is mainly different from the semiconductor layer 108 and the conductive layer 112b in terms of their positional relationship. Figure 1B The transistor 100 shown is different.

[0233] Specifically, in the transistor 100J, the opening 145 that reaches the conductive layer 112a is provided in the insulating layer 110, and the semiconductor layer 108 is provided so as to have a region overlapping with the opening 145 and to be in contact with the top surface of the conductive layer 112a (which may also be referred to as the bottom surface of the opening 145), the side surface of the insulating layer 110 (which may also be referred to as the inner wall of the opening 145), and the top surface of the insulating layer 110. Furthermore, the conductive layer 112b is provided so as to be in contact with the top surface and side surface of the semiconductor layer 108 and the top surface of the insulating layer 110. The conductive layer 112b is provided so as to be embedded in the recess 143, and has a region overlapping (facing) the semiconductor layer 108 via the insulating layer 110 in the recess 143.

[0234] That is, transistor 100 is a bottom contact type transistor in which the bottom surface of the semiconductor layer 108 (the surface on the substrate 102 side) is in contact with the top surface of the conductive layer 112b serving as the other of the source electrode and the drain electrode, and on the other hand, transistor 100J is a top contact type transistor in which the top surface of the semiconductor layer 108 is in contact with the bottom surface of the conductive layer 112b serving as the other of the source electrode and the drain electrode (the surface on the substrate 102 side).

[0235] As described above, the transistor of one embodiment of the present invention may be a bottom contact transistor or a top contact transistor depending on the application, the manufacturing method, and the like.

[0236] <Transistor Modification Example 11> Fig. 8A FIG. 1 shows a plan view of transistor 100K. In addition, Figure 8B The transistor 100K corresponds to Fig. 8A The transistor 100K is mainly different from the transistor 100K in terms of the planar shape of the opening 141 and the recess 143. Figure 1A The transistor 100 shown is different.

[0237] Specifically, in the transistor 100, the planar shapes of the opening 141 and the recess 143 are both approximately circular (see Figure 1A ). In contrast, in the transistor 100K, the planar shapes of the opening 141 and the recess 143 are both approximately quadrilateral (see Fig. 8A ). On the other hand, there is almost no difference between the transistor 100 and the transistor 100K in terms of cross-sectional shape (see Figure 1B and Figure 8B ).

[0238] Thus, in the transistor of one embodiment of the present invention, the planar shapes of the opening 141 and the recess 143 may be shapes other than circular. Fig. 8A The example in which the planar shapes of the opening 141 and the recess 143 are approximately quadrilaterals is shown, but the invention is not limited thereto. The planar shapes of the opening 141 and the recess 143 may also be polygons such as circles, ellipses, triangles, quadrilaterals (including rectangles, rhombuses, squares), pentagons, or shapes in which the corners of these polygons are rounded.

[0239] In addition, the planar shape of the opening 141 and the planar shape of the recess 143 are preferably the same shape. For example, when the planar shape of the opening 141 is circular, the planar shape of the recess 143 is also preferably circular, and when the planar shape of the opening 141 is a quadrilateral, the planar shape of the recess 143 is also preferably a quadrilateral. Figure 1A and Fig. 8A), the center of the opening 141 and the center of the recess 143 are preferably as consistent as possible. Thus, the thickness of the second gate insulating layer in the transistor of one embodiment of the present invention can be made substantially uniform in any region. Thus, the electric field from the conductive layer 112b used as the second gate electrode can be substantially uniformly applied to the back channel region of the semiconductor layer 108 opposite to the conductive layer 112b. Thus, a transistor with stable electrical characteristics and reliability can be realized.

[0240] As described above, since the transistor of one embodiment of the present invention includes a second gate electrode, the saturation of the Id-Vd characteristic of the transistor can be improved. Thus, for example, when the transistor is used in a semiconductor device including a display unit, the number of grayscales of the display unit can be increased. In addition, the light emitting brightness of the display unit can be stabilized.

[0241] In addition, a transistor of one embodiment of the present invention has high reliability. Therefore, the reliability of a semiconductor device using the transistor can be improved. In particular, the degradation of transistor characteristics in a state where a voltage is applied to the first gate electrode can be suppressed. For example, in an n-channel transistor, the degradation of characteristics in a state where a positive potential relative to the source potential is applied to the first gate electrode can be suppressed.

[0242] In addition, in a transistor of one embodiment of the present invention, the threshold voltage can be appropriately controlled to easily realize a normally-off characteristic. For example, in an n-channel transistor, by adopting a structure in which the second gate electrode is electrically connected to the source electrode (a structure that also serves as the second gate electrode and the source electrode), the threshold value can be appropriately prevented from becoming a negative value.

[0243] In addition, a transistor of one embodiment of the present invention can set the channel length to an extremely small value, so a transistor with a large on-state current can be realized. Therefore, for example, the frequency characteristics of the transistor can be improved. In addition, for example, the operating speed of a semiconductor device using the transistor can be increased.

[0244] As described above, in a transistor of one embodiment of the present invention, one conductive layer (conductive layer 112b) has the function of the other of the source electrode and the drain electrode and the function of the second gate electrode. Therefore, compared with the case where the other of the source electrode and the drain electrode and the second gate electrode are separately provided, in a circuit including a transistor of one embodiment of the present invention, the number of wirings can be reduced. Therefore, the overall simplification of the circuit can be achieved. In addition, the number of steps during manufacturing is reduced, and an improvement in productivity can be achieved.

[0245] <Example of a method for manufacturing a transistor> Below, refer to the accompanying drawings ( 9A to 11C ) describes a method for manufacturing a transistor according to one embodiment of the present invention. Figure 1BThe case of the transistor 100 shown is described as an example.

[0246] The thin films (insulating film, semiconductor film, conductive film, etc.) constituting the transistor 100 can be formed by sputtering, chemical vapor deposition (CVD), vacuum evaporation, pulsed laser deposition (PLD), ALD, or the like.

[0247] As the sputtering method, there can be cited an RF sputtering method using a high frequency power supply as a sputtering power supply, a DC sputtering method using a direct current power supply, and a pulsed DC sputtering method in which the voltage applied to the electrode is changed in a pulsed manner. The RF sputtering method is mainly used when depositing an insulating film, and the DC sputtering method is mainly used when depositing a metal conductive film. In addition, the pulsed DC sputtering method is mainly used when depositing compounds such as oxides, nitrides, or carbides using a reactive sputtering method.

[0248] The CVD method can be divided into a plasma CVD (PECVD) method using plasma, a thermal CVD (TCVD: Thermal CVD) method using heat, and a photo CVD (Photo CVD) method using light, etc. Furthermore, it can be divided into a metal CVD (MCVD: Metal CVD) method and an organic metal CVD (MOCVD: Metal Organic CVD) method according to the source gas used.

[0249] By utilizing the plasma CVD method, a high-quality film can be obtained at a lower temperature. In addition, since plasma is not used, the thermal CVD method is a deposition method that can reduce plasma damage to the object being processed. For example, the wiring, electrodes, and components (transistors, capacitors, etc.) included in a semiconductor device sometimes generate charge accumulation due to receiving charges from plasma. At this time, the wiring, electrodes, or components included in the semiconductor device are sometimes damaged due to the accumulated charges. On the other hand, since the above-mentioned plasma damage does not occur in the case of the thermal CVD method without using plasma, the yield of the semiconductor device can be improved. In addition, in the thermal CVD method, plasma damage during deposition is not generated, so a film with fewer defects can be obtained.

[0250] As the ALD method, the following methods can be used: a thermal ALD method in which a precursor and a reactant react using only thermal energy; a PEALD method using a reactant excited by plasma; and the like.

[0251] The CVD method and the ALD method are different from the sputtering method in which particles released from a target material or the like are deposited. Therefore, the ALD method is a deposition method that is not easily affected by the shape of the object to be processed and has good step coverage. In particular, the ALD method has good step coverage and thickness uniformity, so it is suitable for forming a film covering the surface of an opening with a high aspect ratio, etc. However, the deposition rate of the ALD method is relatively slow, so it is sometimes preferably used in combination with other deposition methods such as the CVD method with a fast deposition rate.

[0252] In addition, when the CVD method is used, a film of any composition can be deposited according to the flow ratio of the source gas. For example, when the CVD method is used, a film whose composition continuously changes can be deposited by changing the flow ratio of the source gas while performing deposition. When deposition is performed while changing the flow ratio of the source gas, since the time required for conveying or adjusting the pressure is not required, the deposition time can be shortened compared to the case where deposition is performed using multiple deposition chambers. Therefore, the productivity of the semiconductor device can sometimes be improved.

[0253] When the ALD method is used, a film of any composition can be deposited by introducing different precursors at the same time. Alternatively, when introducing different precursors, a film of any composition can be deposited by controlling the number of cycles of each precursor.

[0254] The thin film (insulating film, semiconductor film, conductive film, etc.) constituting the transistor 100 can be formed by a method such as spin coating, dipping, spraying, inkjet, dispenser, screen printing, offset printing, doctor knife, slit coating, roll coating, curtain coating, and doctor blade coating.

[0255] When processing the thin film constituting the transistor 100, photolithography or the like can be used. Alternatively, the thin film can be processed by nanoimprinting, sandblasting, lift-off, etc. Furthermore, an island-shaped thin film can be directly formed by a deposition method using a shadow mask such as a metal mask.

[0256] There are two typical methods of photolithography. One is to form a resist mask on a thin film to be processed, process the thin film by etching, etc., and remove the resist mask. The other is to form a photosensitive thin film, then expose and develop it, and process the thin film into a desired shape.

[0257] In the photolithography method, as the light used for exposure, for example, i-line (wavelength 365nm), g-line (wavelength 436nm), h-line (wavelength 405nm) or a mixture of these lights can be used. In addition, ultraviolet light, KrF laser or ArF laser, etc. can also be used. In addition, liquid immersion exposure technology can also be used for exposure. In addition, as the light used for exposure, extreme ultraviolet (EUV: Extreme Ultra-violet) light or X-rays can also be used. In addition, instead of the light used for exposure, an electron beam can also be used. When extreme ultraviolet light, X-rays or electron beams are used, extremely fine processing can be performed, so it is preferred. Note that when exposure is performed by scanning with a light beam such as an electron beam, a photomask is not required.

[0258] As a method for etching the thin film, for example, dry etching, wet etching, or sandblasting can be used, or a combination of these etching methods can be used.

[0259] Next, an example of a method for manufacturing the transistor 100 is described.

[0260] First, a conductive layer 112a is formed on the substrate 102, and an insulating layer 110a and an insulating layer 110b are sequentially formed on the conductive layer 112a (see Fig.9A ).

[0261] As the substrate 102 , for example, the above-mentioned materials can be used.

[0262] The conductive layer 112a can be formed by a sputtering method using the above-mentioned material, for example.

[0263] The insulating layer 110a and the insulating layer 110b can be formed by the PECVD method using the above-mentioned materials, for example. The insulating layer 110a and the insulating layer 110b are preferably formed continuously in a vacuum without being exposed to the atmosphere. Thus, impurities from the atmosphere can be suppressed from adhering to the surface of the insulating layer 110a. Examples of such impurities include water and organic matter.

[0264] The substrate temperature when forming the insulating layer 110a and the insulating layer 110b is preferably 180°C or higher and 450°C or lower, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and more preferably 350°C or higher and 400°C or lower. By setting the substrate temperature when forming the insulating layer (film) to the above range, impurities (for example, water and hydrogen) released from the insulating layer (film) itself can be reduced, and diffusion of impurities into the semiconductor layer 108 to be formed later can be suppressed. Thus, a transistor having good electrical characteristics and high reliability can be realized.

[0265] Note that since the insulating layer 110 a and the insulating layer 110 b are formed before the semiconductor layer 108 is formed, there is no concern that oxygen will be released from the semiconductor layer 108 due to heat applied when forming the insulating layer (film).

[0266] Alternatively, heat treatment may be performed after the insulating layer 110 b is formed. By performing the heat treatment, water and hydrogen can be removed from the surface and the film of the insulating layer 110 b.

[0267] The temperature of the heat treatment is preferably 150°C or higher and lower than the strain point of the substrate, more preferably 200°C or higher and 450°C or lower, more preferably 250°C or higher and 450°C or lower, more preferably 300°C or higher and 450°C or lower, more preferably 300°C or higher and 400°C or lower, and more preferably 350°C or higher and 400°C or lower. The heat treatment may be performed in an atmosphere containing one or more of a rare gas, nitrogen, and oxygen. As a nitrogen-containing atmosphere or an oxygen-containing atmosphere, dry air (CDA: Clean Dry Air) may also be used. Note that the content of hydrogen or water in the atmosphere is preferably as small as possible. As the atmosphere, a high-purity gas having a dew point of -60°C or lower, preferably -100°C or lower is preferably used. By using an atmosphere containing as little hydrogen, water, or the like as possible, it is possible to prevent hydrogen, water, or the like from being absorbed by the insulating layer 110 as much as possible. The heat treatment may be performed using an oven or a rapid thermal annealing (RTA: Rapid Thermal Annealing) device or the like. By using an RTA device, the heat treatment time can be shortened.

[0268] Alternatively, after the insulating layer 110 b is formed, a process of supplying oxygen to the insulating layer 110 b may be performed.

[0269] In one embodiment of the present invention, oxygen is supplied to the insulating layer 110b by forming a metal oxide layer on the insulating layer 110b after the insulating layer 110b is formed. Alternatively, heat treatment may be performed after the metal oxide layer is formed. By performing heat treatment after the metal oxide layer is formed, oxygen can be effectively supplied from the metal oxide layer to the insulating layer 110b so that the insulating layer 110b contains oxygen. The oxygen supplied to the insulating layer 110b is supplied to the semiconductor layer 108 in a subsequent process, and oxygen vacancies (V O ) and V O H.

[0270] After the metal oxide layer is formed or after the above-mentioned heat treatment, oxygen may be supplied to the insulating layer 110b through the metal oxide layer. As a method for supplying oxygen, for example, ion implantation, ion doping, plasma immersion ion implantation, or plasma treatment may be used. As the plasma treatment, an apparatus for plasma-forming oxygen gas with high-frequency power may be appropriately used. As an apparatus for plasma-forming gas with high-frequency power, for example, a plasma etching apparatus and a plasma ashing apparatus may be cited.

[0271] The metal oxide layer can be both an insulating layer and a conductive layer. The metal oxide layer can also use aluminum oxide, hafnium oxide, hafnium aluminate, indium oxide, indium tin oxide (ITO) or indium tin oxide containing silicon (ITSO), for example.

[0272] As the metal oxide layer, it is preferable to use an oxide material containing one or more elements that are the same as those of the semiconductor layer 108. In particular, an oxide semiconductor material that can be used for the semiconductor layer 108 is preferably used.

[0273] The metal oxide layer is preferably formed in an oxygen-containing atmosphere, for example. In particular, it is preferably formed by sputtering in an oxygen-containing atmosphere. Thus, oxygen can be appropriately supplied to the insulating layer 110 b when the metal oxide layer is formed.

[0274] Next, the metal oxide layer is removed. The metal oxide layer can be removed by, for example, wet etching.

[0275] The process of supplying oxygen to the insulating layer 110b is not limited to the above method. For example, oxygen radicals, oxygen atoms, oxygen atomic ions, oxygen molecular ions, etc. can be supplied to the insulating layer 110b by ion doping, ion implantation, plasma treatment, etc. In addition, after a film that inhibits oxygen detachment is formed on the insulating layer 110b, oxygen can be supplied to the insulating layer 110b through the film. It is preferred to remove the film after supplying oxygen. As the above-mentioned film that inhibits oxygen detachment, a conductive film or semiconductor film containing one or more of indium, zinc, gallium, tin, aluminum, chromium, tantalum, titanium, molybdenum, nickel, iron, cobalt and tungsten can be used.

[0276] Next, a resist mask (not shown) is formed on the insulating layer 110b by a photolithography process, and then the insulating layer 110b is processed to form a recess 143 in the insulating layer 110b (see FIG. Fig. 9B ) When forming the recessed portion 143, for example, a dry etching method can be appropriately used.

[0277] Next, the insulating layer 110c is formed so as to cover the top surface of the insulating layer 110b (including the inner wall and bottom surface of the concave portion 143) (see Fig. 9C). The insulating layer 110c can be formed by a PECVD method using the above-mentioned materials, for example. The insulating layer 110c is preferably formed of the same material as the insulating layer 110a.

[0278] Next, a conductive film 112bf (see FIG. 112bf ) which will later become a conductive layer 112b is formed on the insulating layer 110c. Fig. 10A ). The conductive film 112bf can be formed by a sputtering method using the above-mentioned material, for example.

[0279] Next, a resist mask (not shown) is formed on the conductive film 112bf by a photolithography process. The resist mask is Figure 1A ) is formed at a position other than the region surrounded by the recess 143 (a position as close to the center of the region as possible). Then, the conductive film 112bf, the insulating layer 110c, the insulating layer 110b, and the insulating layer 110a are processed respectively to form an opening 141 reaching the conductive layer 112a in the conductive film 112bf, the insulating layer 110c, the insulating layer 110b, and the insulating layer 110a (see Fig. 10B ) In addition, through this processing, the conductive layer 112b is formed from the conductive film 112bf.

[0280] Thus, in one embodiment of the present invention, the recess 143 is formed in advance in the insulating layer 110b, and then the conductive film 112bf in the region surrounded by the recess 143 is processed to form the opening 141 and the conductive layer 112b. The conductive layer 112b is a conductive layer that is later used as the other of the source electrode and the drain electrode and the second gate electrode of the transistor 100. Therefore, the number of steps can be reduced compared to the case where the other of the source electrode and the drain electrode and the second gate electrode are formed separately.

[0281] Next, a metal oxide film 108f (see FIG. 108f ) which will later become the semiconductor layer 108 is formed so as to cover the top surface of the conductive layer 112b, the top surface of the conductive layer 112a (i.e., the bottom surface of the opening 141), the conductive layer 112b, the insulating layer 110c, and the side surfaces of the insulating layer 110b and the insulating layer 110a (i.e., the inner wall of the opening 141). Fig. 10C ) The metal oxide film 108f is preferably formed by a sputtering method using a metal oxide target.

[0282] The metal oxide film 108f is preferably a dense film with as few defects as possible. In addition, the metal oxide film 108f is preferably a high-purity film in which impurities containing hydrogen elements are reduced as much as possible. In particular, a crystalline metal oxide film is preferably used as the metal oxide film 108f.

[0283] When depositing the metal oxide film 108f, oxygen gas and an inert gas (e.g., helium gas, argon gas, xenon gas, etc.) may also be mixed. Sometimes, the higher the ratio of oxygen gas to the entire deposition gas (oxygen flow ratio) when depositing the metal oxide film 108f, the higher the crystallinity of the metal oxide film 108f may be. Thus, a transistor 100 with high reliability may be realized. On the other hand, sometimes, the lower the oxygen flow ratio, the lower the crystallinity of the metal oxide film 108f. Thus, a transistor 100 with a large on-state current may be realized.

[0284] When the substrate temperature is high when the metal oxide film 108f is formed, a metal oxide film with higher crystallinity and density may be formed. On the other hand, when the substrate temperature is low, a metal oxide film with lower crystallinity and higher conductivity may be formed.

[0285] The substrate temperature during formation of the metal oxide film 108f may be room temperature to 250°C, preferably room temperature to 200°C, and more preferably room temperature to 140°C. For example, the substrate temperature is preferably room temperature to 140°C, thereby improving productivity.

[0286] In the case where the semiconductor layer 108 has a stacked-layer structure, it is preferable that, after depositing a metal oxide film of a lower layer, an upper metal oxide film is continuously deposited without exposing its surface to the atmosphere.

[0287] Furthermore, for example, when a metal oxide is used for the semiconductor layer 108 , the metal oxide can be deposited by an ALD method using a precursor containing a metal element constituting the metal oxide and an oxidizing agent.

[0288] For example, when depositing In-Ga-Zn oxide, three precursors including a precursor containing indium, a precursor containing gallium, and a precursor containing zinc may be used. Alternatively, two precursors including a precursor containing indium and a precursor containing gallium and zinc may be used.

[0289] As the precursor containing indium, triethylindium, tri(2,2,6,6-tetramethyl-3,5-heptanedione)indium, cyclopentadienylindium, indium(III) chloride, (3-(dimethylamino)propyl)dimethylindium, or the like can be used.

[0290] As a precursor containing gallium, trimethylgallium, triethylgallium, tris(dimethylamide)gallium(III), gallium(III) acetylacetonate, tris(2,2,6,6-tetramethyl-3,5-heptanedione)gallium, dimethylgallium chloride, diethylgallium chloride, gallium(III) chloride, etc. can be used.

[0291] In addition, as a precursor containing zinc, dimethyl zinc, diethyl zinc, bis(2,2,6,6-tetramethyl-3,5-heptanedione) zinc, zinc chloride, or the like can be used.

[0292] As the oxidizing agent, for example, ozone, oxygen, water, etc. can be used.

[0293] As a method for controlling the composition of the obtained film, the flow ratio of the source gas, the flow time of the source gas, the flow order of the source gas, etc. can be exemplified. In addition, by adjusting these, a film whose composition changes continuously can be deposited. In addition, films with different compositions can also be deposited continuously.

[0294] In addition, heat treatment may be performed after the metal oxide film 108f is formed. By performing this heat treatment, water and hydrogen can be separated from the surface and film of the metal oxide film 108f. In addition, by this heat treatment, oxygen can be supplied from the insulating layer 110b to the metal oxide film 108f. In addition, by this heat treatment, the film quality of the metal oxide film 108f is sometimes improved (for example, the reduction of defects, the improvement of crystallinity, etc.). In addition, as the conditions for the heat treatment, the conditions for the heat treatment that can be used after the formation of the above-mentioned insulating layer 110a and the insulating layer 110b can be adopted.

[0295] Note that this heat treatment may not be performed if it is not necessary. In addition, it is also possible not to perform heat treatment in this process and use the heat treatment performed in a subsequent process as the heat treatment in this process. In addition, sometimes the treatment at a high temperature in a subsequent process (for example, a deposition process, etc.) can also serve as this heat treatment.

[0296] Next, the metal oxide film 108f is processed into an island shape so as to have a region overlapping the inner wall of the opening 141, thereby forming the semiconductor layer 108 (see Fig.11A ).

[0297] One or both of a wet etching method and a dry etching method can be used when forming the semiconductor layer 108. When forming the semiconductor layer 108, for example, a wet etching method can be appropriately used.

[0298] Next, the insulating layer 106 is formed so as to cover the top surfaces of the semiconductor layer 108 and the conductive layer 112b (see Fig. 11B ). The insulating layer 106 can be formed by a PECVD method using the above-mentioned material, for example.

[0299] When an oxide semiconductor is used as the semiconductor layer 108, an insulating material containing oxygen and having reduced hydrogen is preferably used as the insulating layer 106. As a result, the semiconductor layer 108 having a region in contact with the insulating layer 106 is not easily converted to an n-type. In addition, oxygen can be efficiently supplied from the insulating layer 106 to the semiconductor layer 108, so that oxygen vacancies (V O ). The semiconductor layer 108 is a layer that will later serve as a semiconductor layer that forms a channel of the transistor 100. Therefore, by using the above material as the insulating layer 106, the transistor 100 having good electrical characteristics and high reliability can be implemented.

[0300] By increasing the temperature at which the insulating layer 106 serving as the gate insulating layer of the transistor 100 is formed, an insulating layer with fewer defects can be formed. However, when the temperature at which the insulating layer 106 is formed is high, oxygen may be separated from the semiconductor layer 108, thereby increasing oxygen vacancies (V O ) and the V generated when hydrogen enters the oxygen vacancy O H. The substrate temperature when forming the insulating layer 106 is preferably 180° C. to 450° C., more preferably 200° C. to 450° C., more preferably 250° C. to 450° C., more preferably 300° C. to 450° C., more preferably 300° C. to 400° C. When the insulating layer 106 is formed, the substrate temperature is set within the above range, while reducing defects in the insulating layer 106, oxygen can be suppressed from being released from the semiconductor layer 108. Therefore, the transistor 100 having good electrical characteristics and high reliability can be realized.

[0301] The surface of the semiconductor layer 108 may be subjected to plasma treatment before forming the insulating layer 106. By this plasma treatment, impurities such as water adsorbed on the surface of the semiconductor layer 108 can be reduced. Therefore, impurities at the interface between the semiconductor layer 108 and the insulating layer 106 can be reduced, so that the transistor 100 with high reliability can be realized. In particular, it is preferable to perform plasma treatment when the surface of the semiconductor layer 108 is exposed to the atmosphere between the formation of the semiconductor layer 108 and the formation of the insulating layer 106. The plasma treatment can be performed, for example, in an atmosphere of oxygen, ozone, nitrogen, nitrous oxide, argon, or the like. The plasma treatment and the deposition of the insulating layer 106 are preferably performed continuously without being exposed to the atmosphere.

[0302] Next, a conductive film 104f (see FIG. 104b ) which will later become the conductive layer 104 is formed on the insulating layer 106. Fig. 11C ). The conductive film 104f can be formed by a sputtering method using the above-mentioned material, for example.

[0303] Next, a resist mask (not shown) is formed on the conductive film 104f by a photolithography process. In addition, the resist mask is set in a manner having at least a region overlapping with the opening 141. Then, the conductive film 104f is processed through the resist mask to form a conductive layer 104 having a region overlapping with the opening 141. The conductive layer 104 is a conductive layer that will become a gate electrode of the transistor 100. When forming the conductive layer 104, one or both of a wet etching method and a dry etching method can be used. When forming the conductive layer 104, for example, a wet etching method can be appropriately used.

[0304] Through the above steps, the transistor 100 (see Figure 1B ).

[0305] As described above, the transistor of one embodiment of the present invention is a kind of vertical transistor, so the source electrode, the semiconductor layer and the drain electrode can be overlapped on the substrate. Therefore, compared with a planar transistor, for example, the occupied area of ​​the transistor in the substrate surface can be greatly reduced. In addition, the transistor of one embodiment of the present invention can make the channel length extremely small and include a second gate electrode, so the on-state current can be increased and the saturation of the Id-Vd characteristic can be improved. In addition, reliability can also be improved. Furthermore, in a transistor of one embodiment of the present invention, a conductive layer has the function of the other of the source electrode and the drain electrode and the function of the second gate electrode. Therefore, compared with the case where the other of the source electrode and the drain electrode and the second gate electrode are separately provided, the number of wirings can be reduced in the circuit including the transistor, and the overall simplification of the circuit can be achieved. In addition, the number of steps during manufacturing is reduced, and productivity can be improved.

[0306] This embodiment mode can be appropriately combined with other embodiment modes. In addition, in this specification, when a plurality of configuration examples are shown in one embodiment mode, the configuration examples can be appropriately combined.

[0307] (Implementation Method 2) In this embodiment, refer to Figures 12 to 20F A display device including a transistor according to one embodiment of the present invention is described.

[0308] The display device of this embodiment mode may be a high-resolution display device or a large display device. Therefore, for example, the display device of this embodiment mode may be used as a display portion of the following devices: electronic devices with a large screen such as television devices, desktop or notebook personal computers, displays for computers, etc., digital signage, large-scale game machines such as pinball machines, etc.; digital cameras; digital video cameras; digital photo frames; mobile phones; portable game machines; portable information terminals; and sound reproduction devices.

[0309] In addition, the display device of this embodiment can be a high-definition display device. Therefore, for example, the display device of this embodiment can be used as a display unit of information terminal devices (wearable devices) such as watch-type and bracelet-type devices, and a display unit of wearable devices that can be worn on the head such as VR devices such as head-mounted displays (HMDs) and glasses-type AR devices.

[0310] A semiconductor device of one embodiment of the present invention can be used in a display device or a module including the display device. As a module including the display device, there can be cited a module in which the display device is equipped with a connector such as a flexible printed circuit (FPC) or TCP (Tape Carrier Package), a module in which an integrated circuit (IC) is installed by a COG (Chip On Glass) method or a COF (Chip On Film) method, etc.

[0311] [Display device 50A] Fig.12 A perspective view of the display device 50A is shown.

[0312] The display device 50A has a structure in which a substrate 152 and a substrate 151 are bonded together. Fig.12 In FIG. 1 , the substrate 152 is indicated by a dotted line.

[0313] The display device 50A includes a display portion 162 , a connection portion 140 , a circuit portion 164 , wiring 165 , and the like. Fig.12 The example in which the display device 50A is mounted with the IC 173 and the FPC 172 is shown. Fig.12 The structure shown is called a display module including the display device 50A, IC and FPC.

[0314] The connection portion 140 is disposed outside the display portion 162. The connection portion 140 may be disposed along one side or multiple sides of the display portion 162. There may also be one or more connection portions 140. Fig.12 The example in which the connection part 140 is provided so as to surround the four sides of the display part is shown. In the connection part 140, the common electrode of the display element is electrically connected to the conductive layer, and a potential can be supplied to the common electrode.

[0315] The circuit unit 164 includes, for example, a scanning line driving circuit (also referred to as a gate driver). Alternatively, the circuit unit 164 may include both a scanning line driving circuit and a signal line driving circuit (also referred to as a source driver).

[0316] The wiring 165 has a function of supplying signals and power to the display portion 162 and the circuit portion 164. The signals and power are input to the wiring 165 from the outside through the FPC 172 or are input to the wiring 165 from the IC 173.

[0317] Fig.12 An example of providing IC 173 on substrate 151 by COG method or COF method is shown. As IC 173, for example, an IC including one or both of a scanning line driving circuit and a signal line driving circuit can be used. Note that the display device 50A and the display module do not necessarily have to be provided with an IC. Alternatively, the IC can be mounted on an FPC by using COF method or the like.

[0318] The transistor of one embodiment of the present invention can be used for, for example, one or both of the display portion 162 and the circuit portion 164 of the display device 50A.

[0319] For example, when a transistor of one embodiment of the present invention is used in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced and a high-definition display device can be realized. In addition, for example, when a transistor of one embodiment of the present invention is used in a drive circuit of a display device (for example, one or both of a gate line drive circuit and a source line drive circuit), the area occupied by the drive circuit can be reduced and a display device with a narrow frame can be realized. In addition, a transistor of one embodiment of the present invention has good electrical characteristics, and by using the transistor in a display device, the reliability of the display device can be improved.

[0320] The display unit 162 is an image display region in the display device 50A, and includes a plurality of pixels 210 arranged periodically. Fig.12 An enlarged view of one pixel 210 is shown in FIG.

[0321] There is no particular limitation on the arrangement of pixels in the display device of this embodiment, and various methods can be used. Examples of pixel arrangements include stripe arrangement, S-stripe arrangement, matrix arrangement, Delta arrangement, Bayer arrangement, and Pentile arrangement.

[0322] Fig.12 The pixel 210 shown includes a sub-pixel 11R that exhibits red light, a sub-pixel 11G that exhibits green light, and a sub-pixel 11B that exhibits blue light.

[0323] Each of the sub-pixels 11R, 11G, and 11B includes a display element and a circuit for controlling driving of the display element.

[0324] Various elements can be used as display elements, for example, liquid crystal elements and light-emitting elements. In addition, MEMS (Micro Electro Mechanical Systems) elements of shutter mode or light interference mode, display elements using microcapsule mode, electrophoresis mode, electrowetting mode or electronic powder fluid (registered trademark) mode, etc. can also be used. In addition, QLED (Quantum-dot LED) using light source and color conversion technology using quantum dot materials can also be used.

[0325] Examples of the liquid crystal element include a transmissive liquid crystal element, a reflective liquid crystal element, and a semi-transmissive liquid crystal element.

[0326] As the light emitting element, for example, there can be mentioned self-luminous light emitting elements such as LED, OLED (Organic LED), semiconductor laser, etc. As the LED, for example, a small LED, a micro LED, etc. can be used.

[0327] Examples of the light-emitting substance contained in the light-emitting element include substances that emit fluorescence (fluorescent materials), substances that emit phosphorescence (phosphorescent materials), substances that exhibit thermally activated delayed fluorescence (TADF materials), and inorganic compounds (quantum dot materials, etc.).

[0328] The light emitting element may emit light of infrared, red, green, blue, cyan, magenta, yellow or white, etc. In addition, when the light emitting element has a microcavity structure, the color purity can be further improved.

[0329] Of a pair of electrodes included in the light emitting element, one electrode is used as an anode and the other electrode is used as a cathode.

[0330] In this embodiment, description is mainly given by taking the case where a light-emitting element is used as a display element as an example.

[0331] A display device according to one embodiment of the present invention may also adopt any of the following structures: a top emission type that emits light in a direction opposite to a substrate on which a light-emitting element is formed, a bottom emission type that emits light to one side of a substrate on which a light-emitting element is formed, or a dual emission type that emits light to both sides.

[0332] Fig.13An example of a cross section of a portion of the region including the FPC 172 , a portion of the circuit portion 164 , a portion of the display portion 162 , a portion of the connection portion 140 , and a portion of the region including the end portion of the display device 50A is shown.

[0333] Fig.13 The display device 50A shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, etc. between substrates 151 and 152. The light-emitting element 130R is a display element included in the sub-pixel 11R that emits red light, the light-emitting element 130G is a display element included in the sub-pixel 11G that emits green light, and the light-emitting element 130B is a display element included in the sub-pixel 11B that emits blue light.

[0334] The display device 50A adopts an SBS structure. In the SBS structure, the material and structure of each light emitting element can be optimized separately, the degree of freedom in selecting materials and structures is increased, and it becomes easy to improve brightness and reliability.

[0335] The display device 50A adopts a top emission type. In the top emission type, transistors and the like can be arranged so as to overlap with the light emitting region of the light emitting element, so that the aperture ratio of the pixel can be further increased compared with the bottom emission type.

[0336] The transistors 205D, 205R, 205G, and 205B are all formed over the substrate 151. These transistors can be manufactured using the same material and the same process.

[0337] In this embodiment, an example of using OS transistors as transistors 205D, 205R, 205G, and 205B is shown. As transistors 205D, 205R, 205G, and 205B, transistors of one embodiment of the present invention can be used. That is, in the display device 50A, both the display unit 162 and the circuit unit 164 include transistors of one embodiment of the present invention. By using a transistor of one embodiment of the present invention in the display unit 162, the pixel size can be reduced and high definition can be achieved. In addition, by using a transistor of one embodiment of the present invention in the circuit unit 164, the area occupied by the circuit unit 164 can be reduced and a narrow frame can be achieved. For the transistor of one embodiment of the present invention, reference can be made to the description of the above embodiment.

[0338] Specifically, the transistors 205D, 205R, 205G, and 205B all include, for example, a conductive layer 104 serving as a first gate electrode, an insulating layer 106 serving as a first gate insulating layer, a conductive layer 112a serving as one of a source electrode and a drain electrode, a conductive layer 112b serving as the other of the source electrode and the drain electrode and a second gate electrode, a semiconductor layer 108 containing a metal oxide, and an insulating layer 110 serving as a second gate insulating layer (insulating layer 110a, insulating layer 110b, and insulating layer 110c). Here, a plurality of layers obtained by processing the same conductive film are indicated by the same hatching. The insulating layer 110 is located between the conductive layer 112b and the semiconductor layer 108. The insulating layer 106 is located between the conductive layer 104 and the semiconductor layer 108.

[0339] Note that the transistor included in the display device of this embodiment is not limited to the transistor of one embodiment of the present invention. For example, the transistor of one embodiment of the present invention and a transistor of another structure may be combined.

[0340] The display device of this embodiment may include, for example, any one or more of a planar transistor, a staggered transistor, and an inversely staggered transistor. The transistor included in the display device of this embodiment has any one of a top-gate structure and a bottom-gate structure. Alternatively, gate electrodes may be provided above and below the semiconductor layer forming the channel.

[0341] Furthermore, the display device of this embodiment may include a transistor using silicon for a channel formation region (Si transistor).

[0342] Examples of silicon include single crystal silicon, polycrystalline silicon, and amorphous silicon. In particular, a transistor including LTPS in a semiconductor layer (hereinafter also referred to as LTPS transistor) can be used. LTPS transistors have high field effect mobility and good frequency characteristics.

[0343] When the luminous brightness of the light-emitting element included in the pixel circuit is increased, the amount of current flowing through the light-emitting element needs to be increased. To this end, it is necessary to increase the source-drain voltage of the driving transistor included in the pixel circuit. Because the source-drain withstand voltage of the OS transistor is higher than that of the Si transistor, a high voltage can be applied to the source-drain of the OS transistor. Thus, by using the OS transistor as the driving transistor included in the pixel circuit, the amount of current flowing through the light-emitting element can be increased to improve the luminous brightness of the light-emitting element.

[0344] When the transistor operates in the saturation region, the OS transistor can make the change in the source-drain current for the change in the gate-source voltage smaller than the Si transistor. Therefore, by using the OS transistor as the driving transistor included in the pixel circuit, the current flowing through the source-drain can be determined in detail according to the change in the gate-source voltage, so the amount of current flowing through the light-emitting element can be controlled. As a result, the number of grayscales of the pixel circuit can be increased.

[0345] In addition, regarding the saturation characteristics of the current flowing when the transistor operates in the saturation region, compared with the Si transistor, the OS transistor can make a stable current (saturation current) flow even if the source-drain voltage is gradually increased. Therefore, by using the OS transistor as a driving transistor, even if, for example, the current-voltage characteristics of the EL element are uneven, a stable current can flow through the light-emitting element. That is, when the OS transistor operates in the saturation region, even if the source-drain voltage is changed, the source-drain current remains almost unchanged, so the light-emitting brightness of the light-emitting element can be stabilized.

[0346] The transistor included in the circuit portion 164 and the transistor included in the display portion 162 may have the same structure or different structures. The plurality of transistors included in the circuit portion 164 may have the same structure or two or more different structures. Similarly, the plurality of transistors included in the display portion 162 may have the same structure or two or more different structures.

[0347] All transistors included in the display portion 162 may be OS transistors, all transistors included in the display portion 162 may be Si transistors, some transistors included in the display portion 162 may be OS transistors and the remaining transistors may be Si transistors.

[0348] For example, by using both LTPS transistors and OS transistors in the display portion 162, a display device with low power consumption and high driving capability can be realized. In addition, a structure in which an LTPS transistor and an OS transistor are combined is sometimes referred to as LTPO. As a more preferred example, a structure in which an OS transistor is used as a transistor used as a switch for controlling conduction / non-conduction between wirings and an LTPS transistor is used as a transistor for controlling current can be cited.

[0349] For example, one of the transistors included in the display unit 162 is used as a transistor for controlling the current flowing through the light-emitting element and may also be referred to as a driving transistor. One of the source and drain of the driving transistor is electrically connected to the pixel electrode of the light-emitting element. The driving transistor preferably uses an LTPS transistor. Thus, the current flowing through the light-emitting element in the pixel circuit can be increased.

[0350] In addition, one of the other transistors included in the display unit 162 is used as a switch for controlling the selection and non-selection of pixels, and may also be referred to as a selection transistor. The gate of the selection transistor is electrically connected to the gate line, and one of the source and the drain is electrically connected to the source line (signal line). The selection transistor is preferably an OS transistor. Thus, the grayscale of the pixel can be maintained even if the frame rate is significantly reduced (for example, below 1fps), so power consumption can be reduced by stopping the driver when displaying a static image.

[0351] An insulating layer 218 is provided to cover the transistors 205D, 205R, 205G, and 205B, and an insulating layer 235 is provided over the insulating layer 218 .

[0352] The insulating layer 218 is preferably used as a protective layer of the transistor. The insulating layer 218 is preferably made of a material that does not easily diffuse impurities such as water and hydrogen. Thus, the insulating layer 218 can be used as a barrier layer. By adopting this structure, it is possible to effectively suppress the diffusion of impurities from the outside into the transistor, thereby improving the reliability of the display device.

[0353] The insulating layer 218 preferably includes one or more inorganic insulating films. Examples of the inorganic insulating film include an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film. Specific examples of the inorganic insulating film are as described above.

[0354] The insulating layer 235 is preferably used as a planarization layer, and an organic insulating film is suitable. As materials that can be used for the organic insulating film, for example, acrylic resins, polyimide resins, epoxy resins, polyamide resins, polyimide amide resins, siloxane resins, benzocyclobutene resins, phenolic resins, and precursors of these resins can be cited. In addition, the insulating layer 235 can also adopt a laminated structure of an organic insulating film and an inorganic insulating film. The outermost layer of the insulating layer 235 is preferably used as an etching protection layer. Thus, when processing the pixel electrodes 111R, 111G, 111B, etc., it is possible to suppress the formation of recesses in the insulating layer 235. Alternatively, recesses can be provided in the insulating layer 235 when processing the pixel electrodes 111R, 111G, 111B, etc.

[0355] The light emitting elements 130R, 130G, and 130B are provided on the insulating layer 235 .

[0356] The light emitting element 130R includes a pixel electrode 111R on the insulating layer 235 , an EL layer 113R on the pixel electrode 111R, and a common electrode 115 on the EL layer 113R. Fig.13 The light emitting element 130R shown emits red light (R). The EL layer 113R includes a light emitting layer that emits red light.

[0357] The light emitting element 130G includes a pixel electrode 111G on the insulating layer 235 , an EL layer 113G on the pixel electrode 111G, and a common electrode 115 on the EL layer 113G. Fig.13 The light emitting element 130G shown emits green light (G). The EL layer 113G includes a light emitting layer that emits green light.

[0358] The light emitting element 130B includes a pixel electrode 111B on the insulating layer 235 , an EL layer 113B on the pixel electrode 111B, and a common electrode 115 on the EL layer 113B. Fig.13 The light emitting element 130B shown emits blue light (B). The EL layer 113B includes a light emitting layer that emits blue light.

[0359] Note that Fig.13 EL layers 113R, 113G, and 113B are shown as having the same thickness, but the present invention is not limited thereto. The thicknesses of the EL layers 113R, 113G, and 113B may be different. For example, the thicknesses are preferably set to enhance the optical path length of the light emitted by the EL layers 113R, 113G, and 113B. Thus, a microcavity structure can be realized to improve the color purity of the light emitted from each light-emitting element.

[0360] The pixel electrode 111R is electrically connected to the conductive layer 112b included in the transistor 205R through openings provided in the insulating layer 106, the insulating layer 218, and the insulating layer 235. Similarly, the pixel electrode 111G is electrically connected to the conductive layer 112b included in the transistor 205G, and the pixel electrode 111B is electrically connected to the conductive layer 112b included in the transistor 205B.

[0361] Each end of the pixel electrodes 111R, 111G, and 111B is covered by an insulating layer 237. The insulating layer 237 is used as a partition wall (also called a bank, a dam, or a spacer). The insulating layer 237 can be set to a single-layer structure or a stacked-layer structure using one or both of an inorganic insulating material and an organic insulating material. For example, the insulating layer 237 can use a material that can be used for the insulating layer 218 and a material that can be used for the insulating layer 235. The insulating layer 237 can electrically insulate the pixel electrode from the common electrode. In addition, the insulating layer 237 can electrically insulate the light-emitting elements adjacent to each other.

[0362] The common electrode 115 is a continuous film shared by the light-emitting elements 130R, 130G, and 130B. The common electrode 115 shared by the plurality of light-emitting elements is electrically connected to the conductive layer 123 provided in the connection portion 140. The conductive layer 123 is preferably formed using the same material and the same process as the pixel electrodes 111R, 111G, and 111B.

[0363] In the display device of one embodiment of the present invention, a conductive film that transmits visible light is used as the electrode on the light extraction side of the pixel electrode and the common electrode. In addition, a conductive film that reflects visible light is preferably used as the electrode on the side that does not extract light.

[0364] Alternatively, the electrode on the side where light is not extracted may be a conductive film that transmits visible light. In this case, it is preferred to configure the electrode between the reflective layer and the EL layer. In other words, the light emitted by the EL layer may also be reflected by the reflective layer and extracted from the display device.

[0365] As the material for forming a pair of electrodes of the light-emitting element, metals, alloys, conductive compounds and mixtures thereof can be appropriately used. As the material, specifically, metals such as aluminum, magnesium, titanium, chromium, manganese, iron, cobalt, nickel, copper, gallium, zinc, indium, tin, molybdenum, tantalum, tungsten, palladium, gold, platinum, silver, yttrium and neodymium and alloys appropriately combined therewith can be cited. In addition, as the material, indium tin oxide (also referred to as In-Sn oxide, ITO), In-Si-Sn oxide (also referred to as ITSO), indium zinc oxide (In-Zn oxide) and In-W-Zn oxide can be cited. In addition, as the material, aluminum alloys (aluminum alloys) such as aluminum, nickel and lanthanum alloys (Al-Ni-La), silver and magnesium alloys and silver, palladium and copper alloys (also referred to as Ag-Pd-Cu, APC) and other silver-containing alloys can be cited. In addition, examples of the material include elements belonging to Group 1 or Group 2 of the periodic table that are not listed above (e.g., lithium, cesium, calcium, and strontium), rare earth metals such as europium and ytterbium, alloys of appropriately combined elements, and graphene.

[0366] The light-emitting element preferably adopts a microcavity resonator (microcavity) structure. Therefore, one of a pair of electrodes included in the light-emitting element preferably includes an electrode having visible light transmittance and reflectivity (semi-transmissive-semi-reflective electrode), and the other preferably includes an electrode having visible light reflectivity (reflective electrode). When the light-emitting element has a microcavity structure, the light emitted from the light-emitting layer can be resonated between the two electrodes, and the light emitted from the light-emitting element can be enhanced.

[0367] The light transmittance of the transparent electrode is 40% or more. For example, an electrode having a visible light (light with a wavelength of 400 nm or more and less than 750 nm) transmittance of 40% or more is preferably used as a transparent electrode of a light-emitting element. The visible light reflectance of the semi-transmissive-semi-reflective electrode is 10% or more and 95% or less, preferably 30% or more and 80% or less. The visible light reflectance of the reflective electrode is 40% or more and 100% or less, preferably 70% or more and 100% or less. In addition, the resistivity of these electrodes is preferably 1×10 -2 Ωcm or less.

[0368] The EL layers 113R, 113G, and 113B are all arranged in an island shape. Fig.13 In the embodiment, the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113G, and the ends of the adjacent EL layers 113G overlap with the ends of the EL layers 113B. Although not shown in the figure, the ends of the adjacent EL layers 113R overlap with the ends of the EL layers 113B. Fig.13 As shown in FIG. 1 , when an island-shaped EL layer is deposited using a high-definition metal mask, the ends of adjacent EL layers may overlap each other, but the present invention is not limited to this. That is, adjacent EL layers may not overlap each other but may be separated. In addition, in a display device, there may be both overlapping portions of adjacent EL layers and separated portions of adjacent EL layers not overlapping each other.

[0369] Each of the EL layers 113R, 113G, and 113B includes at least a light-emitting layer. The light-emitting layer contains one or more light-emitting substances. As the light-emitting substance, a substance that emits light in a color such as blue, purple, blue-purple, green, yellow-green, yellow, orange, or red is appropriately used. In addition, as the light-emitting substance, a substance that emits near-infrared light can also be used.

[0370] Examples of the light-emitting substance include fluorescent materials, phosphorescent materials, TADF materials, and quantum dot materials.

[0371] The light-emitting layer may contain one or more organic compounds (host material, auxiliary material, etc.) in addition to the light-emitting substance (guest material). As one or more organic compounds, one or both of a substance with high hole transport properties (hole transport material) and a substance with high electron transport properties (electron transport material) may be used. In addition, as one or more organic compounds, a bipolar substance (a substance with high electron transport properties and hole transport properties) or a TADF material may also be used.

[0372] For example, the light-emitting layer preferably includes a combination of a phosphorescent material, a hole transport material that easily forms an exciplex, and an electron transport material. By adopting such a structure, light emission by ExTET (Exciplex-Triplet Energy Transfer) utilizing energy transfer from the exciplex to the luminescent substance (phosphorescent material) can be efficiently obtained. In addition, by selecting a combination of exciplexes that form light emitting light with a wavelength overlapping with the absorption band on the lowest energy side of the luminescent substance, energy transfer can be smoothed, thereby efficiently obtaining light emission. By adopting the above structure, high efficiency, low voltage drive, and long life of the light-emitting element can be achieved at the same time.

[0373] In addition to the light-emitting layer, the EL layer may include one or more of a layer containing a substance with high hole injection properties (hole injection layer), a layer containing a hole transport material (hole transport layer), a layer containing a substance with high electron blocking properties (electron blocking layer), a layer containing a substance with high electron injection properties (electron injection layer), a layer containing an electron transport material (electron transport layer), and a layer containing a substance with high hole blocking properties (hole blocking layer). In addition, the EL layer may also include one or both of a bipolar material and a TADF material.

[0374] The light emitting element may use a low molecular weight compound or a high molecular weight compound, and may further contain an inorganic compound. The layers constituting the light emitting element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.

[0375] The light-emitting element can adopt a single structure (a structure with only one light-emitting unit) or a series structure (a structure including multiple light-emitting units). The light-emitting unit includes at least one light-emitting layer. The series structure has a structure in which multiple light-emitting units are connected in series through a charge generation layer. The charge generation layer has the function of injecting electrons into one of the two light-emitting units and injecting holes into the other when a voltage is applied between a pair of electrodes. By adopting a series structure, a light-emitting element that can emit light with high brightness can be realized. In addition, the series structure can improve reliability because it can reduce the current required to obtain the same brightness compared to the single structure. In addition, the series structure can also be called a stacked structure.

[0376] exist Fig.13 When a tandem-structured light-emitting element is used, it is preferred that the EL layer 113R include a plurality of light-emitting units emitting red light, the EL layer 113G include a plurality of light-emitting units emitting green light, and the EL layer 113B include a plurality of light-emitting units emitting blue light.

[0377] A protective layer 131 is provided on the light emitting elements 130R, 130G, and 130B. The protective layer 131 and the substrate 152 are bonded by an adhesive layer 142. The substrate 152 is provided with a light shielding layer 117. As a seal for the light emitting element, for example, a solid sealing structure or a hollow sealing structure can be adopted. Fig.13 In the embodiment, the space between the substrate 152 and the substrate 151 is filled with the adhesive layer 142, that is, a solid sealing structure is adopted. Alternatively, a hollow sealing structure in which the space is filled with an inert gas (nitrogen or argon, etc.) can also be adopted. In this case, the adhesive layer 142 can also be arranged in a manner that does not overlap with the light-emitting element. In addition, a resin different from the adhesive layer 142 arranged in a frame shape can also be used to fill the space.

[0378] The protective layer 131 is provided at least in the display portion 162, and is preferably provided in a manner covering the entire display portion 162. The protective layer 131 is preferably provided in a manner covering the connection portion 140 and the circuit portion 164 in addition to the display portion 162. In addition, the protective layer 131 is preferably provided in a manner extending to the end of the display device 50A. On the other hand, in order to electrically connect the FPC 172 and the conductive layer 167, there is a portion in the connection portion 204 where the protective layer 131 is not provided.

[0379] By providing the protective layer 131 on the light emitting elements 130R, 130G, and 130B, the reliability of the light emitting elements can be improved.

[0380] The protective layer 131 may have a single layer structure or a stacked layer structure of two or more layers. There is no limitation on the conductivity of the protective layer 131. As the protective layer 131, at least one of an insulating film, a semiconductor film, and a conductive film may be used.

[0381] When the protective layer 131 includes an inorganic film, degradation of the light emitting element can be suppressed, such as preventing oxidation of the common electrode 115 and suppressing impurities (moisture, oxygen, etc.) from entering the light emitting element, thereby improving the reliability of the display device.

[0382] As the protective layer 131, for example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film can be used. Specific examples of the above-mentioned inorganic insulating film are as described above. In particular, the protective layer 131 preferably includes a nitride insulating film or a nitride oxide insulating film, and more preferably includes a nitride insulating film.

[0383] Alternatively, an inorganic film including ITO, In-Zn oxide, Ga-Zn oxide, Al-Zn oxide, or IGZO may be used as the protective layer 131. The inorganic film preferably has a high resistance, and more specifically, the inorganic film preferably has a resistance higher than that of the common electrode 115. The inorganic film may further include nitrogen.

[0384] When light emitted from the light emitting element is extracted through the protective layer 131, the protective layer 131 preferably has high visible light transmittance. For example, ITO, IGZO, and alumina are inorganic materials with high visible light transmittance and are therefore preferred.

[0385] As the protective layer 131, for example, a stacked structure of an aluminum oxide film and a silicon nitride film on the aluminum oxide film or a stacked structure of an aluminum oxide film and an IGZO film on the aluminum oxide film can be used. By using this stacked structure, impurities (water, oxygen, etc.) can be suppressed from entering the EL layer.

[0386] Furthermore, the protective layer 131 may include an organic film. For example, the protective layer 131 may include both an organic film and an inorganic film. Examples of the organic film that can be used for the protective layer 131 include an organic insulating film that can be used for the insulating layer 235 .

[0387] A connection portion 204 is provided in a region where the substrate 151 and the substrate 152 do not overlap. In the connection portion 204, the wiring 165 is electrically connected to the FPC 172 through the conductive layers 166, 167 and the connection layer 242. The accompanying drawings show an example in which the wiring 165 adopts a single-layer structure of a conductive layer obtained by processing the same conductive film as the conductive layer 112a. The accompanying drawings show an example in which the conductive layer 166 adopts a single-layer structure of a conductive layer obtained by processing the same conductive film as the conductive layer 112b. The accompanying drawings show an example in which the conductive layer 167 adopts a single-layer structure of a conductive layer obtained by processing the same conductive film as the pixel electrodes 111R, 111G, and 111B. The conductive layer 167 is exposed on the top surface of the connection portion 204. Thus, the connection portion 204 can be electrically connected to the FPC 172 through the connection layer 242.

[0388] The display device 50A is a top emission type. Light emitted by the light emitting element is emitted to the substrate 152 side. The substrate 152 is preferably made of a material with high visible light transmittance. The pixel electrodes 111R, 111G, and 111B are made of a material that reflects visible light, and the counter electrode (common electrode 115) is made of a material that transmits visible light.

[0389] A light shielding layer 117 is preferably provided on a surface of the substrate 152 on the substrate 151 side. The light shielding layer 117 can be provided between adjacent light emitting elements, in the connection portion 140, the circuit portion 164, and the like.

[0390] Alternatively, a coloring layer such as a color filter may be provided on the surface of the substrate 152 on the substrate 151 side or on the protective layer 131. When the color filter is provided so as to overlap with the light-emitting element, the color purity of light emitted from the pixel can be improved.

[0391] In addition, various optical components can be arranged on the outside of the substrate 152 (the surface on the opposite side of the substrate 151). As optical components, for example, polarizers, phase difference plates, light diffusion layers (diffusion films, etc.), anti-reflection layers, and light-focusing films (condensing films) can be cited. In addition, surface protective layers such as antistatic films that inhibit the adhesion of dust, water-repellent films that are not easily soiled, hard coatings that inhibit damage during use, and impact-absorbing layers can also be arranged on the outside of the substrate 152. For example, by providing a glass layer or a silicon dioxide layer (SiO x Layer), which can prevent the surface from being dirty or damaged, is preferred. In addition, DLC (diamond-like carbon), aluminum oxide (AlOx ), polyester materials or polycarbonate materials, etc. In addition, as the surface protection layer, it is preferred to use a material with high visible light transmittance. In addition, the surface protection layer is preferably made of a material with high hardness.

[0392] Glass, quartz, ceramic, sapphire, resin, metal, alloy, semiconductor, etc. can be used for the substrate 151 and the substrate 152, respectively. A material that transmits the light is used for the substrate on the side that extracts the light from the light-emitting element. By using a flexible material for the substrate 151 and the substrate 152, the flexibility of the display device can be improved, thereby realizing a flexible display. A polarizing plate can also be used as at least one of the substrate 151 and the substrate 152.

[0393] As the substrate 151 and the substrate 152, the following materials can be used respectively: polyester resins such as polyethylene terephthalate (PET) or polyethylene naphthalate (PEN), polyacrylonitrile resins, acrylic resins, polyimide resins, polymethyl methacrylate resins, polycarbonate (PC) resins, polyether sulfone (PES) resins, polyamide resins (nylon, aramid, etc.), polysiloxane resins, cycloolefin resins, polystyrene resins, polyamide-imide resins, polyurethane resins, polyvinyl chloride resins, polyvinylidene chloride resins, polypropylene resins, polytetrafluoroethylene (PTFE) resins, ABS resins, and cellulose nanofibers, etc. In addition, glass having a thickness that allows flexibility can be used as at least one of the substrates 151 and 152.

[0394] When a circular polarizer is overlapped on a display device, it is preferred to use a substrate with high optical isotropy as the substrate included in the display device. The substrate with high optical isotropy has low birefringence (it can also be said that the amount of birefringence is small). As films with high optical isotropy, triacetyl cellulose (TAC, also called triacetyl cellulose) films, cycloolefin polymer (COP) films, cycloolefin copolymer (COC) films, and acrylic resin films can be cited.

[0395] As the adhesive layer 142, various curing adhesives such as light curing adhesives such as ultraviolet curing adhesives, reaction curing adhesives, heat curing adhesives, anaerobic adhesives, etc. can be used. As these adhesives, epoxy resins, acrylic resins, silicone resins, phenolic resins, polyimide resins, imide resins, PVC (polyvinyl chloride) resins, PVB (polyvinyl butyral) resins, EVA (ethylene-vinyl acetate) resins, etc. can be cited. In particular, it is preferred to use materials with low moisture permeability such as epoxy resins. In addition, two-liquid mixed resins can also be used. In addition, adhesive sheets, etc. can also be used.

[0396] As the connection layer 242 , an anisotropic conductive film (ACF: Anisotropic Conductive Film), anisotropic conductive paste (ACP: Anisotropic Conductive Paste), or the like can be used.

[0397] [Display device 50B] exist Fig.14 The display device 50B shown in the figure mainly differs from the display device 50A in that a light-emitting element including an EL layer 113 shared by the light-emitting elements and a coloring layer (color filter, etc.) are used in the sub-pixels of each color. Note that in the description of the display device described later, the description of the same parts as the display device described previously may be omitted.

[0398] Fig.14 The display device 50B shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light, etc. between the substrate 151 and the substrate 152.

[0399] The light emitting element 130R includes a pixel electrode 111R, an EL layer 113 on the pixel electrode 111R, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130R is extracted as red light to the outside of the display device 50B through the coloring layer 132R.

[0400] The light emitting element 130G includes a pixel electrode 111G, an EL layer 113 on the pixel electrode 111G, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130G is extracted as green light to the outside of the display device 50B through the coloring layer 132G.

[0401] The light emitting element 130B includes a pixel electrode 111B, an EL layer 113 on the pixel electrode 111B, and a common electrode 115 on the EL layer 113. Light emitted by the light emitting element 130B is extracted as blue light to the outside of the display device 50B through the coloring layer 132B.

[0402] The light emitting elements 130R, 130G, and 130B share the EL layer 113 and the common electrode 115. Compared with a structure in which each sub-pixel of each color is provided with a different EL layer, a structure in which each sub-pixel of each color shares the EL layer 113 can reduce the number of manufacturing steps.

[0403] For example, Fig.14The light emitting elements 130R, 130G, and 130B shown all emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the coloring layers 132R, 132G, and 132B, respectively, thereby obtaining light of a desired color.

[0404] The white light-emitting element preferably includes two or more light-emitting layers. In the case of using two light-emitting layers to obtain white light, the light-emitting layers can be selected in such a way that the light-emitting colors of the two light-emitting layers are in a complementary color relationship. For example, by making the light-emitting color of the first light-emitting layer and the light-emitting color of the second light-emitting layer in a complementary color relationship, a structure in which the light-emitting element as a whole emits white light can be obtained. In addition, in the case of using three or more light-emitting layers to obtain white light, the light-emitting colors of the three or more light-emitting layers are combined to obtain a structure in which the light-emitting element as a whole emits white light.

[0405] The EL layer 113 preferably includes, for example, a light-emitting layer containing a light-emitting substance that emits blue light and a light-emitting layer containing a light-emitting substance that emits visible light having a longer wavelength than blue. The EL layer 113 preferably includes, for example, a light-emitting layer that emits yellow light and a light-emitting layer that emits blue light. Alternatively, the EL layer 113 preferably includes, for example, a light-emitting layer that emits red light, a light-emitting layer that emits green light, and a light-emitting layer that emits blue light.

[0406] The light-emitting element emitting white light preferably adopts a series structure. Specifically, it can adopt: a two-stage series structure including a light-emitting unit emitting yellow light and a light-emitting unit emitting blue light; a two-stage series structure including a light-emitting unit emitting red light and green light and a light-emitting unit emitting blue light; a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light, and a light-emitting unit emitting blue light in sequence; or a three-stage series structure including a light-emitting unit emitting blue light, a light-emitting unit emitting yellow light, yellow-green light or green light and red light, and a light-emitting unit emitting blue light in sequence, etc. For example, as the number of layers and color sequence of the light-emitting unit, there can be cited a two-stage structure in which B and Y are stacked from the anode side, a two-stage structure in which B and the light-emitting unit X are stacked, a three-stage structure in which B, Y and B are stacked, and a three-stage structure in which B, X and B are stacked. As the number of layers and color sequence of the light-emitting layer in the light-emitting unit X, there can be adopted a two-stage structure in which R and Y are stacked from the anode side, a two-stage structure in which R and G are stacked, a two-stage structure in which G and R are stacked, a three-stage structure in which G, R and G are stacked, or a three-stage structure in which R, G and R are stacked. In addition, another layer may be provided between two light-emitting layers.

[0407] Or, for example Fig.14The light-emitting elements 130R, 130G, and 130B shown all emit blue light. In this case, the EL layer 113 includes one or more light-emitting layers that emit blue light. With respect to the sub-pixel 11B that emits blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, with respect to the sub-pixel 11R that emits red light and the sub-pixel 11G that emits green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength and extracted as red light or green light. Furthermore, it is preferable to provide a coloring layer 132R between the color conversion layer on the light-emitting element 130R and the substrate 152, and to provide a coloring layer 132G between the color conversion layer on the light-emitting element 130G and the substrate 152. A portion of the light emitted by the light-emitting element is sometimes transmitted without being converted by the color conversion layer. By extracting the light that has passed through the color conversion layer through the coloring layer, the coloring layer can absorb light other than the desired color light, thereby improving the color purity of the light presented by the sub-pixel.

[0408] [Display device 50C] Fig.15 The illustrated display device 50C is a bottom emission type display device, which is mainly different from the display device 50B.

[0409] Light emitted by the light emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.

[0410] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Fig.15 The following example is shown: a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light shielding layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, and a transistor 205B are provided on the insulating layer 153. In addition, a coloring layer 132R (not shown), a coloring layer 132G, and a coloring layer 132B are provided on an insulating layer 218, and an insulating layer 235 is provided on the coloring layers 132R, the coloring layers 132G, and the coloring layers 132B.

[0411] The light emitting element 130R (not shown) overlapping the colored layer 132R includes a pixel electrode 111R (not shown), an EL layer 113 , and a common electrode 115 .

[0412] The light emitting element 130G overlapping the colored layer 132G includes a pixel electrode 111G, an EL layer 113 , and a common electrode 115 .

[0413] The light emitting element 130B overlapping the colored layer 132B includes a pixel electrode 111B, an EL layer 113 , and a common electrode 115 .

[0414] The pixel electrodes 111R, 111G, and 111B are each made of a material having high visible light transmittance. The common electrode 115 is preferably made of a material that reflects visible light. Since a metal with low resistance or the like can be used for the common electrode 115 in a bottom emission display device, a voltage drop caused by the resistance of the common electrode 115 can be suppressed, and high display quality can be achieved.

[0415] A transistor according to one embodiment of the present invention can be miniaturized and the area occupied by the transistor within the substrate surface can be reduced, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission display device.

[0416] [Display device 50D] Fig.16 The display device 50D shown includes a light receiving element 130S, which is mainly different from the display device 50A.

[0417] The display device 50D includes a light-emitting element and a light-receiving element in a pixel. In the display device 50D, it is preferable to use an organic EL element as the light-emitting element and an organic photodiode as the light-receiving element. The organic EL element and the organic photodiode can be formed on the same substrate. Therefore, the organic photodiode can be installed in the display device using the organic EL element.

[0418] In the display device 50D in which pixels include a light-emitting element and a light-receiving element, the pixels have a light-receiving function, so the display device can detect the contact or approach of an object while displaying an image. Therefore, the display unit 162 has one or both of a camera function and a sensing function in addition to an image display function. For example, instead of displaying an image in all sub-pixels included in the display device 50D, a part of the sub-pixels can be used as a light source to emit light, another part of the sub-pixels can be used for light detection, and the remaining sub-pixels can be used to display an image.

[0419] Therefore, it is not necessary to separately provide a light receiving unit and a light source with the display device 50D, and the number of components of the electronic device can be reduced. For example, it is not necessary to separately provide a biometric device installed in the electronic device or an electrostatic capacitive touch panel for scrolling, etc. Therefore, by using the display device 50D, an electronic device with reduced manufacturing cost can be provided.

[0420] When the light receiving element is used for the image sensor, the display device 50D can capture images using the light receiving element. For example, the image sensor can be used to capture images for personal identification using fingerprints, palm prints, irises, vein shapes (including vein shapes, artery shapes) or faces.

[0421] In addition, the light receiving element can be used for a touch sensor (also called a direct touch sensor) or a non-contact sensor (also called a floating sensor, a floating touch sensor, a non-touch sensor), etc. A touch sensor can detect an object when the object (a finger, a hand, a pen, etc.) directly contacts the display device. In addition, a non-contact sensor can detect the object even if the object does not contact the display device.

[0422] The light emitting element 130S includes a pixel electrode 111S on the insulating layer 235, a functional layer 113S on the pixel electrode 111S, and a common electrode 115 on the functional layer 113S. Light Lin is incident on the functional layer 113S from the outside of the display device 50D.

[0423] The pixel electrode 111S is electrically connected to the conductive layer 112 b included in the transistor 205S through an opening provided in the insulating layer 106 , the insulating layer 218 , and the insulating layer 235 .

[0424] The end portion of the pixel electrode 111S is covered with the insulating layer 237 .

[0425] The common electrode 115 is a continuous film shared by the light receiving element 130S, the light emitting element 130R (not shown), the light emitting element 130G, and the light emitting element 130B. The common electrode 115 shared by the light emitting element and the light receiving element is electrically connected to the conductive layer 123 provided in the connection portion 140 .

[0426] The functional layer 113S includes at least an active layer (also referred to as a photoelectric conversion layer). The active layer includes a semiconductor. As the semiconductor, inorganic semiconductors such as silicon and organic semiconductors including organic compounds can be cited. In this embodiment, an example of using an organic semiconductor as a semiconductor contained in the active layer is shown. By using an organic semiconductor, the light-emitting layer and the active layer can be formed by the same method (e.g., vacuum evaporation method), and the manufacturing equipment can be used together, so it is preferred.

[0427] The functional layer 113S may also include a layer containing a substance with high hole transport properties, a substance with high electron transport properties, or a bipolar substance (a substance with high electron transport properties and hole transport properties) as a layer other than the active layer. In addition, without limitation thereto, a layer containing a substance with high hole injection properties, a hole blocking material, a material with high electron injection properties, or an electron blocking material may also be included. As a layer other than the active layer included in the light-receiving element, for example, the above-mentioned material that can be used for the light-emitting element can be used.

[0428] The light receiving element may use a low molecular weight compound or a high molecular weight compound, and may also contain an inorganic compound. The layer constituting the light receiving element may be formed by a method such as vapor deposition (including vacuum vapor deposition), transfer, printing, inkjet, or coating.

[0429] [Display device 50E] Fig.17 The display device 50E shown is an example of a display device using an MML (Metal Mask Less) structure. That is, the display device 50E includes a light-emitting element that is not manufactured using a high-definition metal mask. Note that the stacked structure from the substrate 151 to the insulating layer 235 and the stacked structure from the protective layer 131 to the substrate 152 are the same as those of the display device 50A, so the description thereof is omitted.

[0430] exist Fig.17 In the embodiment, light emitting elements 130R, 130G, and 130B are disposed on the insulating layer 235 .

[0431] The light emitting element 130R includes a conductive layer 124R on the insulating layer 235 , a conductive layer 126R on the conductive layer 124R, a layer 133R on the conductive layer 126R, a common layer 114 on the layer 133R, and a common electrode 115 on the common layer 114 . Fig.17 The light emitting element 130R shown emits red light (R). The layer 133R includes a light emitting layer that emits red light. In the light emitting element 130R, the layer 133R and the common layer 114 may be collectively referred to as an EL layer. One or both of the conductive layer 124R and the conductive layer 126R may be referred to as a pixel electrode.

[0432] The light emitting element 130G includes a conductive layer 124G on the insulating layer 235 , a conductive layer 126G on the conductive layer 124G, a layer 133G on the conductive layer 126G, a common layer 114 on the layer 133G, and a common electrode 115 on the common layer 114 . Fig.17 The light emitting element 130G shown emits green light (G). The layer 133G includes a light emitting layer that emits green light. In the light emitting element 130G, the layer 133G and the common layer 114 can be collectively referred to as an EL layer. One or both of the conductive layer 124G and the conductive layer 126G can be referred to as a pixel electrode.

[0433] The light emitting element 130B includes a conductive layer 124B on the insulating layer 235 , a conductive layer 126B on the conductive layer 124B, a layer 133B on the conductive layer 126B, a common layer 114 on the layer 133B, and a common electrode 115 on the common layer 114 . Fig.17The light emitting element 130B shown emits blue light (B). Layer 133B includes a light emitting layer that emits blue light. In the light emitting element 130B, layer 133B and common layer 114 may be collectively referred to as an EL layer. One or both of conductive layer 124B and conductive layer 126B may be referred to as a pixel electrode.

[0434] In this specification and the like, an island-shaped layer provided for each light-emitting element in the EL layer included in the light-emitting element is referred to as layer 133B, layer 133G, or layer 133R, and a layer shared by a plurality of light-emitting elements is referred to as a common layer 114. In addition, in this specification and the like, layer 133R, layer 133G, and layer 133B not including the common layer 114 are sometimes referred to as an island-shaped EL layer, an EL layer formed in an island shape, or the like.

[0435] Layer 133R, layer 133G, and layer 133B are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, crosstalk caused by unintentional light emission can be prevented, thereby realizing a display device with extremely high contrast.

[0436] In addition, Fig.17 In FIG. 1 , the thicknesses of the layers 133R, 133G, and 133B are shown as being the same, but the present invention is not limited thereto. The thicknesses of the layers 133R, 133G, and 133B may be different from each other.

[0437] Conductive layer 124R is electrically connected to conductive layer 112b included in transistor 205R through openings provided in insulating layer 106, insulating layer 218, and insulating layer 235. Similarly, conductive layer 124G is electrically connected to conductive layer 112b included in transistor 205G, and conductive layer 124B is electrically connected to conductive layer 112b included in transistor 205B.

[0438] Conductive layers 124R, 124G, and 124B are formed to cover the openings provided in insulating layer 235. Concave portions of conductive layers 124R, 124G, and 124B are filled with layer 128, respectively.

[0439] Layer 128 has the function of flattening the concave portions of conductive layers 124R, 124G, and 124B. Conductive layers 126R, 126G, and 126B electrically connected to conductive layers 124R, 124G, and 124B are provided on conductive layers 124R, 124G, and 124B and layer 128. Therefore, the area overlapping the concave portions of conductive layers 124R, 124G, and 124B can also be used as a light-emitting area, thereby increasing the aperture ratio of the pixel. Conductive layers 124R and 126R, conductive layers 124G and 126G, and conductive layers 124B and 126B preferably use conductive layers used as reflective electrodes.

[0440] Layer 128 may be an insulating layer or a conductive layer. Layer 128 may be formed of various inorganic insulating materials, organic insulating materials, and conductive materials as appropriate. In particular, layer 128 is preferably formed of an insulating material, and is particularly preferably formed of an organic insulating material. As layer 128, for example, the organic insulating material that can be used for insulating layer 237 may be used.

[0441] Although Fig.17 An example is shown in which the top surface of the layer 128 has a flat portion, but there is no particular limitation on the shape of the layer 128. The top surface of the layer 128 may have at least one of a convex curved surface, a concave curved surface, and a flat surface.

[0442] In addition, the height of the top surface of layer 128 may be the same as or substantially the same as the height of the top surface of conductive layer 124R, or may be different from each other. For example, the height of the top surface of layer 128 may be lower or higher than the height of the top surface of conductive layer 124R.

[0443] The end of the conductive layer 126R may also be aligned with the end of the conductive layer 124R, and may also cover the side of the end of the conductive layer 124R. Each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape. Specifically, each end of the conductive layer 124R and the conductive layer 126R preferably has a tapered shape with a taper angle less than 90°. When the end of the pixel electrode has a tapered shape, the layer 133R provided along the side of the pixel electrode has a tapered shape. By making the side of the pixel electrode have a tapered shape, the coverage of the EL layer provided along the side of the pixel electrode can be improved.

[0444] Since the conductive layers 124G and 126G and the conductive layers 124B and 126B are the same as the conductive layers 124R and 126R, detailed descriptions thereof will be omitted.

[0445] The top surface and side surfaces of the conductive layer 126R are covered by the layer 133R. Similarly, the top surface and side surfaces of the conductive layer 126G are covered by the layer 133G, and the top surface and side surfaces of the conductive layer 126B are covered by the layer 133B. Therefore, the entire region where the conductive layers 126R, 126G, and 126B are provided can be used as the light-emitting region of the light-emitting elements 130R, 130G, and 130B, thereby increasing the aperture ratio of the pixel.

[0446] Part of the top surface and side surfaces of the layers 133R, 133G, and 133B are covered by insulating layers 125 and 127. A common layer 114 is provided on the layers 133R, 133G, 133B, and the insulating layers 125 and 127, and a common electrode 115 is provided on the common layer 114. Both the common layer 114 and the common electrode 115 are continuous films shared by a plurality of light-emitting elements.

[0447] exist Fig.17In the embodiment, there is no arrangement between the conductive layer 126R and the layer 133R. Fig.13 In other words, the display device 50E is not provided with an insulating layer (also referred to as a partition wall, a dam, a spacer, etc.) that contacts the pixel electrode and covers the top surface end of the pixel electrode. Therefore, the interval between adjacent light-emitting elements can be made very small. In addition, there is no need for a mask for forming the insulating layer, thereby reducing the manufacturing cost of the display device.

[0448] As described above, layer 133R, layer 133G, and layer 133B all include a light-emitting layer. Layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier transport layer (electron transport layer or hole transport layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B preferably include a light-emitting layer and a carrier blocking layer (hole blocking layer or electron blocking layer) on the light-emitting layer. In addition, layer 133R, layer 133G, and layer 133B may also include a light-emitting layer, a carrier blocking layer on the light-emitting layer, and a carrier transport layer on the carrier blocking layer. The surfaces of layer 133R, layer 133G, and layer 133B are exposed in the manufacturing process of the display device, so by providing one or both of the carrier transport layer and the carrier blocking layer on the light-emitting layer, the light-emitting layer can be prevented from being exposed to the outermost surface and the damage to the light-emitting layer can be reduced. As a result, the reliability of the light-emitting element can be improved.

[0449] The common layer 114 includes, for example, an electron injection layer or a hole injection layer. Alternatively, the common layer 114 may include a stack of an electron transport layer and an electron injection layer, or a stack of a hole transport layer and a hole injection layer. The light emitting elements 130R, 130G, and 130B share the common layer 114.

[0450] The side surfaces of the layers 133R, 133G, and 133B are covered with the insulating layer 125. The insulating layer 127 covers the side surfaces of the layers 133R, 133G, and 133B via the insulating layer 125.

[0451] By covering the side surfaces of the layers 133R, 133G, and 133B (or even covering a portion of the top surfaces thereof) with at least one of the insulating layer 125 and the insulating layer 127, the common layer 114 (or the common electrode 115) can be prevented from contacting the pixel electrode and the side surfaces of the layers 133R, 133G, and 133B, thereby preventing the light-emitting element from being short-circuited. Thus, the reliability of the light-emitting element can be improved.

[0452] The insulating layer 125 is preferably in contact with the side surfaces of the layers 133R, 133G, and 133B. By adopting a structure in which the insulating layer 125 is in contact with the layers 133R, 133G, and 133B, film peeling of the layers 133R, 133G, and 133B can be prevented, thereby improving the reliability of the light-emitting element.

[0453] The insulating layer 127 is provided on the insulating layer 125 so as to fill the recessed portion of the insulating layer 125. The insulating layer 127 preferably covers at least a part of the side surface of the insulating layer 125.

[0454] By providing the insulating layer 125 and the insulating layer 127, the space between adjacent island-shaped layers can be filled, so that the extreme unevenness of the formed surface of the layer (e.g., the carrier injection layer, the common electrode, etc.) provided on the island-shaped layer can be reduced and further flattened. Therefore, the coverage of the carrier injection layer and the common electrode, etc. can be improved.

[0455] The common layer 114 and the common electrode 115 are provided on the layer 133R, the layer 133G, the layer 133B, the insulating layer 125, and the insulating layer 127. Before the insulating layer 125 and the insulating layer 127 are provided, steps are generated due to the region where the pixel electrode and the island EL layer are provided and the region where the pixel electrode and the island EL layer are not provided (the region between the light-emitting elements). The display device of one embodiment of the present invention can flatten the steps by including the insulating layer 125 and the insulating layer 127, thereby improving the coverage of the common layer 114 and the common electrode 115. Therefore, poor connection caused by disconnection of the common layer 114 and the common electrode 115 can be suppressed. Alternatively, the increase in resistance caused by local thin filmization of the common electrode 115 due to the steps can be suppressed.

[0456] The top surface of the insulating layer 127 preferably has a shape with higher flatness. The top surface of the insulating layer 127 may also have at least one of a plane, a convex surface, and a concave surface. For example, the top surface of the insulating layer 127 preferably has a smooth convex surface shape with high flatness.

[0457] The insulating layer 125 may be an insulating layer containing an inorganic material. As the insulating layer 125, for example, an inorganic insulating film such as an oxide insulating film, a nitride insulating film, an oxynitride insulating film, and a nitride oxide insulating film may be used. Specific examples of the inorganic insulating film are as described above. The insulating layer 125 may be a single-layer structure or a stacked-layer structure. In particular, the selectivity of aluminum oxide to the EL layer is high in etching, and it has a function of protecting the EL layer in the formation of the insulating layer 127 described later, so it is preferred. In particular, by using an inorganic insulating film such as an aluminum oxide film, a hafnium oxide film, or a silicon oxide film formed by the ALD method for the insulating layer 125, an insulating layer 125 with fewer pinholes and a good function of protecting the EL layer can be formed. In addition, the insulating layer 125 may also have a stacked-layer structure of a film formed by the ALD method and a film formed by the sputtering method. For example, the insulating layer 125 may have a stacked-layer structure of an aluminum oxide film formed by the ALD method and a silicon nitride film formed by the sputtering method.

[0458] The insulating layer 125 preferably has a function of a blocking insulating layer with respect to at least one of water and oxygen. The insulating layer 125 preferably has a function of suppressing the diffusion of at least one of water and oxygen. In addition, the insulating layer 125 preferably has a function of capturing or fixing (also referred to as doping) at least one of water and oxygen.

[0459] In this specification, etc., a blocking insulating layer refers to an insulating layer having a barrier property. In addition, in this specification, etc., a barrier property refers to a function of suppressing the diffusion of a corresponding substance (it can also be said that the permeability is low). Alternatively, it refers to a function of capturing or fixing a corresponding substance (also called doping).

[0460] When the insulating layer 125 is used as a blocking insulating layer or has an impurity gettering function, it can have a structure that suppresses the entry of impurities (typically, at least one of water and oxygen) that may diffuse from the outside into each light-emitting element. By adopting this structure, a light-emitting element with high reliability can be provided, and a display device with high reliability can be provided.

[0461] In addition, the impurity concentration of the insulating layer 125 is preferably low. This can prevent impurities from being mixed into the EL layer from the insulating layer 125 and deteriorating the EL layer. In addition, by reducing the impurity concentration in the insulating layer 125, the barrier property against at least one of water and oxygen can be improved. For example, it is preferable that one of the hydrogen concentration and the carbon concentration in the insulating layer 125 is sufficiently low, and it is preferable that both the hydrogen concentration and the carbon concentration are sufficiently low.

[0462] The insulating layer 127 provided on the insulating layer 125 has the function of flattening the extreme unevenness of the insulating layer 125 formed between adjacent light emitting elements. In other words, the insulating layer 127 improves the flatness of the surface on which the common electrode 115 is formed.

[0463] As the insulating layer 127, an insulating layer containing an organic material can be used as appropriate. As the organic material, a photosensitive organic resin is preferably used, for example, a photosensitive resin composition containing an acrylic resin is preferably used. Note that in this specification, etc., acrylic resin does not refer to only polymethacrylate or methacrylic resin, and sometimes refers to acrylic polymers in a broad sense as a whole.

[0464] In addition, acrylic resin, polyimide resin, epoxy resin, imide resin, polyamide resin, polyimide amide resin, silicone resin, siloxane resin, benzocyclobutene resin, phenolic resin and precursors of the above resins can also be used as the insulating layer 127. In addition, organic materials such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose or alcohol-soluble polyamide resin can also be used as the insulating layer 127. In addition, photoresist can also be used as a photosensitive organic resin. As a photosensitive organic resin, a positive material or a negative material can be used.

[0465] A material that absorbs visible light may also be used as the insulating layer 127. By absorbing the light emitted from the light-emitting element by the insulating layer 127, it is possible to suppress the leakage of light from the light-emitting element through the insulating layer 127 to the adjacent light-emitting element (stray light). Therefore, the display quality of the display device can be improved. In addition, the display quality can be improved even if a polarizing plate is not used in the display device, so the display device can be made lighter and thinner.

[0466] As materials that absorb visible light, materials including pigments such as black, materials including dyes, resin materials having light absorption (e.g., polyimide, etc.), and resin materials that can be used for color filters (color filter materials) can be cited. In particular, when using a resin material formed by mixing or laminating color filter materials of two colors or three or more colors, the effect of shielding visible light can be improved, so it is preferred. In particular, by mixing color filter materials of three or more colors, a black or nearly black resin layer can be achieved.

[0467] [Display device 50F] exist Fig.18 The display device 50F shown mainly differs from the display device 50F in that a light-emitting element including a layer 133 and a coloring layer (color filter, etc.) are used in sub-pixels of each color.

[0468] Fig.18 The display device 50F shown includes transistors 205D, 205R, 205G, 205B, light-emitting elements 130R, 130G, 130B, a coloring layer 132R that transmits red light, a coloring layer 132G that transmits green light, and a coloring layer 132B that transmits blue light, etc. between the substrate 151 and the substrate 152.

[0469] The light emitted by the light emitting element 130R is extracted as red light to the outside of the display device 50F through the coloring layer 132R. Similarly, the light emitted by the light emitting element 130G is extracted as green light to the outside of the display device 50F through the coloring layer 132G. The light emitted by the light emitting element 130B is extracted as blue light to the outside of the display device 50F through the coloring layer 132B.

[0470] The light-emitting elements 130R, 130G, and 130B all include a layer 133. These three layers 133 are formed by the same process and the same material. In addition, these three layers 133 are separated from each other. By providing an island-shaped EL layer in each light-emitting element, leakage current between adjacent light-emitting elements can be suppressed. Therefore, crosstalk caused by unintentional light emission can be prevented, thereby realizing a display device with extremely high contrast.

[0471] For example, Fig.18 The light emitting elements 130R, 130G, and 130B shown emit white light. The white light emitted by the light emitting elements 130R, 130G, and 130B passes through the colored layers 132R, 132G, and 132B, thereby obtaining light of a desired color.

[0472] Or, for example Fig.18 The light-emitting elements 130R, 130G, and 130B shown emit blue light. In this case, the layer 133 includes one or more light-emitting layers that emit blue light. With respect to the sub-pixel 11B that presents blue light, the blue light emitted by the light-emitting element 130B can be extracted. In addition, with respect to the sub-pixel 11R that presents red light and the sub-pixel 11G that presents green light, by providing a color conversion layer between the light-emitting element 130R or the light-emitting element 130G and the substrate 152, the blue light emitted by the light-emitting element 130R or the light-emitting element 130G can be converted into light with a longer wavelength and extracted as red light or green light. Furthermore, it is preferred that a coloring layer 132R is provided between the color conversion layer on the light-emitting element 130R and the substrate 152, and a coloring layer 132G is provided between the color conversion layer on the light-emitting element 130G and the substrate 152. By extracting the light that transmits the color conversion layer through the coloring layer, the color purity of the light presented by the sub-pixel can be improved by absorbing light other than the desired color light by the coloring layer.

[0473] [Display device 50G] Fig.19 The display device 50G shown is a bottom emission type display device, which is mainly different from the display device 50F.

[0474] Light emitted by the light emitting element is emitted toward the substrate 151. A material having high visible light transmittance is preferably used for the substrate 151. On the other hand, there is no limitation on the light transmittance of the material used for the substrate 152.

[0475] A light shielding layer 117 is preferably formed between the substrate 151 and the transistor. Fig.19The following example is shown: a light shielding layer 117 is provided on a substrate 151, an insulating layer 153 is provided on the light shielding layer 117, and a transistor 205D, a transistor 205R (not shown), a transistor 205G, and a transistor 205B are provided on the insulating layer 153. In addition, a coloring layer 132R (not shown), a coloring layer 132G, and a coloring layer 132B are provided on the insulating layer 218, and an insulating layer 235 is provided on the coloring layers 132R (not shown), the coloring layer 132G, and the coloring layer 132B.

[0476] The light emitting element 130R (not shown) overlapping the colored layer 132R includes a conductive layer 124R (not shown), a conductive layer 126R (not shown), a layer 133 , a common layer 114 , and a common electrode 115 .

[0477] The light emitting element 130G overlapping the colored layer 132G includes the conductive layer 124G, the conductive layer 126G, the layer 133 , the common layer 114 , and the common electrode 115 .

[0478] The light emitting element 130B overlapping the colored layer 132B includes a conductive layer 124B, a conductive layer 126B, a layer 133 , a common layer 114 , and a common electrode 115 .

[0479] Conductive layers 124R, 124G, 124B, conductive layers 126R, 126G, and 126B are each made of a material having high visible light transmittance. Common electrode 115 is preferably made of a material that reflects visible light. Since metal with low resistance or the like can be used for common electrode 115 in a bottom emission type display device, voltage drop due to the resistance of common electrode 115 can be suppressed, and high display quality can be achieved.

[0480] A transistor according to one embodiment of the present invention can be miniaturized and the area occupied by the transistor within the substrate surface can be reduced, so that the aperture ratio of a pixel can be increased or the size of a pixel can be reduced in a bottom emission display device.

[0481] [Example of a method for manufacturing a display device] The following reference FIG. 20A to FIG. 20F A method for manufacturing a display device using an MML structure is described. Here, a process for manufacturing a light emitting element without using a high-definition metal mask is described in detail. FIG. 20A to FIG. 20F The cross-sectional views of three light-emitting elements and the connection portion 140 included in the display portion 162 in each process are shown.

[0482] When manufacturing a light-emitting element, a vacuum process such as evaporation and a solution process such as spin coating and inkjet can be used. As an evaporation method, physical evaporation methods (PVD methods) such as sputtering, ion plating, ion beam evaporation, molecular beam evaporation, vacuum evaporation, and chemical vapor deposition (CVD methods) can be cited. In particular, a functional layer (hole injection layer, hole transport layer, hole blocking layer, light-emitting layer, electron blocking layer, electron transport layer, electron injection layer, charge generation layer, etc.) included in the EL layer can be formed using evaporation (vacuum evaporation), coating (dip coating, dye coating, rod coating, spin coating, spray coating, etc.), printing (inkjet, screen printing (porcelain printing), offset printing (lithography), flexographic printing (relief printing), gravure printing, or micro-contact printing, etc.) and other methods.

[0483] The island-shaped layer (including the light-emitting layer) manufactured in the manufacturing method of the display device described below is not formed using a high-precision metal mask, but is formed by depositing the light-emitting layer on the entire surface and then processing it by photolithography. Therefore, a high-definition display device or a high aperture ratio display device that has been difficult to achieve so far can be realized. Furthermore, since the light-emitting layer can be formed separately for each color, a display device with extremely clear, high contrast and high display quality can be realized. In addition, by providing a sacrificial layer on the light-emitting layer, the damage to the light-emitting layer during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.

[0484] For example, when a display device is composed of three light-emitting elements: a light-emitting element emitting blue light, a light-emitting element emitting green light, and a light-emitting element emitting red light, three island-shaped light-emitting layers can be formed by repeating the deposition and photolithography processing of the light-emitting layer three times.

[0485] First, pixel electrodes 111R, 111G, 111B and a conductive layer 123 are formed on a substrate 151 provided with transistors 205R, 205G, 205B, etc. (not shown). Fig. 20A ).

[0486] When forming the conductive film to be the pixel electrode, for example, a sputtering method or a vacuum evaporation method may be used. After forming a resist mask on the conductive film by a photolithography process, the conductive film is processed to form the pixel electrodes 111R, 111G, 111B and the conductive layer 123. The conductive film may be processed by one or both of a wet etching method and a dry etching method.

[0487] Next, a film 133Bf, which will later become a layer 133B, is formed on the pixel electrodes 111R, 111G, and 111B. The film 133Bf (later layer 133B) includes a light-emitting layer that emits blue light.

[0488] This embodiment shows an example in which an island-shaped EL layer is first formed in a light-emitting element that emits blue light, and then an island-shaped EL layer is formed in a light-emitting element that emits light of other colors.

[0489] In the process of forming the island-shaped EL layer, the pixel electrodes in the light-emitting elements of the colors formed second and later may be damaged in the previous process. Therefore, the driving voltage of the light-emitting elements of the colors formed second and later may become high.

[0490] Therefore, when manufacturing a display device according to one embodiment of the present invention, it is preferred to start manufacturing from the island-shaped EL layer of the light-emitting element (e.g., the blue light-emitting element) that emits the shortest wavelength of light. For example, it is preferred to manufacture the island-shaped EL layer in the order of blue, green, and red or in the order of blue, red, and green.

[0491] Thus, the state of the interface between the pixel electrode and the EL layer in the blue light-emitting element can be well maintained, thereby suppressing the driving voltage of the blue light-emitting element from becoming higher. In addition, the life of the blue light-emitting element can be extended and the reliability can be improved. Note that compared with the blue light-emitting element, the red and green light-emitting elements are less affected by the increase in driving voltage, so by adopting the above-mentioned manufacturing sequence, the driving voltage of the entire display device can be reduced and the reliability can be improved.

[0492] Note that the order of manufacturing the island-shaped EL layers is not limited to the above order, and for example, the island-shaped EL layers may be manufactured in the order of red, green, and blue.

[0493] like Fig. 20A As shown, the film 133Bf is not formed on the conductive layer 123. For example, the film 133Bf can be deposited only in a desired region using a range mask. By adopting a deposition process using a range mask and a processing process using a resist mask, a light emitting element can be manufactured with a relatively simple process.

[0494] The heat-resistant temperature of the compound contained in the film 133Bf is preferably 100° C. or more and 180° C. or less, more preferably 120° C. or more and 180° C. or less, and further preferably 140° C. or more and 180° C. or less. Thus, the reliability of the light-emitting element can be improved. In addition, the upper limit of the temperature that can be applied in the manufacturing process of the display device can be increased. Therefore, the range of selection of materials and formation methods for the display device can be expanded, thereby achieving an increase in yield and an increase in reliability.

[0495] As the heat-resistant temperature, for example, any of the glass transition temperature, softening point, melting point, thermal decomposition temperature and 5% weight loss temperature may be used, and the lowest temperature among the above temperatures is preferably used.

[0496] The film 133Bf can be formed by, for example, a vapor deposition method, specifically, a vacuum vapor deposition method. Alternatively, the film 133Bf can be formed by a transfer method, a printing method, an inkjet method, a coating method, or the like.

[0497] Next, a sacrificial layer 118B is formed on the film 133Bf and the conductive layer 123 ( Fig. 20A ). The sacrificial layer 118B can be formed by forming a resist mask on a film that will later become the sacrificial layer 118B by a photolithography process and then processing the film.

[0498] By providing the sacrificial layer 118B on the film 133Bf, damage to the film 133Bf during the manufacturing process of the display device can be reduced, and the reliability of the light-emitting element can be improved.

[0499] The sacrificial layer 118B is preferably provided in a manner covering each end of the pixel electrodes 111R, 111G, and 111B. Thus, the end of the layer 133B to be formed in a subsequent process is located outside the end of the pixel electrode 111B. Since the entire top surface of the pixel electrode 111B can be used as a light-emitting area, the aperture ratio of the pixel can be increased. In addition, the end of the layer 133B may be damaged in the process after the layer 133B is formed, so it is preferably located outside the end of the pixel electrode 111B. That is, the end of the layer 133B is preferably not used as a light-emitting area. Thus, the uneven characteristics of the light-emitting element can be suppressed, and the reliability can be improved.

[0500] In addition, by covering the top surface and side surfaces of the pixel electrode 111B with the layer 133B, each process after forming the layer 133B can be performed without exposing the pixel electrode 111B. When the end of the pixel electrode 111B is exposed, corrosion may occur in an etching process, etc. By suppressing the corrosion of the pixel electrode 111B, the yield and characteristics of the light-emitting element can be improved.

[0501] Furthermore, it is preferable that the sacrificial layer 118B is further provided at a position overlapping with the conductive layer 123. Thus, the conductive layer 123 can be prevented from being damaged during the manufacturing process of the display device.

[0502] As the sacrificial layer 118B, a film having high resistance to the processing conditions of the film 133Bf is used. Specifically, a film having a large etching selectivity ratio with the film 133Bf is used.

[0503] The sacrificial layer 118B is formed at a temperature lower than the heat resistance temperature of each compound included in the film 133Bf. The substrate temperature when forming the sacrificial layer 118B is typically 200°C or less, preferably 150°C or less, more preferably 120°C or less, further preferably 100°C or less, and further preferably 80°C or less.

[0504] When the heat-resistant temperature of the compound contained in the film 133Bf is high, the deposition temperature of the sacrificial layer 118B can be increased, so it is preferred. For example, the substrate temperature when forming the sacrificial layer 118B can also be set to above 100°C, above 120°C, or above 140°C. The higher the deposition temperature, the denser and more barrier-resistant inorganic insulating film can be formed. Therefore, by depositing the sacrificial layer at the above temperature, the damage to the film 133Bf can be further reduced, thereby improving the reliability of the light-emitting element.

[0505] The deposition temperature of other layers (eg, insulating film 125f) formed on the film 133Bf is the same as described above.

[0506] The sacrificial layer 118B may be formed by, for example, sputtering, ALD (including thermal ALD and PEALD), CVD, or vacuum evaporation. Alternatively, the sacrificial layer 118B may be formed by the above-mentioned wet deposition method.

[0507] The sacrificial layer 118B (a layer provided in contact with the film 133Bf when the sacrificial layer 118B has a stacked structure) is preferably formed by a formation method that causes less damage to the film 133Bf. For example, ALD or vacuum evaporation is more preferable than sputtering.

[0508] The sacrificial layer 118B can be processed by wet etching or dry etching. The sacrificial layer 118B is preferably processed by anisotropic etching.

[0509] By using the wet etching method, the damage to the film 133Bf when the sacrificial layer 118B is processed can be reduced compared to the case of using the dry etching method. When using the wet etching method, for example, it is preferable to use a developer, a tetramethylammonium hydroxide (TMAH) aqueous solution, dilute hydrofluoric acid, oxalic acid, phosphoric acid, acetic acid, nitric acid, or a mixed solution containing two or more of the above. In addition, when using the wet etching method, a mixed acid solution containing water, phosphoric acid, dilute hydrofluoric acid and nitric acid can also be used. Note that the solution used for the wet etching process can be alkaline or acidic.

[0510] As the sacrificial layer 118B, for example, one or more of a metal film, an alloy film, a metal oxide film, a semiconductor film, an inorganic insulating film, and an organic insulating film can be used.

[0511] As the sacrificial layer 118B, for example, metal materials such as gold, silver, platinum, magnesium, nickel, tungsten, chromium, molybdenum, iron, cobalt, copper, palladium, titanium, aluminum, yttrium, zirconium and tantalum, or alloy materials containing these metal materials can be used.

[0512] The sacrificial layer 118B can use metal oxides such as In-Ga-Zn oxide, indium oxide, In-Zn oxide, In-Sn oxide, indium titanium oxide (In-Ti oxide), indium tin zinc oxide (In-Sn-Zn oxide), indium titanium zinc oxide (In-Ti-Zn oxide), indium gallium tin zinc oxide (In-Ga-Sn-Zn oxide), and indium tin oxide containing silicon.

[0513] Note that element M (M is one or more selected from aluminum, silicon, boron, yttrium, copper, vanadium, beryllium, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, tantalum, tungsten and magnesium) may be used instead of the above-mentioned gallium.

[0514] For example, as a material very suitable for the manufacturing process of semiconductors, semiconductor materials such as silicon or germanium can be used. In addition, oxides or nitrides of the above semiconductor materials can be used. In addition, non-metallic materials such as carbon or their compounds can be used. In addition, metals such as titanium, tantalum, tungsten, chromium, aluminum, or alloys containing one or more of them can be used. In addition, oxides containing the above metals such as titanium oxide or chromium oxide, or nitrides such as titanium nitride, chromium nitride, or tantalum nitride can be used.

[0515] In addition, various inorganic insulating films that can be used for the protective layer 131 can be used as the sacrificial layer 118B. In particular, the adhesion between the oxide insulating film and the film 133Bf is higher than the adhesion between the nitride insulating film and the film 133Bf, so it is preferred. For example, inorganic insulating materials such as aluminum oxide, hafnium oxide and silicon oxide can be used for the sacrificial layer 118B. As the sacrificial layer 118B, for example, an aluminum oxide film can be formed by the ALD method. By using the ALD method, damage to the substrate (especially the film 133Bf) can be reduced, so it is preferred.

[0516] For example, the sacrificial layer 118B may have a stacked structure of an inorganic insulating film (eg, an aluminum oxide film) formed by ALD and an inorganic film (eg, an In—Ga—Zn oxide film, a silicon film, or a tungsten film) formed by sputtering.

[0517] In addition, the same inorganic insulating film can be used for both the sacrificial layer 118B and the insulating layer 125 formed later. For example, an aluminum oxide film formed using the ALD method can be used for both the sacrificial layer 118B and the insulating layer 125. Here, the sacrificial layer 118B and the insulating layer 125 can use the same deposition conditions or different deposition conditions. For example, by depositing the sacrificial layer 118B under the same conditions as the insulating layer 125, the sacrificial layer 118B can be formed as an insulating layer with high barrier properties to at least one of water and oxygen. On the other hand, the sacrificial layer 118B is a layer that is mostly or entirely removed in a subsequent process, so it is preferably easy to process. Therefore, the sacrificial layer 118B is preferably deposited under conditions where the substrate temperature is lower than that of the insulating layer 125 during deposition.

[0518] An organic material may also be used as the sacrificial layer 118B. For example, a material that is soluble in a solvent that is chemically stable to at least the film located at the uppermost portion of the film 133Bf may also be used as the organic material. In particular, a material that is soluble in water or alcohol may be used appropriately. When depositing the above-mentioned material, it is preferred that the material is applied by the above-mentioned wet deposition method in a state where the material is dissolved in a solvent such as water or alcohol, and then a heating treatment is performed to evaporate the solvent. At this time, by performing the heating treatment in a reduced pressure atmosphere, the solvent can be removed at a low temperature and in a short time, so that thermal damage to the film 133Bf can be reduced, which is preferred.

[0519] The sacrificial layer 118B may be made of an organic resin such as polyvinyl alcohol (PVA), polyvinyl butyral, polyvinyl pyrrolidone, polyethylene glycol, polyglycerol, pullulan, water-soluble cellulose, alcohol-soluble polyamide resin, or fluororesin such as perfluoropolymer.

[0520] For example, the sacrificial layer 118B may have a stacked structure of an organic film (eg, a PVA film) formed by evaporation or the wet deposition method and an inorganic film (eg, a silicon nitride film) formed by sputtering.

[0521] Note that a part of the sacrificial film may remain as a sacrificial layer in the display device of one embodiment of the present invention.

[0522] Next, the film 133Bf is processed using the sacrificial layer 118B as a hard mask to form a layer 133B ( Fig. 20B ).

[0523] Therefore, if Fig. 20B As shown, the stacked structure of the layer 133B and the sacrificial layer 118B remains on the pixel electrode 111B. In addition, the pixel electrode 111R and the pixel electrode 111G are exposed. In addition, the sacrificial layer 118B remains on the conductive layer 123 in the region corresponding to the connection portion 140 .

[0524] The film 133Bf is preferably processed by anisotropic etching. Anisotropic dry etching is particularly preferred. Alternatively, wet etching may be used.

[0525] Then, the same steps as the step of forming the film 133Bf, the step of forming the sacrificial layer 118B, and the step of forming the layer 133B are repeated twice by changing at least the light-emitting material, thereby forming a stacked structure of the layer 133R and the sacrificial layer 118R on the pixel electrode 111R and a stacked structure of the layer 133G and the sacrificial layer 118G on the pixel electrode 111G ( Fig. 20C Specifically, the layer 133R is formed to include a light-emitting layer that emits red light, and the layer 133G is formed to include a light-emitting layer that emits green light. The sacrificial layers 118R and 118G may use the same material as that used for the sacrificial layer 118B, and may use different materials.

[0526] Note that the side surfaces of the layers 133B, 133G, and 133R are preferably perpendicular or substantially perpendicular to the surface on which they are formed. For example, the angle between the surface on which they are formed and these side surfaces is preferably not less than 60 degrees and not more than 90 degrees.

[0527] As described above, the distance between two adjacent layers among the layers 133B, 133G, and 133R formed by photolithography can be reduced to 8 μm or less, 5 μm or less, 3 μm or less, 2 μm or less, or 1 μm or less. Here, the distance can be defined, for example, by the distance between two adjacent opposite ends of the layers 133B, 133G, and 133R. By reducing the distance between the island-shaped EL layers as described above, a display device with high definition and high aperture ratio can be provided.

[0528] Next, an insulating film 125f, which will later become the insulating layer 125, is formed to cover the pixel electrode, the layer 133B, the layer 133G, the layer 133R, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, and an insulating layer 127 ( Fig.20D ).

[0529] As the insulating film 125f, it is preferable to form an insulating film with a thickness of 3 nm or more, 5 nm or more, or 10 nm or more and 200 nm or less, 150 nm or less, 100 nm or less, or 50 nm or less.

[0530] The insulating film 125f is preferably formed by, for example, the ALD method. The ALD method is preferred because deposition damage can be reduced and a film with high coverage can be deposited. As the insulating film 125f, for example, an aluminum oxide film is preferably formed by the ALD method.

[0531] In addition, the insulating film 125f may be formed by a sputtering method, a CVD method, or a PECVD method whose deposition rate is higher than that of the ALD method. Thus, a display device with high reliability can be manufactured with high productivity.

[0532] The insulating film to be the insulating layer 127 is preferably formed by the above-mentioned wet deposition method (e.g., spin coating) using a photosensitive resin composition containing an acrylic resin, for example. Preferably, a heat treatment (also called pre-baking) is performed after deposition to remove the solvent in the insulating film. Next, a portion of the insulating film is irradiated with visible light or ultraviolet light to make a portion of the insulating film photosensitive. Next, development is performed to remove the exposed area in the insulating film. Next, a heat treatment (also called post-baking) is performed. In this way, a Fig.20D The insulating layer 127 is shown. Note that the shape of the insulating layer 127 is not limited to Fig.20D For example, the top surface of the insulating layer 127 may have one or more of a convex curved surface, a concave curved surface, and a flat surface. In addition, the insulating layer 127 may also cover the side surface of at least one end of the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R.

[0533] Then, if Fig.20E As shown, etching is performed using the insulating layer 127 as a mask to remove a portion of the insulating film 125f and the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R. As a result, openings are formed in the insulating film 125f, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, respectively, and the insulating layer 125 is formed, and the top surfaces of the layers 133B, 133G, 133R, and the conductive layer 123 are exposed. Note that sometimes a portion of the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R remains at a position (sacrificial layer 119B, sacrificial layer 119G, and sacrificial layer 119R) that overlaps with the insulating layer 127 and the insulating layer 125.

[0534] The etching process can be performed by dry etching or wet etching. In addition, when the insulating film 125f is deposited using the same material as the sacrificial layers 118B, 118G, and 118R, the etching process can be performed at one time, which is preferable.

[0535] As described above, by providing the insulating layer 127, the insulating layer 125, the sacrificial layer 118B, the sacrificial layer 118G, and the sacrificial layer 118R, it is possible to suppress the occurrence of poor connection due to disconnected portions and resistance increase due to a portion with a small local thickness in the common electrode 115 between the light-emitting elements. Thus, the display device of one embodiment of the present invention can improve display quality.

[0536] Next, a common layer 114 and a common electrode 115 are sequentially formed on the insulating layer 127, the layer 133B, the layer 133G, and the layer 133R ( Fig.20F ).

[0537] The common layer 114 can be formed by a method such as evaporation (including vacuum evaporation), transfer, printing, inkjet, or coating.

[0538] The common electrode 115 can be formed by, for example, sputtering or vacuum deposition. Alternatively, a film formed by deposition and a film formed by sputtering may be stacked.

[0539] As described above, in a method for manufacturing a display device of one embodiment of the present invention, the island-shaped layer 133B, the island-shaped layer 133G, and the island-shaped layer 133R are not formed using a high-precision metal mask, but are formed by processing after depositing a film on the entire surface, so that the island-shaped layer can be formed with a uniform thickness. Therefore, a high-definition display device or a high aperture ratio display device can be realized. In addition, even if the clarity or aperture ratio is high and the distance between sub-pixels is extremely small, the contact between the layers 133B, 133G, and 133R in adjacent sub-pixels can be suppressed. Thus, the leakage current between sub-pixels can be suppressed. Therefore, crosstalk caused by unintentional light emission can be prevented, thereby realizing a display device with extremely high contrast.

[0540] In addition, by providing the insulating layer 127 having a tapered end between adjacent island-shaped EL layers, disconnection can be suppressed when forming the common electrode 115, and a portion with a locally small thickness can be prevented from being formed in the common electrode 115. Thus, poor connection due to disconnected portions and increased resistance due to portions with a locally small thickness can be suppressed in the common layer 114 and the common electrode 115. Thus, a display device according to one embodiment of the present invention can achieve both high definition and high display quality.

[0541] This embodiment mode can be combined with other embodiment modes as appropriate.

[0542] (Implementation 3) In this embodiment, a circuit that can be used for a display device of a transistor which is one embodiment of the present invention is described.

[0543] <Configuration Example of Pixel Circuit> Fig.21A and Fig.21B , Fig.22A and Fig. 22B as well as Fig.23 FIG. 2 shows an example of a structure of the pixel 230. The pixel 230 corresponds to, for example, Fig.12 The pixel 210 shown in FIG. 230 includes a pixel circuit 51 (a pixel circuit 51A, a pixel circuit 51B, a pixel circuit 51C, a pixel circuit 51D, or a pixel circuit 51E) and a light emitting element 61 .

[0544] Here, the light-emitting element described in this embodiment refers to a self-luminous light-emitting element such as an organic EL element (also called OLED). In addition, the light-emitting element electrically connected to the pixel circuit can be a self-luminous light-emitting element such as an LED, a micro LED, a QLED, a semiconductor laser, etc.

[0545] Fig.21A The pixel circuit 51A shown is a 2Tr1C type pixel circuit including a transistor 52A, a transistor 52B, and a capacitor 53 .

[0546] One of the source and drain of the transistor 52A is electrically connected to the wiring SL, and the gate of the transistor 52A is electrically connected to the wiring GL. The other of the source and drain of the transistor 52A is electrically connected to the gate of the transistor 52B and one terminal of the capacitor 53. One of the source and drain of the transistor 52B is electrically connected to the wiring ANO. The other of the source and drain of the transistor 52B is electrically connected to the other terminal of the capacitor 53 and the anode of the light emitting element 61. The cathode of the light emitting element 61 is electrically connected to the wiring VCOM. The region where the other of the source and drain of the transistor 52A, the gate of the transistor 52B, and one terminal of the capacitor 53 are electrically connected is used as a node ND.

[0547] The wiring GL is a wiring for supplying a potential for turning on the transistor 52A included in the pixel 230 for display. The wiring SL is a wiring for supplying a potential for supplying an image signal to the transistor 52A. The wiring VCOM is a wiring for supplying a potential for supplying a current to the light emitting element 61. The transistor 52A has a function of controlling the conduction state or non-conduction state between the wiring SL and the gate of the transistor 52B according to the potential of the wiring GL. For example, the wiring ANO is supplied with VDD and the wiring VCOM is supplied with VSS.

[0548] By turning on the transistor 52A, the image signal is supplied from the wiring SL to the node ND. Then, by turning off the transistor 52A, the image signal is held in the node ND. In order to surely hold the image signal supplied to the node ND, it is preferable to use a transistor with a small off-state current as the transistor 52A. For example, it is preferable to use an OS transistor as the transistor 52A.

[0549] The transistor 52B has a function of controlling the amount of current flowing through the light emitting element 61. The capacitor 53 has a function of holding the gate potential of the transistor 52B. The intensity of light emitted by the light emitting element 61 is controlled according to an image signal supplied to the gate (node ​​ND) of the transistor 52B.

[0550] exist Fig.21AIn the pixel circuit 51A shown, the transistor 52B includes a second gate (also referred to as a back gate). The second gate of the transistor 52B is electrically connected to the other of the source and the drain of the transistor 52B.

[0551] As the transistor 52B, for example, the transistor 100 described in the above embodiment can be used. By using the transistor 100 as the transistor 52B, the number of grayscales of the display portion included in the display device can be increased. In addition, the luminous brightness of the display device can be stabilized. In addition, the reliability of the display device can be improved. In addition, the display quality of the display device can be improved.

[0552] Fig.21B The pixel circuit 51B shown is a 3Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, and a capacitor 53 . Fig.21B The pixel circuit 51B shown has a Fig.21A The pixel circuit 51A shown in the figure has a structure in which a transistor 52C is added.

[0553] One of the source and the drain of the transistor 52C is electrically connected to the other of the source and the drain of the transistor 52B. The other of the source and the drain of the transistor 52C is electrically connected to the wiring V0. For example, the wiring V0 is supplied with a reference potential.

[0554] The transistor 52C has a function of controlling the conduction state or non-conduction state between the other of the source and the drain of the transistor 52B and the wiring V0 according to the potential of the wiring GL. The wiring V0 is a wiring for supplying a reference potential. When an n-channel transistor is used as the transistor 52B, the unevenness of the gate-source voltage of the transistor 52B can be suppressed by the reference potential of the wiring V0 supplied through the transistor 52C.

[0555] In addition, the wiring V0 can be used to obtain a current value that can be used for setting pixel parameters. More specifically, the wiring V0 can be used as a monitoring line for outputting the current flowing through the transistor 52B or the current flowing through the light-emitting element 61 to the outside. The current output to the wiring V0 can be converted into a voltage by a source follower circuit or the like and output to the outside. Alternatively, it can be converted into a digital signal by an A / D converter or the like and output to the outside.

[0556] exist Fig.21B In the pixel circuit 51B shown, the transistor 52B includes a second gate. The second gate of the transistor 52B is electrically connected to the other of the source and the drain of the transistor 52B.

[0557] As the transistor 52B, for example, the transistor 100 described in the above embodiment or the like can be used.

[0558] Fig.22AThe pixel circuit 51C shown has a Fig.21B The pixel circuit 51B shown has a structure in which a transistor 52D is added. Fig.22A The pixel circuit 51C shown is a 4Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, a transistor 52D, and a capacitor 53 .

[0559] One of the source and the drain of the transistor 52D is electrically connected to the node ND, and the other of the source and the drain is electrically connected to the wiring V0.

[0560] The pixel circuit 51C is electrically connected to the wiring GL1, the wiring GL2, and the wiring GL3. The wiring GL1 is electrically connected to the gate of the transistor 52A, the wiring GL2 is electrically connected to the gate of the transistor 52C, and the wiring GL3 is electrically connected to the gate of the transistor 52D. Note that in this embodiment and the like, the wiring GL1, the wiring GL2, and the wiring GL3 are sometimes collectively referred to as the wiring GL. Therefore, the wiring GL is not limited to one, and may be multiple.

[0561] By turning on transistors 52C and 52D at the same time, the source and gate of transistor 52B have the same potential, so that transistor 52B can be turned off. This can forcibly cut off the current flowing through light-emitting element 61. This pixel circuit is preferably used when a display method in which a display period and a light-off period are alternately set is used.

[0562] Fig. 22B The pixel circuit 51D shown is an example in which a capacitor 53A is added to the pixel circuit 51C described above. The capacitor 53A is used as a storage capacitor. Fig.22A The pixel circuit 51C shown is a 4Tr1C type pixel circuit. Fig. 22B The pixel circuit 51D shown is a 4Tr2C type pixel circuit.

[0563] exist Fig.22A The pixel circuit 51C and Fig. 22B In the pixel circuit 51D shown, the transistor 52B includes a second gate. The second gate of the transistor 52B is electrically connected to the other of the source and the drain of the transistor 52B. As the transistor 52B, for example, the transistor 100 shown in the above embodiment mode can be used.

[0564] Fig.23 The pixel circuit 51E shown is a 6Tr1C type pixel circuit including a transistor 52A, a transistor 52B, a transistor 52C, a transistor 52D, a transistor 52E, a transistor 52F, and a capacitor 53. The transistor 52B includes a second gate.

[0565] One of the source and drain of the transistor 52A is electrically connected to the wiring SL, and the gate of the transistor 52A is electrically connected to the wiring GL2. One of the source and drain of the transistor 52D is electrically connected to the wiring ANO, and the gate of the transistor 52D is electrically connected to the wiring GL1. The other of the source and drain of the transistor 52D is electrically connected to one of the source and drain of the transistor 52B. The other of the source and drain of the transistor 52B is electrically connected to the other of the source and drain of the transistor 52A and one of the source and drain of the transistor 52F. The gate of the transistor 52F is electrically connected to the wiring GL3.

[0566] One of the source and drain of transistor 52E is electrically connected to the other of the source and drain of transistor 52D and one of the source and drain of transistor 52B. The other of the source and drain of transistor 52E is electrically connected to the gate of transistor 52B and one terminal of capacitor 53. The other terminal of capacitor 53 is electrically connected to the other of the source and drain of transistor 52F, the anode of light emitting element 61, and one of the source and drain of transistor 52C. The gate of transistor 52E and the gate of transistor 52C are electrically connected to wiring GL4. The other of the source and drain of transistor 52C is electrically connected to wiring V0. The region where the other of the source and drain of transistor 52E, the gate of transistor 52B, and one terminal of capacitor 53 are electrically connected is used as node ND.

[0567] exist Fig.23 In the embodiment, the transistor 52B includes a second gate. The second gate of the transistor 52B is electrically connected to the other of the source and the drain of the transistor 52B.

[0568] As the transistor 52B, for example, the transistor 100 described in the above embodiment mode can be used. Alternatively, as the transistor 52D, the transistor 52F, and the like, the transistor 100 may be used.

[0569] By using a transistor according to one embodiment of the present invention in a pixel circuit of a display device, the area occupied by the pixel circuit can be reduced. Therefore, the definition of the display device can be improved. For example, a display device having a definition of 1000 ppi or more, preferably 2000 ppi or more, more preferably 3000 ppi or more, further preferably 4000 ppi or more, further preferably 5000 ppi or more, further preferably 6000 ppi or more and 10000 ppi or less, 9000 ppi or less, or 8000 ppi or less can be realized.

[0570] In addition, by reducing the area occupied by the pixel circuit, the number of pixels of the display device can be increased (the resolution can be improved). For example, extremely high-resolution display devices such as HD (1280×720 pixels), FHD (1920×1080 pixels), WQHD (2560×1440 pixels), WQXGA (2560×1600 pixels), 4K2K (3840×2160 pixels), or 8K4K (7680×4320 pixels) can be realized.

[0571] Therefore, by using a transistor according to one embodiment of the present invention in a pixel circuit of a display device, the display quality of the display device can be improved. In addition, the aperture ratio of the pixel can be increased in a bottom emission type display device using an EL element. A pixel with a high aperture ratio can emit light with the same brightness as a pixel with a low aperture ratio at a lower current density than a pixel with a low aperture ratio. Therefore, the reliability of the display device can be improved.

[0572] <Configuration Example of Sequential Circuit> Fig.24 An example of the structure of the sequential circuit 10 is shown. The sequential circuit 10 includes a circuit 11 and a circuit 12. The circuit 11 and the circuit 12 are electrically connected through wiring 15a and wiring 15b. For example, the sequential circuit can be used for a part of a driving circuit of a display device. In particular, the sequential circuit can be appropriately used for a part of a scanning line driving circuit (also called a gate driving circuit) of a display device.

[0573] The circuit 12 has a function of outputting a first signal and a second signal to the wiring 15a and the wiring 15b, respectively, according to the potential of the signal LIN and the potential of the signal RIN. Here, the second signal is a signal that inverts the first signal. That is, when the first signal and the second signal each have two potentials of a high potential and a low potential, when a high potential is output from the circuit 12 to the wiring 15a, a low potential is output to the wiring 15b, and when a low potential is output from the circuit 12 to the wiring 15a, a high potential is output to the wiring 15b.

[0574] The circuit 11 includes a transistor 21, a transistor 22, and a capacitor C1. The transistor 21 and the transistor 22 are each an n-channel transistor. The transistor 21 and the transistor 22 can appropriately use a metal oxide (hereinafter also referred to as an oxide semiconductor) exhibiting semiconductor characteristics as a semiconductor forming a channel. In addition, it is not limited to oxide semiconductors, and semiconductors such as silicon (single crystal silicon, polycrystalline silicon, or amorphous silicon) and germanium can be used, and compound semiconductors can also be used.

[0575] The transistor of one embodiment of the present invention can be used as appropriate as the transistor 21 and the transistor 22. For example, the transistor 100 described in the above embodiment or the like can be used as appropriate as the transistor 21.

[0576] The transistor 21 includes a pair of gates (hereinafter referred to as the first gate and the second gate). In the transistor 21, the first gate is electrically connected to the wiring 15b, the second gate is electrically connected to one of the source and drain of the transistor 21 and the wiring to which the potential VSS (also referred to as the first potential) is supplied, and the other of the source and drain is electrically connected to one of the source and drain of the transistor 22. In the transistor 22, the gate is electrically connected to the wiring 15a, and the other of the source and drain is electrically connected to the wiring to which the signal CLK is supplied. The capacitor C1 includes a pair of electrodes, one of which is electrically connected to one of the source and drain of the transistor 22 and the other of the source and drain of the transistor 21, and the other of which is electrically connected to the gate of the transistor 22 and the wiring 15a. In addition, the other of the source and drain of the transistor 21, one of the source and drain of the transistor 22, and one of the electrodes of the capacitor C1 are electrically connected to the output terminal OUT. Note that the output terminal OUT is a portion to which the output potential from the circuit 11 is supplied, and may also be a portion of the wiring or a portion of the electrode.

[0577] The other of the source and drain of the transistor 22 is alternately supplied with the second potential and the third potential as the signal CLK. The second potential can be a potential higher than the potential VSS (e.g., potential VDD). The third potential can be a potential lower than the second potential. As the third potential, the potential VSS can be appropriately used. Note that a structure in which the potential VDD is supplied to the other of the source and drain of the transistor 22 instead of the signal CLK can also be adopted.

[0578] When the wiring 15a is supplied with a high potential and the wiring 15b is supplied with a low potential, the transistor 22 is turned on and the transistor 21 is turned off. At this time, the output terminal OUT and the wiring supplied with the signal CLK are turned on.

[0579] In the circuit 11, the output terminal OUT and the gate of the transistor 22 are electrically connected through the capacitor C1, so as the potential of the output terminal OUT rises due to the bootstrap effect, the gate potential of the transistor 22 rises. Here, in the case where the capacitor C1 is not included, when the second potential of the signal CLK and the high potential supplied to the wiring 15a use the same potential (potential VDD), the potential of the output terminal OUT will be a potential obtained by subtracting the threshold voltage of the transistor 22 from the potential VDD. However, by including the capacitor C1, the potential of the gate of the transistor 22 rises to a potential close to twice the potential VDD (specifically, a potential close to twice the difference between the potential VDD and the potential VSS or a potential close to twice the difference between the potential VDD and the third potential), so the potential VDD can be output to the output terminal OUT without being affected by the threshold voltage of the transistor 22. As a result, the timing circuit 10 with high output performance can be realized without increasing the types of power supply potentials.

[0580] On the other hand, when low potential and high potential are supplied to wiring 15a and wiring 15b, respectively, transistor 22 becomes non-conductive and transistor 21 becomes conductive. At this time, output terminal OUT and the wiring supplied with potential VSS become conductive, and potential VSS is output to output terminal OUT.

[0581] Here, the timing circuit 10 can be used as a driving circuit of a display device. In particular, it can be appropriately used as a scan line driving circuit. At this time, when the output terminal OUT is connected to the scan lines of a plurality of pixels connected to the display device, the duty cycle of the output signal output from the timing circuit 10 to the output terminal OUT is significantly smaller than the duty cycle of the signal CLK and the like. At this time, the period during which the transistor 21 is in the on state is significantly longer than the period during which it is in the non-conducting state. That is, the period during which the first gate of the transistor 21 is supplied with a high potential is significantly longer than the period during which it is supplied with a low potential, which may cause degradation of the transistor characteristics. However, as described above, since the transistor of one embodiment of the present invention has high reliability, by using the transistor of one embodiment of the present invention as the transistor 21, the degradation of the transistor characteristics in the state in which the first gate is supplied with a high potential can be suppressed.

[0582] In addition, by using a transistor of one embodiment of the present invention as transistor 21, it is possible to appropriately prevent the threshold voltage from becoming a negative value, thereby making it easy for transistor 21 to have a normally closed characteristic. When transistor 21 has a normally open characteristic, when the voltage between the second gate and the source of transistor 21 is 0V, a leakage current is generated between the source and the drain, and the potential of the output terminal OUT cannot be maintained. Therefore, in order to turn transistor 21 off, it is necessary to supply a potential lower than the potential VSS to the second gate of transistor 21, and multiple power supplies are required. However, as described above, since a transistor of one embodiment of the present invention has a structure in which the second gate is electrically connected to the source (a conductive layer also serves as the second gate and the source), by using a transistor of one embodiment of the present invention as transistor 21, a timing circuit 10 with high output performance can be realized without increasing the types of power supply potentials.

[0583] In addition, by using the transistor of one embodiment of the present invention as the transistor 21, the saturation of the Id-Vd characteristic of the transistor 21 can be improved. This makes it easier to design the circuit 11, and the circuit 11 can be operated stably.

[0584] The structure described in this embodiment mode can be used in combination with the structures described in other embodiment modes as appropriate.

[0585] (Implementation 4) In this embodiment, using FIG. 25A to FIG. 27G An electronic device according to one embodiment of the present invention will be described.

[0586] The electronic device of this embodiment includes a display device of one embodiment of the present invention in a display portion. The display device of one embodiment of the present invention can easily achieve high definition and high resolution. Therefore, it can be used in the display portion of various electronic devices.

[0587] Electronic devices include, for example, television sets, desktop or notebook personal computers, displays for computers, etc., digital signage, large-scale game consoles such as pinball machines, and other electronic devices with larger screens, as well as digital cameras, digital video cameras, digital photo frames, mobile phones, portable game consoles, portable information terminals, sound reproduction devices, and the like.

[0588] In particular, since the display device of one embodiment of the present invention can improve the clarity, it can be suitably used in electronic devices including a smaller display unit. Examples of such electronic devices include watch-type and bracelet-type information terminal devices (wearable devices), wearable devices that can be worn on the head, VR devices such as head-mounted displays, glasses-type AR devices, and MR devices.

[0589] A display device according to one embodiment of the present invention preferably has an extremely high resolution such as HD (1280×720 pixels), FHD (1920×1080 pixels), WQHD (2560×1440 pixels), WQXGA (2560×1600 pixels), 4K (3840×2160 pixels), 8K (7680×4320 pixels), etc. In particular, the resolution is preferably set to 4K, 8K or above. In addition, the pixel density (clarity) in the display device according to one embodiment of the present invention is preferably 100 ppi or more, preferably 300 ppi or more, more preferably 500 ppi or more, further preferably 1000 ppi or more, further preferably 2000 ppi or more, further preferably 3000 ppi or more, further preferably 5000 ppi or more, further preferably 7000 ppi or more. By using a display device having one or both of high resolution and high definition, the sense of reality and depth can be further improved. In addition, there is no particular limitation on the screen ratio (aspect ratio) of the display device of one embodiment of the present invention. For example, the display device can adapt to various screen ratios such as 1:1 (square), 4:3, 16:9, 16:10, etc.

[0590] The electronic device of this embodiment may also include a sensor (the sensor has the function of detecting, detecting or measuring the following factors: force, displacement, position, speed, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature, chemical substance, sound, time, hardness, electric field, current, voltage, electricity, radiation, flow, humidity, inclination, vibration, smell or infrared).

[0591] The electronic device of this embodiment may have various functions. For example, it may have the following functions: a function of displaying various information (static images, dynamic images, text images, etc.) on a display unit; a function of a touch panel; a function of displaying a calendar, date, or time, etc.; a function of executing various software (programs); a function of wireless communication; a function of reading programs or data stored in a storage medium; etc.

[0592] use FIG. 25A to FIG. 25D An example of a wearable device that can be worn on the head is described. These wearable devices have at least one of a function of displaying AR content, a function of displaying VR content, a function of displaying SR content, and a function of displaying MR content. When an electronic device has a function of displaying at least one of AR, VR, SR, MR, etc., the user's sense of immersion can be improved.

[0593] Fig.25A The electronic device 700A shown and Fig.25BThe electronic devices 700B shown include a pair of display panels 751, a pair of housings 721, a communication unit (not shown), a pair of mounting units 723, a control unit (not shown), an imaging unit (not shown), a pair of optical components 753, glasses frames 757 and a pair of nose pads 758.

[0594] The display device of one embodiment of the present invention can be applied to the display panel 751. Therefore, an electronic device capable of performing extremely high-definition display can be realized.

[0595] Both the electronic device 700A and the electronic device 700B can project the image displayed by the display panel 751 onto the display area 756 in the optical member 753. Since the optical member 753 is light-transmissive, the user can see the image displayed in the display area overlapping the transmitted image seen through the optical member 753. Therefore, both the electronic device 700A and the electronic device 700B are electronic devices capable of AR display.

[0596] The electronic device 700A and the electronic device 700B may also be provided with a camera capable of photographing the front as an imaging unit. In addition, by providing an acceleration sensor such as a gyro sensor on the electronic device 700A and the electronic device 700B, the user's head orientation can be detected and an image corresponding to the direction can be displayed on the display area 756.

[0597] The communication unit includes a wireless communication device, through which a video signal etc. can be supplied. In addition to or in place of the wireless communication device, a connector to which a cable for supplying a video signal and a power supply potential can be connected may be included.

[0598] Electronic device 700A and electronic device 700B are provided with batteries, and can be charged wirelessly or by wire, or both.

[0599] The housing 721 may also be provided with a touch sensor module. The touch sensor module has a function of detecting whether the outer surface of the housing 721 is touched. Through the touch sensor module, various processes can be performed by detecting a user's tapping operation or sliding operation. For example, a process such as temporarily stopping or reproducing a dynamic image can be performed through a tapping operation, and a process such as fast forwarding or rewinding can be performed through a sliding operation. In addition, by providing a touch sensor module on each of the two housings 721, the operating range can be expanded.

[0600] As the touch sensor module, various touch sensors can be used. For example, various methods such as electrostatic capacitance, resistance film, infrared, electromagnetic induction, surface acoustic wave, and optical can be used. In particular, it is preferred to use electrostatic capacitance or optical sensors in the touch sensor module.

[0601] When an optical touch sensor is used, a photoelectric conversion element may be used as a light receiving element. Inorganic semiconductors and organic semiconductors may be used for the active layer of the photoelectric conversion element, or both.

[0602] Fig.25C The electronic device 800A shown and Fig.25D The electronic devices 800B shown each include a pair of display portions 820 , a housing 821 , a communication portion 822 , a pair of mounting portions 823 , a control portion 824 , a pair of imaging portions 825 , and a pair of lenses 832 .

[0603] The display unit 820 may be a display device according to one embodiment of the present invention. Therefore, an electronic device capable of displaying with extremely high definition may be realized, thereby allowing the user to experience a high sense of immersion.

[0604] The display unit 820 is provided at a position visible through the lens 832 inside the housing 821. In addition, by displaying different images between the pair of display units 820, three-dimensional display using parallax can be performed.

[0605] The electronic device 800A and the electronic device 800B can both be referred to as VR-oriented electronic devices. A user who wears the electronic device 800A or the electronic device 800B can see the image displayed on the display unit 820 through the lens 832 .

[0606] The electronic device 800A and the electronic device 800B preferably have a mechanism in which the left and right positions of the lens 832 and the display unit 820 can be adjusted so that the lens 832 and the display unit 820 are located at the most suitable position according to the position of the user's eyes. In addition, it is preferable to have a mechanism in which the focus is adjusted by changing the distance between the lens 832 and the display unit 820.

[0607] The user can use the mounting portion 823 to mount the electronic device 800A or the electronic device 800B on the head. Fig.25C In the examples, the mounting portion 823 is shaped like the temples of glasses (also referred to as joints or temples), but the invention is not limited thereto. As long as the user can wear it, the mounting portion 823 may have a helmet-type or belt-type shape, for example.

[0608] The imaging unit 825 has a function of acquiring external information. The data acquired by the imaging unit 825 can be output to the display unit 820. An image sensor can be used in the imaging unit 825. In addition, a plurality of cameras can be provided to correspond to various viewing angles such as telephoto and wide angle.

[0609] Note that the example including the imaging unit 825 is shown here, and a distance measuring sensor (hereinafter, also referred to as a detection unit) capable of measuring the distance to the object may be provided. In other words, the imaging unit 825 is a form of a detection unit. As the detection unit, for example, an image sensor or a distance image sensor such as a laser radar (LIDAR: Light Detection and Ranging) may be used. By using the image obtained by the camera and the image obtained by the distance image sensor, more information can be obtained, and a more accurate gesture operation can be achieved.

[0610] The electronic device 800A may also include a vibration mechanism used as a bone conduction headset. For example, one or more of the display unit 820, the housing 821, and the mounting unit 823 may adopt a structure including the vibration mechanism. Thus, there is no need to separately provide audio equipment such as headphones, earphones, or speakers, and the image and sound can be enjoyed by only installing the electronic device 800A.

[0611] Electronic device 800A and electronic device 800B may both include input terminals. Cables for supplying video signals from a video output device or the like, power for charging a battery provided in the electronic device, and the like may be connected to the input terminals.

[0612] An electronic device according to one embodiment of the present invention may also have a function of wirelessly communicating with earphone 750. Earphone 750 includes a communication unit (not shown) and has a wireless communication function. Earphone 750 can receive information (such as sound data) from the electronic device through the wireless communication function. For example, Fig.25A The electronic device 700A shown has a function of transmitting information to the headset 750 through a wireless communication function. In addition, for example Fig.25C The electronic device 800A shown has a function of transmitting information to the headset 750 through a wireless communication function.

[0613] The electronic device may also include an earphone unit. Fig.25B The electronic device 700B shown includes an earphone unit 727. For example, a structure in which the earphone unit 727 and the control unit are connected in a wired manner may be adopted. A part of the wiring connecting the earphone unit 727 and the control unit may also be arranged inside the housing 721 or the mounting portion 723.

[0614] Likewise, Fig.25DThe electronic device 800B shown includes an earphone unit 827. For example, a structure in which the earphone unit 827 and the control unit 824 are connected in a wired manner may be adopted. A part of the wiring connecting the earphone unit 827 and the control unit 824 may also be arranged inside the housing 821 or the mounting portion 823. In addition, the earphone unit 827 and the mounting portion 823 may also include magnets. Thus, the earphone unit 827 can be fixed to the mounting portion 823 by magnetic force, and storage becomes easy, which is preferred.

[0615] The electronic device may also include a sound output terminal that can be connected to earphones or headphones. In addition, the electronic device may also include one or both of a sound input terminal and a sound input mechanism. As the sound input mechanism, for example, a sound receiving device such as a microphone may be used. By providing the sound input mechanism to the electronic device, the electronic device can have the so-called earphone function.

[0616] As described above, as electronic devices according to one embodiment of the present invention, both glasses-type (electronic devices 700A and 700B, etc.) and goggles-type (electronic devices 800A and 800B, etc.) are preferable.

[0617] An electronic device according to one embodiment of the present invention can transmit information to the headset in a wired or wireless manner.

[0618] Fig.26A The electronic device 6500 shown is a portable information terminal device that can be used as a smartphone.

[0619] The electronic device 6500 includes a housing 6501, a display portion 6502, a power button 6503, a button 6504, a speaker 6505, a microphone 6506, a camera 6507, a light source 6508, and the like. The display portion 6502 has a touch panel function.

[0620] As the display portion 6502 , a display device which is one embodiment of the present invention can be used.

[0621] Fig.26B 65 is a schematic cross-sectional view of an end portion of a housing 6501 on a side of a microphone 6506 .

[0622] A light-transmitting protective component 6510 is provided on the display surface side of the housing 6501, and a display panel 6511, an optical component 6512, a touch sensor panel 6513, a printed circuit board 6517, a battery 6518, etc. are provided in the space surrounded by the housing 6501 and the protective component 6510.

[0623] The display panel 6511 , the optical member 6512 , and the touch sensor panel 6513 are fixed to the protective member 6510 using an adhesive layer (not shown).

[0624] In a region outside the display portion 6502, a portion of the display panel 6511 is folded back, and the folded back portion is connected to an FPC 6515. An IC 6516 is mounted on the FPC 6515. The FPC 6515 is connected to a terminal provided on a printed circuit board 6517.

[0625] The display panel 6511 can use a flexible display device of one embodiment of the present invention. Thus, an extremely lightweight electronic device can be realized. In addition, since the display panel 6511 is extremely thin, a large-capacity battery 6518 can be installed while suppressing the thickness of the electronic device. In addition, by folding a portion of the display panel 6511 to provide a connection portion with the FPC 6515 on the back of the display portion 6502, an electronic device with a narrow frame can be realized.

[0626] Fig.26C 100 shows an example of a television set. In a television set 7100, a display portion 7000 is incorporated in a housing 7101. Here, a structure in which the housing 7101 is supported by a stand 7103 is shown.

[0627] The display device of one embodiment of the present invention can be applied to the display portion 7000 .

[0628] The operation can be performed by using the operation switch provided in the housing 7101 and the remote control operation machine 7111 provided separately. Fig.26C In addition, the display unit 7000 may be provided with a touch sensor, and the television unit 7100 may be operated by touching the display unit 7000 with a finger or the like. In addition, the remote control unit 7111 may be provided with a display unit that displays information output from the remote control unit 7111. By using the operation keys or the touch panel provided in the remote control unit 7111, the channel and volume can be operated, and the image displayed on the display unit 7000 can be operated.

[0629] In addition, the television device 7100 includes a receiver and a modem. The receiver can receive general television broadcasts. Furthermore, the modem can be connected to a wired or wireless communication network to perform one-way (from a sender to a receiver) or two-way (between a sender and a receiver or between receivers, etc.) information communication.

[0630] Fig.26D 1 shows an example of a notebook personal computer. The notebook personal computer 7200 includes a housing 7211 , a keyboard 7212 , a pointing device 7213 , an external connection port 7214 , and the like. A display portion 7000 is incorporated in the housing 7211 .

[0631] The display device of one embodiment of the present invention can be applied to the display portion 7000 .

[0632] Fig.26E and Fig.26F An example of digital signage is shown.

[0633] Fig.26E The digital signage 7300 shown includes a housing 7301, a display unit 7000, a speaker 7303, etc. In addition, an LED lamp, operation keys (including a power switch or an operation switch), a connection terminal, various sensors, a microphone, etc. may be included.

[0634] Fig.26F The digital signage 7400 is shown to be disposed on a cylindrical pillar 7401. The digital signage 7400 includes a display unit 7000 disposed along a curved surface of the pillar 7401.

[0635] exist Fig.26E and Fig.26F In the embodiment of the present invention, the display device can be used for the display portion 7000.

[0636] The larger the display unit 7000 is, the more information can be provided at one time. The larger the display unit 7000 is, the easier it is to attract people's attention, for example, the advertising effect can be improved.

[0637] By using a touch panel for the display unit 7000, not...

Claims

1. A transistor comprising a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, a second insulating layer and a semiconductor layer, in, The first insulating layer is disposed on the first conductive layer and includes an opening reaching the first conductive layer and a recess surrounding the opening when viewed from a plane. The second conductive layer is provided so as to cover the inner wall of the recess and has a region facing the semiconductor layer via the first insulating layer. The semiconductor layer is arranged in contact with the inner wall and the bottom surface of the opening, The second insulating layer is arranged in contact with the top surface of the semiconductor layer, Furthermore, the third conductive layer is provided on the second insulating layer so as to cover the inner wall of the opening, and has a region facing the semiconductor layer via the second insulating layer.

2. The transistor according to claim 1, The semiconductor layer includes an oxide semiconductor.

3. The transistor according to claim 1 or 2, The first insulating layer has a stacked structure of a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer. Furthermore, the third insulating layer and the fifth insulating layer have regions whose film density is higher than that of the fourth insulating layer.

4. The transistor according to claim 1 or 2, When viewed from a cross section, the width of the opening on the second conductive layer side is greater than the width of the opening on the first conductive layer side, And when viewed from a cross section, the width of the recess on the second conductive layer side is greater than the width of the recess on the first conductive layer side.

5. The transistor according to claim 1 or 2, When viewed from a cross section, the width of the opening on the second conductive layer side is greater than the width of the opening on the first conductive layer side, And when viewed from a cross section, the width of the recess on the second conductive layer side is smaller than the width of the recess on the first conductive layer side.

6. The transistor according to claim 1 or 2, When the length of the side of the first insulating layer contacting the semiconductor layer when viewed from a cross section is set to L1, and the length of the region of the second conductive layer opposite to the semiconductor layer across the first insulating layer when viewed from a cross section is set to L2, L2 is greater than 0.5 times and less than 1.0 times L1.

7. A transistor comprising a first conductive layer, a second conductive layer, a third conductive layer, a first insulating layer, a second insulating layer and a semiconductor layer, in, The first insulating layer is disposed on the first conductive layer and includes a first opening reaching the first conductive layer and a recess surrounding the opening when viewed from a plane. The semiconductor layer is in contact with the inner wall and bottom surface of the opening and the top surface of the first insulating layer. The second conductive layer is provided in a manner covering the inner wall of the recess and has a region in contact with the semiconductor layer and a region facing the semiconductor layer via the first insulating layer. The second insulating layer is arranged in contact with the top surface of the semiconductor layer, Furthermore, the third conductive layer is provided on the second insulating layer so as to cover the inner wall of the opening, and has a region facing the semiconductor layer via the second insulating layer.

8. The transistor according to claim 7, The semiconductor layer includes an oxide semiconductor.

9. The transistor according to claim 7 or 8, The first insulating layer has a stacked structure of a third insulating layer, a fourth insulating layer on the third insulating layer, and a fifth insulating layer on the fourth insulating layer. Furthermore, the third insulating layer and the fifth insulating layer have regions whose film density is higher than that of the fourth insulating layer.

10. The transistor according to claim 7 or 8, When viewed from a cross section, the width of the opening on the second conductive layer side is greater than the width of the opening on the first conductive layer side, And when viewed from a cross section, the width of the recess on the second conductive layer side is greater than the width of the recess on the first conductive layer side.

11. The transistor according to claim 7 or 8, When viewed from a cross section, the width of the opening on the second conductive layer side is greater than the width of the opening on the first conductive layer side, And when viewed from a cross section, the width of the recess on the second conductive layer side is smaller than the width of the recess on the first conductive layer side.

12. The transistor according to claim 7 or 8, When the length of the side of the first insulating layer contacting the semiconductor layer when viewed from a cross section is set to L1, and the length of the region of the second conductive layer opposite to the semiconductor layer across the first insulating layer when viewed from a cross section is set to L2, L2 is greater than 0.5 times and less than 1.0 times L1.

13. A method for manufacturing a transistor, comprising the following steps: forming a first conductive layer; forming a first insulating layer on the first conductive layer; processing the first insulating layer to form a recess in the first insulating layer; forming a second insulating layer in a manner of covering a top surface of the first insulating layer; forming a first conductive film on the second insulating layer; The first conductive film is processed to form a second conductive layer, and then an opening reaching the first conductive layer is formed in a region surrounded by the recessed portion when viewed from a plane; forming a metal oxide film in a manner covering a top surface of the second conductive layer, an inner wall of the opening, and a bottom surface of the opening; processing the metal oxide film to form a semiconductor layer in a manner having a region overlapping with an inner wall of the opening; forming a third insulating layer in a manner of covering the semiconductor layer and the top surface of the second conductive layer; forming a second conductive film on the third insulating layer; as well as The second conductive film is processed to form a third conductive layer having a region overlapping with the opening.

14. The method for manufacturing a transistor according to claim 13, After the first insulating layer is formed, a process of supplying oxygen to the first insulating layer is performed.

15. The method for manufacturing a transistor according to claim 13 or 14, The metal oxide film is formed by sputtering.

16. The method for manufacturing a transistor according to claim 13 or 14, The metal oxide film is formed using an ALD method.

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