Semiconductor light emitting device package and display apparatus

By configuring micro LEDs of different colors and assembly wiring in multiple areas on the semiconductor substrate, self-assembly is achieved using dielophoretic force, the problems of high transfer defect rate and low resolution of micro LEDs in the prior art are solved, and fast and accurate assembly and ultra-high resolution display effects are achieved.

CN119522651APending Publication Date: 2025-02-25LG ELECTRONICS INC
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Patent Information

Application Number
CN202280097961.1
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2022-07-15
Publication Date
2025-02-25

AI Technical Summary

Technical Problem

When the prior art quickly and accurately transfers millions of micro LEDs to large display panels, there is a problem of high transfer defect rate. Especially in self-assembly mode, the process time of red, green and blue light emitting devices is prone to color mixing, making it difficult to achieve full color and ultra-high resolution.

Method used

The semiconductor light emitting device packaging scheme is adopted, which includes the semiconductor substrate having multiple regions, and each region is equipped with semiconductor light emitting devices of different colors and assembly wiring, self-assembly is achieved through dielophoretic force, pixel spacing is reduced to improve resolution, and color mixing is prevented by the design of common pads and electrode pads.

Benefits of technology

It improves the assembly speed and accuracy of micro LEDs, reduces the transfer defect rate, prevents color mixing, and achieves an ultra-high resolution display effect.

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Abstract

The semiconductor light emitting device package includes a semiconductor substrate having a first region and a second region, a first semiconductor light emitting device on the first region of the semiconductor substrate, a pair of assembly wirings on the second region of the semiconductor substrate, a second semiconductor light emitting device on the pair of assembly wirings, and a third semiconductor light emitting device.
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Description

Technical Field

[0001] The present invention relates to a semiconductor light emitting device package and a display device. Background Art

[0002] Large-area displays include liquid crystal displays (LCD), OLED displays, and micro-LED displays (Micro-LEDdisplay).

[0003] The micro LED display is a display using a micro LED, which is a semiconductor light emitting device having a diameter or a cross-sectional area of ​​100 μm or less, as a display device.

[0004] Since the micro LED display uses micro LEDs of semiconductor light-emitting devices as display devices, it has excellent performance in many characteristics such as light-to-dark ratio, response speed, color reproduction rate, viewing angle, brightness, resolution, lifespan, luminous efficiency or luminance.

[0005] In particular, the micro LED display can separate and combine the screen in a modular manner, and therefore has the advantages of being able to freely adjust the size or resolution and being able to realize a flexible display.

[0006] However, large-scale micro-LED displays require more than millions of micro-LEDs, and there is a technical problem that it is difficult to quickly and accurately transfer the micro-LEDs to the display panel.

[0007] Transfer technologies that have been developed in recent years include a pick and place process, a laser lift-off method, and a self-assembly method.

[0008] Among them, the self-assembly method is a method in which the semiconductor light-emitting device finds the assembly position in the fluid by itself, which is a method that is conducive to realizing a large-screen display device.

[0009] However, research on the technology of manufacturing displays through self-assembly of micro-LEDs is incomplete.

[0010] In particular, in the prior art, when millions or more semiconductor light-emitting devices are quickly transferred to a large display, although the transfer speed can be increased, the transfer error rate may increase, thus causing a technical problem of reduced transfer yield.

[0011] In the related art, although attempts are being made to utilize a transfer process using a self-assembly method of dielectrophoresis (DEP), there is a problem of reduced self-assembly rate due to the non-uniformity of the dielectrophoretic force (DEP Force).

[0012] On the other hand, in the self-assembly method, since the red light-emitting device, the green light-emitting device, and the blue light-emitting device are subjected to the input process, the assembly process, and the recycling process respectively, there is a problem that the process time is too long. In addition, when the light-emitting device that was not recycled in the previous process is assembled together with other light-emitting devices, there is a problem that color mixing occurs because the light-emitting device emitting light of other colors is assembled into a specific color area, making it difficult to achieve full color.

[0013] On the other hand, since red light-emitting devices, green light-emitting devices, and blue light-emitting devices need to be arranged in pixels of a display substrate, it is difficult to reduce the size of the pixels, thereby making it difficult to achieve ultra-high resolution. Summary of the invention

[0014] Problem that the invention aims to solve

[0015] The present invention aims to solve the above-mentioned problems and other problems.

[0016] Another object of the present invention is to provide a light emitting device package and a display device capable of improving assembly speed.

[0017] In addition, another object of the present invention is to provide a light emitting device package and a display device capable of preventing poor color mixing.

[0018] In addition, another object of the present invention is to provide a light emitting device package and a display device capable of achieving ultra-high resolution.

[0019] The technical problems of the present invention are not limited to the problems described in this claim, and include problems that can be understood from the description of the invention.

[0020] Technical solutions to the problem

[0021] In order to achieve the above or other purposes, according to one aspect of the present invention, a semiconductor light-emitting device package includes: a semiconductor substrate having a first area and a second area; a first semiconductor light-emitting device located on the first area of ​​the semiconductor substrate; a pair of assembly wirings located on the second area of ​​the semiconductor substrate; and a second semiconductor light-emitting device and a third semiconductor light-emitting device located on the pair of assembly wirings.

[0022] The semiconductor substrate may share the first conductive type semiconductor layer of the first semiconductor light emitting device.

[0023] The semiconductor substrate may have a third region, and the second region may be located between the first region and the third region. In this case, the semiconductor light emitting device package may include: a fourth semiconductor light emitting device located on the third region of the semiconductor substrate; and a fifth semiconductor light emitting device and a sixth semiconductor light emitting device located on a pair of the assembly wirings.

[0024] The first and fourth semiconductor light emitting devices may be blue semiconductor light emitting devices, the second and fifth semiconductor light emitting devices may be green semiconductor light emitting devices, and the third and sixth semiconductor light emitting devices may be red semiconductor light emitting devices.

[0025] The first semiconductor light emitting device, the second semiconductor light emitting device, and the third semiconductor light emitting device may constitute a first pixel, and the fourth semiconductor light emitting device, the fifth semiconductor light emitting device, and the sixth semiconductor light emitting device may constitute a second pixel.

[0026] The first semiconductor light emitting device, the second semiconductor light emitting device, and the third semiconductor light emitting device may constitute a pixel, and the fourth semiconductor light emitting device, the fifth semiconductor light emitting device, and the sixth semiconductor light emitting device may constitute a dummy pixel.

[0027] The third semiconductor light emitting device and the sixth semiconductor light emitting device may be disposed between the second semiconductor light emitting device and the fifth semiconductor light emitting device.

[0028] The third semiconductor light emitting device and the sixth semiconductor light emitting device may be symmetrical to each other with respect to a length direction of the pair of assembly wirings.

[0029] The third semiconductor light emitting device may be arranged on a first assembly wiring of the pair of assembly wirings, and the sixth semiconductor light emitting device may be arranged on a second assembly wiring of the pair of assembly wirings.

[0030] The first conductive type semiconductor layer of the third semiconductor light emitting device may be connected to the first conductive type semiconductor layer of the sixth semiconductor light emitting device.

[0031] The semiconductor light emitting device package may include: a first common pad connected on the first upper side of each of the first semiconductor light emitting device, the second semiconductor light emitting device and the third semiconductor light emitting device; and a first electrode pad extending horizontally from the second upper side of the third semiconductor light emitting device toward the second upper side of the first semiconductor light emitting device.

[0032] The semiconductor light emitting device package may include: a second common pad, which is connected on the first upper side of each of the fourth semiconductor light emitting device, the fifth semiconductor light emitting device and the sixth semiconductor light emitting device; and a second electrode pad, which extends horizontally from the second upper side of the sixth semiconductor light emitting device toward the second upper side of the fourth semiconductor light emitting device.

[0033] The first common pad and the second common pad may be located on a diagonal line.

[0034] The semiconductor light emitting device package may include: a first insulating layer located between the second region of the semiconductor substrate and a pair of the assembly wirings; a second insulating layer located at the periphery of each of the second semiconductor light emitting device, the third semiconductor light emitting device, the fifth semiconductor light emitting device and the sixth semiconductor light emitting device; and a third insulating layer located on the first semiconductor light emitting device to the sixth semiconductor light emitting device.

[0035] Each of the second, third, fifth, and sixth semiconductor light emitting devices may include a magnetic layer.

[0036] A pair of the built-up wirings may include a magnetic layer.

[0037] According to another aspect of the present invention, a display device includes: a display substrate including a plurality of pixels; a pair of first assembly wirings corresponding to each of the plurality of pixels; a partition wall including a pair of assembly holes on the first assembly wirings; a semiconductor light-emitting device package located at the assembly holes; the semiconductor light-emitting device package includes: a semiconductor substrate having a first area and a second area; a first semiconductor light-emitting device located on the first area of ​​the semiconductor substrate; a pair of second assembly wirings located on the second area of ​​the semiconductor substrate; and a second semiconductor light-emitting device and a third semiconductor light-emitting device located on the pair of second assembly wirings.

[0038] Effects of the Invention

[0039] like Figure 9a As shown, a semiconductor light emitting device package 350 including a plurality of semiconductor light emitting devices 421, 422, 423 capable of displaying images is assembled on a display substrate 310 by a self-assembly method, thereby preventing assembly defects caused by assembling a plurality of semiconductor light emitting devices separately and greatly improving assembly speed.

[0040] When a plurality of semiconductor light emitting devices are assembled separately, color mixing failure may occur when the semiconductor light emitting device is assembled into another assembly hole. However, by assembling the semiconductor light emitting device package 350 including the plurality of semiconductor light emitting devices 421, 422, 423 as in the present invention, color mixing failure can be prevented.

[0041] When a plurality of semiconductor light emitting devices are assembled separately, assembly holes for assembling these semiconductor light emitting devices are provided on the display substrate. In such a case, a minimum spacing distance between the plurality of assembly holes is required, so it is difficult to achieve high pixels. However, as in the present invention, as a semiconductor light emitting device package 350 including a plurality of semiconductor light emitting devices 421 to 426 is manufactured using a semiconductor process, the spacing distance between the semiconductor light emitting devices 421 to 426 can be reduced. In this way, a display device ( Figure 7 and Figure 8 300), enabling ultra-high resolution.

[0042] On the other hand, Fig.13 As shown, the semiconductor light emitting device package 350 of the present invention may include a plurality of semiconductor light emitting devices 421 to 426 to constitute two pixels PX1 and PX2, thereby further improving the resolution.

[0043] In addition, if Fig.14 As shown, the semiconductor light emitting device package 350 of the present invention includes a plurality of semiconductor light emitting devices 421 to 426 to constitute a pixel PX and a virtual pixel PX_D, so that even if the semiconductor light emitting devices 421 to 423 in the pixel PX fail, they can be replaced by the semiconductor light emitting devices 424 to 426 in the virtual pixel PX_D, thereby significantly improving the yield.

[0044] The applicable additional scope of the embodiment can be clearly seen from the following detailed description. However, since those skilled in the art can clearly understand the various changes and modifications within the concept and scope of the present invention, it should be understood that the detailed description and specific embodiments such as the preferred embodiments are provided only as examples. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 The living room of a house in which the display device according to the embodiment is installed is shown.

[0046] Figure 2 This is a block diagram schematically showing a display device according to the embodiment.

[0047] Figure 3 It is shown Figure 2A circuit diagram of an example of a pixel in FIG.

[0048] Figure 4 yes Figure 1 An enlarged view of the first panel area in the display device in FIG.

[0049] Figure 5 yes Figure 4 Magnified view of the A2 area in .

[0050] Figure 6 This is a diagram showing an example in which the light emitting device according to the embodiment is assembled on a substrate by a self-assembly method.

[0051] Figure 7 It is a diagram showing a display device according to an embodiment.

[0052] Figure 8 It is a cross-sectional view schematically showing a display device according to the embodiment.

[0053] Figure 9a is a top view showing a semiconductor light emitting device package according to an embodiment.

[0054] Figure 9b FIG. 1 is a bottom view showing a semiconductor light emitting device package according to an embodiment.

[0055] Fig.10a yes Figure 9a 4 is a cross-sectional view taken along line D1 - D2 of a semiconductor light emitting device package of an embodiment.

[0056] Fig.10b yes Figure 9a A cross-sectional view taken along line E1-E2 of a semiconductor light emitting device package of an embodiment.

[0057] Fig.10c yes Figure 9a 4 is a cross-sectional view taken along line F1-F2 of a semiconductor light emitting device package of an embodiment.

[0058] Fig.11a is a top view showing a third semiconductor light emitting device and a sixth semiconductor light emitting device.

[0059] Fig.11b is a cross-sectional view showing a third semiconductor light emitting device and a sixth semiconductor light emitting device.

[0060] Fig.12 A plurality of semiconductor light emitting device packages fabricated on a wafer are shown.

[0061] Fig.13 Two pixels constituted by the first to sixth semiconductor light emitting devices are shown.

[0062] Fig.14One pixel and one dummy pixel constituted by the first to sixth semiconductor light emitting devices are shown.

[0063] Figures 15 to 34 The manufacturing process of the semiconductor light emitting device package of the embodiment is shown.

[0064] Fig.35a and Fig.35b The process of manufacturing a display device by using a transfer method based on the semiconductor light emitting device package of the embodiment is shown.

[0065] The sizes, shapes, values, etc. of the multiple components shown in the drawings may be different from the actual ones. In addition, even if the same component is shown in different sizes, shapes, values, etc. in the drawings, this is only an example in the drawings, and the same component may have the same sizes, shapes, values, etc. in the drawings. DETAILED DESCRIPTION

[0066] Hereinafter, with reference to the accompanying drawings, the embodiments disclosed in this specification are described in detail, but regardless of the figure numerals, the same or similar structural elements are given the same figure numerals, and repeated descriptions thereof are omitted. The suffixes "module" and "unit" used in the following description for the constituent elements are given or mixed in consideration of the ease of writing the specification, and do not have the meaning or function of distinguishing each other. In addition, the accompanying drawings are intended to make it easy to understand the embodiments disclosed in this specification, and the technical ideas disclosed in this specification are not limited to the accompanying drawings. In addition, when it is mentioned that an element such as a layer or region or a substrate exists "on" another constituent element, it includes being directly present on another element or other intermediate elements may exist between the two.

[0067] The display devices described in this specification may include TVs, billboards, mobile phones, smart phones, HUDs (head-up displays) for automobiles, backlight units for laptop computers, VR or AR displays, etc. However, even in new product forms developed later, the configurations of the embodiments described in this specification may be applied to display devices.

[0068] Hereinafter, a light emitting device according to an embodiment and a display device including the same will be described.

[0069] Figure 1 The living room of a house in which the display device according to the embodiment is installed is shown.

[0070] Reference Figure 1The display device 100 of the embodiment can display the status of various electronic products such as a washing machine 101, a sweeping robot 102, and an air purifier 103, can communicate with each electronic product based on IOT, and can also control each electronic product based on user setting data.

[0071] The display device 100 of the embodiment may include a flexible display made on a thin and flexible substrate. The flexible display can be bent or rolled like paper while maintaining the characteristics of an existing flat panel display.

[0072] The visual information in the flexible display can be realized by independently controlling the light emission of unit pixels (unitpixel) configured in a matrix form. The unit pixel represents the smallest unit for realizing a color. The unit pixel of the flexible display can be realized by using a light-emitting device. The light-emitting device in the embodiment can be a micro-LED (Micro-LED) or a nano-LED (Nano-LED), but is not limited thereto.

[0073] Figure 2 is a block diagram schematically showing a display device of an embodiment, Figure 3 It is shown Figure 2 A circuit diagram of an example of a pixel in FIG.

[0074] Reference Figure 2 and Figure 3 The display device of the embodiment may include a display panel 10 , a driving circuit 20 , a scan driving unit 30 , and a power supply circuit 50 .

[0075] The display device 100 of the embodiment may drive the light emitting devices in an active matrix (AM) mode or a passive matrix (PM) mode.

[0076] The driving circuit 20 may include a data driving section 21 and a timing control section 22 .

[0077] The display panel 10 may be configured in a rectangular shape, but is not limited thereto. That is, the display panel 10 may be formed in a circular or elliptical shape. At least one side of the display panel 10 may be formed to be curved with a predetermined curvature.

[0078] The display panel 10 can be divided into a display area DA and a non-display area NDA arranged around the display area DA. The display area DA is an area where a plurality of pixels PX are formed and an image is displayed. The display panel 10 may include: a plurality of data lines D1 to Dm (m is an integer greater than 2); a plurality of scan lines S1 to Sn (n is an integer greater than 2), intersecting the plurality of data lines D1 to Dm; a high potential voltage line VDDL, supplying a high potential voltage; a low potential voltage line VSSL, supplying a low potential voltage; and a plurality of pixels PX, connected to the plurality of data lines D1 to Dm and the plurality of scan lines S1 to Sn.

[0079] Each pixel PX may include a first sub-pixel PX1, a second sub-pixel PX2, and a third sub-pixel PX3. The first sub-pixel PX1 may emit a first color light of a first main wavelength, the second sub-pixel PX2 may emit a second color light of a second main wavelength, and the third sub-pixel PX3 may emit a third color light of a third main wavelength. The first color light may be red light, the second color light may be green light, and the third color light may be blue light, but is not limited thereto. In addition, Figure 2 In the example, each pixel PX includes three sub-pixels, but the present invention is not limited thereto. That is, each pixel PX may include more than four sub-pixels.

[0080] Each of the first subpixel PX1, the second subpixel PX2 and the third subpixel PX3 may be connected to at least one of the plurality of data lines D1-Dm, at least one of the plurality of scan lines S1-Sn and the high potential voltage line VDDL. Figure 3 As shown, it includes a plurality of light emitting devices LD, a plurality of transistors for supplying current to the plurality of light emitting devices LD, and at least one capacitor Cst.

[0081] Although not shown, each of the first subpixel PX1 , the second subpixel PX2 , and the third subpixel PX3 may also include only one light emitting device LD and at least one capacitor Cst.

[0082] Each light emitting device LD may be a semiconductor light emitting diode including a first electrode, a plurality of conductive semiconductor layers and a second electrode. Here, the first electrode may be an anode, and the second electrode may be a cathode, but is not limited thereto.

[0083] The light emitting device LD may be one of a horizontal type light emitting device, a flip chip type light emitting device, and a vertical type light emitting device.

[0084] Multiple transistors can be Figure 3As shown, it includes: a driving transistor DT, which supplies current to a plurality of light-emitting devices LD; and a scanning transistor ST, which supplies a data voltage to the gate electrode of the driving transistor DT. The driving transistor DT may include: a gate electrode connected to the source electrode of the scanning transistor ST; a source electrode connected to a high potential voltage line VDDL to which a high potential voltage is applied; and a drain electrode connected to the first electrode of the plurality of light-emitting devices LD. The scanning transistor ST may include: a gate electrode connected to a scanning line Sk (k is an integer satisfying 1≤k≤n); a source electrode connected to the gate electrode of the driving transistor DT; and a drain electrode connected to a data line Dj (j is an integer satisfying 1≤j≤m).

[0085] The capacitor Cst is formed between the gate electrode and the source electrode of the driving transistor DT. The storage capacitor Cst charges the difference between the gate voltage and the source voltage of the driving transistor DT.

[0086] The driving transistor DT and the scanning transistor ST may be formed by thin film transistors. Figure 3 In the embodiment, the driving transistor DT and the scanning transistor ST are described with the focus on being formed by a P-type MOSFET (Metal Oxide Semiconductor Field Effect Transistor), but the present invention is not limited thereto. The driving transistor DT and the scanning transistor ST may also be formed by an N-type MOSFET. In this case, the positions of the source electrode and the drain electrode of the driving transistor DT and the scanning transistor ST may be changed.

[0087] in addition, Figure 3 It is illustrated that each of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 includes a 2T1C (2Transistor-1capacitor; two transistors-one capacitor) having a driving transistor DT, a scanning transistor ST, and a capacitor Cst, but the present invention is not limited thereto. Each of the first subpixel PX1, the second subpixel PX2, and the third subpixel PX3 may include a plurality of scanning transistors ST and a plurality of capacitors Cst.

[0088] The second sub-pixel PX2 and the third sub-pixel PX3 can be represented by substantially the same circuit diagram as the first sub-pixel PX1 , and thus detailed description thereof will be omitted.

[0089] The driving circuit 20 outputs signals and voltages for driving the display panel 10. To this end, the driving circuit 20 may include a data driving part 21 and a timing control part 22.

[0090] The timing control unit 22 receives digital video data DATA and timing signals from the host system. The timing signals may include a vertical sync signal, a horizontal sync signal, a data enable signal, and a dot clock. The host system may be an application processor of a smartphone or tablet computer, a display, a system-on-chip of a TV, etc.

[0091] The timing control unit 22 generates control signals for controlling the operation timing of the data driving unit 21 and the scan driving unit 30. The control signals may include a source control signal DCS for controlling the operation timing of the data driving unit 21 and a scan control signal SCS for controlling the operation timing of the scan driving unit 30.

[0092] The scan driving unit 30 may receive a scan control signal SCS from the timing control unit 22. The scan driving unit 30 generates a scan signal according to the scan control signal SCS and supplies the scan signal to the plurality of scan lines S1 to Sn of the display panel 10. The scan driving unit 30 includes a plurality of transistors and is formed in the non-display area NDA of the display panel 10. Alternatively, the scan driving unit 30 may be formed by an integrated circuit, in which case, it may be mounted on a gate flexible film attached to the other side of the display panel 10.

[0093] The data driving unit 21 receives the digital video data DATA and the source control signal DCS from the timing control unit 22 . The data driving unit 21 converts the digital video data DATA into analog data voltages according to the source control signal DCS and supplies the analog data voltages to the plurality of data lines D1 to Dm of the display panel 10 .

[0094] The power supply circuit 50 can generate a voltage required for driving the display panel 10 from a main power source applied from a system board and supply it to the display panel 10. For example, the power supply circuit 50 can generate a high potential voltage VDD and a low potential voltage VSS for driving a plurality of light emitting devices LD of the display panel 10 from the main power source and supply them to a high potential voltage line VDDL and a low potential voltage line VSSL of the display panel 10. In addition, the power supply circuit 50 can generate a driving voltage for driving the driving circuit 20 and the scanning driving section 30 from the main power source and supply them.

[0095] Figure 4 yes Figure 3 An enlarged view of the first panel area in the display device in FIG.

[0096] Reference Figure 4 The display device 100 of the embodiment may be manufactured by tiling a plurality of panel regions such as the first panel region A1 and mechanically and electrically connecting them.

[0097] Alternatively, a single display panel may be formed by integrating a plurality of panel regions.

[0098] Figure 5 yes Figure 4 Magnified view of the A2 area in .

[0099] Reference Figure 5 The display device 100 of the embodiment may include a substrate 200, wiring harnesses 201 and 202, an insulating layer 206, and a plurality of semiconductor light emitting devices 150. The display device 100 may include more components than these.

[0100] The assembly wiring may include a first assembly wiring 201 and a second assembly wiring 202 that are separated from each other. The first assembly wiring 201 and the second assembly wiring 202 may be provided to generate a dielectrophoretic force (DEP force) for assembling the semiconductor light emitting device 150. For example, the semiconductor light emitting device 150 may be one of a horizontal semiconductor light emitting device, a flip chip semiconductor light emitting device, and a vertical semiconductor light emitting device.

[0101] Each semiconductor light emitting device 150 may include a red semiconductor light emitting device 150, a green semiconductor light emitting device 150G and a blue semiconductor light emitting device 150B to constitute a unit pixel (sub-pixel), but is not limited thereto. Red phosphors and green phosphors may also be provided to realize red and green, respectively.

[0102] The substrate 200 may be a supporting member for supporting a plurality of components disposed on the substrate 200 or a protective member for protecting the plurality of components.

[0103] The substrate 200 may be a rigid substrate or a flexible substrate. The substrate 200 may be formed of sapphire, glass, silicon or polyimide. In addition, the substrate 200 may include a flexible material such as PEN (Polyethylene Naphthalate) and PET (Polyethylene Terephthalate). In addition, the substrate 200 may be a transparent material, but is not limited thereto. The substrate 200 may function as a supporting substrate in a display panel, and may also function as an assembly substrate when a light-emitting device is self-assembled.

[0104] The substrate 200 may be Figure 2 and Figure 3The sub-pixels PX1 , PX2 , and PX3 are shown as having a backplane including circuits such as transistors ST, DT, capacitor Cst, signal wiring, etc., but are not limited thereto.

[0105] The insulating layer 206 may include an organic material having insulation and flexibility such as polyimide, PAC, PEN, PET, polymer, etc., or a silicon oxide (SiO2) or silicon nitride series (SiN x ) and the like can also be integrated with the substrate 200 to form a substrate.

[0106] The insulating layer 206 may be a conductive adhesive layer having adhesiveness and conductivity, and the conductive adhesive layer may be flexible and can play a flexible function of the display device. For example, the insulating layer 206 may be a conductive adhesive layer of an anisotropic conductive film (ACF) or a solution containing an anisotropic conductive medium or conductive particles. The conductive adhesive layer may be a layer having conductivity in a direction perpendicular to the thickness and electrical insulation in a direction horizontal to the thickness.

[0107] The insulating layer 206 may include an assembly hole 203 for inserting the semiconductor light emitting device 150. Therefore, when self-assembling, the semiconductor light emitting device 150 can be easily inserted into the assembly hole 203 of the insulating layer 206. The assembly hole 203 may be referred to as an insertion hole, a fixing hole, an alignment hole, etc. The assembly hole 203 may also be referred to as a hole.

[0108] The assembly hole 203 may be referred to as a hole, a slot, a groove, a recess, a pocket, or the like.

[0109] The assembly hole 203 may be different according to the shape of the semiconductor light emitting device 150. For example, the red semiconductor light emitting device, the green semiconductor light emitting device, and the blue semiconductor light emitting device may have different shapes, respectively, and may have an assembly hole 203 of a shape corresponding to the shape of each of these semiconductor light emitting devices. For example, the assembly hole 203 may include a first assembly hole for assembling a red semiconductor light emitting device, a second assembly hole for assembling a green semiconductor light emitting device, and a third assembly hole for assembling a blue semiconductor light emitting device. For example, the red semiconductor light emitting device may be circular, the green semiconductor light emitting device may be a first ellipse having a first short axis and a second long axis, and the blue semiconductor light emitting device may be a second ellipse having a second short axis and a second long axis, but is not limited thereto. The second long axis of the ellipse of the blue semiconductor light emitting device may be greater than the second long axis of the ellipse of the green semiconductor light emitting device, and the second short axis of the ellipse of the blue semiconductor light emitting device may be smaller than the first short axis of the ellipse of the green semiconductor light emitting device.

[0110] On the other hand, the semiconductor light emitting device 150 can be mounted on the substrate 200 by, for example, a self-assembly method ( Figure 6 ) and transfer methods, etc.

[0111] Figure 6 This is a diagram showing an example in which the light emitting device according to the embodiment is assembled on a substrate by a self-assembly method.

[0112] based on Figure 6 , an example of assembling a semiconductor light emitting device on a display panel by a self-assembly method using an electromagnetic field is described.

[0113] The assembly substrate 200 described later may function as a display substrate 200 a in the display apparatus after assembling the light emitting device, but the embodiment is not limited thereto.

[0114] Reference Figure 6 , the semiconductor light emitting device 150 can be put into the chamber 1300 filled with the fluid 1200, and the semiconductor light emitting device 150 can move toward the assembly substrate 200 under the action of the magnetic field generated by the assembly device 1100. At this time, the light emitting device 150 adjacent to the assembly hole 207H of the assembly substrate 200 can be assembled to the assembly hole 207H under the action of the dielectrophoretic force of the electric field of the plurality of assembly wirings. The fluid 1200 can be water such as ultrapure water, but is not limited thereto. The chamber can be called a water tank, a vessel, a container, etc.

[0115] After the semiconductor light emitting device 150 is placed in the chamber 1300 , the assembly substrate 200 may be disposed in the chamber 1300 . According to an embodiment, the assembly substrate 200 may also be placed in the chamber 1300 .

[0116] The semiconductor light emitting device 150 may be a horizontal type semiconductor light emitting device, a vertical type semiconductor light emitting device, or a flip chip type semiconductor light emitting device.

[0117] The semiconductor light emitting device 150 may include a magnetic layer (not shown) having a magnetic body. The magnetic layer may include a magnetic metal such as nickel (Ni). Since the semiconductor light emitting device 150 put into the fluid includes a magnetic layer, it can move toward the assembly substrate 200 under the action of the magnetic field generated by the assembly device 1100. The magnetic layer may be arranged on the upper side or the lower side of the light emitting device, or the magnetic layer may be arranged on both sides.

[0118] The semiconductor light emitting device 150 may include a passivation layer 156 surrounding the top surface and the side surface. The passivation layer 156 may be formed of an inorganic insulator such as silicon dioxide, aluminum oxide, etc. by PECVD (Plasma Enhanced Vapor Deposition; plasma enhanced chemical vapor deposition), LPCVD (Low Pressure Chemical Vapor Deposition; low pressure chemical vapor deposition), sputtering deposition, etc. In addition, the passivation layer 156 may be formed by a method of spin coating an organic substance such as a photoresist or a polymer substance.

[0119] The semiconductor light emitting device 150 may include a first conductive semiconductor layer, a second conductive semiconductor layer, and an active layer disposed therebetween. The first conductive semiconductor layer may be an n-type semiconductor layer, and the second conductive semiconductor layer may be a p-type semiconductor layer, but is not limited thereto. The first conductive semiconductor layer, the second conductive semiconductor layer, and the active layer disposed therebetween may constitute a light emitting portion. The light emitting portion may be referred to as a light emitting layer, a light emitting region, etc.

[0120] The first electrode (layer) may be disposed below the first conductive semiconductor layer, and the second electrode (layer) may be disposed above the second conductive semiconductor layer. For this purpose, a portion of the first conductive semiconductor layer or the second conductive semiconductor layer may be exposed to the outside. Thus, after the semiconductor light emitting device 150 is assembled on the assembly substrate 200, a portion of the passivation layer may be etched during the manufacturing process of the display device.

[0121] The first electrode may include at least one or more layers. For example, the first electrode may include a resistance layer, a reflective layer, a magnetic layer, a conductive layer, an anti-oxidation layer, an adhesive layer, etc. The resistance layer may include Au (gold), AuBe (gold beryllium alloy), etc. The reflective layer may include Al (aluminum), Ag (silver), etc. The magnetic layer may include Ni (nickel), Co (cobalt), etc. The conductive layer may include Cu (copper), etc. The anti-oxidation layer may include Mo (molybdenum), etc. The adhesive layer may include Cr (chromium), Ti (titanium), etc.

[0122] The second electrode may include a transparent conductive layer. For example, the second electrode may include ITO (indium tin oxide), IZO (indium zinc oxide), etc.

[0123] The assembly substrate 200 may include a pair of first assembly wiring 201 and second assembly wiring 202 corresponding to each semiconductor light emitting device 150 to be assembled. The first assembly wiring 201 and the second assembly wiring 202 may be formed by a single metal or a metal alloy, a metal oxide, etc., which are stacked in multiple layers. For example, each of the first assembly wiring 201 and the second assembly wiring 202 may contain at least one of Cu, Ag, Ni, Cr, Ti, Al, Rh (rhodium), Pd (palladium), Ir (iridium), Ru (ruthenium), Mg (magnesium), Zn (zinc), Pt (platinum), Au, and Hf (hafnium), but is not limited thereto.

[0124] As the AC voltage is applied, the first assembly wiring 201 and the second assembly wiring 202 form an electric field, and the semiconductor light emitting device 150 inserted into the assembly hole 207H can be fixed by the dielectrophoretic force of the electric field. The interval between the first assembly wiring 201 and the second assembly wiring 202 can be smaller than the width of the semiconductor light emitting device 150 and the width of the assembly hole 207H, and the assembly position of the semiconductor light emitting device 150 using the electric field can be fixed more precisely.

[0125] An insulating layer 215 is formed on the first assembled wiring 201 and the second assembled wiring 202, so that the first assembled wiring 201 and the second assembled wiring 202 can be protected from the influence of the fluid 1200, and the leakage of the current flowing to the first assembled wiring 201 and the second assembled wiring 202 can be prevented. As an example, the insulating layer 215 can be an inorganic insulator such as silicon dioxide, aluminum oxide, or an organic insulator formed in a single layer or multiple layers. The insulating layer 215 can have a minimum thickness for preventing the first assembled wiring 201 and the second assembled wiring 202 from being damaged when assembling the semiconductor light-emitting device 150, and can have a maximum thickness for stably assembling the semiconductor light-emitting device 150.

[0126] A partition wall 207 may be formed on the upper portion of the insulating layer 215 . A portion of the partition wall 207 may be located on the upper portion of the first and second assembly wirings 201 and 202 , and the remaining portion may be located on the upper portion of the assembly substrate 200 .

[0127] On the other hand, when manufacturing the assembly substrate 200 , the assembly hole 207H for each of the semiconductor light emitting devices 150 to be coupled and assembled to the assembly substrate 200 may be formed by removing a portion of the partition wall formed on the upper portion of the insulating layer 215 .

[0128] The assembly substrate 200 is formed with an assembly hole 207H for the semiconductor light emitting device 150 to be assembled, and the surface formed with the assembly hole 207H can be in contact with the fluid 1200. The assembly hole 207H can guide the semiconductor light emitting device 150 to an accurate assembly position.

[0129] On the other hand, the assembly hole 207H may have a shape and size corresponding to the shape of the semiconductor light emitting device 150 to be assembled at the corresponding position, thereby preventing other semiconductor light emitting devices or a plurality of semiconductor light emitting devices from being assembled into the assembly hole 207H.

[0130] Refer again Figure 6 After the assembly substrate 200 is disposed in the chamber, the assembly device 1100 applying a magnetic field may move along the assembly substrate 200. The assembly device 1100 may be a permanent magnet or an electromagnet.

[0131] In order to maximize the area covered by the magnetic field in the fluid 1200, the assembly device 1100 may move in contact with the assembly substrate 200. According to an embodiment, the assembly device 1100 may also include a plurality of magnetic bodies or magnetic bodies of a size corresponding to the assembly substrate 200. In this case, the moving distance of the assembly device 1100 may also be limited within a specified range.

[0132] Under the effect of the magnetic field generated by the assembly device 1100 , the semiconductor light emitting device 150 in the chamber 1300 can move toward the assembly device 1100 and the assembly substrate 200 .

[0133] During the process of moving toward the assembly apparatus 1100 , the semiconductor light emitting device 150 can move toward the assembly hole 207H and be fixed due to the dielectrophoretic force formed by the electric field between the assembly wirings 201 and 202 .

[0134] Specifically, the first assembly wiring 201 and the second assembly wiring 202 can form an electric field using an AC power supply, and under the action of the electric field, a dielectrophoretic force can be formed between the assembly wirings 201 and 202. Under the action of the dielectrophoretic force, the semiconductor light emitting device 150 can be fixed to the assembly hole 207H on the assembly substrate 200.

[0135] At this time, a predetermined solder layer (not shown) is formed between the light emitting device 150 mounted in the mounting hole 207H of the mounting substrate 200 and the mounting wires 201 and 202 , thereby improving the bonding strength of the light emitting device 150 .

[0136] In addition, after assembly, a molding layer (not shown) may be formed on the assembly hole 207H of the assembly substrate 200. The molding layer may be a resin containing a transparent resin or a resin containing a reflective material or a scattering material.

[0137] By using the above-mentioned self-assembly method using an electromagnetic field, the time required to assemble each semiconductor light-emitting device onto a substrate can be greatly shortened, thereby enabling a faster and more economical large-area high-pixel display.

[0138] Below, refer to Figure 7 to Figure 35b , various embodiments for solving the above problems are described. The following omitted descriptions can be related to Figures 1 to 6 and the related drawings can be easily understood from the above description.

[0139] [Self-assembly method]

[0140] Figure 7 It is a diagram showing a display device according to an embodiment. Figure 8 It is a cross-sectional view schematically showing a display device according to the embodiment. Figure 9a is a top view showing a semiconductor light emitting device package according to an embodiment. Figure 9b FIG. 1 is a bottom view showing a semiconductor light emitting device package according to an embodiment. Fig.10a yes Figure 9a 4 is a cross-sectional view taken along line D1 - D2 of a semiconductor light emitting device package of an embodiment. Fig.10b yes Figure 9a A cross-sectional view taken along line E1-E2 of a semiconductor light emitting device package of an embodiment. Fig.10c yes Figure 9a 4 is a cross-sectional view taken along line F1-F2 of a semiconductor light emitting device package of an embodiment.

[0141] Reference Figure 7 and Figure 8 The display device 300 of the embodiment may include a display substrate 310 , a plurality of semiconductor light emitting device packages 350 , and a first signal line group 361 .

[0142] The display substrate 310 may function as a supporting member that supports various components of the display device 300 .

[0143] A plurality of assembly holes 340H may be provided on the display substrate 310. For example, a partition wall 340 may be disposed on the display substrate 310, and a plurality of assembly holes 340H may be formed on the partition wall 340.

[0144] A plurality of pixels PX may be defined on the display substrate 310. For example, at least one assembly hole 340H may be provided in one pixel PX. The semiconductor light emitting device package 350 may be disposed in the assembly hole 340H of the partition wall 340. Therefore, at least one semiconductor light emitting device package 350 may be provided in one pixel PX.

[0145] The semiconductor light emitting device package 350 of the embodiment can be assembled in the assembly hole 340H by a self-assembly method. Figure 6 , the self-assembly method is described in detail above, so the detailed description is omitted.

[0146] In the embodiment, the plurality of semiconductor light emitting device packages 350 may be assembled in the plurality of assembly holes 340H by a self-assembly method. To this end, the assembly holes 340H of the display substrate 310 may be provided with first assembly wiring 321 and second assembly wiring 322, and in order to insulate the first assembly wiring 321 and the second assembly wiring 322, an insulating layer 330 (hereinafter referred to as the first insulating layer) may be provided on the first assembly wiring 321 and the second assembly wiring 322. In this case, the bottom of the assembly hole 340H may be a portion of the top surface of the first insulating layer 330. That is, a portion of the top surface of the first insulating layer 330 may be exposed through the assembly hole 340H.

[0147] For example, the shape of the assembly hole 340H may correspond to the shape of the semiconductor light emitting device package 350. In the embodiment, the semiconductor light emitting device package 350 has a quadrilateral shape when viewed from above, and thus the assembly hole 340H may also have a quadrilateral shape. For example, the size of the assembly hole 340H may be larger than the size of the semiconductor light emitting device package 350. That is, when the semiconductor light emitting device package 350 is inserted into the assembly hole 340H, the outer side surface of the semiconductor light emitting device package 350 may be spaced apart from the inner side surface of the assembly hole 340H.

[0148] According to an embodiment, the semiconductor light emitting device package 350 and the assembly hole 340H have a quadrilateral. Therefore, when the semiconductor light emitting device package 350 is assembled in the assembly hole 340H, under the action of the quadrilateral of the assembly hole 340H, the semiconductor light emitting device package 350 may not rotate and maintain the current assembly state, thereby enhancing the fixing force of the semiconductor light emitting device package 350.

[0149] After the semiconductor light emitting device package 350 is assembled to the assembly hole 340H, an insulating layer 360 (hereinafter referred to as a second insulating layer) may be formed on the semiconductor light emitting device package 350 and the partition wall 340. Although not shown, a black matrix may be disposed between the pixels PX in order to distinguish between the pixels PX. The black matrix may be disposed on the partition wall 340 except the assembly hole 340H between the partition wall 340 and the second insulating layer 360, but is not limited thereto.

[0150] On the other hand, the semiconductor light emitting device package 350 can generate a plurality of different color lights. A color image can be displayed by the plurality of color lights. The plurality of semiconductor light emitting device packages 350 can be respectively configured in the plurality of pixels PX.

[0151] The semiconductor light emitting device package 350 of the embodiment may be as follows Figure 9a and Figure 9b The first semiconductor light emitting device 421, the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423 are included. The first semiconductor light emitting device 421, the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423 can emit light of different colors to display an image. For example, the first semiconductor light emitting device 421 can be a blue semiconductor light emitting device, the second semiconductor light emitting device 422 can be a green semiconductor light emitting device, and the third semiconductor light emitting device 423 can be a red semiconductor light emitting device, but it is not limited thereto.

[0152] On the other hand, the first signal line group 361 can be arranged on one side of each of the plurality of assembly holes 340H, and can include a plurality of signal lines VDD_1, VDD_2, VDD_3, and VSS. Although not shown in the figure, a driving transistor ( Figure 3 DT).

[0153] The plurality of signal lines VDD_1, VDD_2, VDD_3, and VSS may be connected to each of the plurality of pixels PX. Each of the plurality of pixels PX may include at least one semiconductor light emitting device package 350. In this case, each of the plurality of signal lines VDD_1, VDD_2, VDD_3, and VSS is connected to the plurality of semiconductor light emitting devices 421 to 423 of the semiconductor light emitting device package 350.

[0154] For example, the plurality of signal lines VDD_1 , VDD_2 , VDD_3 , VSS may include a first signal line VDD_1 , a second signal line VDD_2 , a third signal line VDD_3 , and a fourth signal line VSS.

[0155] For example, the first signal line VDD_1, the second signal line VDD_2, and the signal line VDD_3 may be arranged parallel to each other along the second direction Y. For example, the fourth signal line VSS may intersect the first signal line VDD_1, the second signal line VDD_2, and the signal line VDD_3, and be arranged along the first direction X. In this case, the pixel PX may be defined by the intersection of the first signal line VDD_1, the second signal line VDD_2, the third signal line VDD_3, and the fourth signal line VSS. Therefore, a pixel PX may be defined in each intersection area of ​​the first signal line VDD_1, the second signal line VDD_2, the third signal line VDD_3, and the fourth signal line VSS.

[0156] The first, second, third, and fourth signal lines VDD_1, VDD_2, VDD_3, and VSS may be connected to the plurality of semiconductor light emitting devices 421 to 423 of the semiconductor light emitting device package 350 of each pixel PX through the plurality of connection lines 370-1 to 370-4.

[0157] The plurality of connection lines 370 - 1 to 370 - 4 may be formed after the semiconductor light emitting device package 350 is assembled to the assembly hole 340H on the display substrate 310 .

[0158] For example, the first signal line VDD_1 can be connected to the first side of the first semiconductor light emitting device 421 through the first connection line 370-1, the second signal line VDD_2 can be connected to the first side of the second semiconductor light emitting device 422 through the second connection line 370-2, and the third signal line VDD_3 can be connected to the first side of the third semiconductor light emitting device 423 through the third connection line 370-3.

[0159] For example, the fourth signal line VSS may be connected to the second sides of the first semiconductor light emitting device 421 , the second semiconductor light emitting device 422 , and the third semiconductor light emitting device 423 through the fourth connection line 370 - 4 .

[0160] Specifically, if Figure 9a and Figure 9b As shown, the third signal line VDD_3 may be connected to the first electrode pad 445 through the third connection line 370-3. The first electrode pad 445 may be connected to the first side of the third semiconductor light emitting device 423. For example, the first electrode pad 445 may extend horizontally from the first side of the third semiconductor light emitting device 423 to the first semiconductor light emitting device 421. In this case, the third connection line 370-3 may be connected to the first electrode pad 445 located on the first semiconductor light emitting device 421.

[0161] The fourth signal line VSS may be connected to the first common pad 443, and the first common pad 443 may be connected to the first semiconductor light emitting device 421, the second semiconductor light emitting device 422, and the third semiconductor light emitting device 423. For example, the first common pad 443 extends horizontally from the second side of the first semiconductor light emitting device 421 to the second semiconductor light emitting device 422 to be connected to the second side of the second semiconductor light emitting device 422, and extends horizontally from the second side of the second semiconductor light emitting device 422 to the third semiconductor light emitting device 423 to be connected to the second side of the third semiconductor light emitting device 423.

[0162] On the other hand, since the first electrode pad 445, the first common pad 443 and the connecting wires 370-1 to 370-4 are arranged on the upper side of each of the plurality of semiconductor light emitting devices 421 to 423, the light emission of each of the plurality of semiconductor light emitting devices 421 to 423 may be hindered. Thus, the first electrode pad 445, the first common pad 443 and the connecting wires 370-1 to 370-4 may be composed of a conductive material with excellent light transmittance. For example, the first electrode pad 445, the first common pad 443 and the connecting wires 370-1 to 370-4 may include ITO or IZO, etc., but are not limited thereto.

[0163] According to the embodiment, when the first electrode pad 445, the first common pad 443 and the connecting wires 370-1 to 370-4 are made of a transparent conductive material, the light emission of each of the plurality of semiconductor light emitting devices 421 to 423 is not hindered, so that the light is easily emitted, thereby preventing the light efficiency from decreasing.

[0164] On the other hand, the display device 300 of the embodiment may include a second signal line group 362 .

[0165] The second signal line group 362 may be disposed on the other side of each of the plurality of assembly holes 340H, and may include a plurality of signal lines VDD_1', VDD_2', and VDD_3'. Although not shown in the figure, a driving transistor ( Figure 3 DT).

[0166] The plurality of signal lines VDD_1', VDD_2', and VDD_3' of the second signal line group 362 may also be connected to the pixel PX. Figure 9a and Figure 9b As shown, the semiconductor light emitting device package 350 may include a fourth semiconductor light emitting device 424 , a fifth semiconductor light emitting device 425 , and a sixth semiconductor light emitting device 426 .

[0167] The fourth semiconductor light emitting device 424, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may emit light of different colors to display an image. For example, the fourth semiconductor light emitting device 424 may be a blue semiconductor light emitting device, the fifth semiconductor light emitting device 425 may be a green semiconductor light emitting device, and the sixth semiconductor light emitting device 426 may be a red semiconductor light emitting device, but the present invention is not limited thereto.

[0168] For example, the first semiconductor light emitting device 421, the second semiconductor light emitting device 422, the fourth semiconductor light emitting device 424 and the fifth semiconductor light emitting device 425 may all include GaN-based semiconductor materials, and the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 may all include GaAs-based semiconductor materials, but are not limited thereto.

[0169] For example, the fifth signal line VDD_1' can be connected to the first side of the fourth semiconductor light emitting device 424 through the fifth connection line 371-1, the sixth signal line VDD_2' can be connected to the first side of the fifth semiconductor light emitting device 425 through the sixth connection line 371-2, and the seventh signal line VDD_3' can be connected to the first side of the sixth semiconductor light emitting device 426 through the seventh connection line 371-3.

[0170] For example, the fourth signal line VSS may be connected to the second sides of the fourth, fifth, and sixth semiconductor light emitting devices 424, 425, and 426 through the fourth connection line 370-4.

[0171] Specifically, if Figure 7 , Figure 9a and Figure 9b As shown, the seventh signal line VDD_3' may be connected to the second electrode pad 446 through the seventh connection line 371-3. The second electrode pad 446 may be connected to the first side of the sixth semiconductor light emitting device 426. For example, the second electrode pad 446 may extend horizontally from the first side of the sixth semiconductor light emitting device 426 to the fourth semiconductor light emitting device 424. In this case, the seventh connection line 371-3 may be connected to the second electrode pad 446 located on the fourth semiconductor light emitting device 424.

[0172] The fourth signal line VSS may be connected to the second common pad 444, and the second common pad 444 may be connected to the fourth semiconductor light emitting device 424, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426. For example, the second common pad 444 may extend horizontally from the second side of the fourth semiconductor light emitting device 424 to the fifth semiconductor light emitting device 425 to be connected to the second side of the fifth semiconductor light emitting device 425, and may extend horizontally from the second side of the fifth semiconductor light emitting device 425 to the sixth semiconductor light emitting device 426 to be connected to the second side of the sixth semiconductor light emitting device 426.

[0173] In an embodiment, each of the first semiconductor light emitting device 421 to the sixth semiconductor light emitting device 426 may be a horizontal semiconductor light emitting device that can be electrically connected on the upper side, but is not limited thereto. The first side and the second side of each of the first semiconductor light emitting device 421 to the sixth semiconductor light emitting device 426 may be an upper side or a top surface. For example, the first side may be the top surface of the second conductive semiconductor layer 421c, 424c, and the second side may be the top surface of the first conductive semiconductor layer 421a, 424a.

[0174] On the other hand, since the second electrode pad 446, the second common pad 444 and the connecting wires 371-1 to 371-3 are arranged on the upper side of each of the plurality of semiconductor light emitting devices 424 to 426, it is possible to hinder the light emission of each of the plurality of semiconductor light emitting devices 424 to 426. Thus, the second electrode pad 446, the second common pad 444 and the connecting wires 371-1 to 371-3 can be composed of a conductive material with excellent light transmittance. For example, the second electrode pad 446, the second common pad 444 and the connecting wires 371-1 to 371-3 may include ITO or IZO, etc., but are not limited thereto.

[0175] According to the embodiment, when the second electrode pad 446, the second common pad 444 and the connecting lines 371-1 to 371-3 are made of a transparent conductive material, the light emission of the plurality of semiconductor light emitting devices 424 to 426 is not hindered, so that the light is easily emitted, thereby preventing the light efficiency from decreasing.

[0176] On the other hand, the plurality of semiconductor light emitting devices 421 to 426 included in the semiconductor light emitting device package 350 of the embodiment may be composed of two pixels or composed of one pixel and one dummy pixel.

[0177] like Fig.13 As shown, in the semiconductor light emitting device package 350 of the embodiment, the first to third semiconductor light emitting devices 421 to 423 may constitute a first pixel PX1, and the fourth to sixth semiconductor light emitting devices 421 to 426 may constitute a second pixel PX2. Fig.13 The semiconductor light emitting device package 350 is configured in Figure 7In the case of the assembly hole 340H, each pixel PX includes two pixels PX1 and PX2, so that the number of pixels is increased to 2 times, thereby realizing an ultra-high-resolution display. That is, under the action of the blue data signal, green data signal, and red data signal applied to the first signal line VDD_1 to the third signal line VDD_3 included in the first signal line group 361, blue light, green light, and red light can be emitted from each of the first semiconductor light emitting device 421 to the third semiconductor light emitting device 423 constituting the first pixel PX1. Under the action of the blue data signal, green data signal, and red data signal applied to the first signal line VDD_1' to the third signal line VDD_3' included in the second signal line group 362, blue light, green light, and red light can be emitted from each of the fourth semiconductor light emitting device 424 to the sixth semiconductor light emitting device 426 constituting the second pixel PX2.

[0178] like Fig.14 As shown, in the semiconductor light emitting device package 350 of the embodiment, the first to third semiconductor light emitting devices 421 to 423 may constitute one pixel PX, and the fourth to sixth semiconductor light emitting devices 424 to 426 may constitute a virtual pixel PX_D. Fig.14 The semiconductor light emitting device package 350 is configured in Figure 7 In the case of the assembly hole 340H shown, the pixel PX displays an image, and the virtual pixel PX_D does not display an image.

[0179] Under the action of the blue data signal, green data signal, and red data signal applied to the first signal line VDD_1 to the third signal line VDD_3 included in the first signal line group 361, blue light, green light, and red light may be emitted from each of the first to third semiconductor light emitting devices 421 to 423 constituting the pixel PX1. The fourth to sixth semiconductor light emitting devices 424 to 426 included in the virtual pixel PX_D may not emit light. That is, the blue data signal, green data signal, and red data signal are not supplied to each of the fourth to sixth semiconductor light emitting devices 424 to 426 included in the virtual pixel PX_D.

[0180] In the case where at least one of the first semiconductor light emitting device 421 to the third semiconductor light emitting device 423 constituting the pixel PX1 fails and does not emit light, at least one of the fourth semiconductor light emitting device 424 to the sixth semiconductor light emitting device 426 constituting the virtual pixel PX_D replaces the failed semiconductor light emitting device. For example, in the case where the second semiconductor light emitting device 422 constituting the pixel PX1 fails, the fifth semiconductor light emitting device 425 emitting the same color light as the second semiconductor light emitting device 422, i.e., green light, can be used to replace the second semiconductor light emitting device 422. To this end, by supplying a green data signal to the fifth signal line VDD_2' instead of the second signal line VDD_2, the green data signal is supplied to the fifth semiconductor light emitting device 425 instead of the second semiconductor light emitting device 422, so that green light can be emitted from the fifth semiconductor light emitting device 425.

[0181] Below, refer to Figure 9a , Figure 9b 10 , a semiconductor light emitting device package 350 according to the embodiment will be described.

[0182] Reference Figures 9a to 10c The semiconductor light emitting device package 350 of the embodiment may include a semiconductor substrate 410 , a first semiconductor light emitting device 421 , a pair of assembly wirings 441 , 442 , a second semiconductor light emitting device 422 , and a third semiconductor light emitting device 423 .

[0183] The semiconductor substrate 410 may play a role in supporting the first semiconductor light emitting device 421 , a pair of assembly wirings 441 , 442 , the second semiconductor light emitting device 422 , and the third semiconductor light emitting device 423 .

[0184] The semiconductor substrate 410 may have a first region 411 and a second region 412. For example, the first region 411 and the second region 412 may meet each other in a horizontal direction.

[0185] The first semiconductor light emitting device 421 may be disposed on the first region 411 of the semiconductor substrate 410, and the pair of assembly wirings 441 and 442 may be disposed on the second region 412 of the semiconductor substrate 410. Therefore, the pair of assembly wirings 441 and 442 and the first semiconductor light emitting device 421 may be disposed horizontally to each other. That is, the pair of assembly wirings 441 and 442 and the first semiconductor light emitting device 421 may not overlap vertically.

[0186] The first semiconductor light emitting device 421 may include a first conductive semiconductor layer 421a, an active layer 421b, and a second conductive semiconductor layer 421c. For example, the first conductive semiconductor layer 421a is an n-type semiconductor layer, and the second conductive semiconductor layer 421c is a p-type semiconductor layer, but is not limited thereto. When a voltage is applied to the first semiconductor light emitting device 421, a plurality of electrons may be generated in the first conductive semiconductor layer 421a and supplied to the active layer 421b, and a plurality of holes may be generated in the second conductive semiconductor layer 421c and supplied to the active layer 421b. In the active layer 421b, the plurality of electrons and the plurality of holes are recombined, so that light of a wavelength corresponding to the energy band gap of the semiconductor material of the active layer 421b can be generated. For example, the active layer 421b of the first semiconductor light emitting device 421 may be composed of a semiconductor material that emits blue light.

[0187] On the other hand, the semiconductor substrate 410 can share the first conductive semiconductor layer 421a of the first semiconductor light emitting device 421. That is, the first conductive semiconductor layer 421a of the first semiconductor light emitting device 421 can be used as the semiconductor substrate 410. Therefore, both the first region 411 and the second region 412 of the semiconductor substrate 410 can be the first conductive semiconductor layer 421a of the first semiconductor light emitting device 421. In this case, an active layer 421b and a second conductive semiconductor layer 421c are formed on one side region of the first conductive semiconductor layer 421a, that is, the first region 411 of the semiconductor substrate 410, so that the first semiconductor light emitting device 421 including the first conductive semiconductor layer 421a, the active layer 421b and the second conductive semiconductor layer 421c can be arranged on the first region 411 of the semiconductor substrate 410. Thus, a pair of assembly wirings 441 and 442 can be arranged on the other region of the first conductive semiconductor layer 421a, that is, the second region 412 of the semiconductor substrate 410.

[0188] The pair of assembly wirings 441 and 442 can be used to assemble the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423 on the second region 412 of the semiconductor substrate 410 by a self-assembly method. For example, a dielectrophoretic force (DEP force) is formed under the action of an AC voltage applied to the pair of assembly wirings 441 and 442, and under the action of the dielectrophoretic force (DEP force), the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423 can be assembled on the pair of assembly wirings 441 and 442. Although not shown in the figure, a partition wall ( Fig.16e 1030), wherein the partition wall 1030 includes a plurality of assembly holes ( Fig.151021 to 1023) to easily assemble the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423. The partition wall 1030 may be removed after assembling the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423, but is not limited thereto.

[0189] On the other hand, the semiconductor light emitting device package 350 of the embodiment may include a fourth semiconductor light emitting device 424 , a fifth semiconductor light emitting device 425 , and a sixth semiconductor light emitting device 426 .

[0190] The semiconductor substrate 410 may have a third region 413. At this time, the second region 412 may be located between the first region 411 and the third region 413. Therefore, the first region 411, the second region 412, and the third region 413 may be sequentially arranged in a horizontal direction.

[0191] The fourth semiconductor light emitting device 424 may be disposed on the third region 413 of the semiconductor substrate 410. The fifth semiconductor light emitting device 425 and the sixth semiconductor light emitting device 426 may be disposed on a pair of assembly wirings 441 and 442.

[0192] During the self-assembly process, under the action of the dielectrophoretic force (DEP force) formed on a pair of assembly wirings 441 and 442, not only the second semiconductor light-emitting device 422 and the third semiconductor light-emitting device 423 can be assembled on the pair of assembly wirings 441 and 442, but the fifth semiconductor light-emitting device 425 and the sixth semiconductor light-emitting device 426 can also be assembled on the pair of assembly wirings 441 and 442.

[0193] During the self-assembly process, the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 can be moved by the movement of the magnet. In this case, in order to enhance the mobility of each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426, each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may include a magnetic layer 422-1, 423-1, 425-1. The magnetic layer 422-1, 423-1, 425-1 may include nickel, cobalt, etc., but is not limited thereto. For example, the magnetic layer 422-1, 423-1, 425-1 may be disposed on the lower side of each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426, but is not limited thereto.

[0194] Although not shown in the figure, a partition wall 1030 may be formed, and the partition wall 1030 includes a plurality of assembly holes ( Fig.15 1021 to 1023), so that the fifth semiconductor light emitting device 425 and the sixth semiconductor light emitting device 426 are easily assembled. The partition wall 1030 may be removed after the fifth semiconductor light emitting device 425 and the sixth semiconductor light emitting device 426 are assembled, but is not limited thereto.

[0195] On the other hand, the fourth semiconductor light emitting device 424 may include a first conductive semiconductor layer 424a, an active layer 424b and a second conductive semiconductor layer 424c. The first conductive semiconductor layer 424a may be an n-type semiconductor layer, and the second conductive semiconductor layer 424c may be a p-type semiconductor layer, but is not limited thereto.

[0196] The first conductive type semiconductor layer 424a of the fourth semiconductor light emitting device 424 may be connected to the first conductive type semiconductor layer 421a of the first semiconductor light emitting device 421. That is, the first conductive type semiconductor layer 424a of the fourth semiconductor light emitting device 424 and the first conductive type semiconductor layer 421a of the first semiconductor light emitting device 421 may be formed as one body. Therefore, the first conductive type semiconductor layer 421a of the first semiconductor light emitting device 421 or the first conductive type semiconductor layer 424a of the fourth semiconductor light emitting device 424 may be used as the first region 411, the second region 412, and the third region 413 of the semiconductor substrate 410.

[0197] For example, the active layer 421b and the second conductive type semiconductor layer 421c of the first semiconductor light emitting device 421 or the active layer 424b and the second conductive type semiconductor layer 424c of the fourth semiconductor light emitting device 424 are not disposed on the second region 412 of the semiconductor substrate 410. Therefore, a recess ( Fig.16c or Fig.16d of 1010).

[0198] For example, the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may be disposed between the first semiconductor light emitting device 421 and the fourth semiconductor light emitting device 424. For example, the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 may be disposed between the second semiconductor light emitting device 422 and the fifth semiconductor light emitting device 425.

[0199] The first semiconductor light emitting device 421 and the fourth semiconductor light emitting device 424 may be symmetrical to each other with respect to the center of the semiconductor light emitting device package 350. The second semiconductor light emitting device 422 and the fifth semiconductor light emitting device 425 may be symmetrical to each other with respect to the center of the semiconductor light emitting device package 350. The third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 may be symmetrical to each other with respect to the center of the semiconductor light emitting device package 350.

[0200] The second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may be disposed on a pair of assembly wirings 441, 442. For example, under the action of a dielectrophoretic force (DEP force) formed on the pair of assembly wirings 441, 442, the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may be self-assembled on the pair of assembly wirings 441, 442 at the same time.

[0201] For example, the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 may be arranged between the second semiconductor light emitting device 422 and the fifth semiconductor light emitting device 425. Thus, the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the sixth semiconductor light emitting device 426 and the fifth semiconductor light emitting device 425 may be arranged in sequence in the length direction of the pair of assembly wirings 441 and 442, i.e., in the Y direction.

[0202] The third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 may be symmetrical to each other based on the length direction of the pair of assembly wirings 441 and 442. For example, when viewed from above, the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 may have a circular shape. That is, the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 each have a hemispherical shape, so the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 having such a hemispherical shape may be configured symmetrically to each other so that the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 have a circular shape when viewed from above. For example, the third semiconductor light emitting device 423 may be configured on the first assembly wiring 441 of the pair of assembly wirings 441 and 442, and the sixth semiconductor light emitting device 426 may be configured on the second assembly wiring 442 of the pair of assembly wirings 441 and 442.

[0203] On the other hand, the unillustrated reference numerals 461 to 466 may be contact holes, and the plurality of connection wires 370 - 1 to 370 - 4 , 371 - 1 to 371 - 3 may be connected to the plurality of semiconductor light emitting devices 421 to 426 of the semiconductor light emitting device package 350 through the contact holes 461 to 466 .

[0204] On the other hand, Fig.11a and Fig.11b As shown, a portion of the third semiconductor light emitting device 423 and a portion of the sixth semiconductor light emitting device 426 may be connected to each other, and a notch 450 may be formed between the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 .

[0205] The third semiconductor light emitting device 423 may include a first conductive type semiconductor layer 423a, an active layer 423b, and a second conductive type semiconductor layer 423c. The sixth semiconductor light emitting device 426 may include a first conductive type semiconductor layer 426a, an active layer 426b, and a second conductive type semiconductor layer 426c.

[0206] For example, the first conductive type semiconductor layer 423a of the third semiconductor light emitting device 423 may be connected to the first conductive type semiconductor layer 426a of the sixth semiconductor light emitting device 426. Fig.13 As shown, in the case of driving two pixels PX1 and PX2, even if the second common pad 444 is not connected to the first conductive semiconductor layer 426a of the sixth semiconductor light emitting device 426, the first common pad 443 can be connected to the first conductive semiconductor layer 423a of the third semiconductor light emitting device 423. Thus, by supplying different red data signals to the first electrode pad 445 and the second electrode pad 446, each of the third semiconductor light emitting device 423 of the first pixel PX1 and the sixth semiconductor light emitting device 426 of the second pixel PX2 can obtain different brightness (or gray scale), thereby achieving ultra-high resolution.

[0207] Although not shown, the first conductive semiconductor layer 423a of the third semiconductor light emitting device 423 and the first conductive semiconductor layer 426a of the sixth semiconductor light emitting device 426 may not be connected but may be spatially separated from each other and insulated with an insulating material in between.

[0208] The unillustrated reference numeral 423 - 2 may be an electrode and may include a metal having excellent ohmic contact characteristics. The electrode 423 - 2 may be connected to a first electrode pad 445 or a second electrode pad 446 .

[0209] On the other hand, the semiconductor light emitting device package 350 of the embodiment may include a first electrode pad 445, a second electrode pad 446, a first common pad 443, and a second common pad 444. These first electrode pad 445, the second electrode pad 446, the first common pad 443, and the second common pad 444 may be arranged on the first semiconductor light emitting device 421 to the sixth semiconductor light emitting device 426, and thus may be made of a transparent conductive material so as not to prevent the light from being irradiated forward.

[0210] For example, the first electrode pad 445 may extend horizontally from the second side of the third semiconductor light emitting device 423 toward the second side of the first semiconductor light emitting device 421 , and the second electrode pad 446 may extend horizontally from the second side of the sixth semiconductor light emitting device 426 toward the second side of the fourth semiconductor light emitting device 424 .

[0211] For example, the first common pad 443 can be connected to the first side of the first semiconductor light emitting device 421, the second semiconductor light emitting device 422 and the third semiconductor light emitting device 423, and the second common pad 444 can be connected to the first side of the fourth semiconductor light emitting device 424, the fifth semiconductor light emitting device 425 and the sixth semiconductor light emitting device 426.

[0212] The current of the first semiconductor light emitting device 421, the second semiconductor light emitting device 422, and the third semiconductor light emitting device 423 may flow to the fourth signal line VSS through the first common pad 443. The current of the fourth semiconductor light emitting device 424, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may flow to the fourth signal line VSS through the second common pad 444.

[0213] The first common pad 443 may extend from the third semiconductor light emitting device 423 to the first semiconductor light emitting device 421 via the second semiconductor light emitting device 422. The second common pad 444 may extend from the sixth semiconductor light emitting device 426 to the fourth semiconductor light emitting device 424 via the fifth semiconductor light emitting device 425.

[0214] The first common pad 443 and the second common pad 444 may be located on a diagonal line with the center of the semiconductor light emitting device package 350 as a reference. Each of the first common pad 443 and the second common pad 444 may have a bent portion 443a, 444a bent at a specified position. For example, the bent portions 443a, 444a of the first common pad 443 and the second common pad 444 may be located on the second side of the second semiconductor light emitting device 422 or on the second side of the fifth semiconductor light emitting device 425, but are not limited thereto.

[0215] On the other hand, the semiconductor light emitting device package 350 of the embodiment may include a first insulating layer 431 , a second insulating layer 432 , and a third insulating layer 433 .

[0216] The first insulating layer 431 may be formed between the second region 412 of the semiconductor substrate 410 and the pair of assembly wirings 441 and 442. The first insulating layer 431 can prevent an electrical short circuit between the semiconductor substrate 410 and the pair of assembly wirings 441 and 442.

[0217] The second insulating layer 432 may be formed on the periphery of each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426. The second insulating layer 432 may allow each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 to be tightly fixed to the semiconductor substrate 410.

[0218] The third insulating layer 433 may be formed on the first to sixth semiconductor light emitting devices 421 to 426. The third insulating layer 433 may protect the first to sixth semiconductor light emitting devices 421 to 426 from electrical shorts caused by external impacts or external foreign objects.

[0219] The first insulating layer 431, the second insulating layer 432, and the third insulating layer 433 may be made of different insulating materials. For example, the first insulating layer 431 and the third insulating layer 433 may be made of inorganic materials, and the second insulating layer 432 may be made of organic materials, but the present invention is not limited thereto. For example, the first insulating layer 431 and the third insulating layer 433 may be made of the same insulating material, but the present invention is not limited thereto.

[0220] On the other hand, in the semiconductor light emitting device package 350 of the embodiment, the plurality of semiconductor light emitting devices 422, 423, 425, 426 can be assembled into Figure 7 and Figure 8 The assembly hole 340H shown. The semiconductor light emitting device package 350 of the embodiment may have a plurality of semiconductor light emitting devices 421 to 426, so during the self-assembly process, under the action of the magnet, the semiconductor light emitting device package 350 may not move easily. Therefore, in order to enhance the mobility of the semiconductor light emitting device package 350, a pair of assembly wirings 441, 442 of the semiconductor light emitting device package 350 may include at least two or more metal layers including a magnetic layer. The larger the area of ​​the magnetic layer, the more the magnetization characteristics can be increased. To this end, the overall width W1 of the pair of assembly wirings 441, 442 may be greater than the width W2 of the first semiconductor light emitting device 421 or the fourth semiconductor light emitting device 424.

[0221] On the other hand, the semiconductor light emitting device package 350 of the embodiment can be Fig.12 That is, an epitaxial layer ( Fig.16a1005), the upper side of the epitaxial layer 1005 is etched to form a notch 1010, a pair of assembly wirings 441, 442 are formed in the notch 1010, and after the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425 and the sixth semiconductor light emitting device 426 are assembled by the self-assembly process, a plurality of semiconductor light emitting device packages 350 including the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425 and the sixth semiconductor light emitting device 426 are manufactured through a series of subsequent processes along with the first semiconductor light emitting device 421 and the fourth semiconductor light emitting device 424 formed on the epitaxial layer 1005. Then, the plurality of semiconductor light emitting device packages 350 can be separated from the wafer 1000 through a separation process.

[0222] [Manufacturing process of semiconductor light emitting device package]

[0223] Figures 15 to 34 The manufacturing process of the semiconductor light emitting device package of the embodiment is shown.

[0224] Reference Fig.15 First, a plurality of holes 1021 , 1022 , and 1023 may be formed along the second direction Y on the wafer 1000 .

[0225] Specifically, if Fig.16a As shown, an epitaxial layer 1005 may be formed on a wafer 1000. The epitaxial layer 1005 may include a plurality of semiconductor layers 1005a, 1005b, and 1005c. The plurality of semiconductor layers may include a first semiconductor layer 1005a, a second semiconductor layer 1005b, and a third semiconductor layer 1005c. The first semiconductor layer 1005a, the second semiconductor layer 1005b, and the third semiconductor layer 1005c may each include a plurality of layers.

[0226] For example, the wafer 1000 may support the epitaxial layer 1005 , and the wafer 1000 is a member that allows the epitaxial layer 1005 to be easily deposited, and may be, for example, a sapphire wafer, a semiconductor substrate, or a ceramic substrate.

[0227] For example, the first semiconductor layer 1005a, as a first conductive type semiconductor layer, may include a first conductive type dopant. For example, the second semiconductor layer 1005b, as an active layer, may generate light. Light having a wavelength corresponding to the band gap of the semiconductor material of the active layer 1005b may be generated. For example, the third semiconductor layer 1005c, as a second conductive type semiconductor layer, may include a second conductive type dopant. The first conductive type dopant may be an n-type dopant, and the second conductive type dopant may be a p-type dopant, but is not limited thereto.

[0228] The first semiconductor layer 1005 a , the second semiconductor layer 1005 b , and the third semiconductor layer 1005 c may be sequentially deposited on the wafer 1000 using a deposition device, such as a MOCVD (Metal Organic Chemical Vapor Desposition) deposition device.

[0229] Although it will be described at the end, the first region 411 of the epitaxial layer 1005 can be used to form a first semiconductor light emitting device ( Fig.32 421), the second region 412 of the epitaxial layer 1005 can be used to form a fourth semiconductor light emitting device 424. Therefore, the first semiconductor light emitting device 421 and the fourth semiconductor light emitting device 424 include an active layer ( Fig.33 421b, 424b), thereby generating light of the same color.

[0230] On the other hand, the recess 1010 may be formed by etching in the Y direction to be recessed from the top surface of the epitaxial layer 1005. That is, the recess 1010 may be formed by removing the third semiconductor layer 1005c and the second semiconductor layer 1005b of the epitaxial layer 1005 and removing a portion of the top surface of the first semiconductor layer 1005a. Therefore, the depth of the recess 1010 may be the sum of the thickness of the third semiconductor layer 1005c, the thickness of the second semiconductor layer 1005b, and the thickness of the removed portion of the top surface of the first semiconductor layer 1005a.

[0231] Even if the notch 1010 is formed, the epitaxial layers 1005 may be connected to each other through the bottom of the notch 1010. That is, since the bottom of the notch 1010 is the first semiconductor layer 1005a of the epitaxial layer 1005, the first semiconductor layers 1005a of the epitaxial layer 1005 on both sides of the notch 1010 may be connected to each other. The first semiconductor layer 1005a of the epitaxial layer 1005 on the left side of the notch 1010 may be defined as a first region 411, the first semiconductor layer 1005a of the epitaxial layer 1005 below the notch 1010 may be defined as a second region 412, and the first semiconductor layer 1005a of the epitaxial layer 1005 on the right side of the notch 1010 may be defined as a third region 413.

[0232] like Fig.16b As shown, an insulating layer 431 a may be formed on the epitaxial layer 1005. Since the epitaxial layer 1005 includes a dopant, an insulating layer 431 a may be formed to insulate the epitaxial layer 1005.

[0233] like Fig.16cAs shown, a pair of assembly wirings 441, 442 may be formed in the recess 1010. For example, as the metal film is patterned after the insulating layer 431a is deposited, a pair of assembly wirings 441, 442 may be formed in the recess 1010. The pair of assembly wirings 441, 442 may be formed long along the second direction Y. The pair of assembly wirings 441, 442 may be made of a metal having excellent electrical conductivity. The pair of assembly wirings 441, 442 may each include a magnetic layer that can be easily magnetized by a magnet.

[0234] like Fig.16d As shown, the pair of assembly wirings 441, 442 and the insulating layer 431a can also be formed on another insulating layer 431b. The insulating layer 431a and the other insulating layer 431b can be made of the same insulating material. Thus, the first insulating layer 431 can be formed by the insulating layer 431a and the other insulating layer 431b. Therefore, the first insulating layer 431 can be used to prevent an electrical short circuit between the pair of assembly wirings 441, 442 and the epitaxial layer 1005, and protect the epitaxial layer 1005 from being affected by external foreign matter.

[0235] like Fig.16e As shown, a partition wall 1030 may be formed on the first insulating layer 431. Since the partition wall 1030 is formed to be thick, it may be made of an organic material, but is not limited thereto.

[0236] like Fig.15 As shown, the partition wall 1030 may include a plurality of assembly holes 1021 to 1023. The plurality of assembly holes 1021 to 1023 may be located on a pair of assembly wirings 441, 442 within the recess 1010.

[0237] On the other hand, refer to Fig.17a and Fig.17b , a plurality of semiconductor light emitting devices 422 , 423 , and 425 can be assembled on a pair of assembly wirings 441 , 442 by self-assembly.

[0238] Specifically, for self-assembly, after the wafer 1000 is installed in a chamber filled with a fluid (not shown), a dielectrophoretic force (DEP force) can be formed by applying an AC voltage to a pair of assembly wirings 441, 442. As the magnet moves, the plurality of semiconductor light-emitting devices 422, 423, 425 in the fluid can move. The plurality of semiconductor light-emitting devices 422, 423, 425 can be assembled in the plurality of assembly holes 1021 to 1023 on the wafer 1000 during the movement in the fluid. That is, since a dielectrophoretic force (DEP force) formed by a pair of assembly wirings 441, 442 is formed in each of the plurality of assembly holes 1021 to 1023, the plurality of semiconductor light-emitting devices 422, 423, 425 in motion can be assembled in the plurality of assembly holes 1021 to 1023, respectively, under the action of the dielectrophoretic force (DEP force).

[0239] In order to be assembled simultaneously, the plurality of semiconductor light emitting devices 422 , 423 , and 425 may have different shapes from each other.

[0240] Each of the plurality of semiconductor light emitting devices 422, 423, 425 may be a prefabricated component. That is, each of the plurality of semiconductor light emitting devices 422, 423, 425 may be manufactured using a series of semiconductor processes. Each of the plurality of semiconductor light emitting devices 422, 423, 425 may include a first conductive semiconductor layer (not shown), an active layer (not shown), a second conductive semiconductor layer (not shown), and a magnetic layer ( Fig.20a For example, the third semiconductor light emitting device 423 includes a first electrode 423-2 on the top surface of the first conductive type semiconductor layer, but is not limited thereto. The first electrode 423-2 may be connected to a common pad ( Figure 9a 443, 444).

[0241] First, if Fig.18a , Fig.19a and Fig.20a As shown, under the action of the dielectrophoretic force (DEP force) formed on a pair of assembly wirings 441 and 442 , a plurality of semiconductor light emitting devices 422 , 423 , and 425 can be assembled in a plurality of assembly holes 1021 to 1023 , respectively.

[0242] Then, the polymer is sprayed and then removed, so that each of the plurality of semiconductor light emitting devices 422, 423, 425 can be attached to the first insulating layer 431 under the action of the polymer. When the polymer is removed, the partition wall 1030 can be removed at the same time, but is not limited thereto.

[0243] On the other hand, refer to Fig.21 By using the mask 1040 for partial patterning, from the third semiconductor light emitting device 423 to the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426, the first semiconductor layer 1005a, that is, the first conductive semiconductor layer can be exposed in the epitaxial layer 1005, and in addition, the first conductive semiconductor layer can be exposed in each of the second semiconductor light emitting device 422 and the fifth semiconductor light emitting device 425.

[0244] Specifically, if Fig.22a After a portion of the epitaxial layer 1005 is blocked by mask 1040 as shown, the Figure 22b As shown in FIG. 1 , the third semiconductor layer 1005c and the second semiconductor layer 1005b of the epitaxial layer 1005 not blocked by the mask 1040 are removed to expose the first semiconductor layer 1005a. Although a portion of the top surface of the first semiconductor layer 1005a may also be removed, the present invention is not limited thereto. Then, the mask 1040 may be removed.

[0245] like Fig.23a As shown in FIG. 1 , after the mask 1040 is used to block the other regions except the center of the third semiconductor layer 1005c, the Figure 23b As shown in FIG. 1 , the second conductive semiconductor layer 423c and the active layer 423b located at the center of the third semiconductor light emitting device 423 that are not blocked by the mask 1040 are removed to form a recess 450 that exposes the first conductive semiconductor layer. Although a portion of the top surface of the first conductive semiconductor layer can also be removed, it is not limited to this. Then, the mask 1040 can be removed.

[0246] Based on the center line of the third semiconductor light emitting device 423, it can be separated into the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426. Although the third semiconductor light emitting device 423 is separated from the sixth semiconductor light emitting device 426, the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 can be connected. That is, the third semiconductor light emitting device 423 and the sixth semiconductor light emitting device 426 can be connected using the first conductive type semiconductor layer.

[0247] like Fig.24a As shown in FIG. 1 , after a portion of the second semiconductor light emitting device 422 is blocked by using the mask 1040, the Figure 24b As shown in FIG. 1 , the second conductive semiconductor layer and the active layer of the second semiconductor light emitting device 422 that are not blocked by the mask 1040 are removed to expose the first conductive semiconductor layer. Although a portion of the top surface of the first conductive semiconductor layer may also be removed, the present invention is not limited thereto. Then, the mask 1040 may be removed.

[0248] On the other hand, refer to Fig.25, a first common pad 443 and a second common pad 444 may be formed.

[0249] Specifically, if Fig.26a and Figure 26b As shown, a metal film may be deposited on the wafer 1000 and then patterned, thereby forming a first common pad 443 and a second common pad 444 .

[0250] For example, the first common pad 443 may be used to connect the first semiconductor layer 1005 a of the first region 411 of the epitaxial layer 1005 , the first conductive type semiconductor layer of the second semiconductor light emitting device 422 , and the first conductive type semiconductor layer 423 a of the third semiconductor light emitting device 423 .

[0251] For example, the second common pad 444 may be used to connect the first semiconductor layer 1005 a of the third region 413 of the epitaxial layer 1005 , the first conductive type semiconductor layer of the fifth semiconductor light emitting device 425 , and the first conductive type semiconductor layer 426 a of the sixth semiconductor light emitting device 426 .

[0252] Although not shown in the figure, the first common pad 443 and the second common pad 444 may be connected to a pair of mounting wirings 441 and 442 , but the present invention is not limited thereto.

[0253] Then, if Fig.27a and Figure 27b As shown, a second insulating layer 432 may be formed in the recess 1010 .

[0254] For example, the second insulating layer 432 may be formed along the periphery of each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 disposed on the pair of assembly wirings 441 and 442. Under the action of the second insulating layer 432, each of the second semiconductor light emitting device 422, the third semiconductor light emitting device 423, the fifth semiconductor light emitting device 425, and the sixth semiconductor light emitting device 426 may be tightly fixed to the first insulating layer 431.

[0255] In the case where each of the second semiconductor light emitting device 422 , the third semiconductor light emitting device 423 , the fifth semiconductor light emitting device 425 , and the sixth semiconductor light emitting device 426 is closely fixed to the first insulating layer 431 , the second insulating layer 432 may be omitted.

[0256] On the other hand, refer to Fig.28, the epitaxial layer 1005 may be patterned using a mask 1050, thereby forming a plurality of semiconductor light emitting device packages 350 on the wafer 1000. For example, the top surface of the wafer 1000, for example, a sapphire wafer, may be exposed by removing all layers of the epitaxial layer 1005, namely, the first semiconductor layer 1005a, the second semiconductor layer 1005b, and the third semiconductor layer 1005c.

[0257] Specifically, if Fig.29 As shown, the second region 412 of the epitaxial layer 1005 is patterned using a mask 1050, so that a plurality of semiconductor light emitting device packages 350 including one second semiconductor light emitting device 422, one third semiconductor light emitting device 423, one fifth semiconductor light emitting device 425, and one sixth semiconductor light emitting device 426 formed on the second region 412 of the epitaxial layer 1005 can be formed. At this time, a notch 1060 can be formed between the plurality of semiconductor light emitting device packages 350.

[0258] like Fig.30a As shown in FIG. 1 , the mask 1050 is used to pattern the first region 411 and the third region 413 of the epitaxial layer 1005, so that Fig.30b As shown, a first semiconductor light emitting device 421 may be formed in the first region 411 of the epitaxial layer 1005 , and a fourth semiconductor light emitting device 424 may be formed in the third region 413 of the epitaxial layer 1005 .

[0259] like Fig.31 As shown, the first region 411 of the epitaxial layer 1005 is patterned using a mask 1050 , so that a first semiconductor light emitting device 421 can be formed on the first region 411 of the epitaxial layer 1005 .

[0260] On the other hand, refer to Fig.32 , may be formed on the first electrode pad 445 and the second electrode pad 446 .

[0261] Specifically, if Fig.33 As shown, a metal film is deposited on a wafer 1000 and then patterned, so that a first electrode pad 445 and a second electrode pad 446 may be formed.

[0262] The first electrode pad 445 may extend from a region of the third semiconductor light emitting device 423 along the first direction X and be formed on a region of the first semiconductor light emitting device 421. For example, one end of the first electrode pad 445 may be connected to the top surface of the second conductive semiconductor layer 423c of the third semiconductor light emitting device 423.

[0263] The second electrode pad 446 may be formed on a region of the fourth semiconductor light emitting device 424 and extend along the first direction -X toward a region of the sixth semiconductor light emitting device 426. For example, one end of the second electrode pad 446 may be connected to the top surface of the second conductive semiconductor layer 426c of the sixth semiconductor light emitting device 426.

[0264] Then, a third insulating layer ( Fig.10a The third insulating layer 433 and the first insulating layer 431 may include the same insulating material, but are not limited thereto.

[0265] On the other hand, Fig.34 As shown, each of the plurality of semiconductor light emitting device packages 350 may be separated from the wafer 1000 .

[0266] The plurality of semiconductor light emitting device packages 350 separated in this way are assembled into Figure 8 The display substrate 310 is shown, so that the display device 300 can be manufactured.

[0267] The semiconductor light emitting device ( Figure 9a 350) A method for manufacturing the display device 300 using a self-assembly method is described in detail.

[0268] The semiconductor light emitting device of the embodiment ( Figure 9a 350) can also be used to manufacture a display device by transfer method.

[0269] Below, refer to Fig.35a and Fig.35b , a method for manufacturing the display device 301 using a transfer method is described.

[0270] [Transfer method]

[0271] Fig.35a and Fig.35b The process of manufacturing a display device by using a transfer method based on the semiconductor light emitting device package of the embodiment is shown.

[0272] like Fig.35a As shown, in the flip Fig.32 After the wafer 1000 is removed, the plurality of semiconductor light emitting device packages 350 on the wafer 1000 may be transferred to an interposer, ie, a temporary substrate 2000 .

[0273] For example, an adhesive may be coated on the top surface of the interposer 2000 .

[0274] After the wafer 1000 including the plurality of semiconductor light emitting device packages 350 is turned over, as the wafer 1000 is pressed against the interposer 2000 , each of the plurality of semiconductor light emitting device packages 350 may be attached to the interposer 2000 by the adhesive.

[0275] Then, the semiconductor light emitting device packages 350 may be separated from the wafer 1000 by irradiating laser light between the wafer 1000 and the first conductive semiconductor layers 421a and 424a of the first and fourth semiconductor light emitting devices 421 and 424. Thus, the plurality of semiconductor light emitting device packages 350 may be transferred to the interposer 2000.

[0276] like Fig.35b As shown, after the interposer 2000 including the plurality of semiconductor light emitting device packages 350 is turned over, the plurality of semiconductor light emitting device packages 350 on the interposer 2000 may be transferred to the display substrate 3000 .

[0277] For example, an adhesive may be coated on the display substrate 3000 .

[0278] After the interposer 2000 including the plurality of semiconductor light emitting device packages 350 is turned over, as the interposer 2000 is pressed against the display substrate 3000 , each of the plurality of semiconductor light emitting device packages 350 may be attached to the display substrate 3000 by the adhesive.

[0279] Then, as the interposer 2000 moves in an upper direction, the plurality of semiconductor light emitting device packages 350 on the interposer 2000 may be transferred to the display substrate 3000. To this end, the adhesive force of the adhesive on the display substrate 3000 may be greater than that of the adhesive on the interposer 2000.

[0280] Then, the display device 301 can be manufactured by forming electrical connections between the plurality of semiconductor light emitting device packages 350 through subsequent processes. Electrical connection means that the plurality of semiconductor light emitting device packages 350 are connected to each other through Figure 7 The plurality of connection lines 370 - 1 to 370 - 4 and 371 - 1 to 371 - 3 are shown to be electrically connected to the first signal line group 361 and the second signal line group 362 .

[0281] On the other hand, the display device may be a display panel. That is, in the embodiment, the display device and the display panel may be understood as having the same meaning. In the embodiment, the display device in the actual meaning may include a display panel and a controller (or processor) capable of controlling the display panel in order to display an image.

[0282] The above detailed description should not be interpreted as limiting in all aspects, but should be considered as illustrative. The scope of the embodiment is determined by the reasonable interpretation of the appended claims, and all changes within the equivalent scope of the embodiment are included in the scope of the embodiment.

[0283] Industrial Applicability

[0284] The embodiment can be applied to the field of displays that display images or information. The embodiment can be applied to the field of displays that display images or information using semiconductor light-emitting devices. The semiconductor light-emitting device can be a micron-scale semiconductor light-emitting device or a nano-scale semiconductor light-emitting device.

[0285] For example, the embodiments may be applied to TVs, billboards, smartphones, portable phones, mobile terminals, HUDs for automobiles, backlight units for notebook computers, and display devices for VR or AR.

Claims

1. A semiconductor light emitting device package, wherein: include: A semiconductor substrate having a first region and a second region; A first semiconductor light emitting device, located on the first region of the semiconductor substrate; a pair of assembly wirings located on the second region of the semiconductor substrate; as well as The second semiconductor light emitting device and the third semiconductor light emitting device are located on a pair of the assembly wirings.

2. The semiconductor light emitting device package according to claim 1, wherein: The semiconductor substrate shares the first conductive type semiconductor layer of the first semiconductor light emitting device.

3. The semiconductor light emitting device package according to claim 1, wherein: The semiconductor substrate has a third region, The second area is located between the first area and the third area, The semiconductor light emitting device package comprises: a fourth semiconductor light emitting device located on the third region of the semiconductor substrate; and The fifth semiconductor light emitting device and the sixth semiconductor light emitting device are located on a pair of the assembly wirings.

4. The semiconductor light emitting device package according to claim 3, wherein: The first semiconductor light emitting device and the fourth semiconductor light emitting device are blue semiconductor light emitting devices, The second semiconductor light emitting device and the fifth semiconductor light emitting device are green semiconductor light emitting devices, The third semiconductor light emitting device and the sixth semiconductor light emitting device are red semiconductor light emitting devices.

5. The semiconductor light emitting device package according to claim 4, wherein: The first semiconductor light emitting device, the second semiconductor light emitting device and the third semiconductor light emitting device constitute a first pixel, The fourth semiconductor light emitting device, the fifth semiconductor light emitting device, and the sixth semiconductor light emitting device constitute a second pixel.

6. The semiconductor light emitting device package according to claim 4, wherein: The first semiconductor light emitting device, the second semiconductor light emitting device and the third semiconductor light emitting device constitute a pixel, The fourth semiconductor light emitting device, the fifth semiconductor light emitting device, and the sixth semiconductor light emitting device constitute a virtual pixel.

7. The semiconductor light emitting device package according to claim 4, wherein: The third semiconductor light emitting device and the sixth semiconductor light emitting device are arranged between the second semiconductor light emitting device and the fifth semiconductor light emitting device.

8. The semiconductor light emitting device package according to claim 4, wherein: The third semiconductor light emitting device and the sixth semiconductor light emitting device are symmetrical to each other with respect to the length direction of the pair of assembly wirings.

9. The semiconductor light emitting device package according to claim 8, wherein: The third semiconductor light emitting device is arranged on a first assembly wiring of the pair of assembly wirings, The sixth semiconductor light emitting device is arranged on a second wiring harness of the pair of wiring harnesses.

10. The semiconductor light emitting device package according to claim 8, wherein: The first conductive type semiconductor layer of the third semiconductor light emitting device is connected to the first conductive type semiconductor layer of the sixth semiconductor light emitting device.

11. The semiconductor light emitting device package according to claim 4, wherein: include: a first common pad having connections on first upper sides of each of the first semiconductor light emitting device, the second semiconductor light emitting device, and the third semiconductor light emitting device; as well as The first electrode pad horizontally extends from the second upper side of the third semiconductor light emitting device toward the second upper side of the first semiconductor light emitting device.

12. The semiconductor light emitting device package according to claim 11, wherein: include: a second common pad connected on each of the first upper sides of the fourth semiconductor light emitting device, the fifth semiconductor light emitting device, and the sixth semiconductor light emitting device; as well as The second electrode pad horizontally extends from the second upper side of the sixth semiconductor light emitting device toward the second upper side of the fourth semiconductor light emitting device.

13. The semiconductor light emitting device package according to claim 12, wherein: The first common pad and the second common pad are located on a diagonal line.

14. The semiconductor light emitting device package according to claim 3, wherein: include: A first insulating layer is located between the second region of the semiconductor substrate and a pair of the assembly wirings; a second insulating layer, located at the periphery of each of the second semiconductor light emitting device, the third semiconductor light emitting device, the fifth semiconductor light emitting device and the sixth semiconductor light emitting device; as well as A third insulating layer is located on the first to sixth semiconductor light emitting devices.

15. The semiconductor light emitting device package according to claim 3, wherein: Each of the second semiconductor light emitting device, the third semiconductor light emitting device, the fifth semiconductor light emitting device, and the sixth semiconductor light emitting device includes a magnetic layer.

16. The semiconductor light emitting device package according to claim 1, wherein: A pair of the wiring harnesses includes a magnetic layer.

17. A display device, wherein: include: A display substrate including a plurality of pixels; A pair of first assembly wirings corresponding to each of the plurality of pixels; A partition wall including a pair of assembly holes on the first assembly wiring; A semiconductor light emitting device package is located in the assembly hole; The semiconductor light emitting device package comprises: A semiconductor substrate having a first region and a second region; A first semiconductor light emitting device, located on the first region of the semiconductor substrate; a pair of second wiring harnesses located on the second region of the semiconductor substrate; and A second semiconductor light emitting device and a third semiconductor light emitting device are located on a pair of the second assembly wirings.