Pulse amplitude analysis device for fast and slow channel double sampling

Through the pulse amplitude analysis device with double sampling of fast and slow channels, the problem of being unable to analyze fast and slow channels simultaneously in the prior art is solved, and the accurate analysis of spatial X-ray pulse amplitude and the improvement of energy resolution are achieved.

CN119535525APending Publication Date: 2025-02-28BEIJING INST OF CONTROL ENG
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Patent Information

Application Number
CN202411610722.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-12
Publication Date
2025-02-28

AI Technical Summary

Technical Problem

The prior art cannot simultaneously analyze the pulse amplitude of fast and slow channels in spatial X-ray pulse amplitude analysis, and cannot identify the source of the pulse signal, resulting in energy spectrum distortion and energy resolution drop.

Method used

The pulse amplitude analysis device with double sampling of fast and slow channel is adopted to double sampling through the fast and slow forming time channels to obtain the fast pulse amplitude and slow pulse amplitude, and the interference of high-energy electrons and protons on X-ray detection is reduced by identifying and eliminating spatial particle interference.

Benefits of technology

Simultaneous analysis of fast and slow channels is realized, the accuracy of energy spectrum and energy resolution are improved, spatial particle interference is reduced, and the signal-to-noise ratio of X-ray detection is enhanced.

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Abstract

The invention discloses a fast and slow channel double-sampling pulse amplitude analysis device which comprises an X-ray detector unit, a fast shaping filter unit, a slow shaping filter unit, a fast trigger unit, a slow trigger unit, a fast peak holding unit, a slow peak holding unit, a fast and slow merging unit, an ADC converter unit and an FPGA processor unit. An input signal is converted into a voltage pulse signal through the X-ray detector unit, the voltage pulse signal is sent to the fast shaping filter unit and the slow shaping filter unit for shaping processing, then sent to the fast trigger unit, the slow trigger unit, the fast peak holding unit and the slow peak holding unit, and sent to the fast and slow merging unit after peak holding processing. And after the fast and slow peak values are kept and combined, the signals are sent to the ADC converter unit and the FPGA processor unit, and after fast and slow channel double sampling, the pulse amplitudes of the fast channel and the slow channel are obtained. The interference of particle sedimentation of space high-energy electrons and protons in the X-ray detector on X-ray photon detection is reduced.
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Description

Technical Field

[0001] The invention belongs to the field of nuclear signal processing, and in particular relates to a fast and slow channel dual sampling pulse amplitude analysis device. Background Art

[0002] In the space X-ray pulse amplitude analysis device, a pulse amplitude analyzer is used to obtain energy spectrum, flux and time information through statistical analysis. In the space radiation environment, high-energy particles form background interference on X-ray photon detection, resulting in energy spectrum distortion, increased dark counts and decreased energy resolution.

[0003] The prior art is an analog-digital hybrid pulse amplitude analyzer that uses fast channel and slow channel integration to collect baseline voltage according to the fast and slow trigger intervals and determine whether there is accumulation, perform pulse amplitude analysis on the slow channel, and identify whether there is accumulation through the fast channel and slow channel methods to achieve automatic baseline estimation and recovery functions. However, this method has the following main problems:

[0004] (1) Pulse amplitude analysis can only be performed on slow channels;

[0005] (2) The source of the pulse signal cannot be identified. Summary of the invention

[0006] The technical problem solved by the present invention is: to overcome the shortcomings of the prior art and provide a fast and slow dual sampling pulse amplitude analysis device, which adopts fast and slow forming time channels, obtains fast pulse amplitude and slow pulse amplitude through double sampling, eliminates space particle interference after identification, and reduces the interference of particle sedimentation of space high-energy electrons and protons in X-ray detectors on X-ray photon detection.

[0007] The technical solution of the present invention is: a pulse amplitude analysis device with fast and slow channel dual sampling, comprising: an X-ray detector unit, a fast shaping filter unit, a slow shaping filter unit, a fast trigger unit, a slow trigger unit, a fast peak holding unit, a slow peak holding unit, a fast and slow merging unit, an ADC converter unit and an FPGA processor unit; after the input signal is converted into a voltage pulse signal by the X-ray detector unit, it is sent to the fast shaping filter unit and the slow shaping filter unit for shaping processing respectively, and then sent to the fast trigger unit, the fast peak holding unit and the slow trigger unit, the slow peak holding unit respectively, after the peak holding processing, they are all sent to the fast and slow merging unit, after the fast and slow peak holding merging processing, they are sent to the ADC converter unit and the FPGA processor unit, and after fast and slow channel dual sampling, the pulse amplitudes of the fast channel and the slow channel are obtained.

[0008] The fast shaping filter unit is connected to the X-ray detector unit and uses a short integral parameter to implement integral shaping filtering of the photon pulse signal.

[0009] The slow shaping filter unit is connected to the X-ray detector unit and uses a long integration parameter to implement integral shaping filtering of the photon pulse signal.

[0010] The fast trigger unit is connected to the fast shaping filter unit, and compares the output of the fast shaping filter unit with the set fast trigger threshold. When the output of the fast shaping filter unit exceeds the fast trigger threshold, a fast trigger and fast peak mark are generated.

[0011] The slow trigger unit is connected to the slow shaping filter unit, and compares the output of the slow shaping filter unit with the set slow trigger threshold. When the output of the slow shaping filter unit exceeds the slow trigger threshold, a slow trigger and slow peak mark are generated.

[0012] The fast peak holding unit is connected to the fast shaping filter unit, and holds the peak value output by the fast shaping filter unit for a period of time for peak sampling, and performs reset and release after the sampling is completed.

[0013] The slow peak holding unit is connected to the slow shaping filter unit, and holds the peak value output by the slow shaping filter for a period of time for peak sampling, and performs reset and release after the sampling is completed.

[0014] The fast-slow merging unit is connected to the fast peak holding unit and the slow peak holding unit, and a high-speed analog switch is used to realize the merging of the fast channel peak holding and the slow channel peak holding signals, and the peak value of the merged signal is kept consistent with that before the merging; there is no overshoot at the instant of analog switch switching, and the next photon signal detection is not affected; by adopting the fast-slow merging unit, the merging of the fast channel and the slow channel peak holding signals is completed, and the fast channel and the slow channel share an ADC converter unit, thereby maintaining the synchronization and data consistency of the fast channel and slow channel pulse amplitude acquisition.

[0015] The ADC converter unit is connected to the fast and slow merging unit, and completes the sampling of the fast peak value and the slow peak value according to the fast peak value mark and the slow peak value mark;

[0016] The FPGA processor unit is connected to the ADC converter unit, the fast trigger unit and the slow trigger unit, and performs fast and slow channel switching and ADC converter driving according to the fast trigger and slow trigger signals to complete the acquisition of pulse amplitude; after completing ADC sampling of the fast channel peak value, it quickly switches to the slow channel, and switches back to the fast channel after ADC sampling of the slow channel peak value.

[0017] The FPGA processor unit identifies photon accumulation based on fast trigger and slow trigger signals, and identifies accumulated photon interference when fast trigger signals appear twice or more in the slow trigger signal window.

[0018] The FPGA processor unit compares the pulse amplitudes of the fast channel and the slow channel, and identifies it as spatial particle interference if it exceeds a set threshold.

[0019] The advantages of the present invention compared with the prior art are:

[0020] (1) Using one ADC converter, the pulse amplitude under both short integration and long integration parameters can be obtained simultaneously;

[0021] (2) Spatial particle identification is achieved by comparing the amplitude of fast pulses with the amplitude of slow pulses;

[0022] (3) Using the fast trigger signal with short integration parameters to obtain the incident particle flux and achieve count rate correction;

[0023] (4) Use fast trigger and slow trigger to realize accumulation recognition. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a block diagram of the composition principle of the pulse amplitude analysis device of the fast and slow channel dual sampling of the present invention.

[0025] Figure 2 It is the input end slow channel and output end peak hold signal waveform of the fast and slow merging unit of the present invention.

[0026] Figure 3 It is the waveform of the output end of the fast-slow merging unit and the fast-slow channel switching waveform of the present invention.

[0027] Figure 4 The ADC converter unit of the present invention collects the fast channel pulse amplitude waveform.

[0028] Figure 5 The ADC converter unit of the present invention collects the slow channel pulse amplitude waveform. DETAILED DESCRIPTION

[0029] like Figure 1 As shown, a pulse amplitude analysis device for fast and slow channel dual sampling of the present invention comprises: an X-ray detector unit, a fast shaping filter unit, a slow shaping filter unit, a fast trigger unit, a slow trigger unit, a fast peak holding unit, a slow peak holding unit, a fast and slow merging unit, an ADC converter unit and an FPGA processor unit; after the input signal is converted into a voltage pulse signal by the X-ray detector unit, it is sent to the fast shaping filter unit and the slow shaping filter unit for shaping processing respectively, and then sent to the fast trigger unit, the fast peak holding unit and the slow trigger unit, the slow peak holding unit respectively, after the peak holding processing, they are all sent to the fast and slow merging unit, after the fast and slow peak holding merging processing, they are sent to the ADC converter unit and the FPGA processor unit, and after fast and slow channel dual sampling, the pulse amplitudes of the fast channel and the slow channel are obtained.

[0030] The fast shaping filter unit is connected to the X-ray detector unit and uses a short integral parameter to implement integral shaping filtering of the photon pulse signal.

[0031] The slow shaping filter unit is connected to the X-ray detector unit and uses a long integration parameter to implement integral shaping filtering of the photon pulse signal.

[0032] The fast trigger unit is connected to the fast shaping filter unit, and compares the output of the fast shaping filter unit with the set fast trigger threshold. When the output of the fast shaping filter unit exceeds the fast trigger threshold, a fast trigger and fast peak mark are generated.

[0033] The slow trigger unit is connected to the slow shaping filter unit, and compares the output of the slow shaping filter unit with the set slow trigger threshold. When the output of the slow shaping filter unit exceeds the slow trigger threshold, a slow trigger and slow peak mark are generated.

[0034] The fast peak holding unit is connected to the fast shaping filter unit, and holds the peak value output by the fast shaping filter unit for a period of time for peak sampling, and performs reset and release after the sampling is completed.

[0035] The slow peak holding unit is connected to the slow shaping filter unit, and holds the peak value output by the slow shaping filter for a period of time for peak sampling, and performs reset and release after the sampling is completed.

[0036] like Figure 2 , 3 As shown, the fast-slow merging unit is connected to the fast peak holding unit and the slow peak holding unit, and a high-speed analog switch is used to realize the merging of the fast channel peak holding and the slow channel peak holding signals, and the peak value of the merged signal is kept consistent with that before the merging; there is no overshoot at the instant of analog switch switching, and the next photon signal detection is not affected; by adopting the fast-slow merging unit, the fast channel and the slow channel peak holding signals are merged, and the fast channel and the slow channel share an ADC converter unit, thereby maintaining the synchronization and data consistency of the fast channel and the slow channel pulse amplitude acquisition.

[0037] like Figure 4 , 5 As shown, the ADC converter unit is connected to the fast and slow merging unit, and completes the sampling of the fast peak value and the slow peak value according to the fast peak value mark and the slow peak value mark;

[0038] The FPGA processor unit is connected to the ADC converter unit, the fast trigger unit and the slow trigger unit, and performs fast and slow channel switching and ADC converter driving according to the fast trigger and slow trigger signals to complete the acquisition of pulse amplitude; after completing ADC sampling of the fast channel peak value, it quickly switches to the slow channel, and switches back to the fast channel after ADC sampling of the slow channel peak value.

[0039] The FPGA processor unit identifies photon accumulation based on fast trigger and slow trigger signals, and identifies accumulated photon interference when fast trigger signals appear twice or more in the slow trigger signal window.

[0040] The FPGA processor unit compares the pulse amplitudes of the fast channel and the slow channel, and identifies it as spatial particle interference if it exceeds a set threshold.

[0041] Although the present invention has been disclosed as above in the form of a preferred embodiment, it is not intended to limit the present invention. Any person skilled in the art can make possible changes and modifications to the technical solution of the present invention by using the technical contents disclosed above without departing from the spirit and scope of the present invention. Therefore, any simple modifications, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the protection scope of the technical solution of the present invention.

Claims

1. A fast and slow channel dual sampling pulse amplitude analysis device, characterized in that: include: X-ray detector unit, fast shaping filter unit, slow shaping filter unit, fast trigger unit, slow trigger unit, fast peak holding unit, slow peak holding unit, fast-slow merging unit, ADC converter unit and FPGA processor unit; after the input signal is converted into a voltage pulse signal by the X-ray detector unit, it is sent to the fast shaping filter unit and the slow shaping filter unit for shaping processing respectively, and then sent to the fast trigger unit, the fast peak holding unit and the slow trigger unit, the slow peak holding unit respectively, after the peak holding processing, they are all sent to the fast-slow merging unit, after the fast-slow peak holding merging processing, they are sent to the ADC converter unit and the FPGA processor unit, and after fast and slow channel double sampling, the pulse amplitudes of the fast channel and the slow channel are obtained.

2. A fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The fast shaping filter unit is connected to the X-ray detector unit and uses a short integral parameter to implement integral shaping filtering of the photon pulse signal.

3. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The slow shaping filter unit is connected to the X-ray detector unit and uses a long integration parameter to implement integral shaping filtering of the photon pulse signal.

4. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The fast trigger unit is connected to the fast shaping filter unit, and compares the output of the fast shaping filter unit with the set fast trigger threshold. When the output of the fast shaping filter unit exceeds the fast trigger threshold, a fast trigger and fast peak mark are generated.

5. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The slow trigger unit is connected to the slow shaping filter unit, and compares the output of the slow shaping filter unit with the set slow trigger threshold. When the output of the slow shaping filter unit exceeds the slow trigger threshold, a slow trigger and slow peak mark are generated.

6. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The fast peak holding unit is connected to the fast shaping filter unit, and holds the peak value output by the fast shaping filter unit for a period of time for peak sampling, and performs reset and release after the sampling is completed.

7. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The slow peak holding unit is connected to the slow shaping filter unit, and holds the peak value output by the slow shaping filter for a period of time for peak sampling, and performs reset and release after the sampling is completed.

8. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The fast-slow merging unit is connected to the fast peak holding unit and the slow peak holding unit, and a high-speed analog switch is used to realize the merging of the fast channel peak holding and the slow channel peak holding signals, and the peak value of the merged signal is kept consistent with that before the merging; there is no overshoot at the instant of analog switch switching, and the next photon signal detection is not affected; by adopting the fast-slow merging unit, the merging of the fast channel and the slow channel peak holding signals is completed, and the fast channel and the slow channel share an ADC converter unit, thereby maintaining the synchronization and data consistency of the fast channel and slow channel pulse amplitude acquisition.

9. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The ADC converter unit is connected to the fast and slow combining unit, and completes the sampling of the fast peak value and the slow peak value according to the fast peak value mark and the slow peak value mark.

10. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The FPGA processor unit is connected to the ADC converter unit, the fast trigger unit and the slow trigger unit, and performs fast and slow channel switching and ADC converter driving according to the fast trigger and slow trigger signals to complete the acquisition of pulse amplitude; After completing the ADC sampling of the fast channel peak, quickly switch to the slow channel, and switch back to the fast channel after the ADC sampling of the slow channel peak.

11. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The FPGA processor unit identifies photon accumulation based on fast trigger and slow trigger signals, and identifies accumulated photon interference when fast trigger signals appear twice or more in the slow trigger signal window.

12. The fast and slow channel dual sampling pulse amplitude analysis device and method according to claim 1, characterized in that: The FPGA processor unit compares the fast channel and slow channel pulse amplitudes and identifies them as spatial particle interference if they exceed a set threshold.