Array substrate and display panel

Abstract

The invention provides an array substrate and a display panel, and relates to the technical field of display, the array substrate comprises a substrate body and a plurality of pixel units arranged on one side of the substrate body, the pixel units are arranged in an array mode in the first direction and the second direction, each pixel unit comprises a plurality of sub-pixels, and the sub-pixels are arranged in the first direction and the second direction. Each sub-pixel comprises a pixel electrode, and the orthographic projection areas of the pixel electrodes of at least two sub-pixels on the substrate are different from each other; wherein the pixel electrode comprises a plurality of sub-electrode areas, the plurality of sub-electrode areas are mutually connected, the plurality of sub-electrode areas are arranged in parallel along the second direction, and the orthographic projections of two adjacent sub-electrode areas on the substrate have different widths along the first direction.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of display technology, and in particular, to an array substrate and a display panel. Background Art

[0002] Electronic paper is a paper-like electronic display that has the advantages of paper and can continuously change and refresh the display content like a common liquid crystal display, and is more power-efficient than a liquid crystal display. Common electronic paper display technologies include cholesteric liquid crystal display technology, electrowetting display technology, electrochromic display technology, and electrophoretic display technology. Among them, cholesteric liquid crystal display has a bistable characteristic, that is, after the power supply is stopped, the refreshed image will still be retained on the display, and it has the characteristic of being visible under strong light, and there will be no problem of whitening under strong light.

[0003] However, the human eye cannot distinguish the color of each pixel, but distinguishes the difference in color brightness through the display effect on the entire screen. Each pixel unit of the cholesteric liquid crystal display has only two states: bright state and dark state. The display effect of the screen is also only the color brightness difference formed by the combination of the bright state and the dark state. This makes the cholesteric liquid crystal electronic paper only present a small number of brightness grayscales and the display effect is poor. Therefore, how to improve the display effect of electronic paper has become a problem that needs to be solved urgently in this field. Summary of the invention

[0004] The embodiments of the present application provide an array substrate and a display panel, aiming to solve the problem of how to improve the display effect of electronic paper.

[0005] A first aspect of an embodiment of the present application provides an array substrate, the array substrate comprising:

[0006] A base substrate, and a plurality of pixel units arranged on one side of the base substrate, wherein the pixel units are arranged in an array along a first direction and a second direction, and each of the pixel units comprises:

[0007] A plurality of sub-pixels, each sub-pixel comprising a pixel electrode, and the orthographic projection areas of the pixel electrodes of at least two sub-pixels on the substrate are different from each other; wherein the pixel electrode comprises a plurality of sub-electrode regions, the plurality of sub-electrode regions are connected to each other, the plurality of sub-electrode regions are arranged in parallel along the second direction, and the orthographic projections of two adjacent sub-electrode regions on the substrate have different widths along the first direction.

[0008] In an optional implementation, each of the sub-pixels further includes a thin film transistor, and the plurality of sub-electrode regions include a first sub-electrode region and a second sub-electrode region arranged in parallel along the second direction, wherein:

[0009] The width of the orthographic projection of the second sub-electrode region on the base substrate along the first direction is greater than the width of the orthographic projection of the first sub-electrode region on the base substrate along the first direction;

[0010] The thin film transistor is disposed on one side of the first sub-electrode region along the first direction, and the thin film transistor is connected to the first sub-electrode region.

[0011] In an optional implementation, within the same pixel unit, a sub-pixel is located on one side along the first direction and on one side along the second direction.

[0012] In an optional implementation, the shape of the orthographic projection of the sub-pixel on the substrate includes a rectangle, a T-shape, an L-shape or other irregular shapes.

[0013] In an optional implementation, each of the pixel units further includes:

[0014] a gate signal line and a plurality of source signal lines, wherein the gate signal line extends along the first direction;

[0015] The plurality of sub-pixels are connected to different source signal lines through the plurality of thin film transistors corresponding to each sub-pixel, and the plurality of sub-pixels are connected to the same gate signal line.

[0016] In an optional implementation, the orthographic projection of the source signal line on the base substrate is in the shape of a strip or a broken line.

[0017] In an optional implementation, the plurality of sub-pixels include a first sub-pixel, a second sub-pixel, and a third sub-pixel arranged in sequence along the first direction; wherein,

[0018] The areas of the orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the substrate increase sequentially, and there is no overlap between the orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the substrate.

[0019] In an optional implementation, the pixel unit includes a first region, a second region and a third region, the first region, the second region and the third region are arranged in parallel along the first direction, wherein:

[0020] The first sub-pixel is located in the first region, the second sub-pixel is located in the first region and the second region, and the third sub-pixel is located in the first region, the second region, and the third region.

[0021] In an optional embodiment, the orthographic projections of the plurality of source signal lines on the base substrate overlap with the orthographic projections of at least one of the first sub-pixel, the second sub-pixel and the third sub-pixel on the base substrate.

[0022] In an optional implementation, the orthographic projection of the source signal line on the base substrate has no overlap with the orthographic projections of the first sub-pixel, the second sub-pixel, and the third sub-pixel on the base substrate.

[0023] In an optional implementation manner, the source signal line connected to the first sub-pixel has no overlap with the orthographic projection of each sub-pixel on the substrate;

[0024] The orthographic projection of the source signal line connected to the second sub-pixel on the base substrate respectively passes through the orthographic projection of the second sub-pixel on the base substrate and the orthographic projection of the third sub-pixel on the base substrate;

[0025] The orthographic projection of the source signal line connected to the third sub-pixel on the base substrate passes through the orthographic projection of the third sub-pixel on the base substrate.

[0026] In an optional implementation manner, the orthographic projection of the source signal line connected to the first sub-pixel on the base substrate extends along the edge of the first sub-pixel;

[0027] The orthographic projection of the source signal line connected to the second sub-pixel on the base substrate extends along the edge of the second sub-pixel;

[0028] The orthographic projection of the source signal line connected to the third sub-pixel on the base substrate extends along the edge of the third sub-pixel.

[0029] In an optional embodiment, the ratio of the area of ​​the orthographic projection of the first sub-pixel or the second sub-pixel on the substrate to the sum of the areas of the multiple sub-pixels on the substrate is less than or equal to 0.15, and the ratio of the sum of the areas of the orthographic projections of the first sub-pixel and the second sub-pixel on the substrate to the sum of the areas of the multiple sub-pixels on the substrate is less than or equal to 0.35.

[0030] In an optional embodiment, the area ratio of the orthographic projections of the first sub-pixel, the second sub-pixel, and the third sub-pixel on the base substrate is any one of 0.1:0.2:0.7, 0.05:0.2:0.75, and 0.05:0.3:0.65.

[0031] A second aspect of an embodiment of the present application provides a display panel, comprising a liquid crystal layer, a pairing substrate, and an array substrate as described in any one of the first aspects, wherein the liquid crystal layer is located between the pairing substrate and the array substrate, and the liquid crystal layer is used to reflect ambient light.

[0032] Beneficial effects:

[0033] The present application provides an array substrate and a display panel, the array substrate comprising: a base substrate, and a plurality of pixel units arranged on one side of the base substrate, the pixel units are arranged in an array along a first direction and a second direction, each of the pixel units comprises: a plurality of sub-pixels, each sub-pixel comprises a pixel electrode, and the pixel electrodes of at least two sub-pixels have different positive projection areas on the base substrate; wherein the pixel electrode comprises a plurality of sub-electrode regions, the plurality of sub-electrode regions are connected to each other, the plurality of sub-electrode regions are arranged in parallel along the second direction, and the positive projections of two adjacent sub-electrode regions on the base substrate have different widths along the first direction. The present application provides pixel electrodes of a plurality of sub-pixels with different areas in each pixel unit, and ensures that the sub-pixel charging is not affected by the sub-electrode regions with different widths in the first direction in the pixel electrode, so that the sub-pixels of each pixel unit can achieve more grayscales, thereby effectively improving the display effect of the electronic paper. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the description of the embodiments of the present application will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative labor.

[0035] Figure 1 This is a schematic diagram of a cholesteric liquid crystal display principle proposed in one embodiment of the present application;

[0036] Figure 2 This is a schematic diagram of an array substrate structure proposed in one embodiment of the present application;

[0037] Figure 3 is a schematic diagram of a sub-electrode region of a pixel electrode proposed in one embodiment of the present application;

[0038] Figure 4 is a schematic diagram of another array substrate structure proposed in an embodiment of the present application;

[0039] Figure 5 is a schematic diagram of a pixel driving waveform of a pixel unit proposed in an embodiment of the present application;

[0040] Figure 6aThis is a Gamma2.2 comparison diagram corresponding to a sub-pixel area combination that meets the area condition proposed in an embodiment of the present application;

[0041] Figure 6b This is a Gamma2.2 comparison diagram corresponding to a sub-pixel area combination that does not meet the area condition, proposed in an embodiment of the present application.

[0042] Explanation of the accompanying drawings: 1. substrate; 2. pixel unit; 21. gate signal line; 22. source signal line; 221. first source signal line; 222. second source signal line; 223. third source signal line; 23. sub-pixel; 231. first sub-pixel; 232. second sub-pixel; 233. third sub-pixel; 234. thin film transistor; 24. first region; 25. second region; 26. third region; 31. first sub-electrode region; 32. second sub-electrode region; W1. width of the first sub-electrode region along the first direction; W2. width of the second sub-electrode region along the first direction. DETAILED DESCRIPTION

[0043] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0044] In the related technology, electronic paper is an electronic display similar to paper. It has the advantages of paper and can continuously change and refresh the display content like a common liquid crystal display, and it is more power-saving than a liquid crystal display. Common electronic paper display technologies mainly include cholesteric liquid crystal display technology, electrowetting display technology, electrochromic display technology, and electrophoretic display technology. Among them, cholesteric liquid crystal display has a bistable characteristic, that is, after the power supply is stopped, the refreshed image will still be retained on the display, and it has the characteristic of being visible under strong light, and there will be no problem of whitening under strong light.

[0045] However, the human eye cannot distinguish the color of each pixel, but distinguishes the difference in color brightness through the display effect on the entire screen. Figure 1 FIG. 4 shows a schematic diagram of a cholesteric liquid crystal display principle proposed in an embodiment of the present application. Figure 1 As shown, when the cholesteric liquid crystal is in a planar state (P state), the display state is the sum of the reflection of the liquid crystal and the reflection of the substrate absorption layer, which is called a bright state; after increasing the voltage and then discharging slowly, the liquid crystal changes to a focal conic state (FC state), and no light of a specific wavelength is reflected. The light completely passes through the liquid crystal layer and is reflected by the bottom plate, which is called a dark state.

[0046] Each pixel unit of the cholesteric liquid crystal display has only two states: bright state and dark state. The display effect of the screen is also only the color brightness difference formed by the combination of the bright state and the dark state. This makes the cholesteric liquid crystal electronic paper only present a small number of brightness grayscales, and the display effect is poor, so the display effect cannot perform color transition well. In conventional electronic paper, each pixel unit contains a sub-pixel. In order to increase the number of grayscales of electronic paper, we propose to set multiple sub-pixels of the same area in each pixel unit. For example, if three sub-pixels of the same area are set in each pixel unit, there are 8 different combinations of the three sub-pixels based on the bright state and the dark state. However, since the display effect finally seen by the human eye is the result of the proportion of the area of ​​each sub-pixel in the bright state or dark state in the entire pixel unit, when the area of ​​each sub-pixel is the same, the final display of different brightness areas has only four different degrees of grayscale. The human eye cannot distinguish the brightness of each pixel, but when the brightness changes presented by the screen as a whole, the human eye is still relatively sensitive. Therefore, when there are fewer grayscales, the brightness conversion range is larger, which makes the display effect of the electronic paper poor.

[0047] In view of this, in order to further improve the number of grayscales of electronic paper based on the original solution, the embodiment of the present application proposes an array substrate. Figure 2 A schematic diagram of an array substrate structure proposed in an embodiment of the present application is shown. Figure 2 As shown, the array substrate includes: a substrate 1; a plurality of pixel units 2, the plurality of pixel units 2 are arranged on one side of the substrate 1, and the pixel units are arranged in an array along a first direction and a second direction, wherein the first direction is a horizontal direction and the second direction is a vertical direction. Each of the pixel units 2 includes: a plurality of sub-pixels 23, each sub-pixel includes a pixel electrode, wherein the positive projection areas of the pixel electrodes of at least two sub-pixels 23 on the substrate 1 are different from each other; wherein the pixel electrode includes a plurality of sub-electrode regions, the plurality of sub-electrode regions are connected to each other, the plurality of sub-electrode regions are arranged in parallel along the second direction, and the positive projection widths of two adjacent sub-electrode regions on the substrate are different along the first direction. It should be noted that the sub-pixel 23 mentioned in the embodiment of the present application refers to the pixel electrode corresponding to each sub-pixel in the pixel unit 2. In the subsequent description of the scheme of the present application, the sub-pixel refers to the pixel electrode in the pixel unit, and the subsequent description will not be repeated.

[0048] In the embodiment of the present application, the orthographic projection areas of the pixel electrodes of at least two sub-pixels 23 on the base substrate 1 are different from each other. Since each pixel unit has only two states, bright state and dark state, the display effect of the screen also has only the color brightness difference formed by the combination of the bright state and the dark state. By making the orthographic projection areas of at least two sub-pixels 23 on the base substrate 1 different from each other, for sub-pixels 23 of different areas, even if they are in the same brightness (all dark state or all bright state), they are also shown as two sub-pixels with different brightness states, so that when multiple sub-pixels of the same pixel unit are combined to form a grayscale picture, more grayscale pictures of different combinations are obtained, so that the electronic paper grayscale displays more brightness grayscales, effectively improving the display effect of the electronic paper. Preferably, in order to maximize the number of grayscales of the array substrate, the orthographic projection areas of the pixel electrodes of any two sub-pixels 23 of the sub-pixels 23 of the pixel unit 2 on the base substrate 1 are different from each other.

[0049] Exemplarily, for an array substrate in which each pixel unit includes three sub-pixels, if the orthographic projection areas of the three sub-pixels in each pixel unit on the substrate are the same, then the combination of the bright and dark states of the sub-pixels in the pixel unit has only four different brightness grayscales: “three sub-pixels are all bright”, “two sub-pixels are bright and one sub-pixel is dark”, “two sub-pixels are dark and one sub-pixel is bright”, and “three sub-pixels are all dark”; if the orthographic projection areas of the three sub-pixels in each pixel unit on the substrate are different from each other, then the combination of the bright and dark states of the sub-pixels in the pixel unit includes “first sub-pixel-bright state, second sub-pixel-bright state”. , the third sub-pixel-bright state", "the first sub-pixel-bright state, the second sub-pixel-bright state, the third sub-pixel-dark state", "the first sub-pixel-bright state, the second sub-pixel-dark state, the third sub-pixel-dark state", "the first sub-pixel-bright state, the second sub-pixel-dark state, the third sub-pixel-bright state", "the first sub-pixel-dark state, the second sub-pixel-bright state, the third sub-pixel-bright state", "the first sub-pixel-dark state, the second sub-pixel-bright state, the third sub-pixel-dark state", "the first sub-pixel-dark state, the second sub-pixel-bright state, the third sub-pixel-dark state", "the first sub-pixel-dark state, the second sub-pixel-dark state, the third sub-pixel-bright ...dark state", a total of eight different brightness grayscales. It should be noted that the above example is only an optional situation proposed to enable those skilled in the art to better understand the present application. The specific number of sub-pixels of different areas contained in each pixel unit can be determined according to actual conditions, and the present application is not limited here.

[0050] In an optional embodiment, Figure 3 FIG. 4 shows a schematic diagram of a sub-electrode region of a pixel electrode proposed in an embodiment of the present application. Figure 3As shown, each sub-pixel 23 also includes a thin film transistor 234, and the multiple sub-electrode areas include a first sub-electrode area 31 and a second sub-electrode area 32 arranged in parallel along the second direction, wherein the width W2 of the orthographic projection of the second sub-electrode area 32 on the substrate 11 along the first direction is greater than the width W1 of the orthographic projection of the first sub-electrode area 31 on the substrate 11 along the first direction; the thin film transistor 234 is arranged on one side of the first sub-electrode area 31 along the first direction, and the thin film transistor 234 is connected to the first sub-electrode area 31.

[0051] In the embodiment of the present application, the pixel electrodes of at least two sub-pixels 23 in the pixel unit 2 have different positive projection areas on the substrate 1, which makes the proportion of the sub-pixel 23 to the sum of the positive projection areas of all sub-pixels 23 on the substrate 1 smaller, and the first sub-electrode area 31 in the pixel electrode of each sub-pixel 23 is connected to the thin film transistor 234 corresponding to each sub-pixel 23, so the charging of each sub-pixel 23 is related to the setting of the thin film transistor 234 corresponding to each sub-pixel 23. When the area of ​​the sub-pixel 23 is relatively small, the corresponding thin film transistor cannot be completely set in the area corresponding to the sub-pixel, thereby reducing the charging effect of the sub-pixel. Therefore, in the array substrate provided in the embodiment of the present application, the width of each sub-pixel 23 in the first direction is greater than or equal to the width of the thin film transistor 234 corresponding to each sub-pixel 23 in the first direction, and the first direction is the extension direction of each sub-pixel 23 close to the edge of the thin film transistor 234 corresponding to each sub-pixel 23, for example, Figure 2 The first direction shown in is the horizontal direction. Specifically, the edge of each sub-pixel 23 close to the thin film transistor 234 corresponding to each sub-pixel 23 is used to be electrically connected to the thin film transistor 234 corresponding to each sub-pixel 23, and the width along the first direction at the edge is ensured to be greater than or equal to the width of the thin film transistor 234 along the first direction, so that sub-pixels 23 of different areas can be ensured to be completely placed in the thin film transistor 234 corresponding to the sub-pixel 23 in the area corresponding to the sub-pixel, so that while the number of grayscales is increased, the charging of each sub-pixel is not affected.

[0052] In an optional embodiment, in the same pixel unit 2, a sub-pixel is located on one side of another sub-pixel along the first direction and on one side along the second direction, so that a nested structure is formed between adjacent sub-pixels, thereby improving the area utilization rate in the pixel unit 2 while ensuring that the orthographic projection areas of the sub-pixels 23 on the base substrate 1 are different from each other and that the charging effect of each sub-pixel is ensured. Specifically, in the order of increasing orthographic projection areas of the sub-pixels 23 on the base substrate 1, for two adjacent sub-pixels, the sub-pixels with a larger area are located on both adjacent sides of the sub-pixels with a smaller area, for example, the sub-pixels with a larger area are located on the right side and the upper side of the sub-pixels with a smaller area (such as Figure 2 It should be noted that the above example is only an optional method provided to enable those skilled in the art to better understand the present application. The specific form of the nested structure can be determined according to actual conditions. For example, the sub-pixel with a larger area can be located on the left and bottom of the sub-pixel with a smaller area, or on the other two sides. The present application does not limit this.

[0053] In an optional embodiment, in order to further improve the area utilization within the pixel unit 2 while ensuring that the orthographic projection areas of the sub-pixels 23 on the substrate 1 are different, the shapes of the orthographic projections of the sub-pixels 23 of different areas on the substrate 1 include rectangular, T-shaped, L-shaped or other irregular shapes.

[0054] In an optional embodiment, each of the pixel units 2 further includes: a gate signal line 21 and a plurality of source signal lines 22, the gate signal line 21 extending along the first direction; a plurality of sub-pixels 23, the plurality of sub-pixels 23 being connected to different source signal lines 22 via a plurality of thin film transistors 234 corresponding to each sub-pixel 23, and the plurality of sub-pixels 23 being connected to the same gate signal line 21.

[0055] In the embodiment of the present application, in each pixel unit 2, the level where the gate signal line 21 is located is arranged on one side of the base substrate 1; the level where the multiple source signal lines 22 are located is arranged on the side of the level where the gate signal line 21 is located away from the base substrate 1; the level where the multiple sub-pixels 23 are located is arranged on the side of the level where the source signal line 22 is located away from the base substrate 1. In an optional embodiment, the orthographic projection of the source signal line 22 on the base substrate is a strip or a fold line. Preferably, in each pixel unit 2, when the orthographic projection of the source signal line 22 on the base substrate is a strip, the multiple source signal lines 22 are parallel to each other.

[0056] It should be noted that the number of the plurality of sub-pixels 23 in each pixel unit 2 in the embodiment of the present application can be determined according to actual conditions. When the number of sub-pixels is greater, the number of grayscales obtained by combining sub-pixels of different areas increases accordingly. The specific number of sub-pixels is not limited in the present application. Preferably, in order to ensure the aperture ratio and the conductive effect of the thin film transistor, the number of the sub-pixels 23 in each pixel unit 2 is three or four.

[0057] In an optional embodiment, if Figure 2 As shown, the plurality of sub-pixels 23 include a first sub-pixel 231, a second sub-pixel 232, and a third sub-pixel 233 arranged in sequence along the first direction. The areas of the orthographic projections of the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 on the base substrate 1 increase in sequence, and there is no overlap between the orthographic projections of the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 on the base substrate 1.

[0058] In an optional embodiment, when each pixel unit 2 includes a first sub-pixel 231, a second sub-pixel 232, and a third sub-pixel 233 arranged in sequence along the first direction, the pixel unit 2 includes a first area 24, a second area 25, and a third area 26, and the first area 24, the second area 25, and the third area 26 are rectangular in shape, and one side of the rectangle is arranged in parallel along the first direction. In order to ensure that the areas of the positive projections of the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 on the base substrate 1 increase in sequence, and at the same time improve the area utilization of the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 in the pixel unit 2, a nested structure is formed by setting the positional relationship between each sub-pixel and the area. Specifically, as Figure 2 As shown, the first sub-pixel 231 is only located in the first area 24; the second sub-pixel 232 is located in the first area 24 and the second area 25, so that the second sub-pixel 232 is located on the right side and the upper side of the first sub-pixel 231, the second sub-pixel 232 located on the right side is located in the second area 25, and the second sub-pixel 232 located on the upper side is located in the first area 24 and the second area 25; the third sub-pixel 233 is located in the first area 24, the second area 25 and the third area 26, so that the third sub-pixel 233 is located on the right side and the upper side of the second sub-pixel 232 and the first sub-pixel 231, the third sub-pixel 233 located on the right side is located in the third area 26, and the third sub-pixel 233 located on the upper side is located in the first area 24, the second area 25 and the third area 26.

[0059] In an optional embodiment, in order to improve the aperture ratio of each pixel unit 2 and reduce the orthographic projection area of ​​the source signal line 22 on the base substrate 1, the orthographic projections of the multiple source signal lines 22 on the base substrate 1 overlap with the orthographic projections of at least one of the first sub-pixel 231, the second sub-pixel 232 and the third sub-pixel 233 on the base substrate 1.

[0060] Alternatively, if Figure 2 As shown, the source signal line connected to the first sub-pixel 231 is the first source signal line 221, the source signal line connected to the second sub-pixel 232 is the second source signal line 222, and the source signal line connected to the third sub-pixel 233 is the third source signal line 223, wherein the first source signal line 221, the second source signal line 222 and the third source signal line 223 extend along the second direction and are parallel to each other. The first region 24 is between the first source signal line 221 and the second source signal line 222, and the orthographic projections of the first sub-pixel 231, the second sub-pixel 232 and the third sub-pixel 233 on the substrate 1 do not overlap; the second region 25 is between the second source signal line 222 and the third source signal line 223, and the orthographic projection of the second source signal line 222 on the substrate 1 passes through the orthographic projections of the second sub-pixel 232 on the substrate 1 and the orthographic projections of the third sub-pixel 233 on the substrate 1, respectively; the side of the third source signal line 223 away from the second region 25 is the third region 26, and the orthographic projection of the third source signal line 223 on the substrate 1 passes through the orthographic projection of the third sub-pixel 233 on the substrate 1.

[0061] The present application arranges a source signal line 22 whose orthographic projection on the base substrate 1 overlaps with the orthographic projection of at least one of the first sub-pixel 231, the second sub-pixel 232 and the third sub-pixel 233 on the base substrate 1, so that sub-pixels of different areas in the same pixel unit can be arranged in more flexible shapes and area ratios, making the grayscale area ratio adjustment more convenient; at the same time, the restriction of the source signal line 22 on the sub-pixel area is liberated, thereby improving the aperture ratio of the display area of ​​the electronic paper and improving the display effect of the electronic paper.

[0062] In an optional implementation, under the premise of ensuring the display effect, in order to reduce the coupling capacitor C in each pixel unit 2 pd In order to avoid adverse effects, the orthographic projections of the plurality of source signal lines 22 on the base substrate 1 do not overlap with the orthographic projections of the first sub-pixel 231 , the second sub-pixel 232 , and the third sub-pixel 233 on the base substrate 1 .

[0063] Optionally, the orthographic projection of the source signal line 22 on the base substrate 1 is located in a space between orthographic projections of two adjacent sub-pixels on the base substrate 1 . Figure 4 FIG. 4 shows another schematic diagram of an array substrate structure proposed in an embodiment of the present application. Figure 4 As shown, the first source signal line 221, the second source signal line 222, and the third source signal line 223 are of a zigzag type, wherein the orthographic projection of the first source signal line 221 on the base substrate 1 extends along the edge of the first sub-pixel 231; the orthographic projection of the second source signal line 222 on the base substrate 1 extends along the edge of the second sub-pixel 232; and the orthographic projection of the third source signal line 223 on the base substrate 1 extends along the edge of the third sub-pixel 233.

[0064] Figure 5 FIG. 4 shows a schematic diagram of a pixel driving waveform of a pixel unit proposed in an embodiment of the present application. Figure 5 As shown, g1 represents the gate signal input by the gate signal line 21 in the pixel unit 2. When the gate signal is input, the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 of three different areas are turned on at the same time, and receive the source signal s1 of the first source signal line 221, the source signal s2 of the second source signal line 222, and the source signal s3 of the third source signal line 223 respectively. The three different source signals (source voltages) make the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 display different bright or dark states. Figure 5 Take the case shown as an example, the gate signal line of g1 is +20V, and the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 of three different areas are turned on at the same time to receive the source signal, wherein the source signal s1 of the first source signal line 221 is +15V, and the area corresponding to the first sub-pixel 231 is in a dark state; the source signal s2 of the second source signal line 222 is 0V, and the area corresponding to the second sub-pixel 232 is in a bright state; the source signal s3 of the third source signal line 223 is +15V, and the area corresponding to the third sub-pixel 233 is in a dark state. At this time, the screen display effect of the entire pixel unit is a transitional grayscale display effect between the bright state and the dark state formed by the combination of the first sub-pixel in the dark state, the second sub-pixel in the bright state, and the third sub-pixel in the dark state (the three sub-pixels have different areas). It should be noted that the above examples are provided for those skilled in the art to better understand the solution of the present application. Figure 5 An optional grayscale state for the case of the pixel unit with three sub-pixels has the other seven grayscale display effects as described above, which will not be described in detail here.

[0065] In an optional embodiment, since the human eye is more sensitive to grayscale in darker places, the area combination of sub-pixels can be changed to make sub-pixels with smaller areas account for a larger proportion, so that the grayscale effect displayed by the sub-pixels is more adapted to the sensitivity of the human eye to the brightness grayscale, thereby further improving the display effect of the electronic paper. Specifically, the present application proposes an area condition, and the area condition is: the ratio of the area of ​​the orthographic projection of the first sub-pixel 231 or the second sub-pixel 232 on the substrate 1 to the sum of the areas of the multiple sub-pixels on the substrate 1 is less than or equal to 0.15, and the ratio of the sum of the areas of the orthographic projections of the first sub-pixel 231 and the second sub-pixel 232 on the substrate 1 to the sum of the areas of the multiple sub-pixels on the substrate 1 is less than or equal to 0.35. Multiple sub-pixels that meet the above area conditions can make the displayed grayscale effect more adapted to the sensitivity of the human eye to the brightness grayscale. Figure 6a A Gamma2.2 comparison diagram corresponding to a sub-pixel area combination that meets the area condition proposed in an embodiment of the present application is shown. Figure 6b A Gamma2.2 comparison diagram corresponding to a sub-pixel area combination that does not meet the area condition proposed in an embodiment of the present application is shown, wherein the horizontal axis is the number of grayscales obtained by the sub-pixel combination, and the vertical axis is the transmittance, wherein, Figure 6a The corresponding sub-pixels in the figure are the sub-pixel area combinations that meet the area condition. Specifically, the area ratio of the orthographic projection of the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 on the substrate 1 is 0.1:0.2:0.7. Figure 6b The corresponding sub-pixels are sub-pixel area combinations that do not meet the area condition, and specifically, the area ratio of the orthographic projection of the first sub-pixel 231, the second sub-pixel 232, and the third sub-pixel 233 on the base substrate 1 is 0.2:0.3:0.5.

[0066] like Figure 6a and Figure 6b As shown, Figure 6a The corresponding sub-pixel area combination (corresponding ratio is 0.1:0.2:0.7) satisfies the above area condition (the ratio of the area of ​​the orthographic projection of the first sub-pixel 231 or the second sub-pixel 232 on the substrate 1 to the sum of the areas of the multiple sub-pixels on the substrate 1 is less than or equal to 0.15, and the ratio of the sum of the areas of the orthographic projections of the first sub-pixel 231 and the second sub-pixel 232 on the substrate 1 to the sum of the areas of the multiple sub-pixels on the substrate 1 is less than or equal to 0.35), and the Gamma curve corresponding to the sub-pixel has a higher degree of overlap with the Gamma2.2 curve (as the reference curve) in the darker grayscale; Figure 6bThis means that the corresponding sub-pixel area combination (corresponding to a ratio of 0.2:0.3:0.5) does not meet the above area conditions, and the Gamma curve corresponding to the sub-pixel has a lower overlap with the Gamma2.2 curve in the darker grayscale. Therefore, for the sub-pixel area combination that meets the above area conditions, the overlap between the grayscale and the Gamma2.2 curve in the darker grayscale can be improved, and the human eye is more sensitive to the grayscale display effect in the darker grayscale. Therefore, compared with the sub-pixel area combination that does not meet the area conditions, the sub-pixel area combination that meets the above area conditions is more suitable for the perception of the human eye, thereby improving the display effect of the electronic paper.

[0067] Preferably, the area ratio of the orthographic projections of the first sub-pixel 231 , the second sub-pixel 232 and the third sub-pixel 233 on the base substrate 1 is any one of 0.1:0.2:0.7, 0.05:0.2:0.75 and 0.05:0.3:0.65.

[0068] The present application provides an array substrate, the array substrate comprising: a base substrate, and a plurality of pixel units arranged on one side of the base substrate, the pixel units are arranged in an array along a first direction and a second direction, each of the pixel units comprises: a plurality of sub-pixels, each sub-pixel comprises a pixel electrode, and the pixel electrodes of at least two sub-pixels have different positive projection areas on the base substrate; wherein the pixel electrode comprises a plurality of sub-electrode regions, the plurality of sub-electrode regions are connected to each other, the plurality of sub-electrode regions are arranged in parallel along the second direction, and the widths of the positive projections of two adjacent sub-electrode regions on the base substrate along the first direction are different. The present application provides pixel electrodes of a plurality of sub-pixels with different areas in each pixel unit, and ensures that the sub-pixel charging is not affected by the sub-electrode regions with different widths in the first direction in the pixel electrode, so that the sub-pixels of each pixel unit can achieve more grayscales, effectively improving the display effect of the electronic paper.

[0069] Based on the same inventive concept, the embodiment of the present application discloses a display panel, comprising a liquid crystal layer, a cell substrate, and an array substrate as described in the embodiment of the present application, wherein the liquid crystal layer is located between the cell substrate and the array substrate. A common electrode is provided on the cell substrate; and the liquid crystal layer is used to reflect ambient light. Preferably, the liquid crystal layer is a cholesteric liquid crystal layer.

[0070] Based on the same inventive concept, an embodiment of the present application discloses a display device, which includes the display panel provided in the embodiment of the present application.

[0071] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0072] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0073] References herein to "one embodiment," "embodiment," or "one or more embodiments" mean that a particular feature, structure, or characteristic described in conjunction with the embodiment is included in at least one embodiment of the present disclosure. In addition, please note that examples of the term "in one embodiment" do not necessarily all refer to the same embodiment.

[0074] In the description provided herein, a large number of specific details are described. However, it is understood that the embodiments of the present disclosure can be practiced without these specific details. In some instances, well-known methods, structures and techniques are not shown in detail so as not to obscure the understanding of this description.

[0075] In the claims, any reference signs placed between brackets shall not be construed as limiting the claims. The word "comprising" does not exclude the presence of elements or steps not listed in the claims. The word "a" or "an" preceding an element does not exclude the presence of a plurality of such elements. The present disclosure may be implemented by means of hardware comprising a number of different elements and by means of a suitably programmed computer. In a unit claim enumerating a number of means, several of these means may be embodied by the same item of hardware. The use of the words first, second, and third, etc. does not indicate any order. These words may be interpreted as names.

[0076] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present disclosure, rather than to limit them. Although the present disclosure has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present disclosure.

[0077] The above is a detailed introduction to an array substrate and a display panel provided by the present application. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for a person skilled in the art, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An array substrate, characterized in that: The array substrate comprises: A base substrate, and a plurality of pixel units arranged on one side of the base substrate, wherein the pixel units are arranged in an array along a first direction and a second direction, and each of the pixel units comprises: A plurality of sub-pixels, each sub-pixel comprising a pixel electrode, and the pixel electrodes of at least two sub-pixels have different orthographic projection areas on the substrate; wherein the pixel electrode comprises a plurality of sub-electrode regions, the plurality of sub-electrode regions are interconnected, the plurality of sub-electrode regions are arranged in parallel along the second direction, and the orthographic projections of two adjacent sub-electrode regions on the substrate have different widths along the first direction.

2. The array substrate according to claim 1, characterized in that: Each sub-pixel further includes a thin film transistor, and the plurality of sub-electrode regions include a first sub-electrode region and a second sub-electrode region arranged in parallel along the second direction, wherein: The width of the orthographic projection of the second sub-electrode region on the base substrate along the first direction is greater than the width of the orthographic projection of the first sub-electrode region on the base substrate along the first direction; The thin film transistor is disposed on one side of the first sub-electrode region along the first direction, and the thin film transistor is connected to the first sub-electrode region.

3. The array substrate according to claim 1, characterized in that: In the same pixel unit, a sub-pixel is located on one side of another sub-pixel along the first direction and on one side of another sub-pixel along the second direction.

4. The array substrate according to claim 1, characterized in that: The shape of the orthographic projection of the sub-pixel on the substrate includes a rectangle, a T-shape, an L-shape or other irregular shapes.

5. The array substrate according to claim 2, characterized in that: Each of the pixel units further comprises: a gate signal line and a plurality of source signal lines, wherein the gate signal line extends along the first direction; The plurality of sub-pixels are connected to different source signal lines via the thin film transistor corresponding to each sub-pixel, and the plurality of sub-pixels are connected to the same gate signal line.

6. The array substrate according to claim 5, characterized in that: The orthographic projection of the source signal line on the base substrate is in the shape of a strip or a folded line.

7. The array substrate according to claim 5, characterized in that: The plurality of sub-pixels include a first sub-pixel, a second sub-pixel and a third sub-pixel arranged in sequence along the first direction; wherein, The areas of the orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the substrate increase sequentially, and there is no overlap between the orthographic projections of the first sub-pixel, the second sub-pixel and the third sub-pixel on the substrate.

8. The array substrate according to claim 7, characterized in that: The pixel unit includes a first area, a second area and a third area, and the first area, the second area and the third area are arranged in parallel along the first direction, wherein: The first sub-pixel is located in the first region, the second sub-pixel is located in the first region and the second region, and the third sub-pixel is located in the first region, the second region, and the third region.

9. The array substrate according to claim 7, characterized in that: The orthographic projections of the plurality of source signal lines on the base substrate overlap with the orthographic projections of at least one of the first sub-pixel, the second sub-pixel, and the third sub-pixel on the base substrate.

10. The array substrate according to claim 7, characterized in that: The orthographic projection of the source signal line on the base substrate has no overlap with the orthographic projections of the first sub-pixel, the second sub-pixel, and the third sub-pixel on the base substrate.

11. The array substrate according to claim 9, characterized in that: include: The source signal line connected to the first sub-pixel has no overlap with the orthographic projection of each sub-pixel on the base substrate; The orthographic projection of the source signal line connected to the second sub-pixel on the base substrate respectively passes through the orthographic projection of the second sub-pixel on the base substrate and the orthographic projection of the third sub-pixel on the base substrate; The orthographic projection of the source signal line connected to the third sub-pixel on the base substrate passes through the orthographic projection of the third sub-pixel on the base substrate.

12. The array substrate according to claim 10, characterized in that: include: The orthographic projection of the source signal line connected to the first sub-pixel on the base substrate extends along the edge of the first sub-pixel; The orthographic projection of the source signal line connected to the second sub-pixel on the base substrate extends along the edge of the second sub-pixel; The orthographic projection of the source signal line connected to the third sub-pixel on the base substrate extends along the edge of the third sub-pixel.

13. The array substrate according to claim 7, characterized in that: include: The ratio of the area of ​​the orthographic projection of the first sub-pixel or the second sub-pixel on the substrate to the sum of the areas of the multiple sub-pixels on the substrate is less than or equal to 0.15, and the ratio of the sum of the areas of the orthographic projections of the first sub-pixel and the second sub-pixel on the substrate to the sum of the areas of the multiple sub-pixels on the substrate is less than or equal to 0.

35.

14. The array substrate according to claim 13, characterized in that: An area ratio of the orthographic projections of the first sub-pixel, the second sub-pixel, and the third sub-pixel on the base substrate is any one of 0.1:0.2:0.7, 0.05:0.2:0.75, and 0.05:0.3:0.

65.

15. A display panel, characterized in that: It comprises a liquid crystal layer, a cell-matching substrate, and an array substrate as claimed in any one of claims 1 to 14, wherein the liquid crystal layer is located between the cell-matching substrate and the array substrate, and the liquid crystal layer is used for reflecting ambient light.

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