Singular value decomposition acceleration method and device based on GPGPU (General Purpose Graphics Processing Unit)
By utilizing parallel computing power on GPGPU and performing singular value decomposition based on index sequence pairing, the problems of large computing volume, high memory footprint and low parallel performance in hardware implementation are solved, and efficient SVD decomposition performance is achieved.
Patent Information
- Application Number
- CN202510096249.5
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2025-01-22
- Publication Date
- 2025-02-28
- Estimated Expiration
- Not applicable · inactive patent
AI Technical Summary
The existing SVD decomposition technology has a large amount of computing and memory usage in hardware implementation, and different indexing strategies affect the parallel computing efficiency of the hardware and reduce overall performance.
The singular value decomposition acceleration method based on GPGPU is used to obtain the index sequence of the matrix to be decomposed, and index sequence pairs are generated, and these index sequence pairs are traversed through kernel functions in the GPGPU, and matrix decomposition is performed using parallel computing power.
It significantly improves the performance of SVD decomposition, optimizes data locality, reduces algorithm running time and additional computing overhead, and improves hardware computing efficiency.
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Figure CN119537381A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the field of computer technology, and in particular to a GPGPU-based singular value decomposition acceleration method and device. Background Art
[0002] Singular Value Decomposition (SVD) is an important matrix decomposition technology that can decompose a matrix of any dimension into the product of three specific matrices, thereby extracting the important properties of the matrix. Because it can reduce high-dimensional data to low dimensions and has powerful information data extraction capabilities, it is widely used in convolutional neural networks and has considerable research value in big data applications such as image processing and natural language processing.
[0003] However, there are still many problems in the hardware implementation of the current SVD decomposition. First, as a high-order matrix decomposition, the computational complexity and number of iterations required for SVD decomposition increase as the matrix dimension increases. Secondly, since the original matrix, left singular matrix, right singular matrix, singular values and intermediate data need to be stored during matrix decomposition, a large amount of memory is consumed. Therefore, if the SVD decomposition technology is applied to hardware, it will cause a large amount of computation and a large amount of memory usage. In addition, different indexing strategies will limit the parallel performance of the entire SVD decomposition, seriously affecting the computing efficiency of the hardware and reducing the overall performance of the hardware from all aspects. Summary of the invention
[0004] The embodiment of the present invention provides a GPGPU-based singular value decomposition acceleration method and device, which are used to solve the following technical problems: applying SVD decomposition technology in hardware will cause a large amount of calculation and a large amount of memory usage, and different indexing strategies will affect the parallel computing efficiency of the hardware and reduce the overall performance of the hardware.
[0005] The embodiment of the present invention adopts the following technical solution: On the one hand, an embodiment of the present invention provides a GPGPU-based singular value decomposition acceleration method, the method comprising: based on the dimension of the matrix to be decomposed, obtaining an index sequence of the matrix to be decomposed; Based on the index sequence, generate a plurality of groups of index sequence pairs and store them in a global memory; Sending a kernel function kernel to the GPGPU, and traversing each group of index sequence pairs through each block in the kernel function kernel; Decomposing the matrix data corresponding to the first group of index sequences in the matrix to be decomposed through the queues in each block to obtain a first decomposition matrix; Decompose the matrix data corresponding to the second group of index sequences in the first decomposition matrix to obtain a second decomposition matrix, and so on until the last group of decomposition matrices are obtained to obtain the singular value decomposition result of the matrix to be decomposed.
[0006] In a feasible implementation, based on the dimension of the matrix to be decomposed, obtaining the index sequence of the matrix to be decomposed specifically includes: The serial number corresponding to each dimension is determined as the index of the matrix to be decomposed, and the sequence formed by the serial numbers is determined as the index sequence.
[0007] In a feasible implementation manner, before generating a plurality of groups of index sequence pairs based on the index sequence and storing them in the global memory, the method further includes: Based on the dimension of the matrix to be decomposed, determining the total number of stages for generating index sequence pairs; wherein the total number of stages is the dimension minus 1; Define the stage counter stage and column counter column, and set their initial values to 0; Define a global memory for storing the generated index sequence pairs.
[0008] In a feasible implementation, based on the index sequence, a plurality of groups of index sequence pairs are generated and stored in a global memory, specifically including: Divide the index sequence into two rows evenly to obtain an upward sequence and a downward sequence, and set arrows to point to the first column of the two-row sequence; At each stage, based on the direction of the arrow, an index is taken out from the upstream sequence and the downstream sequence respectively to form an index sequence pair; The index sequence pair is stored in the global memory.
[0009] In a feasible implementation, at each stage, based on the direction of the arrow, an index is taken out from the upstream sequence and the downstream sequence to form an index sequence pair, which specifically includes: In the first stage, let stage=1, and form an index sequence pair with each column index in the two row sequences to obtain the first set of index sequence pairs; In the second stage, let stage = 2, swap the upper and lower indexes pointed by the current arrow, and then move the descending sequence one position clockwise to obtain a new two-row sequence; Each column index in the new two-row sequence forms an index sequence pair to obtain a second set of index sequence pairs; Each time the stage increases by 2, after all operations are performed in that stage, the arrow is moved one column to the right, that is, column+1, and then the operations of the next stage are performed; And so on, until the stage is equal to the total number of stages, all group index sequence pairs are obtained and all are stored in the global memory.
[0010] In a feasible implementation, a kernel function kernel is sent to the GPGPU, and each group of index sequence pairs is traversed through each block in the kernel function kernel, specifically including: Sending a kernel function kernel to the GPGPU according to the number of index sequence pairs in each group of index sequence pairs obtained; wherein the kernel function kernel includes at least the same number of blocks as the number of the index sequence pairs; Each group of index sequence pairs is traversed in the global memory, and a block is allocated to each index sequence in the current group of index sequence pairs for subsequent matrix decomposition.
[0011] In a feasible implementation, decomposing the matrix data corresponding to the first group of index sequences in the matrix to be decomposed by the queue in each block to obtain a first decomposition matrix specifically includes: Through each block in the kernel function kernel, read each index sequence pair in the first group of index sequence pairs; Obtain two columns of matrix data corresponding to the current index sequence in the matrix to be decomposed to form an initial left matrix; Get the two columns of matrix data corresponding to the current index sequence in the identity matrix to form the initial right matrix; Calculate the inner product of the first column of matrix data, the inner product of the second column of matrix data, and the difference product of the two columns of matrix data in the initial left matrix through the queue in the current block, and write them into the shared memory; Calculating a matrix rotation angle according to the inner product and the difference product; rotating the initial left matrix and the initial right matrix based on the matrix rotation angle to obtain a first left matrix and a first right matrix; Calculate the inner product of the first column of matrix data, the inner product of the second column of matrix data, and the difference product of the two columns of matrix data in the first left matrix respectively, and calculate a new matrix rotation angle; based on the new matrix rotation angle, rotate the first left matrix and the first right matrix to obtain a second left matrix and a second right matrix; This process is repeated in this way until the absolute value of the difference product is less than a preset threshold value, thereby obtaining the final left matrix and right matrix calculated in the current block. The left matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a first left singular matrix corresponding to the first group of index sequence pairs; the right matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a first right singular matrix corresponding to the first group of index sequence pairs; the first left singular matrix and the first right singular matrix constitute the first decomposition matrix.
[0012] In a feasible implementation manner, decomposing the matrix data corresponding to the second group of index sequences in the first decomposition matrix to obtain a second decomposition matrix specifically includes: Through each block in the kernel function kernel, read each index sequence pair in the second group of index sequence pairs; Obtain two columns of matrix data corresponding to the current index sequence in the first left singular matrix to form an initial left matrix; Obtain two columns of matrix data corresponding to the current index sequence pair in the first right singular matrix to form an initial right matrix; Through the queue in the current block, the inner product of each column of matrix data of the initial left matrix, the difference product of two columns of matrix data, and the matrix rotation angle are iteratively calculated until the absolute value of the difference product is less than a preset threshold, thereby obtaining the final left matrix and right matrix calculated in the current block; The left matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a second left singular matrix corresponding to the second group of index sequence pairs; the right matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a second right singular matrix corresponding to the second group of index sequence pairs; the second left singular matrix and the second right singular matrix constitute the second decomposition matrix.
[0013] In a feasible implementation manner, until the last set of decomposition matrices is obtained, the singular value decomposition result of the matrix to be decomposed is obtained, which specifically includes: Reading the final left singular matrix and the final right singular matrix in the last group of decomposition matrices; based on , calculate the singular value matrix ; Wherein, A is the matrix to be decomposed, U is the left singular matrix, and V is the right singular matrix; The left singular matrix, the singular value matrix and the right singular matrix are output as singular value decomposition results of the matrix to be decomposed.
[0014] On the other hand, an embodiment of the present invention also provides a GPGPU-based singular value decomposition acceleration device, the device comprising: at least one processor; and a memory communicatively connected to the at least one processor; wherein the memory stores instructions that can be executed by the at least one processor so that the at least one processor can execute the GPGPU-based singular value decomposition acceleration method.
[0015] Compared with the prior art, the GPGPU-based singular value decomposition acceleration method provided by the embodiment of the present invention has the following beneficial effects: General Purpose GPU (GPGPU) is widely used in scientific computing, deep learning and other large-scale data processing due to its ultra-high computing power and thread parallelism. GPGPU is usually used as an accelerator to perform large-scale parallel computing. The host communicates with GPGPU through PCIe, loads the kernel function in the program into the computing unit array and internal computing unit in GPGPU for execution, and reasonably allocates and schedules parallel computing tasks on GPGPU to maximize the use of computing resources, ensuring that each processing unit can perform tasks in parallel without interfering with each other. Based on the high parallel characteristics of GPGPU, the present invention selects GPGPU for hardware acceleration of SVD decomposition, which can significantly improve the performance of the algorithm, optimize data locality, reduce the algorithm running time and additional computing overhead, etc., and has certain engineering application value.
[0016] In order to give full play to the powerful parallel computing function of GPGPU, the present invention adopts a ring sequence algorithm, which can generate all index sequence pairs in the least steps and avoid repeated data acquisition, so as to realize the simultaneous execution of all threads in the block, ensure the parallelism of operations, and allocate index sequence pairs, matrix data and intermediate data to different storage resources. It has good memory access rules and reduces the time of data access. BRIEF DESCRIPTION OF THE DRAWINGS
[0017] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the prior art descriptions. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings: Figure 1 A flow chart of a GPGPU-based singular value decomposition acceleration method provided in an embodiment of the present invention; Figure 2A schematic diagram of a specific architecture of a GPGPU-based singular value decomposition acceleration device provided in an embodiment of the present invention; Figure 3 A flowchart of a specific implementation method of a singular value decomposition acceleration method based on GPGPU provided by an embodiment of the present invention; Figure 4 A schematic diagram of the basic structure of a GPGPU-based singular value decomposition acceleration device provided in an embodiment of the present invention. DETAILED DESCRIPTION
[0018] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of this specification, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.
[0019] The embodiment of the present invention provides a GPGPU-based singular value decomposition acceleration method, such as Figure 1 As shown, the GPGPU-based singular value decomposition acceleration method specifically includes steps S101-S104: S101. Based on the dimension of the matrix to be decomposed, an index sequence of the matrix to be decomposed is obtained; based on the index sequence, a plurality of groups of index sequence pairs are generated and stored in a global memory.
[0020] Specifically, the serial number corresponding to each dimension is determined as the index of the matrix to be decomposed, and the sequence of serial numbers is determined as the index sequence. Then, based on the dimension of the matrix to be decomposed, the total number of stages for generating index sequence pairs is determined; wherein the total number of stages is the dimension minus 1.
[0021] Furthermore, a stage counter stage and a column counter column are defined, and their initial values are both set to 0. At the same time, a global memory is defined to store the generated index sequence pairs.
[0022] Furthermore, the index sequence is evenly divided into two rows to obtain an upward sequence and a downward sequence, and arrows are set to point to the first column of the two row sequences. In each stage, based on the direction of the arrow, an index is taken from the upward sequence and the downward sequence to form an index sequence pair, and the index sequence pair is stored in the global memory.
[0023] As a feasible implementation method, the specific process of obtaining the index sequence pair is as follows: In the first stage, let stage=1, and form an index sequence pair with each column index in the two row sequences to obtain the first set of index sequence pairs; In the second stage, let stage = 2, swap the upper and lower indexes pointed by the current arrow, and then move the lower sequence clockwise by one position to obtain a new two-row sequence; each column index in the new two-row sequence forms an index sequence pair to obtain the second set of index sequence pairs; Each time the stage increases by 2, before performing all operations in that stage, the arrow is moved one column to the right, that is, column+1, and then the subsequent steps are executed; For example, when stage=3 (2 is added based on stage=1), point the arrow to the second column of the two-row sequence obtained in the second stage, then swap the upper and lower indexes pointed by the current arrow, and then move the lower sequence clockwise by one position to obtain a new two-row sequence; each column index in the new two-row sequence forms an index sequence pair to obtain the third set of index sequence pairs; This step is repeated until the stage is equal to the total number of stages, and all group index sequence pairs are obtained and stored in the global memory.
[0024] The following is explained in detail through an embodiment: In the embodiment, assuming that the dimension of the matrix A to be decomposed is M=8, the total number of stages for generating index sequence pairs is M-1=7 stages. Based on the dimension M=8, let the index sequence of the matrix A to be decomposed be [1,2,3,4,5,6,7,8], and divide the index sequence into two rows on average to obtain the index sequence matrix: , now the arrow points to the first column, that is, to index 7 and index 8.
[0025] In the first stage, the relative index of each column is taken out to form an index sequence pair, thereby obtaining four index sequence pairs, namely (7,8), (5,6), (3,4), and (1,2), which constitute the first group of index sequence pairs.
[0026] In the second stage, the index sequence matrix In the example, the first column index pointed by the arrow is swapped to obtain the matrix , and then shift the descending sequence clockwise to the right by one position to obtain the matrix , thus obtaining the second set of index sequence pairs (8,2), (5,7), (3,6), (1,4).
[0027] In the third stage, the index sequence matrix In the example, the first column index pointed by the arrow is swapped to obtain the matrix , and then shift the descending sequence clockwise to the right by one position to obtain the matrix , thus obtaining the third set of index sequence pairs (2,4), (5,8), (3,7), (1,6).
[0028] Then move the arrow one column to the right, pointing to the final matrix obtained in the third stage , that is, index 5 and index 8.
[0029] In the fourth stage, the matrix In the example, the second column index pointed by the arrow is swapped to obtain the matrix , and then shift the descending sequence clockwise to the right by one position to obtain the matrix , thus obtaining the fourth set of index sequence pairs (2,6), (8,4), (3,5), (1,7).
[0030] By analogy with the above process, the fifth group of index sequence pairs obtained in the fifth stage are (2,7), (4,6), (3,8), (1,5), the sixth group of index sequence pairs obtained in the sixth stage are (2,5), (4,7), (8,6), (1,3), and the seventh group of index sequence pairs obtained in the seventh stage are (2,3), (4,5), (6,7), (1,8).
[0031] The seven groups of index sequence pairs obtained in the seven stages are all stored in the global memory for GPGPU access.
[0032] S102 , sending a kernel function kernel to the GPGPU, and traversing each group of index sequence pairs through each block in the kernel function kernel.
[0033] Specifically, Figure 2 A schematic diagram of a specific architecture of a GPGPU-based singular value decomposition acceleration device provided by an embodiment of the present invention is shown in FIG. Figure 2 As shown, the device includes a host and a GPGPU, wherein the host includes a memory for sending instructions, input and output, data, etc. The GPGPU includes a shared memory, a constant memory, and a global memory, and the shared memory can perform multi-threaded parallel computing.
[0034] According to the number of index sequence pairs in each group of index sequence pairs obtained, the host sends a kernel function kernel from the memory to the GPGPU through the PCLe bus; wherein the kernel function kernel contains at least the same number of blocks as the number of index sequence pairs.
[0035] Furthermore, the kernel function kernel traverses each group of index sequence pairs stored in the global memory of the GPGPU, and reads the corresponding index sequence pairs from each group of index sequence pairs according to the id through each block for subsequent matrix decomposition.
[0036] In one embodiment, suppose the first group of index sequence pairs is: (7,8), (5,6), (3,4), (1,2), then at least 4 blocks are required in the kernel function kernel, and each block corresponds to an index sequence pair, for example, block1 corresponds to (7,8), block2 corresponds to (5,6), block3 corresponds to (3,4), and block4 corresponds to (1,2).
[0037] S103 . Decompose the matrix data corresponding to the first group of index sequences in the matrix to be decomposed through the queues in each block to obtain a first decomposition matrix.
[0038] Specifically, through each block in the kernel function kernel, read each index sequence pair in the first group of index sequence pairs. Obtain two columns of matrix data corresponding to the current index sequence pair in the matrix to be decomposed to form an initial left matrix. Obtain two columns of matrix data corresponding to the current index sequence pair in the identity matrix to form an initial right matrix.
[0039] Furthermore, the inner product of the matrix data in the first column, the inner product of the matrix data in the second column, and the difference product of the matrix data in the two columns in the initial left matrix are calculated through the queue in the current block and written into the shared memory.
[0040] Furthermore, the matrix rotation angle is calculated according to the inner product and the difference product; based on the matrix rotation angle, the initial left matrix and the initial right matrix are rotated to obtain a first left matrix and a first right matrix.
[0041] Furthermore, the inner product of the first column of matrix data, the inner product of the second column of matrix data, and the difference product of the two columns of matrix data in the first left matrix are calculated respectively, and a new matrix rotation angle is calculated; based on the new matrix rotation angle, the first left matrix and the first right matrix are rotated to obtain the second left matrix and the second right matrix; and so on, until the absolute value of the difference product is less than a preset threshold, and the final left matrix and right matrix calculated in the current block are obtained.
[0042] Finally, the left matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain the first left singular matrix corresponding to the first group of index sequence pairs, and the right matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain the first right singular matrix corresponding to the first group of index sequence pairs; the first left singular matrix and the first right singular matrix constitute the first decomposition matrix.
[0043] In one embodiment, Figure 3 A specific implementation flow chart of a singular value decomposition acceleration method based on GPGPU provided by an embodiment of the present invention is as follows: Figure 3As shown, there is a queue in each block, which imports each set of index sequence pairs into the corresponding block in turn.
[0044] Assuming that the current block reads the index sequence pair (7,8), the 7th column data U7 and the 8th column data U8 are read from the matrix A to be decomposed to obtain the initial left matrix [U7,U8]. At the same time, the 7th column data V7 and the 8th column data V8 are also read from the identity matrix V to obtain the initial right matrix [V7,V8].
[0045] Then, according to the formula , calculate the inner product of the 7th column of data , according to the formula , calculate the inner product of the 8th column of data , according to the formula , calculate the difference between two columns of data ,Will , and Write to shared memory.
[0046] Then, according to , and Find the rotation angle : .
[0047] According to the rotation angle, the matrices [U7,U8] and [V7,V8] are rotated: ; .
[0048] Finally, the rotation obtained and Write it into the original matrices [U7,U8] and [V7,V8], and perform a new round of iteration until the final calculated difference product The absolute value abs( ) is less than the set threshold tol, the iteration of the current block ends, and the final left matrix [U7,U8] and right matrix [V7,V8] are obtained.
[0049] The other three blocks perform parallel operations at the same time, thus obtaining four left matrices [U7, U8], [U5, U6], [U3, U4], and [U1, U2], which are combined into the first left singular matrix U = [U1, U2, U3, U4, U5, U6, U7, U8]. Similarly, the first right singular matrix V = [V1, V2, V3, V4, V5, V6, V7, V8] can also be obtained.
[0050] S104, decomposing the matrix data corresponding to the second group of index sequences in the first decomposition matrix to obtain a second decomposition matrix, and so on, until the last group of decomposition matrices are obtained, thereby obtaining a singular value decomposition result of the matrix to be decomposed.
[0051] Specifically, through each block in the kernel function kernel, each index sequence pair in the second group of index sequence pairs is read. Two columns of matrix data corresponding to the current index sequence pair in the first left singular matrix are obtained to form an initial left matrix. Two columns of matrix data corresponding to the current index sequence pair in the first right singular matrix are obtained to form an initial right matrix.
[0052] Furthermore, through the queue in the current block, the inner product of each column of the matrix data of the initial left matrix, the difference product of the two columns of the matrix data, and the matrix rotation angle are iteratively calculated until the absolute value of the difference product is less than the preset threshold, and the final left matrix and right matrix calculated in the current block are obtained.
[0053] Furthermore, the left matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a second left singular matrix corresponding to the second group of index sequence pairs, and the right matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a second right singular matrix corresponding to the second group of index sequence pairs; the second left singular matrix and the second right singular matrix constitute a second decomposition matrix.
[0054] And so on, until the last set of decomposition matrices is obtained, and the singular value decomposition result of the matrix to be decomposed is obtained.
[0055] In one embodiment, Figure 3 As shown, after the calculation of the first set of index sequence pairs is completed, the second set of index sequence pairs is traversed.
[0056] Assuming that the current block reads the index sequence pair (8,2) in the second group of index sequence pairs, the 8th column data U8 and the 2nd column data U2 are read from the first left singular matrix U obtained in the first group to obtain the initial left matrix [U8,U2]. At the same time, the 8th column data V8 and the 2nd column data V2 are also read from the first right singular matrix V obtained in the first group to obtain the initial right matrix [V8,V2].
[0057] Then, according to the formula , calculate the inner product of the 8th column of data , according to the formula , calculate the inner product of the second column of data , according to the formula , calculate the difference between two columns of data ,Will , and Write to shared memory.
[0058] Then, according to , and Find the rotation angle : .
[0059] According to the rotation angle, the matrices [U8,U2] and [V8,V2] are rotated: ; .
[0060] Finally, the rotation obtained and Write it into the original matrices [U8,U2] and [V8,V2], and perform a new round of iteration until the final calculated difference product The absolute value of is less than the set threshold, the iteration of the current block ends, and the final left matrix [U8, U2] and right matrix [V8, V2] are obtained.
[0061] The other three blocks perform parallel operations at the same time, thus obtaining four left matrices [U8,U2], [U5,U7], [U3,U6], [U1,U4], which are combined into the second left singular matrix U=[U1,U2,U3,U4,U5,U6,U7,U8]. Similarly, the second right singular matrix V=[V1,V2,V3,V4,V5,V6,V7,V8] can also be obtained.
[0062] Based on the above steps, the left singular matrix and right singular matrix obtained each time are used as the data source of the next set of index sequence pairs to participate in the calculation, so as to iterate until the last set of index sequence pairs is traversed and the final left singular matrix U and right singular matrix V are obtained.
[0063] Further, the final left singular matrix and right singular matrix are read in the last set of decomposition matrices; then based on , calculate the singular value matrix . Where A is the matrix to be decomposed, U is the left singular matrix, and V is the right singular matrix.
[0064] Finally, the left singular matrix, the singular value matrix and the right singular matrix are output as the singular value decomposition results of the matrix to be decomposed, so that the matrix A to be decomposed can be quickly decomposed into three matrices in hardware implementation, thereby extracting the matrix features of the matrix A for use in convolutional neural networks or image processing fields.
[0065] In addition, the embodiment of the present invention also provides a GPGPU-based singular value decomposition acceleration device, such as Figure 4As shown in the figure, the GPGPU-based singular value decomposition acceleration device specifically includes: at least one processor; and a memory in communication with the at least one processor; wherein, The memory stores instructions executable by at least one processor to enable the at least one processor to perform: Based on the dimension of the matrix to be decomposed, obtain the index sequence of the matrix to be decomposed; Based on the index sequence, generate a plurality of groups of index sequence pairs and store them in a global memory; Sending a kernel function kernel to the GPGPU, and traversing each group of index sequence pairs through each block in the kernel function kernel; Decomposing the matrix data corresponding to the first group of index sequences in the matrix to be decomposed through the queues in each block to obtain a first decomposition matrix; Decompose the matrix data corresponding to the second group of index sequences in the first decomposition matrix to obtain a second decomposition matrix, and so on until the last group of decomposition matrices are obtained to obtain the singular value decomposition result of the matrix to be decomposed.
[0066] Each embodiment of the present invention is described in a progressive manner, and the same or similar parts between the embodiments can be referred to each other, and each embodiment focuses on the differences from other embodiments. In particular, for the device, equipment, and non-volatile computer storage medium embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiments.
[0067] The above describes specific embodiments of the present invention. In addition, the processes depicted in the accompanying drawings do not necessarily require the specific order or sequential order shown to achieve the desired results. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.
[0068] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the embodiments of the present invention may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the embodiments of the present invention should be included in the protection scope of the present invention.
Claims
1. A GPGPU-based singular value decomposition acceleration method, characterized in that: The method comprises: Based on the dimension of the matrix to be decomposed, obtain the index sequence of the matrix to be decomposed; Based on the index sequence, generate a plurality of groups of index sequence pairs and store them in a global memory; Sending a kernel function kernel to the GPGPU, and traversing each group of index sequence pairs through each block in the kernel function kernel; Decomposing the matrix data corresponding to the first group of index sequences in the matrix to be decomposed through the queues in each block to obtain a first decomposition matrix; Decompose the matrix data corresponding to the second group of index sequences in the first decomposition matrix to obtain a second decomposition matrix, and so on until the last group of decomposition matrices are obtained to obtain the singular value decomposition result of the matrix to be decomposed.
2. The GPGPU-based singular value decomposition acceleration method according to claim 1, characterized in that: Based on the dimension of the matrix to be decomposed, obtain the index sequence of the matrix to be decomposed, including: The serial number corresponding to each dimension is determined as the index of the matrix to be decomposed, and the sequence formed by the serial numbers is determined as the index sequence.
3. The GPGPU-based singular value decomposition acceleration method according to claim 1, characterized in that: Before generating a plurality of groups of index sequence pairs based on the index sequence and storing them in a global memory, the method further comprises: Based on the dimension of the matrix to be decomposed, determining the total number of stages for generating index sequence pairs; wherein the total number of stages is the dimension minus 1; Define the stage counter stage and column counter column, and set their initial values to 0; Define a global memory for storing the generated index sequence pairs.
4. The GPGPU-based singular value decomposition acceleration method according to claim 3, characterized in that: Based on the index sequence, a plurality of groups of index sequence pairs are generated and stored in a global memory, specifically including: Divide the index sequence into two rows evenly to obtain an upward sequence and a downward sequence, and set arrows to point to the first column of the two-row sequence; At each stage, based on the direction of the arrow, an index is taken out from the upstream sequence and the downstream sequence respectively to form an index sequence pair; The index sequence pair is stored in the global memory.
5. The GPGPU-based singular value decomposition acceleration method according to claim 4, characterized in that: At each stage, based on the direction of the arrow, an index is taken out from the upstream sequence and the downstream sequence to form an index sequence pair, which specifically includes: In the first stage, let stage=1, and form an index sequence pair with each column index in the two row sequences to obtain the first set of index sequence pairs; In the second stage, let stage = 2, swap the upper and lower indexes pointed by the current arrow, and then move the descending sequence one position clockwise to obtain a new two-row sequence; Each column index in the new two-row sequence forms an index sequence pair to obtain a second set of index sequence pairs; Each time the stage increases by 2, after all operations are performed in that stage, the arrow is moved one column to the right, that is, column+1, and then the operations of the next stage are performed; And so on, until the stage is equal to the total number of stages, all group index sequence pairs are obtained and all are stored in the global memory.
6. The GPGPU-based singular value decomposition acceleration method according to claim 1, characterized in that: Send the kernel function kernel to the GPGPU, and traverse each group of index sequence pairs through each block in the kernel function kernel, specifically including: Sending a kernel function kernel to the GPGPU according to the number of index sequence pairs in each group of index sequence pairs obtained; wherein the kernel function kernel includes at least the same number of blocks as the number of the index sequence pairs; Each group of index sequence pairs is traversed in the global memory, and a block is allocated to each index sequence in the current group of index sequence pairs for subsequent matrix decomposition.
7. The GPGPU-based singular value decomposition acceleration method according to claim 1, characterized in that: Decomposing the matrix data corresponding to the first group of index sequences in the matrix to be decomposed by the queue in each block to obtain a first decomposition matrix specifically includes: Through each block in the kernel function kernel, read each index sequence pair in the first group of index sequence pairs; Obtain two columns of matrix data corresponding to the current index sequence in the matrix to be decomposed to form an initial left matrix; Get the two columns of matrix data corresponding to the current index sequence in the identity matrix to form the initial right matrix; Calculate the inner product of the first column of matrix data, the inner product of the second column of matrix data, and the difference product of the two columns of matrix data in the initial left matrix through the queue in the current block, and write them into the shared memory; Calculating a matrix rotation angle according to the inner product and the difference product; rotating the initial left matrix and the initial right matrix based on the matrix rotation angle to obtain a first left matrix and a first right matrix; Calculate the inner product of the first column of matrix data, the inner product of the second column of matrix data, and the difference product of the two columns of matrix data in the first left matrix respectively, and calculate a new matrix rotation angle; based on the new matrix rotation angle, rotate the first left matrix and the first right matrix to obtain a second left matrix and a second right matrix; This process is repeated in this way until the absolute value of the difference product is less than a preset threshold value, thereby obtaining the final left matrix and right matrix calculated in the current block. The left matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a first left singular matrix corresponding to the first group of index sequence pairs; the right matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a first right singular matrix corresponding to the first group of index sequence pairs; the first left singular matrix and the first right singular matrix constitute the first decomposition matrix.
8. The GPGPU-based singular value decomposition acceleration method according to claim 7, characterized in that: Decomposing the matrix data corresponding to the second group of index sequences in the first decomposition matrix to obtain a second decomposition matrix specifically includes: Through each block in the kernel function kernel, read each index sequence pair in the second group of index sequence pairs; Obtain two columns of matrix data corresponding to the current index sequence in the first left singular matrix to form an initial left matrix; Obtain two columns of matrix data corresponding to the current index sequence pair in the first right singular matrix to form an initial right matrix; Through the queue in the current block, the inner product of each column of matrix data of the initial left matrix, the difference product of two columns of matrix data, and the matrix rotation angle are iteratively calculated until the absolute value of the difference product is less than a preset threshold, thereby obtaining the final left matrix and right matrix calculated in the current block; The left matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a second left singular matrix corresponding to the second group of index sequence pairs; the right matrices calculated in each block are combined into a matrix in the order of the index sequence to obtain a second right singular matrix corresponding to the second group of index sequence pairs; the second left singular matrix and the second right singular matrix constitute the second decomposition matrix.
9. The GPGPU-based singular value decomposition acceleration method according to claim 1, characterized in that: Until the last set of decomposition matrices is obtained, the singular value decomposition result of the matrix to be decomposed is obtained, which specifically includes: Reading the final left singular matrix and the final right singular matrix in the last group of decomposition matrices; based on , calculate the singular value matrix ; Wherein, A is the matrix to be decomposed, U is the left singular matrix, and V is the right singular matrix; The left singular matrix, the singular value matrix and the right singular matrix are output as singular value decomposition results of the matrix to be decomposed.
10. A GPGPU-based singular value decomposition acceleration device, characterized in that: The device comprises: at least one processor; and, a memory communicatively connected to the at least one processor; wherein, The memory stores instructions that can be executed by the at least one processor, so that the at least one processor can execute the GPGPU-based singular value decomposition acceleration method according to any one of claims 1-9.
Citation Information
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Hierarchical clustering algorithm optimization method based on multi-core calculation
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