Random number generation circuit and method and electronic product

Abstract

The invention provides a random number generation circuit and method and an electronic product. The random number generation circuit comprises a random voltage generation module and an amplification module, wherein the random voltage generation module generates random voltage based on random change of a conductor resistance value caused by electromigration; the amplification module is connected to the output end of the random voltage generation module and amplifies the voltage output by the random voltage generation module to obtain a random level signal. According to the random number generation circuit, the random number generation method and the electronic product, based on the electromigration principle, the characteristic that the resistance value of a conductor after electromigration has randomness is utilized, the electronic fuse unit is programmed, so that the fuse generates resistance change, the resistance change is converted into random differential voltage, and a random signal is finally amplified and output; the system has the advantages of high randomness, simple structure, convenience in operation, stability in working, small area, low power consumption and the like.

Description

Technical Field

[0001] The present invention relates to the field of integrated circuits, and in particular to a random number generating circuit, method and electronic product. Background Art

[0002] In the era of the Internet and big data, random numbers are being applied to more and more fields, such as bank data, communication passwords, and personal information security, all of which require the use of true random numbers. The characteristic of random numbers is that any number has nothing to do with the numbers that appear before and after it is generated. There are currently many different ways to generate random numbers. Although there are many physical phenomena in nature that can generate true random numbers: such as dice rolling, raindrop scattering, atomic nucleus electron distribution, etc., most of these physical random number generators are difficult to implement, and some of them have very complex technical requirements.

[0003] A common method of generating random numbers is to convert various random noises of integrated electronic components (such as random movement of electrons inside the components, thermal noise, etc.) and signal transmission jitter between devices (such as random jitter on the rising and falling edges of the oscillator output level) into random output signals through sampling and amplification in a physical random number generator. However, chips designed using these methods often require higher power consumption or area.

[0004] Therefore, how to obtain a random number generator that occupies a small area, has low power consumption, and is easy to implement has become one of the problems that technical personnel in this field need to solve urgently.

[0005] It should be noted that the above introduction to the technical background is only for the convenience of providing a clear and complete description of the technical solutions of the present invention and for the convenience of understanding by those skilled in the art. It cannot be considered that the above technical solutions are well known to those skilled in the art simply because these solutions are described in the background technology section of the present invention. Summary of the invention

[0006] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a random number generation circuit, method and electronic product to solve the problems of large occupied area, high power consumption and complex structure of the random number generator in the prior art.

[0007] To achieve the above-mentioned object and other related objects, the present invention provides a random number generating circuit, the random number generating circuit at least comprising:

[0008] Random voltage generation module and amplification module; wherein,

[0009] The random voltage generating module generates a random voltage based on the random change of the conductor resistance value caused by electromigration;

[0010] The amplification module is connected to the output end of the random voltage generation module, and amplifies the voltage output by the random voltage generation module to obtain a random level signal.

[0011] Optionally, the random voltage generating module is configured as follows: based on the electromigration of four electronic fuse units, four resistors with randomly changing resistance values ​​are obtained respectively, two of the four resistors form a group to form a voltage dividing structure, and two differential voltages with randomness are obtained through voltage division.

[0012] More optionally, the random voltage generating module comprises first, second, third and fourth electronic fuse units, and first, second, third and fourth switch units;

[0013] The first electronic fuse unit and the second electronic fuse unit are connected in parallel between the first output end of the random voltage generating module and the first preset voltage; the third electronic fuse unit and the fourth electronic fuse unit are connected in parallel between the second output end of the random voltage generating module and the first preset voltage;

[0014] The first switch unit is connected between the first output terminal and the second preset voltage, and the second switch unit is connected between the second output terminal and the second preset voltage, and is used to program each electronic fuse unit;

[0015] The third switch unit is connected between the first electronic fuse unit and the second preset voltage, and the fourth switch unit is connected between the third electronic fuse unit and the second preset voltage, so as to form two voltage-dividing structures;

[0016] Wherein, the first preset voltage is not equal to the second preset voltage.

[0017] More optionally, when the first preset voltage is less than the second preset voltage, each electronic fuse unit includes an NMOS switch tube and a fuse connected in series; the source of the NMOS switch tube is connected to the first preset voltage, the drain is connected to the corresponding output end of the random voltage generating module via the fuse, and the gate is connected to the corresponding control signal.

[0018] More optionally, when the first preset voltage is less than the second preset voltage, the first switch unit, the second switch unit, the third switch unit or the fourth switch unit is implemented by a PMOS tube.

[0019] More optionally, when the first preset voltage is greater than the second preset voltage, each electronic fuse unit includes a PMOS switch tube and a fuse connected in series; the source of the PMOS switch tube is connected to the second preset voltage, the drain is connected to the corresponding output end of the random voltage generating module via the fuse, and the gate is connected to the corresponding control signal.

[0020] More optionally, when the first preset voltage is greater than the second preset voltage, the first switch unit, the second switch unit, the third switch unit or the fourth switch unit is implemented by an NMOS tube.

[0021] Optionally, the amplification module is a sensitive amplifier structure.

[0022] To achieve the above object and other related objects, the present invention also provides a random number generation method, the random number generation method comprising:

[0023] 1) The conductor resistance value is randomly changed by electromigration, and a random voltage is obtained based on the random change of the resistance value;

[0024] 2) Collecting and amplifying the random voltage to obtain a random level signal representing a random number.

[0025] Optionally, step 1) includes:

[0026] 11) Apply voltage to the four fuses respectively, and each fuse undergoes electromigration and changes in resistance;

[0027] 12) Every two fuses form a series voltage-dividing structure. Based on the two series voltage-dividing structures, the same voltage is divided to obtain two voltage-dividing values, and the two voltage-dividing values ​​are differential signals.

[0028] To achieve the above-mentioned purpose and other related purposes, the present invention further provides an electronic product, which at least includes: the above-mentioned random number generating circuit.

[0029] As described above, the random number generation circuit, method and electronic product of the present invention have the following beneficial effects:

[0030] The random number generation circuit, method and electronic product of the present invention use the working mechanism that the electromigration phenomenon of the conductor will cause the resistance to increase and the resistance value to present randomness. Through the differential circuit design, the resistance change is converted into a voltage difference with randomness, and then amplified to output a random level signal. It has high randomness, reliable operation, small occupied area, and low working and standby power consumption. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 Shown is a block diagram of a random number generating circuit of the present invention.

[0032] Figure 2 Shown is a structural schematic diagram of the random voltage generating module of the present invention.

[0033] Figure 3 Shown is a schematic structural diagram of the amplification module of the present invention.

[0034] Figure 4 Shown is another structural schematic diagram of the random voltage generating module of the present invention.

[0035] Figure 5 It is a schematic flow chart of the random voltage generating method of the present invention.

[0036] Figure 6 It is a schematic diagram showing the principle of the random voltage generating module of the present invention obtaining a resistor with random resistance value through electromigration.

[0037] Figure 7 It is a schematic diagram showing the principle of the random voltage generation module of the present invention obtaining a random differential voltage through voltage division.

[0038] Component number description

[0039] 1 Random number generation circuit

[0040] 11 Random voltage generation module

[0041] 111 First electronic fuse unit

[0042] 112 Second electronic fuse unit

[0043] 113 Third electronic fuse unit

[0044] 114 Fourth electronic fuse unit

[0045] 115 First switch unit

[0046] 116 Second switch unit

[0047] 117 Third switch unit

[0048] 118 Fourth switch unit

[0049] 12 Amplification module DETAILED DESCRIPTION

[0050] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0051] See also Figure 1 to Figure 7It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the drawings only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the type, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0052] Embodiment 1

[0053] like Figure 1 As shown, this embodiment provides a random number generating circuit 1, and the random number generating circuit 1 includes:

[0054] A random voltage generating module 11 and an amplifying module 12 .

[0055] like Figure 1 As shown, the random voltage generating module 11 generates a random voltage based on the random change of the conductor resistance value caused by electromigration.

[0056] Specifically, electromigration is a common phenomenon that occurs on conductors. It refers to the migration of metal ions from one end to the other along the wire under the action of a strong electric field due to the passage of high-density current, resulting in mass transport inside the metal conductor, thereby forming voids in some areas of the conductor and accumulating to form protrusions or whiskers in other areas, which results in an increase in the resistance of the conductor. The resistance change caused by electromigration is uncontrollable and has randomness. The random voltage generating module 11 of the present invention generates a random change in the resistance of the conductor based on electromigration to obtain a corresponding random voltage value. Any circuit structure that can obtain a voltage with randomness through electromigration is applicable to the present invention.

[0057] Specifically, in this embodiment, the random voltage generating module 11 obtains four resistors with randomly changing resistance values ​​based on the electromigration of four electronic fuse units (efuse units) under the action of the control signal and the timing, and two of the four resistors form a group to form a voltage dividing structure, and obtains two voltages VBL1 and VBL2 with randomness through voltage division. Figure 2 As shown, as an example, the random voltage generating module 11 includes a first electronic fuse unit 111, a second electronic fuse unit 112, a third electronic fuse unit 113, a fourth electronic fuse unit 114, a first switch unit 115, a second switch unit 116, a third switch unit 117 and a fourth switch unit 118. In this example, each electronic fuse unit includes an NMOS switch tube and a fuse; the source of the NMOS switch tube is connected to the reference ground GND (first preset voltage) as the first end of the corresponding electronic fuse unit, the drain is connected to one end of the fuse, and the gate is connected to the corresponding control signal; the other end of the fuse is connected to the corresponding output end of the random voltage generating module 11 as the second end of the corresponding electronic fuse unit.

[0058] More specifically, the first electronic fuse unit 111 and the second electronic fuse unit 112 are connected in parallel between the first output terminal BL1 of the random voltage generating module 11 and the reference ground GND, that is, the first ends of the first electronic fuse unit 111 and the second electronic fuse unit 112 are connected to the reference ground GND, and the second ends are connected to the first output terminal BL1 (outputting the first voltage VBL1) of the random voltage generating module 11. The third electronic fuse unit 113 and the fourth electronic fuse unit 114 are connected in parallel between the second output terminal BL2 of the random voltage generating module 11 and the reference ground GND, that is, the first ends of the third electronic fuse unit 113 and the fourth electronic fuse unit 114 are connected to the reference ground GND, and the second ends are connected to the second output terminal BL2 (outputting the second voltage VBL2) of the random voltage generating module 11. In this example, the NMOS switch tubes (Q11, Q13) in the first electronic fuse unit 111 and the third electronic fuse unit 113 are controlled by the first control signal WL1, and the NMOS switch tubes (Q12, Q14) in the second electronic fuse unit 112 and the fourth electronic fuse unit 114 are controlled by the second control signal WL2; when the control signal (WL1 or WL2) is at a high level, the corresponding NMOS switch tube is turned on, and the corresponding fuse is grounded; when the control signal (WL1 or WL2) is at a low level, the corresponding NMOS switch tube is turned off, and the corresponding fuse is not grounded.

[0059] More specifically, the first switch unit 115 is connected between the first output terminal BL1 of the random voltage generating module 11 and the power supply voltage VPP (the second preset voltage), and is controlled by the first programming signal BS1, and is used to implement the programming of the first electronic fuse unit 111 or the second electronic fuse unit 112. The second switch unit 116 is connected between the second output terminal BL2 of the random voltage generating module 11 and the power supply voltage VPP, and is controlled by the second programming signal BS2, and is used to implement the programming of the third electronic fuse unit 113 or the fourth electronic fuse unit 114. In this example, the first switch unit 115 and the second switch unit 116 are implemented by PMOS tubes (Q15, Q16), the source of the PMOS tube is connected to the power supply voltage VPP, the drain is connected to the corresponding output terminal (BL1 or BL2), and the gate is connected to the corresponding programming signal (BS1 or BS2); when the programming signal (BS1 or BS2) is at a high level, the corresponding switch unit is turned off, and when the programming signal (BS1 or BS2) is at a low level, the corresponding switch unit is turned on.

[0060] More specifically, the third switch unit 117 is connected between the first electronic fuse unit 111 and the power supply voltage VPP, and is controlled by the read signal RWLB to form a voltage-dividing structure formed by the first electronic fuse 111 and two fuses (resistors) in the second electronic fuse 112; in this example, the third switch unit 117 connects the connection node of the NMOS switch tube and the fuse in the first electronic fuse unit 111. The fourth switch unit 118 is connected between the third electronic fuse unit 113 and the power supply voltage VPP, and is controlled by the read signal RWLB to form a voltage-dividing structure formed by the third electronic fuse 113 and two fuses (resistors) in the fourth electronic fuse 114; in this example, the fourth switch unit 118 connects the connection node of the NMOS switch tube and the fuse in the third electronic fuse unit 113. In this example, the third switch unit 117 and the fourth switch unit 118 are implemented by PMOS tubes (Q17, Q18), the source of the PMOS tube is connected to the power supply voltage VPP, the drain is connected to the drain of the corresponding NMOS tube (Q11 or Q13), and the gate is connected to the read signal RWLB; when the read signal RWLB is at a high level, the corresponding switch unit is turned off, and when the read signal RWLB is at a low level, the corresponding switch unit is turned on.

[0061] It should be noted that, in this example, the first preset voltage is the reference ground, and the second preset voltage is the power supply voltage. In actual use, the voltage difference and voltage value of the first preset voltage and the second preset voltage can be set as needed, and the programming of each fuse and the reading of the voltage can be realized, which is not limited to this embodiment. Similarly, the relationship between the control signals received by each switch tube and the level setting can also be adjusted according to actual needs, as long as the function of the random voltage generation module of the present invention can be realized.

[0062] like Figure 1 As shown, the amplification module 12 is connected to the output end of the random voltage generation module 11, and amplifies the voltage output by the random voltage generation module 11 to obtain a random level signal, which is a random number.

[0063] Specifically, in this embodiment, the amplification module 12 adopts a sense amplifier (SA) structure. Figure 3As shown, as an example, the amplification module 12 includes a first PMOS tube P1, a second PMOS tube P2, a first NMOS tube N1, a second NMOS tube N2, a third NMOS tube N3, a fourth NMOS tube N4, a fifth NMOS tube N5 and an inverter not1. Among them, the source of the first PMOS tube P1 and the second PMOS tube P2 is connected to the power supply voltage VPP; the first PMOS tube P1, the second PMOS tube P2, the first NMOS tube N1 and the second NMOS tube N2 are cross-coupled to form a latch structure; the source of the first NMOS tube N1 and the second NMOS tube N2 is grounded through the third NMOS tube N3, and the third NMOS tube N3 is controlled by the inverse signal of the amplification control signal RD (that is, the amplification control signal RD is applied to the gate of the third NMOS tube N3 through the inverter not1). One end of the fourth NMOS transistor N4 serves as the first input end of the amplifier module 12 (receiving the first voltage VBL1), and the other end is connected to the first storage node of the latch structure (the connection node of the drain of the first PMOS transistor P1 and the first NMOS transistor N1), and is controlled by the amplification control signal RD. One end of the fifth NMOS transistor N5 serves as the second input end of the amplifier module 12 (receiving the second voltage VBL2), and the other end is connected to the second storage node of the latch structure (the connection node of the drain of the second PMOS transistor P2 and the second NMOS transistor N2), and is controlled by the amplification control signal RD. The second storage node serves as the output end of the amplifier module 12 to obtain the output voltage D0.

[0064] It should be noted that, in actual use, any circuit structure that can amplify the voltage output by the random voltage generating module 11 is applicable to the amplifying module of the present invention, and is not limited to this embodiment.

[0065] This embodiment also provides an electronic product, which at least includes: the random number generating circuit 1 of the present invention to obtain random numbers. The electronic product includes but is not limited to being used in the fields of communication, personal information security, bank data, and statistical analysis, which are not described in detail here.

[0066] The present invention utilizes the electromigration phenomenon occurring on a conductor as the principle of random number generation and integrates the design concept of an electronic fuse unit, so that a usable random phenomenon can be generated only by flowing current through the conductor and causing the conductor resistance value to change, thereby avoiding complex circuit design and excessive area requirements. In addition, the working and standby power consumption of the entire circuit are very low, thereby expanding the scope of application.

[0067] Embodiment 2

[0068] like Figure 4 As shown, the embodiment provides a random number generating circuit 1 and an electronic product, which are different from the first embodiment in that the implementation method of the random voltage generating module 11 is different.

[0069] like Figure 4 As shown, the random voltage generating module 11 includes a first electronic fuse unit 111, a second electronic fuse unit 112, a third electronic fuse unit 113, a fourth electronic fuse unit 114, a first switch unit 115, a second switch unit 116, a third switch unit 117 and a fourth switch unit 118. In this embodiment, the first preset voltage is the power supply voltage VPP, and the second preset voltage is the reference ground GND; each electronic fuse unit includes a PMOS switch tube and a fuse; the source of the PMOS switch tube is connected to the power supply voltage VPP as the first end of the corresponding electronic fuse unit, the drain is connected to one end of the fuse, and the gate is connected to the corresponding control signal; the other end of the fuse is connected to the corresponding output end of the random voltage generating module 11 as the second end of the corresponding electronic fuse unit.

[0070] More specifically, the first electronic fuse unit 111 and the second electronic fuse unit 112 are connected in parallel between the first output terminal BL1 of the random voltage generating module 11 and the power supply voltage VPP; the third electronic fuse unit 113 and the fourth electronic fuse unit 114 are connected in parallel between the second output terminal BL2 of the random voltage generating module 11 and the power supply voltage VPP. In this example, the PMOS switch tubes (Q21, Q23) in the first electronic fuse unit 111 and the third electronic fuse unit 113 are controlled by the first control signal WL1, and the PMOS switch tubes (Q22, Q24) in the second electronic fuse unit 112 and the fourth electronic fuse unit 114 are controlled by the second control signal WL2; when the control signal (WL1 or WL2) is at a low level, the corresponding PMOS switch tube is turned on and the corresponding fuse is grounded; when the control signal (WL1 or WL2) is at a high level, the corresponding PMOS switch tube is turned off and the corresponding fuse is not grounded.

[0071] More specifically, the first switch unit 115 is connected between the first output terminal BL1 of the random voltage generating module 11 and the reference ground GND, and is controlled by the first programming signal BS1, and is used to implement the programming of the first electronic fuse unit 111 or the second electronic fuse unit 112. The second switch unit 116 is connected between the second output terminal BL2 of the random voltage generating module 11 and the reference ground GND, and is controlled by the second programming signal BS2, and is used to implement the programming of the third electronic fuse unit 113 or the fourth electronic fuse unit 114. In this example, the first switch unit 115 and the second switch unit 116 are implemented by NMOS tubes (Q25, Q26), the source of the NMOS tube is connected to the reference ground GND, the drain is connected to the corresponding output terminal (BL1 or BL2), and the gate is connected to the corresponding programming signal (BS1 or BS2); when the programming signal (BS1 or BS2) is at a low level, the corresponding switch unit is turned off, and when the programming signal (BS1 or BS2) is at a high level, the corresponding switch unit is turned on.

[0072] More specifically, the third switch unit 117 is connected between the first electronic fuse unit 111 and the reference ground GND, and is controlled by the read signal RWLB to form a voltage-dividing structure formed by the first electronic fuse 111 and two fuses (resistors) in the second electronic fuse 112; in this example, the third switch unit 117 connects the connection node of the PMOS switch tube and the fuse in the first electronic fuse unit 111. The fourth switch unit 118 is connected between the third electronic fuse unit 113 and the reference ground GND, and is controlled by the read signal RWLB to form a voltage-dividing structure formed by the third electronic fuse 113 and two fuses (resistors) in the fourth electronic fuse 114; in this example, the fourth switch unit 118 connects the connection node of the PMOS switch tube and the fuse in the third electronic fuse unit 113. In this example, the third switch unit 117 and the fourth switch unit 118 are implemented by NMOS tubes (Q27, Q28), the source of the NMOS tube is connected to the reference ground GND, the drain is connected to the drain of the corresponding PMOS tube (Q21 or Q23), and the gate is connected to the read signal RWLB; when the read signal RWLB is at a low level, the corresponding switch unit is turned off, and when the read signal RWLB is at a high level, the corresponding switch unit is turned on.

[0073] The other structures and working principles are the same as those in the first embodiment and will not be described in detail here.

[0074] Embodiment 3

[0075] like Figure 5 As shown, this embodiment also provides a random number generation method; in this embodiment, the method is implemented based on the random number generation circuit 1 of the first embodiment. In actual use, any circuit that can implement the method is applicable (including but not limited to the second embodiment), not limited to the second embodiment. The random number generation method includes:

[0076] 1) Electromigration causes random changes in conductor resistance, and a random voltage is obtained based on the random changes in resistance.

[0077] Specifically, the present invention obtains random numbers based on the electromigration of a conductor, and as an example, specifically includes the following steps:

[0078] 11) Voltage is applied to the four fuses respectively, and each fuse undergoes electromigration and a change in resistance.

[0079] In the random number generating circuit 1 of the first embodiment, the read signal RWLB is set to a high level, the first programming signal BS1 and the second programming signal BS2 are respectively set to a low level, the first control signal WL1 and the second control signal WL2 are respectively set to a high level, and the current flows from the power supply through each fuse into the ground, and each fuse undergoes electromigration and the resistance value increases randomly. After electromigration, the resistance values ​​of the fuses in each electronic fuse unit are recorded as R1, R2, R3, and R4, respectively.

[0080] like Figure 6 As shown, taking the electromigration of the fuse in the second electronic fuse unit 112 as an example, the read signal RWLB is set to a high level, the first programming signal BS1 is set to a low level, the second programming signal BS2 is set to a high level, the first control signal WL1 is set to a low level, and the second control signal WL2 is set to a high level. Then, at this time, the NMOS tube Q11, the NMOS tube Q13, the PMOS tube Q16, the PMOS tube Q17, and the PMOS tube Q18 are in the off state, and the NMOS tube Q12, the NMOS tube Q14, and the PMOS tube Q15 are in the on state. The current can only flow into the second electronic fuse unit 112 through the PMOS tube Q15, so that the fuse in the second electronic fuse unit 112 undergoes electromigration, and then a resistor with a resistance value of R2 is obtained; the method and principle for obtaining other resistance values ​​are similar.

[0081] 12) Every two fuses form a series voltage-dividing structure. Based on the two series voltage-dividing structures, the same voltage is divided to obtain two voltage-dividing values, and the two voltage-dividing values ​​are differential signals.

[0082] like Figure 7 As shown, in the random number generating circuit 1 of the first embodiment, the read signal RWLB is set to a low level, the first programming signal BS1 and the second programming signal BS2 are set to a high level, the first control signal WL1 is set to a low level, and the second control signal WL2 is set to a high level. Then, at this time, the NMOS tube Q11, the NMOS tube Q13, the PMOS tube Q15, and the PMOS tube P16 are in the off state, and the NMOS tube Q12, the NMOS tube Q14, the PMOS tube Q17, and the PMOS tube P18 are in the on state, and the current flows from the power supply through the PMOS tube Q17, the resistor R1, the resistor R2, and the NMOS tube Q12 to the ground, and at the same time, it also flows from the power supply through the PMOS tube Q18, the resistor R3, the resistor R4, and the NMOS tube Q14 to the ground. The first output terminal BL1 of the random voltage generating module 11 outputs the divided voltage of the resistors R1 and R2 (the first voltage VBL1), and the second output terminal BL2 of the random voltage generating module 11 outputs the divided voltage of the resistors R3 and R4 (the second voltage VBL2). The first voltage VBL1 and the second voltage VBL2 are differential voltages.

[0083] The first voltage VBL1 and the second voltage VBL2 respectively satisfy:

[0084] VBL1=VPP·(R2+Rn12) / (Rp17+R1+R2+Rn12) (1)

[0085] VBL2=VPP·(R4+Rn14) / (Rp18+R3+R4+Rn14) (2)

[0086] Among them, Rn12 is the equivalent resistance value of the NMOS tube Q12, Rp17 is the equivalent resistance value of the PMOS tube Q17, Rn14 is the equivalent resistance value of the NMOS tube Q14, and Rp18 is the equivalent resistance value of the PMOS tube Q18.

[0087] Since R1, R2, R3, and R4 are much larger than Rn12, Rn14, Rp17, and Rp18, equations (1) and (2) can be simplified as follows:

[0088] VBL1=VPP·R2 / (R1+R2) (3)

[0089] VBL2=VPP·R4 / (R3+R4) (4)

[0090] Thus, the differential voltage VBL1-VBL2 is obtained, which satisfies:

[0091]

[0092] It can be seen that the differential voltage (VBL1-VBL2) is related to the difference between the fuse resistances R1 / R2 and R3 / R4. Since R1~R4 are the resistance values ​​of the four fuses after electromigration, they are all random. Therefore, R1 / R2 and R3 / R4 are also random, so the differential voltage (VBL1-VBL2) is also random.

[0093] As an example, during the execution of step 1), the amplification control signal RD is set to a high level, and the amplification module 12 does not work.

[0094] 2) Collect and amplify the random voltage to obtain a random level signal representing a random number.

[0095] Specifically, Figure 3 As shown, in the process of establishing the first voltage VBL1 and the second voltage VBL2, based on the control of the amplification control signal RD, the fourth NMOS tube N4 and the fifth NMOS tube N5 are in the on state, the third NMOS tube N3 is in the off state, and the amplification module 12 samples the first voltage VBL1 and the second voltage VBL2. After the sampling is completed, the amplification control signal RD is set to a low level, then the fourth NMOS tube N4 and the fifth NMOS tube N5 are in the off state, and the sampling is completed; at the same time, the third NMOS tube N3 is in the on state, and the amplification module 12 works to amplify the differential voltage (VBL1-VBL2) to obtain the output voltage D0 (random number).

[0096] In summary, the present invention provides a random number generation circuit, method and electronic product, including: a random voltage generation module and an amplification module; wherein the random voltage generation module generates a voltage with randomness based on the random change of the conductor resistance value caused by electromigration; the amplification module is connected to the output end of the random voltage generation module, and amplifies the voltage output by the random voltage generation module to obtain a random level signal. The random number generation circuit, method and electronic product of the present invention are based on the principle of electromigration, and utilize the randomness of the resistance value of the conductor after electromigration. By programming the electronic fuse unit, the fuse generates a resistance change, which is converted into a random differential voltage, and finally amplifies and outputs a random signal; it has the advantages of high randomness, simple structure, convenient operation, stable operation, small area, low power consumption, etc. Therefore, the present invention effectively overcomes the various shortcomings in the prior art and has a high industrial utilization value.

[0097] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A random number generating circuit, characterized in that: The random number generating circuit at least comprises: Random voltage generation module and amplification module; wherein, The random voltage generating module generates a random voltage based on the random change of the conductor resistance value caused by electromigration; The amplification module is connected to the output end of the random voltage generation module, and amplifies the voltage output by the random voltage generation module to obtain a random level signal.

2. The random number generating circuit according to claim 1, characterized in that: The random voltage generating module is configured as follows: based on the electromigration of four electronic fuse units, four resistors with randomly changing resistance values ​​are obtained respectively, two of the four resistors form a voltage dividing structure as a group, and two differential voltages with randomness are obtained through voltage division.

3. The random number generating circuit according to claim 2, characterized in that: The random voltage generating module comprises first, second, third and fourth electronic fuse units, and first, second, third and fourth switch units; The first electronic fuse unit and the second electronic fuse unit are connected in parallel between the first output terminal of the random voltage generating module and the first preset voltage; The third electronic fuse unit and the fourth electronic fuse unit are connected in parallel between the second output terminal of the random voltage generating module and the first preset voltage; The first switch unit is connected between the first output terminal and the second preset voltage, and the second switch unit is connected between the second output terminal and the second preset voltage, and is used to program each electronic fuse unit; The third switch unit is connected between the first electronic fuse unit and the second preset voltage, and the fourth switch unit is connected between the third electronic fuse unit and the second preset voltage, so as to form two voltage-dividing structures; Wherein, the first preset voltage is not equal to the second preset voltage.

4. The random number generating circuit according to claim 3, characterized in that: When the first preset voltage is less than the second preset voltage, each electronic fuse unit includes an NMOS switch tube and a fuse connected in series; the source of the NMOS switch tube is connected to the first preset voltage, the drain is connected to the corresponding output end of the random voltage generating module via the fuse, and the gate is connected to the corresponding control signal.

5. The random number generating circuit according to claim 3 or 4, characterized in that: When the first preset voltage is less than the second preset voltage, the first switch unit, the second switch unit, the third switch unit or the fourth switch unit is implemented by a PMOS tube.

6. The random number generating circuit according to claim 3, characterized in that: When the first preset voltage is greater than the second preset voltage, each electronic fuse unit includes a PMOS switch tube and a fuse connected in series; the source of the PMOS switch tube is connected to the second preset voltage, the drain is connected to the corresponding output end of the random voltage generating module via the fuse, and the gate is connected to the corresponding control signal.

7. The random number generating circuit according to claim 3 or 6, characterized in that: When the first preset voltage is greater than the second preset voltage, the first switch unit, the second switch unit, the third switch unit or the fourth switch unit is implemented by an NMOS tube.

8. The random number generating circuit according to claim 1, characterized in that: The amplification module is a sensitive amplifier structure.

9. A random number generation method, characterized in that: The random number generation method comprises: 1) The conductor resistance value is randomly changed by electromigration, and a random voltage is obtained based on the random change of the resistance value; 2) Collecting and amplifying the random voltage to obtain a random level signal representing a random number.

10. The random number generating method according to claim 9, characterized in that: Step 1) includes: 11) Apply voltage to the four fuses respectively, and each fuse undergoes electromigration and changes in resistance; 12) Every two fuses form a series voltage-dividing structure. Based on the two series voltage-dividing structures, the same voltage is divided to obtain two voltage-dividing values, and the two voltage-dividing values ​​are differential signals.

11. An electronic product, characterized in that: The electronic product at least comprises: a random number generating circuit as described in any one of claims 1-8.

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