Printed circuit board, wiring method thereof, detection method and electronic equipment

Abstract

The invention relates to the technical field of circuit boards, and discloses a printed circuit board, a wiring method of the printed circuit board, a detection method and electronic equipment. A target part located on the circuit board body; wherein the signal pins arranged on the outer side of the target part adopt layer wiring close to the part surface; and the signal pins arranged on the inner side of the target part use layer wiring far away from the part surface. In this way, the signal lines connected with the signal pins on the outer side of the target part are arranged on the layer close to the part face for wiring, the signal lines connected with the signal pins on the inner side of the target part are arranged on the layer away from the part face for wiring, and the signals corresponding to the layer away from the part face pass through the via holes in the layer close to the part face when penetrating out of the chip. Signal interference can be effectively avoided, the cost can be reduced, the wiring space is saved, and the wiring difficulty is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a printed circuit board and a wiring method, a detection method, and an electronic device thereof. Background Art

[0002] In some technical solutions, in order to avoid mutual interference of signals on the printed circuit board, other signals do not pass through the high-speed differential vias. For example, when the high-speed differential signal arranged on the inner side of the chip is brought out, the two vias of the differential signal arranged on the outer side of the chip are bypassed. However, such a design will cause more space to be occupied, and due to the large number of chip signals and limited space, more layers are needed to bring out the signals inside, which can easily increase costs and increase wiring difficulty. Summary of the invention

[0003] In view of this, an object of the present invention is to provide a printed circuit board and a wiring method, a detection method, and an electronic device thereof, which can not only effectively avoid signal interference, but also reduce costs, save wiring space, and reduce wiring difficulty.

[0004] In order to solve the above technical problems, the present invention provides a printed circuit board, comprising:

[0005] Circuit board body;

[0006] a target part located on the circuit board body;

[0007] Wherein, the signal pins arranged outside the target part are wired using a layer close to the part surface;

[0008] Signal pins arranged inside the target component are routed using a layer away from the component surface.

[0009] In a first aspect, in the above-mentioned printed circuit board provided by the present invention, the signal pins of the target component are arranged in an array form, or in a centrally symmetrical form, or arranged according to functional partitions;

[0010] The target part directs the signal connected to the signal pin to other layers in a fan-out manner.

[0011] On the other hand, in the above-mentioned printed circuit board provided by the present invention, the signal pins of the target part are soldered on the surface layer of the circuit board body;

[0012] The signal pins of the target parts are transferred from the surface layer of the circuit board body to other inner wiring layers through via holes and pulled out by leads.

[0013] On the other hand, in the above-mentioned printed circuit board provided by the present invention, the signal lines connected to the signal pins arranged outside the target part include a first signal line and a second signal line;

[0014] The distance between the signal pin connected to the first signal line and the center of the target part is a first distance;

[0015] The distance between the signal pin connected to the second signal line and the center of the target part is a second distance; the second distance is greater than the first distance;

[0016] The distance between the wiring layer where the second signal line is located and the component surface is smaller than the distance between the wiring layer where the first signal line is located and the component surface.

[0017] On the other hand, in the above-mentioned printed circuit board provided by the present invention, the signal lines connected to the signal pins arranged inside the target part include a third signal line and a fourth signal line;

[0018] The distance between the signal pin connected by the third signal line and the center of the target part is a third distance;

[0019] The distance between the signal pin connected to the fourth signal line and the center of the target part is a fourth distance; the fourth distance is greater than the third distance;

[0020] The distance between the wiring layer where the fourth signal line is located and the component surface is smaller than the distance between the wiring layer where the third signal line is located and the component surface.

[0021] On the other hand, in the above-mentioned printed circuit board provided by the present invention, the target part includes a ball grid array package chip;

[0022] The signal of the ball grid array package chip is fanned out through vias;

[0023] The wiring layers corresponding to the outer signal pins to the inner signal pins of the ball grid array package chip are gradually away from the component surface.

[0024] On the other hand, in the above-mentioned printed circuit board provided by the present invention, the printed circuit board comprises N layers; wherein N is a positive integer greater than 1;

[0025] The component surface of the printed circuit board is located on the first layer;

[0026] The signal of the target part is led out using the part pins in the first layer and transferred to the Mth layer through vias; wherein M is less than N; M is a positive integer greater than 1;

[0027] When there are other signal wirings of the Ath layer and the Bth layer on the sides of the via hole, the wiring of the Ath layer is located in the signal passing layer from the first layer to the Mth layer, and the wiring of the Bth layer is located in the signal non-passing layer from the first layer to the Mth layer; wherein A is less than M, B is greater than M and less than N; A and B are both positive integers greater than 1;

[0028] The via holes from the B-1 layer to the N layer are drilled out by back drilling.

[0029] In order to solve the above technical problems, the present invention further provides a wiring method for a printed circuit board, wherein the printed circuit board is the above printed circuit board provided by the present invention, and the wiring method comprises:

[0030] Pressing to form a circuit board body, and forming a target part on the circuit board body;

[0031] The signal pins arranged outside the target part are routed using a layer close to the part surface;

[0032] Signal pins arranged inside the target part are routed using a layer away from the part surface.

[0033] In order to solve the above technical problems, the present invention further provides a method for detecting a printed circuit board, characterized in that the printed circuit board is the above printed circuit board provided by the present invention, and the detection method comprises:

[0034] Record the coordinates of the area where the target part is located and obtain the corresponding via information;

[0035] Using the via information, the coordinates of the via center, the layer information connected by the via, and the layer that is drilled are obtained;

[0036] Taking the center coordinate of the via hole as the center and the center distance between two adjacent pins of the target part as the radius, determine the detection range;

[0037] Select any one layer from the drilled layers, search for signal traces around the vias within the detection range, and determine whether the signal traces around the vias are in the same group as the vias;

[0038] If so, it is detected that there is no interference in the signal passing through or through the via hole; if not, it is detected that there is interference in the signal passing through or through the via hole.

[0039] In order to solve the above technical problem, the present invention further provides an electronic device, comprising the above printed circuit board provided by the present invention.

[0040] It can be seen from the above technical solution that a printed circuit board provided by the present invention comprises: a circuit board body; a target part located on the circuit board body; wherein the signal pins arranged on the outside of the target part use a layer wiring close to the part surface; and the signal pins arranged on the inside of the target part use a layer wiring away from the part surface.

[0041] The beneficial effect of the present invention is that, in the above-mentioned printed circuit board provided by the present invention, the signal pins arranged on the outside of the target part are wired using a layer close to the part surface, and the signal pins arranged on the inside of the target part are wired using a layer away from the part surface. Since the back drilling is performed from the non-part surface of the circuit board, and the signal lines connected to the signal pins on the inside of the target part are arranged on a layer away from the part surface for wiring, the layer after the back drilling operation reduces the signal transmission loss, so that the signal corresponding to the far part surface passes through the via hole of the layer close to the part surface when passing through the chip, which can not only effectively avoid signal interference, but also reduce costs, save wiring space, and reduce wiring difficulty.

[0042] In addition, the present invention also provides a corresponding wiring method and electronic device for a printed circuit board, which have the same or corresponding technical features as the above-mentioned printed circuit board, further making the above-mentioned printed circuit board more practical, and the wiring method and electronic device have corresponding advantages. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the embodiments of the present invention, the following briefly introduces the drawings required for use in the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1 A schematic diagram of routing the chip's inner side signals around the outer side signal vias on a printed circuit board;

[0045] Figure 2 A schematic diagram of wiring of a printed circuit board provided in an embodiment of the present invention;

[0046] Figure 3 A schematic diagram of 12 layers of a printed circuit board provided in an embodiment of the present invention that have not been back-drilled;

[0047] Figure 4 A schematic diagram of L7 to L12 of the 12 layers in the printed circuit board provided in an embodiment of the present invention after back drilling operation; Figure 5 A flow chart of a wiring method for a printed circuit board provided by an embodiment of the present invention; Figure 6 A flow chart of a printed circuit board detection method provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0048] With the rapid development of electronic products, the functions that electronic products (such as server boards) need to realize are increasing, and the signal rate is getting higher and higher, and the board density is getting higher and higher. On a limited printed circuit board (PCB), it is a challenge for hardware R&D engineers to realize more functions while ensuring the integrity and stability of high-speed signals. There are more and more high-speed signals integrated in the chip of the server board. In order to avoid mutual interference of high-speed signals, it is not recommended to pass other signals between the vias of the high-speed signal differential pair. Therefore, other signals will bypass the differential vias when routing.

[0049] Figure 1 A schematic diagram of routing the inner side signal of the chip on the printed circuit board to bypass the outer side signal vias, such as Figure 1 As shown, 01 indicates that the two vias are a pair of high-speed signal differential vias, and 02 indicates the routing that bypasses the differential vias. When the chip is fanned out, in order to avoid the high-speed differential signals arranged inside the chip passing through the two vias of the differential signals arranged on the outer side of the chip, the two vias of the differential pair are usually routed around. However, bypassing the routing will cause more space on the printed circuit board to be occupied, and there are many signals in the chip and the space is limited, so more layers are needed to lead out the signals inside, which increases the cost of board production and the difficulty of routing. The space at the chip is limited. In order to lead out all the signals inside the chip from the inside to the outside, more layers will be used, resulting in an increase in the production cost of the printed circuit board.

[0050] In order to solve the above technical problems, the present invention provides a printed circuit board, which can not only effectively avoid signal interference, but also reduce costs and reduce wiring difficulty.

[0051] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0052] In order to enable those skilled in the art to better understand the solution of the present invention, the present invention is further described in detail below in conjunction with the accompanying drawings and specific implementation methods. Figure 2 A wiring diagram of a printed circuit board provided in an embodiment of the present invention is shown in FIG. Figure 2 As shown, the printed circuit board includes:

[0053] Circuit board body;

[0054] A target part 1 located on the circuit board body;

[0055] Among them, the signal pins arranged outside the target part 1 are wired using the layer close to the part surface;

[0056] Signal pins arranged on the inner side of target part 1 are routed using a layer away from the part surface.

[0057] In the above-mentioned printed circuit board provided by the embodiment of the present invention, the signal pins arranged on the outside of the target part are wired using the layer close to the part surface, and the signal pins arranged on the inside of the target part are wired using the layer away from the part surface. Since the back drilling is performed from the non-part surface of the circuit board, and the signal lines connected to the signal pins on the inside of the target part are arranged on the layer away from the part surface for wiring, the layer after the back drilling operation reduces the signal transmission loss. In this way, the signal corresponding to the far-away part surface passes through the via hole of the layer close to the part surface when passing through the chip, which can not only effectively avoid signal interference, but also reduce costs, save wiring space, and reduce wiring difficulty.

[0058] It should be noted that the front side of the printed circuit board is the component side, and the back side is the non-component side (i.e. the side opposite to the component side). The component side refers to the main surface on the circuit board used to install various electronic components. It is an important area for component layout and preliminary circuit connection.

[0059] Because there are many signals in the printed circuit board, it is usually made up of more than ten or even twenty layers of copper plates pressed together. Assume that the printed circuit board includes 12 layers, which are L1, L2, L3, L4, L5, L6, L7, L8, L9, L10, L11, and L12. Figure 2 As shown, in the target part 1, 11 represents the edge of the target part 1; 2 represents that the differential signals in the frame are located on the outer side of the chip and are pulled out with a layer close to the surface of the part, and this layer is assumed to be the L3 layer; 3 represents that the differential signals in the frame are located on the inner side of the chip and are pulled out with a layer away from the surface of the part, and this layer is assumed to be the L8 layer; 4 represents that after the vias of the high-speed differential signals of the L3 layer are back-drilled, the L8 layer signals no longer interfere with each other between the vias of the L3 layer.

[0060] The signal pins arranged on the outside of the target part are metal pins on the edge of the target part package shell for inputting and outputting signals and connecting to external circuits. These pins are interfaces for the target part to communicate and interact with external circuit boards. These pins have a signal input function for receiving electrical signals from external circuits, which can be control signals, data signals, etc.; they also have a signal output function for sending signals processed inside the target part to external circuits.

[0061] The signal pins arranged on the inner side of the target part are pins inside the target part package, close to the core area of ​​the target part. These pins are not directly exposed on the edge of the package for connecting external circuits like the outer pins, but are mainly used for signal connection between different modules inside the target part. These pins have the function of internal module communication. The target part is a complex system composed of multiple functional modules. The inner pins are responsible for transmitting signals between these modules; they also have internal signal transmission and synchronization functions. For some operations with strict timing requirements, the inner pins are used to transmit synchronization signals such as clock signals to ensure that the various modules inside the target part can work in coordination; they can also have auxiliary functions such as power distribution and reset signal transmission inside the target part.

[0062] Furthermore, in a specific implementation, in the above-mentioned printed circuit board provided in an embodiment of the present invention, the signal pins of the target part may be arranged in an array form, or in a centrally symmetrical form, or arranged according to functional partitions; the target part may guide the signals connected to the signal pins to other levels in a fan-out manner.

[0063] In implementation, signal pins of different types or groups can be arranged and distributed in an orderly manner up, down, left, right, inside and outside in the target part. For example, the signal pins of the target part can be arranged in an array at the bottom. This arrangement is like a two-dimensional matrix, and the pins are distributed on the entire plane of the bottom; its pin balls can be distributed in a square or rectangular array. The signal pins of the target part can have a certain central symmetry. With the geometric center of the target part as the reference point, the pin distribution is relatively symmetrical, which helps to maintain balance and stability during welding and packaging. The symmetrical pin arrangement also facilitates the uniform distribution and layout of signals and reduces signal interference. In addition, the target part can also arrange the signal pins according to their functions. For example, the power pins are concentrated in one area, the ground pins are concentrated in another area, and the high-speed digital signal pins, low-speed digital signal pins and analog signal pins are also divided into their own areas. This arrangement is convenient for wiring and processing signals of different functions when designing a printed circuit board. For example, it is more convenient to design a reasonable power plane for the power pins and set a suitable signal routing and reference plane for the high-speed digital signal pins.

[0064] The signals of the target part may include various types of signals, such as high-speed digital signals, low-speed digital signals, and analog signals. High-speed digital signals can be used for fast communication between different modules inside the target part and between the target part and external high-speed devices. The high-speed digital signals may include high-speed differential signals, which may be composed of two signals with equal amplitudes and opposite phases. The two signals (called differential pairs) are transmitted simultaneously. Low-speed digital signals can be used for some simple control functions or less frequent data transmission. Analog signals can be used to connect external sensors or drive external analog devices.

[0065] In the present invention, the back-drilled differential vias need to be considered separately. In the layer where the signal passes, there should be no other signals between the two vias of the differential pair and around the vias. However, in the layer where the signal does not pass, because the copper and annular ring of the via are drilled away, there will be no interference even if other signals pass through or pass through.

[0066] In addition, it should be noted that in the present invention, the high-speed signals on the printed circuit board can use the back drilling process to drill out useless hole copper to reduce signal transmission loss and reduce the interference of excess hole copper on other signals. Back drilling is performed from the non-component side of the circuit board. It is a process for post-processing plated through holes to remove unnecessary copper in the through holes. That is, the back drilling operation is performed from the back side toward the component side, but it will not penetrate the entire circuit board to reach the component side.

[0067] Furthermore, in a specific implementation, in the above-mentioned printed circuit board provided in an embodiment of the present invention, the signal pin of the target part can be soldered on the surface layer of the circuit board body; the signal pin of the target part is transferred from the surface layer of the circuit board body to other inner wiring layer leads through vias and pulled out.

[0068] In practice, when designing signal fan-out for the target part, different types or groups of signals are distributed to several wiring layers according to the wiring space and led out of the chip area, and these layers are planned in advance. The pins of the target part can be soldered on the surface of the circuit board body. The surface can only pull out the signals arranged in the two rows or columns of the outermost layer. The inner signal pins can be transferred from the surface layer to other inner wiring layers through vias and pulled out.

[0069] Furthermore, in a specific implementation, in the above-mentioned printed circuit board provided in an embodiment of the present invention, the signal line connected to the signal pin arranged on the outside of the target part may include a first signal line and a second signal line; the distance between the signal pin connected to the first signal line and the center of the target part is a first distance; the distance between the signal pin connected to the second signal line and the center of the target part is a second distance; the second distance is greater than the first distance; the distance between the wiring layer where the second signal line is located and the part surface may be smaller than the distance between the wiring layer where the first signal line is located and the part surface.

[0070] Similarly, in a specific implementation, in the above-mentioned printed circuit board provided in an embodiment of the present invention, the signal lines connected to the signal pins arranged on the inner side of the target part may include a third signal line and a fourth signal line; the distance between the signal pin connected to the third signal line and the center of the target part is a third distance; the distance between the signal pin connected to the fourth signal line and the center of the target part is a fourth distance; the fourth distance is greater than the third distance; the distance between the wiring layer where the fourth signal line is located and the part surface may be smaller than the distance between the wiring layer where the third signal line is located and the part surface.

[0071] In implementation, the signals arranged on the outside of the target part are wired at a layer close to the part surface, so the wiring layer where the second signal line is located is closer to the part surface than the wiring layer where the first signal line is located. In addition, the signals arranged closer to the inside of the target part are wired at a layer farther away from the part surface, so the wiring layer where the fourth signal line is located is closer to the part surface than the wiring layer where the third signal line is located. The signal pins of the target part are arranged from the outside to the inside, and the wiring layers are gradually away from the part surface. Since the signal vias on the outside of the target part are back-drilled, the signals of the signal pins on the inside of the target part will not interfere with each other when passing through the signal vias of the signal pins on the outside.

[0072] Furthermore, in a specific implementation, in the above-mentioned printed circuit board provided in an embodiment of the present invention, the target part includes a ball grid array package (Ball Grid Array, BGA); the signal of the ball grid array package BGA chip is fanned out through a via; and the wiring layer corresponding to the outer signal pin to the inner signal pin of the ball grid array package BGA chip is gradually away from the part surface.

[0073] In implementation, the placement surface of the ball grid array package BGA chip is taken as the starting layer, i.e., the L1 layer. When the ball grid array package BGA chip fans out, the signals closer to the outside of the ball grid array package BGA chip are led out using the layer closer to the component surface, and the signals inside the ball grid array package BGA chip are led out using the layer farther away from the component surface. In this way, the signals far away from the component surface will pass through the back-drilled vias on the layer close to the component surface when passing through the chip, thereby eliminating signal interference.

[0074] It should be noted that, in addition to the ball grid array package BGA chip, the target parts of the present invention can also be other electronic parts used in the same design, which will not be described in detail here.

[0075] Furthermore, in a specific implementation, in the above-mentioned printed circuit board provided in the embodiment of the present invention, the printed circuit board may include N layers; wherein N is a positive integer greater than 1; the component surface of the printed circuit board is located on the first layer; the signal of the target component is led out using the component pin in the first layer, and is transferred to the Mth layer through the via hole; wherein M is less than N; and M is a positive integer greater than 1. When there are other signal wirings of the Ath layer and the Bth layer on the sides of the via hole, the wiring of the Ath layer is located in the signal passing layer from the first layer to the Mth layer, and the wiring of the Bth layer is located in the signal non-passing layer from the first layer to the Mth layer; wherein A is less than M, B is greater than M and less than N; A and B are both positive integers greater than 1; and the via holes from the B-1th layer to the Nth layer are drilled out by back drilling.

[0076] Figure 3 This is a schematic diagram of a printed circuit board with 12 layers that have not been back-drilled. Figure 3 As shown, taking N as 12, M as 6, A as 3, and B as 8 as an example, that is, the printed circuit board includes 12 layers, namely L1, L2, L3, L4, L5, L6, L7, L8, L9, L10, L11, and L12. 5 represents the conduction hole of the via; 6 represents the L1 layer routing; 7 represents the L6 layer routing; 8 represents the L3 layer routing adjacent to the via in the L1-L6 passing layer, which will be disturbed by the via; 9 represents the L8 layer routing adjacent to the via is not in the L1-L6 passing layer, and will be disturbed by the via if there is no back drilling; 10 represents the conduction pad of the via L1-L5; 11 represents the conduction pad of the via L6-L8; 12 represents the conduction pad of the via L9-L12.

[0077] The parts are placed on the L1 layer, and the signals are led out from the part pins on the L1 layer, and then transferred to the L6 layer through the vias. The vias are upper and lower conductive holes, and can be routed from any layer. Next to this via are other signal routings on the L3 layer and the L8 layer. The routing of the L3 layer is located in the signal passing layer of L1-L6, and the routing of the L8 layer is located in the signal non-passing layer of L1-L6. If this via is not back-drilled, the signals of the L3 layer and the L8 layer next to the via will be disturbed.

[0078] Figure 4 This is a schematic diagram of L7 to L12 in the 12 layers of the printed circuit board provided by the embodiment of the present invention after back drilling operation. Figure 4As shown in the figure, 13 indicates that the L8 layer routing adjacent to the via is not in the L1-L6 via layer, and will not be disturbed by the via after back drilling; 14 indicates the via pad of the L1-L6 via; 15 indicates that the via pad of the L7-L12 layer is drilled away after back drilling. After the via is back drilled, the via of the L7-L12 layer is drilled away, so the wiring of the L8 layer will not be disturbed by this via. Therefore, when routing from a BGA chip, it is recommended that the closer the signal is to the chip, the farther away from the chip the wire should be.

[0079] In the above embodiments, the printed circuit board is described in detail. Based on the same inventive concept, the embodiments of the present invention also provide a wiring method, a detection method, and corresponding embodiments of an electronic device for a printed circuit board.

[0080] Figure 5 Flow chart of the wiring method of a printed circuit board provided by an embodiment of the present invention. The wiring method of a printed circuit board provided by this embodiment, such as Figure 5 As shown, the printed circuit board is the above-mentioned printed circuit board provided by the present invention, and the wiring method specifically comprises the following steps:

[0081] S501, pressing to form a circuit board body, and forming a target part on the circuit board body.

[0082] S502, routing the signal pins arranged outside the target part using a layer close to the part surface.

[0083] S503, routing the signal pins arranged inside the target part using a layer away from the part surface.

[0084] In the wiring method of the printed circuit board provided in the embodiment of the present invention, by executing the above steps S501 to S503, the signal pins arranged on the outside of the target part are wired using the layer close to the part surface, and the signal pins arranged on the inside of the target part are wired using the layer away from the part surface. Since the back drilling is performed from the non-part surface of the circuit board, and the signal lines connected to the signal pins on the inside of the target part are set at the layer away from the part surface for wiring, the layer after the back drilling operation reduces the signal transmission loss, so that the signal corresponding to the layer away from the part surface passes through the via hole of the layer close to the part surface when passing through the chip, which can not only effectively avoid signal interference, but also reduce costs, save wiring space, and reduce wiring difficulty.

[0085] Since the embodiments of the wiring method part correspond to the embodiments of the printed circuit board part, the embodiments of the wiring method part refer to the description of the embodiments of the printed circuit board part, which will not be repeated here. And it has the same beneficial effects as the above-mentioned printed circuit board.

[0086] For more specific working processes of the above steps, please refer to the corresponding contents disclosed in the above embodiments, which will not be repeated here.

[0087] After the wiring of the printed circuit board is completed, it is usually inspected manually. However, since there are many signals of the target parts, it is easy for some signals to be located in the passing layer of the via signal during the wiring process, resulting in interference between the signal and the via signal. Manual inspection is time-consuming and labor-intensive, resulting in a large waste of manpower and time costs, and it is easy to miss something. Therefore, the present invention provides a method for detecting a printed circuit board.

[0088] Figure 6 Flow chart of the printed circuit board detection method provided by the embodiment of the present invention. The printed circuit board detection method provided by this embodiment, such as Figure 6 As shown, the printed circuit board is the above-mentioned printed circuit board provided by the present invention, and the detection method specifically comprises the following steps:

[0089] S601. Record the coordinates of the area where the target part is located, and obtain corresponding via information.

[0090] In a possible implementation, the present invention can be developed based on a skill (an interactive programming language) tool to automatically check whether a signal passing through or through a high-speed signal via will be interfered.

[0091] S602. Using the via information, obtain the via center coordinates, the layer information connected by the via, and the layer that is drilled.

[0092] S603, determining the detection range with the via center coordinate as the center and the center distance between two adjacent pins of the target part as the radius.

[0093] S604, randomly select one layer from the drilled layers, and search for signal traces around the vias within the detection range;

[0094] S605, determining whether the signal traces around the vias are in the same group as the vias;

[0095] If yes, execute step S606; if no, execute step S607;

[0096] S606: Detect that there is no interference in the signal passing through or through the via.

[0097] S607: Detect that interference exists in the signal passing through or through the via.

[0098] In the printed circuit board detection method provided in the embodiment of the present invention, by executing the above steps S601 to S607, all vias of the high-speed network in the area can be automatically obtained without omission, and it can be accurately and comprehensively determined whether each via interferes with the routing in the surrounding area of ​​each connection layer, thereby improving design efficiency.

[0099] The present invention can run a skill tool to check whether the wiring next to the high-speed signal via will be disturbed. The following is a specific example to illustrate the printed circuit board detection method provided by the embodiment of the present invention, and the specific steps are as follows:

[0100] Step 1. Select the target part to check the fan-out mode, record the rectangular area coordinates of the target part as A (X1, Y1), B (X2, Y2), retrieve the DBID (Differential Bore-Identification) of all high-speed differential vias in the rectangular area, and store them in the via database identifier list (via_dbid_list), such as: VIA_DBID1, VIA_DBID2, etc.

[0101] Step 2. Take out the DBID of the vias one by one from via_dbid_list. Through DBID, you can get the via center coordinates marked as via_center_1=(VX1, VY1), the via net name as via_net_1, and the via backdrill information via_backdrill_state=1 or 0. You can also get the layer information of the connected vias. For example, if the via connects the L1 layer and the L6 layer together, then the L3 layer is the layer through which the via is connected and cannot be drilled during backdrilling. It can also be inferred that the layers from L7 to L12 are the backdrilled layers, that is, via_connect_layers=(1, 2, 3, 4, 5, 6), via_backdrill_layer = (7, 8, 9, 10, 11, 12).

[0102] Step 3. Check the signal lines around the vias, take the via center coordinate via_center_1 as the center, take the center distance between two adjacent pins of the device as the radius, and take any layer from via_connect_layers, such as L3 layer, search for the routing layer signal within this range, and record the signal name in net_list, such as net_list=(net1, net2,,,). According to via_net_1, you can find the signals in the same group as it and record them as via_net_1_same_bus_list=(via_net_1_same_1, via_net_1_same_2, etc.), take out the nets from net_list one by one and compare them with all the net names in via_net_1_same_bus_list. If the net names are the same, it is judged that they are in the same group of signals and the design is reasonable. If the net names are not the same, it is judged that there is interference between the routing and the vias. Use the built-in function of the software to highlight this routing section for users to view and modify.

[0103] Step 4: Execute the loop in the order of step 2 and step 3 until all vias in the device area coordinates are detected and the program is executed.

[0104] Through the above steps 1 to 4, the present invention allows the user to determine the range to be detected with just one click, which is more convenient, and can automatically obtain all the vias of the high-speed network in the area without omission, and detect whether the signal routing around the high-speed network via is in the same group as the via. In addition, routings that are not in the same group can be automatically highlighted for users to modify, thereby improving the accuracy and efficiency of the design.

[0105] Since the embodiments of the detection method part correspond to the embodiments of the printed circuit board part, the embodiments of the detection method part refer to the description of the embodiments of the printed circuit board part, which will not be repeated here. And it has the same beneficial effects as the printed circuit board mentioned above.

[0106] Based on the same inventive concept, an embodiment of the present invention further provides an electronic device, including the above-mentioned printed circuit board. Since the principle of solving the problem by the electronic device is similar to that of the above-mentioned printed circuit board, the implementation of the electronic device can refer to the implementation of the printed circuit board, and the repeated parts will not be repeated.

[0107] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0108] Finally, it should be noted that, unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of the present application; the terms used in the specification of the application herein are only for the purpose of describing specific embodiments and are not intended to limit the present application; the terms "include", "comprise" and "have" and any other variations thereof in the present application are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise one..." do not exclude the presence of other identical elements in the process, method, article or device including the elements. In the present application, relational terms such as first and second, etc. are used only to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0109] For the above-mentioned embodiments, for the sake of simplicity, they are all described as a series of action combinations, but those skilled in the art should know that the present invention is not limited by the order of the actions described, because according to the present invention, some steps may be performed in other orders or simultaneously. Secondly, those skilled in the art should also know that the embodiments described in the specification are all preferred embodiments, and the actions and modules involved are not necessarily required by the present invention.

[0110] Obviously, the described embodiments are only some embodiments of the present invention, rather than all embodiments. Based on these embodiments, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in this field can still combine, add, delete or make other adjustments to the features in the embodiments of the present invention according to the circumstances without conflict and without making creative work, so as to obtain different other technical solutions that do not deviate from the concept of the present invention in essence, and these technical solutions also belong to the scope of protection of the present invention.

[0111] The printed circuit board and its wiring method, detection method, and electronic device provided by the present invention are introduced in detail above. Specific examples are used in this article to illustrate the principle and implementation of the present invention. The description of the above embodiments is only used to help understand the method and its core idea of ​​the present invention, rather than to limit the protection scope of the invention; at the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation method and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A printed circuit board, characterized in that: include: Circuit board body; a target part located on the circuit board body; Wherein, the signal pins arranged outside the target part are wired using a layer close to the part surface; Signal pins arranged inside the target component are routed using a layer away from the component surface.

2. The printed circuit board according to claim 1, characterized in that: The signal pins of the target part are arranged in an array, or in a centrally symmetrical form, or according to functional partitions; The target part directs the signal connected to the signal pin to other layers in a fan-out manner.

3. The printed circuit board according to claim 2, characterized in that: The signal pins of the target part are welded on the surface layer of the circuit board body; The signal pins of the target parts are transferred from the surface layer of the circuit board body to other inner wiring layers through via holes and pulled out by leads.

4. The printed circuit board according to claim 1, characterized in that: The signal lines connected to the signal pins arranged outside the target part include a first signal line and a second signal line; The distance between the signal pin connected to the first signal line and the center of the target part is a first distance; The distance between the signal pin connected to the second signal line and the center of the target part is a second distance; the second distance is greater than the first distance; The distance between the wiring layer where the second signal line is located and the component surface is smaller than the distance between the wiring layer where the first signal line is located and the component surface.

5. The printed circuit board according to claim 1, characterized in that: The signal lines connected to the signal pins arranged inside the target part include a third signal line and a fourth signal line; The distance between the signal pin connected by the third signal line and the center of the target part is a third distance; The distance between the signal pin connected to the fourth signal line and the center of the target part is a fourth distance; the fourth distance is greater than the third distance; The distance between the wiring layer where the fourth signal line is located and the component surface is smaller than the distance between the wiring layer where the third signal line is located and the component surface.

6. The printed circuit board according to claim 1, characterized in that: The target part includes a ball grid array package chip; The signal of the ball grid array package chip is fanned out through vias; The wiring layers corresponding to the outer signal pins to the inner signal pins of the ball grid array package chip are gradually away from the component surface.

7. The printed circuit board according to claim 1, characterized in that: The printed circuit board comprises N layers; wherein N is a positive integer greater than 1; The component surface of the printed circuit board is located on the first layer; The signal of the target part is led out using the part pins in the first layer and transferred to the Mth layer through vias; wherein M is less than N; M is a positive integer greater than 1; When there are other signal wirings of the Ath layer and the Bth layer on the sides of the via hole, the wiring of the Ath layer is located in the signal passing layer from the first layer to the Mth layer, and the wiring of the Bth layer is located in the signal non-passing layer from the first layer to the Mth layer; wherein A is less than M, B is greater than M and less than N; A and B are both positive integers greater than 1; The via holes from the B-1 layer to the N layer are drilled out by back drilling.

8. A wiring method for a printed circuit board, characterized in that: The printed circuit board is a printed circuit board according to any one of claims 1 to 7, and the wiring method comprises: Pressing to form a circuit board body, and forming a target part on the circuit board body; The signal pins arranged outside the target part are routed using a layer close to the part surface; Signal pins arranged inside the target part are routed using a layer away from the part surface.

9. A method for detecting a printed circuit board, characterized in that: The printed circuit board is a printed circuit board according to any one of claims 1 to 7, and the detection method comprises: Record the coordinates of the area where the target part is located and obtain the corresponding via information; Using the via information, the coordinates of the via center, the layer information connected by the via, and the layer that is drilled are obtained; Taking the center coordinate of the via hole as the center and the center distance between two adjacent pins of the target part as the radius, determine the detection range; Select any one layer from the drilled layers, search for signal traces around the vias within the detection range, and determine whether the signal traces around the vias are in the same group as the vias; If so, it is detected that there is no interference in the signal passing through or through the via hole; if not, it is detected that there is interference in the signal passing through or through the via hole.

10. An electronic device, characterized in that: Comprising a printed circuit board as claimed in any one of claims 1 to 7.

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