A method for preparing a perovskite thin film transistor based on a self-assembled monolayer

Abstract

The present invention discloses a preparation method of a perovskite thin film transistor based on a self-assembled monolayer, and relates to the technical field of perovskite. The preparation method of the present invention comprises the following steps: (1) a small molecule solution dissolved in an organic solvent is spin-coated on a silicon wafer coated with silicon dioxide, annealed at 100-120°C for 10-15min, and a multilayer small molecule film is obtained, wherein the small molecule solution is Br-2EPO or Br-2EPT; (2) an organic solvent is spin-coated on the multilayer small molecule film. The present invention introduces two self-assembled monolayers of Br-2EPO or Br-2EPT, and the phosphate group reacts with the hydroxyl group on the gate oxide surface to achieve a smaller hydroxyl density arrangement. At the same time, the perovskite is made to achieve a better lattice arrangement through halogen bonds and Lewis acid-base interactions, thereby improving the gate interface state and effectively reducing the internal trap density of the perovskite thin film transistor.

Description

Technical Field

[0001] The present invention relates to the technical field of perovskites, and in particular to a method for preparing a perovskite thin film transistor based on a self-assembled monolayer. Background Art

[0002] Due to the self-organizing nature of perovskites, perovskite thin-film transistors are fabricated via a spin-coating solution process. The main steps include: 1. Cleaning a p-type silicon wafer with a deposited silicon dioxide layer in acetone, deionized water, and isopropyl alcohol for 15 minutes each; 2. Transferring the ultra-clean silicon wafer to a thermal evaporation chamber for electrode deposition, followed by UV treatment; 3. Spin-coating a uniformly dissolved perovskite precursor solution onto the UV-treated silicon wafer; 4. Annealing on a 100°C heating plate.

[0003] Currently, for perovskite transistors, silicon dioxide is mainly used as the gate oxide due to its integration compatibility. Before perovskite deposition, the gate oxide usually needs to be hydrophilized to ensure the formation of a coating, which produces excessive hydroxyl groups on the gate oxide surface. On the one hand, carriers can be captured or scattered by hydroxyl groups, which serve as charge centers at the gate / channel interface. Although this can improve transistor mobility and operational stability, excessive hydroxyl groups can also induce defects in the sequentially deposited perovskite layers, further complicating the gate-channel interface and deteriorating transistor performance. Summary of the Invention

[0004] The present invention aims to overcome the shortcomings of existing technologies by providing a method for preparing perovskite thin-film transistors based on self-assembled monolayers. This method utilizes the self-assembled monolayer to optimize the gate oxide surface and to carry atoms that act on the perovskite layer. The designed interface layer can passivate hydroxyl groups and perovskite defects, increase the carrier mobility and on / off ratio of perovskite transistors, reduce subthreshold swing and threshold voltage, and mitigate transistor hysteresis, among other advantages.

[0005] To achieve the above object, the technical solution adopted by the present invention is:

[0006] The present invention provides a method for preparing a perovskite thin film transistor based on a self-assembled monolayer, comprising the following steps:

[0007] (1) spin coating a small molecule solution dissolved in an organic solvent on a silicon wafer coated with silicon dioxide, and annealing at 100-120° C. for 10-15 min to obtain a multilayer small molecule film, wherein the small molecule solution is Br-2EPO or Br-2EPT, and the concentration of the small molecule solution is 0.5-5 mg / mL;

[0008] (2) Spin-coat the organic solvent onto the multi-layer small molecule film.

[0009] The present invention introduces two self-assembled monolayers (SAMs), Br-2EPO or Br-2EPT, where phosphate groups react with hydroxyl groups (-OH groups) on the gate oxide surface to achieve a lower hydroxyl density. Simultaneously, through halogen bonds and Lewis acid-base interactions, the perovskite achieves a better lattice alignment, improving the gate interface state and effectively reducing the internal trap density of the perovskite thin-film transistor.

[0010] The present invention forms a multilayer Br-2EPO or Br-2EPT small molecule film on silicon dioxide by spin-coating a small molecule solution on a silicon wafer. The phosphate groups in the bottom layer of Br-2EPO or Br-2EPT small molecules can have a strong anchoring effect with the silicon dioxide substrate and form an orderly arranged monomolecular film. The remaining Br-2EPO or Br-2EPT that is not involved in the anchoring is accumulated in a disordered state on the anchored monomolecular film. Ethanol is then spin-coated on the multilayer Br-2EPO or Br-2EPT small molecule film to wash away the Br-2EPO or Br-2EPT small molecules that are not attached to the silicon dioxide, thereby maximizing the retention of monomolecular deposition on the silicon wafer.

[0011] Br-2EPT is (2-(3,7-dibromo-10H-phenothiazin-10-yl)ethyl)phosphonic acid, and Br-2EPO is (2-(3,7-dibromo-10H-phenothiazin-10-yl)ethyl)phosphonic acid;

[0012] The English names of Br-2EPT and Br-2EPO are as follows:

[0013] Br-2EPT: (2-(3,7-Dibromo-10H-phenothiazin-10-yl)ethyl)phosphonic acid;

[0014] Br-2EPO: (2-(3,7-Dibromo-10H-phenoxazin-10-yl)ethyl)phosphonic acid.

[0015] Br-2EPT and Br-2EPO are two different organic compounds with molecular weights of 465.10 and 449.03, respectively. The difference between these two compounds primarily stems from the core heteroatom connecting the two benzene rings: sulfur (S) in Br-2EPT and oxygen (O) in Br-2EPO. The greater polarizability of sulfur (S) atoms than oxygen (O) atoms results in a lower interface trap density and longer carrier lifetime in Br-2EPT, leading to higher transistor mobility and stability.

[0016] If the concentration of the small molecule solution is less than 0.5 mg / mL, the small molecules will not be able to fully cover the substrate, and the exposed hydroxyl groups will still affect the film uniformity and device performance. If the concentration of the small molecule solution is greater than 5 mg / mL, the small molecules on the substrate will agglomerate, increasing the substrate roughness, which will not only affect the quality of the perovskite film, but also further affect the performance and stability of the optoelectronic device.

[0017] Preferably, in step (1), the concentration of the small molecule solution is 1-3 mg / mL.

[0018] More preferably, in step (1), the concentration of the small molecule solution is in the range of any one or both of 1 mg / mL, 1.5 mg / mL, 2 mg / mL, 2.5 mg / mL, and 3 mg / mL.

[0019] Preferably, in step (1), the rotation speed during spin coating is 3000-4000 rpm, and the spin coating time is 25-30 s.

[0020] Preferably, in step (1), the silicon wafer coated with the silicon dioxide layer is pretreated as follows:

[0021] The silicon wafer coated with the silicon dioxide layer was cleaned in acetone, deionized water and isopropyl alcohol solvents respectively; the cleaned silicon wafer was then transferred to a hot evaporation chamber to evaporate the electrode, followed by UV treatment.

[0022] Preferably, the organic solvent includes at least one of ethanol and isopropanol.

[0023] Preferably, in step (2), the rotation speed during spin coating is 4000-45000 rpm, and the spin coating time is 30-35 s.

[0024] Preferably, in step (2), the amount of the organic solvent used is 100-500 uL.

[0025] Compared with the prior art, the present invention has the following beneficial effects:

[0026] To passivate interface defects in perovskite thin-film transistors, the present invention introduces a self-assembled monolayer of Br-2EPO or Br-2EPT and deposits it into the gate oxide via self-assembly to achieve hydroxyl passivation on the substrate surface and enhance the quality of the perovskite film. Because the substrate maintains a sufficiently low number of hydroxyl groups during the spin-coating process of the perovskite film, and the halogen atoms and Lewis base groups on the self-assembled molecular material are able to interact with the perovskite, the probability of lattice distortion of the film is reduced while the bond with the substrate is more tightly integrated, effectively suppressing the internal defects of the perovskite thin-film transistor and the corresponding trap-state-induced carrier recombination. Furthermore, the interface modification treatment reduces the amount of residual starting materials and related ions in the perovskite film, reducing the hysteresis of the output and transfer characteristics and improving the overall performance of the transistor. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] Figure 1 (A) is a schematic diagram of the preparation process of the thin film transistor before self-assembled molecular layer modification, (B) is the transistor transfer characteristic curve, and (C) is the transistor output characteristic curve.

[0028] Figure 2 (A) is a schematic diagram of the preparation process of thin-film transistors after self-assembled molecular layer modification, (B) is the transfer characteristic curve of Br-2EPO modified thin-film transistors, (C) is the transfer characteristic curve of Br-2EPT modified thin-film transistors, (D) is the output characteristic curve of Br-2EPO modified thin-film transistors, and (E) is the output characteristic curve of Br-2EPT modified thin-film transistors.

[0029] Figure 3 (A) is the electron energy spectrum of the P element on Br-2EPO, (B) is the electron energy spectrum of the P element on Br-2EPT, (C) is the contact angle test diagram of the silicon wafer before and after self-assembled molecular layer modification, (D) is the XPS diagram of Si 2p on the gate oxide before and after self-assembled molecular layer modification, and (E) is the XPS diagram of O1s on the gate oxide before and after self-assembled molecular layer modification.

[0030] Figure 4(A) is the change in the peak position of Br 3d on Br-2EPO before and after the mixed perovskite, (B) is the change in the peak position of Br 3d on Br-2EPT, (C) is the change in the peak position of S2p on Br-2EPT, (D) is the XPS image of the film before self-assembled molecular layer modification, (E) is the XPS image of the Br-2EPO modified film, (F) is the XPS image of the Br-2EPT modified film, (G) is the SEM image of the film before self-assembled molecular layer modification, (H) is the SEM image of the Br-2EPO modified film, (I) is the SEM image of the Br-2EPT modified film, (J) is the AFM image of the film before self-assembled molecular layer modification, (K) is the AFM image of the Br-2EPO modified film, and (L) is the AFM image of the Br-2EPT modified film.

[0031] Figure 5 (A) is the XRD test of the three thin films, (B) is the PL test of the three thin films, (C) is the PLQY test of the three thin films, (D) is the in situ PL test of the three thin films, and (E) is the TrPL test of the three thin films.

[0032] Figure 6 (A) is the subthreshold swing diagram of the perovskite thin film transistor, and (B) is the defect state density.

[0033] Figure 7 There are three types of transistor dynamic electrical switching tests.

[0034] Figure 8 (A) is the time transfer characteristic test of thin film transistor under different bias conditions before self-assembled molecular layer modification, (B) is the time transfer characteristic test of thin film transistor modified with Br-2EPO, and (C) is the time transfer characteristic test of thin film transistor modified with Br-2EPT.

[0035] Figure 9 (A) is the transfer characteristic test of the thin film transistor at different placement times before self-assembled molecular layer modification, (B) is the transfer characteristic test of the thin film transistor at different placement times modified by Br-2EPO, and (C) is the transfer characteristic test of the thin film transistor at different placement times modified by Br-2EPT.

[0036] Figure 10 (A) is the transfer characteristics test of thin film transistors at different gate voltages before self-assembled molecular layer modification, (B) is the transfer characteristics test of thin film transistors at different gate voltages modified with Br-2EPO, (C) is the transfer characteristics test of thin film transistors at different gate voltages modified with Br-2EPT, (D) is the transfer characteristics test of thin film transistors at ultra-low gate voltage before self-assembled molecular layer modification, (E) is the transfer characteristics test of thin film transistors at ultra-low gate voltage modified with Br-2EPO, and (F) is the transfer characteristics test of thin film transistors at ultra-low gate voltage modified with Br-2EPT. DETAILED DESCRIPTION

[0037] In order to better illustrate the purpose, technical solutions and advantages of the present invention, the present invention will be further described below with reference to specific embodiments, but the protection scope and implementation methods of the present invention are not limited thereto.

[0038] Unless otherwise specified, the materials and reagents used in the following examples are commercially available.

[0039] Example 1

[0040] A method for preparing a perovskite thin film transistor based on a self-assembled monolayer comprises the following steps:

[0041] (1) Pre-treating the silicon wafer: Clean the silicon wafer with the silicon dioxide layer in acetone, deionized water, and isopropyl alcohol for 15 minutes respectively; then transfer the cleaned silicon wafer to a thermal evaporation chamber to deposit the electrode, followed by UV treatment;

[0042] (2) A small molecule solution dissolved in ethanol was spin-coated on a pre-treated silicon dioxide wafer and annealed at 100°C for 10 min to obtain a multilayer small molecule film. The small molecule solution was Br-2EPO (manufacturer: Taiwan Jiguang Technology) with a concentration of 1 mg / mL. The spin-coating speed was 4000 rpm and the spin-coating time was 30 s.

[0043] (3) Then, 200 μL of ethanol was spin-coated on the multilayer small molecule film to obtain a perovskite thin film transistor. The spin-coating speed was 4000 rps and the spin-coating time was 30 s.

[0044] Example 2

[0045] The only difference from Example 1 is that the small molecule solution is Br-2EPT (manufacturer: Taiwan Jiguang Technology).

[0046] Taking the two-dimensional tin-based perovskite (PEA2SnI4) transistor as an example, the preparation process of one-step deposition on silicon wafer is as follows Figure 1 As shown in Figure A, the chemical properties of the gate interface state largely determine the transfer characteristics and output characteristics of the transistor.

[0047] Since hydrophilic treatment induces explosive growth of hydroxyl groups on the gate oxide surface, it causes large hysteresis in the transistor transfer curve and a decrease in the on-off ratio, followed by a loss of other transistor performance parameters, such as threshold voltage and subthreshold swing. Figure 1 B, the output characteristic curve is as follows Figure 1 As shown in C.

[0048] Figure 2A is the preparation flow chart of the interface state modified transistor. The self-assembled molecules (Br-2EPO and Br-2EPT) can achieve the function of tightly connecting the substrate and the perovskite layer, which plays a vital role in improving the stability of the transistor. The transfer characteristic curve of the perovskite transistor after interface modification is shown in Figure 2. Figure 2 B, 2C, the output characteristic curve is as follows Figure 2 D, 2E. This invention makes perovskite transistors have great potential in future display, sensor and memory technologies.

[0049] Energy dispersive spectrometer (EDS) analysis of P element confirmed the deposition of Br-2EPO and Br-2EPT on silica ( Figure 3 A, B). The hydrophobic effect of Br-2EPO and Br-2EPT is also retained on silica, which is beneficial to enlarge the perovskite nucleation site and make the film growth more dense ( Figure 3 C). XPS spectroscopy showed that Br-2EPO and Br-2EPT small molecules achieved the passivation of hydroxyl groups ( Figure 3 D, E).

[0050] The halogen atoms (Br) and Lewis base (S) in the Br-2EPT small molecule can effectively interact with the uncoordinated electrons in the Sn atoms. The XPS electron energy spectrum shows that Br-2EPT has a passivating effect on the perovskite film ( Figure 4 A, B, C). And through the action of functional groups, the tetravalent tin inside the perovskite layer after interface modification is significantly suppressed ( Figure 4 D, E, F), the divalent tin content increased from 58.29% to 68.66%. From the scanning electron microscopy (SEM) results, it can be seen that after Br-2EPT small molecule passivation, the grain size of the perovskite film increased significantly ( Figure 4 G, H, I), the atomic force microscopy (AFM) results show that the original perovskite film exhibits a high roughness of 21.4 nm ( Figure 4 J). In comparison, the perovskite films modified with self-assembled small molecules exhibited lower roughness, which were 12.9 nm and 11.9 nm respectively ( Figure 4 K, L).

[0051] The X-ray diffractometer (XRD) results show that the half-peak width is reduced, which proves that the film crystallinity is better ( Figure 5 A). Steady-state PL results show that the PL intensity of the film after interface modification is higher ( Figure 5 B). The photoluminescence quantum yield (PLQY) results show that the PLQY value after interface modification is increased to twice that of the original film ( Figure 5 C). In situ PL spectroscopy shows that self-assembled small molecules can slow down the crystallization of perovskite ( Figure 5D). Time-resolved photoluminescence (TRPL) spectroscopy shows that the interface-modified film has a longer carrier lifetime ( Figure 5 E), indicating the reduction of interfacial non-radiative recombination.

[0052] Further analysis of the internal defect state of the transistor is carried out through the subthreshold swing data ( Figure 6 A) The defect state density is calculated. It can be seen that the internal defect state density of the transistor modified with Br-2EPO is reduced to the original value. The internal defect state density of the transistor modified with Br-2EPO is reduced from 7.42×10 12 Reduced to 6.72×10 12 The internal defect state density of the transistor modified with Br-2EPO was significantly reduced to 4.19×10 12 ( Figure 6 B).

[0053] The working stability of the thin film transistors before and after modification with two self-assembled molecular layers was characterized by dynamic electrical switching tests. Figure 7 ), all three devices provided highly repeatable on / off current states over more than 1000 electrical cycles. The Br-2EPT-modified FETs exhibited highly reproducible on / off current states under the same conditions, with excellent electrical performance reproducibility. The Br-2EPO-modified FETs showed a slight attenuation. The FETs without SAMs modification showed a very significant current attenuation during the electrical cycle. The operational stability of the transistors was evaluated by long-term bias voltage measurements under constant negative gate and drain voltages (VGS = -40 V, VDS = -40 V). Figure 8 A, B, C), the VTH change of the transistor modified with Br-2EPT is less than 1.5V after continuous biasing for more than 1800s. In contrast, the IDS value of the original device degrades rapidly after 1800s bias voltage test, and the VTH shifts significantly negative (14V). The IDS decay is only 5%. The environmental stability of the transistor is further evaluated by measuring the transfer characteristic curves of the transistor after 24 hours and 5 days. Figure 9 A, B, C). The original device lost most of its transistor characteristics after 5 days of storage in an N2 glove box, while the interface-modified device still maintained high transistor mobility and high on / off ratio. In particular, the Br-2EPT device had a VTH shift of only a few volts. By changing the gate voltage to modulate the transfer characteristic curves of the three transistors ( Figure 10 A, B, C), the transistors after interface modification show lower on-current and higher top-current, respectively, and can maintain excellent gate induced current modulation (GIM) even at ultra-low gate voltage (-0.001V). Figure 10 D, E, F).

[0054] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention and are not intended to limit the scope of protection of the present invention. Although the present invention has been described in detail with reference to preferred embodiments, those skilled in the art should understand that the technical solutions of the present invention may be modified or replaced by equivalents without departing from the essence and scope of the technical solutions of the present invention.

Claims

1. A method for preparing a perovskite thin film transistor based on a self-assembled monolayer, characterized in that: The following steps are involved: (1) spin coating a small molecule solution dissolved in an organic solvent on a silicon wafer coated with silicon dioxide, and annealing at 100-120° C. for 10-15 minutes to obtain a multilayer small molecule film, wherein the small molecule solution is Br-2EPO or Br-2EPT; the concentration of the small molecule solution is 0.5-5 mg / mL; (2) Spin-coat the organic solvent onto the multi-layer small molecule film.

2. The method for preparing a perovskite thin film transistor based on a self-assembled monolayer according to claim 1, wherein: In step (1), the concentration of the small molecule solution is 1-3 mg / mL.

3. The method for preparing a perovskite thin film transistor based on a self-assembled monolayer according to claim 1, wherein: In step (1), the rotation speed during spin coating is 3000-4000 rpm, and the spin coating time is 25-30 s.

4. The method for preparing a perovskite thin film transistor based on a self-assembled monolayer according to claim 1, wherein: In step (1), the silicon wafer coated with the silicon dioxide layer is pretreated as follows: The silicon wafer coated with the silicon dioxide layer was cleaned in acetone, deionized water and isopropyl alcohol solvents respectively; the cleaned silicon wafer was then transferred to a hot evaporation chamber to evaporate the electrode, followed by UV treatment.

5. The method for preparing a perovskite thin film transistor based on a self-assembled monolayer according to claim 1, wherein: In step (2), the rotation speed during spin coating is 4000-4500 rpm, and the spin coating time is 30-35 s.

6. The method for preparing a perovskite thin film transistor based on a self-assembled monolayer according to claim 1, wherein: The organic solvent includes at least one of ethanol and isopropanol.

7. The method for preparing a perovskite thin film transistor based on a self-assembled monolayer according to claim 1, wherein: In step (2), the amount of the organic solvent used is 100-500 uL.

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