Device testing apparatus and device testing system

Abstract

The invention provides a device testing device and a device testing system, and the device can achieve the adjustment of the current of a grid electrode of a to-be-tested device through a control module and a driving module, thereby forming different voltage values at the grid electrode of the to-be-tested device. Therefore, test requirements of power semiconductor devices with different powers and different models are met, and accurate measurement of the grid charges of the to-be-tested device under different working conditions is realized. In addition, the grid voltage, collected by the collection module, of the to-be-tested device can be output as a real-time voltage oscillogram, so that a user can monitor the current voltage based on the real-time voltage oscillogram and adjust the current based on the current real-time voltage value, and the accuracy of grid charge testing of the to-be-tested device is further improved.

Description

Technical Field

[0001] The present application relates to the technical field of power semiconductor device testing, and in particular to a device testing apparatus and a device testing system. Background Art

[0002] Controllable power semiconductors are the core components of power electronic control circuits. In order to ensure the stability of the control circuit, it is necessary to conduct reliability tests on the performance of power semiconductor devices. Gate charge, as one of the important dynamic parameters that characterize power semiconductor devices, directly affects the driving capability and switching speed of the device. Therefore, how to test the gate charge of power semiconductor devices has become a problem that needs to be solved.

[0003] Currently, when testing the gate charge of a power semiconductor device, a constant current is provided to the gate of the device, and the gate voltage of the device is measured. The gate charge during the period is calculated by calculating the gate voltage and the constant current.

[0004] However, the formula for calculating the gate charge in the prior art is fixed, and the gate current cannot be adjusted according to different working conditions. Therefore, the voltage start and end values ​​of the gate charge cannot be configured and changed, and the actual test requirements cannot be met. Summary of the invention

[0005] The purpose of the present application is to provide a device testing apparatus and a device testing system to address the deficiencies in the above-mentioned prior art, so as to solve the problem that the device testing method in the prior art cannot meet the actual testing requirements.

[0006] To achieve the above objectives, the technical solutions adopted in this application are as follows:

[0007] In a first aspect, the present application provides a device testing apparatus, the apparatus comprising: a control module, a collection module, and a driving module;

[0008] The output end of the control module is connected to the input end of the driving module, and the control module is used to send a control signal to the driving module to control the driving module to generate a current signal of a signal sending duration and a current magnitude corresponding to the control signal under the instruction of the control signal;

[0009] The output end of the driving module is connected to the gate of the device under test, and the driving module is used to send a current signal to the gate of the device under test under the control of the control module to charge the device under test;

[0010] The acquisition end of the acquisition module is connected to the gate of the device under test, and the output end of the acquisition module is connected to the input end of the control module. The acquisition module is used to acquire the gate voltage and gate current of the device under test, and send the gate voltage and gate current to the control module, so that the control module determines the test result of the device under test based on the gate voltage and gate current.

[0011] Optionally, the driving module includes: a conversion unit and a current generating unit;

[0012] The input end of the conversion unit is connected to the output end of the control module, the output end of the conversion unit is connected to the input end of the current generating unit, and the conversion unit is used to convert the control signal sent by the control module from a digital signal to an analog signal;

[0013] The input end of the current generating unit is connected to the output end of the conversion unit, and the output end of the current generating unit is connected to the device under test.

[0014] Optionally, the current generating unit includes: a first switch subunit, a second switch subunit, a first current source and a second current source;

[0015] The first end of the first switch subunit is connected to the output end of the conversion unit, the second end of the first switch subunit is connected to the first end of the first current source, the second end of the first current source is connected to the device under test, and the third end of the first switch subunit is connected to a positive voltage source;

[0016] The first end of the second switch subunit is connected to the output end of the conversion unit, the second end of the second switch subunit is connected to the first end of the second current source, the second end of the second current source is connected to the device under test, the third end of the second switch subunit is connected to the negative voltage source, and the fourth end of the first switch subunit is connected to the fourth end of the second switch subunit.

[0017] Optionally, the first switch subunit includes: a first switch, a second switch, a first resistor, a second resistor and a first diode;

[0018] The cathode of the first diode is connected to the first end of the second switch subunit as the first end of the first switch subunit, and is connected to the output end of the conversion unit;

[0019] The anode of the first diode is connected to the collector of the second switch and the first end of the first current source, and is also connected to the positive voltage source;

[0020] The emitter of the second switch is connected to one end of the second resistor and the base of the first switch, and the other end of the second resistor is connected to the positive voltage source;

[0021] The emitter of the first switch is connected to the positive voltage source, the collector of the first switch is connected to one end of the first resistor, and the other end of the first resistor is connected to the fourth end of the second switch subunit as the fourth end of the first switch subunit.

[0022] Optionally, the second switch subunit includes: a third switch, a fourth switch, a third resistor, a fourth resistor and a second diode;

[0023] The anode of the second diode is connected to the first end of the second switch subunit as the first end of the first switch subunit, and is connected to the output end of the conversion unit;

[0024] The cathode of the second diode is connected to the collector of the third switch and the first end of the second current source, and is also connected to the negative voltage source;

[0025] The emitter of the third switch is connected to one end of the third resistor and the base of the fourth switch, and the other end of the third resistor is connected to the negative voltage source;

[0026] The emitter of the fourth switch is connected to the negative voltage source, the collector of the fourth switch is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the fourth end of the first switch subunit as the fourth end of the second switch subunit.

[0027] Optionally, the acquisition module includes a current acquisition submodule, a voltage acquisition submodule, and a sampling switch;

[0028] The device further comprises a sampling resistor, a first end of the sampling resistor is connected to the output end of the driving module, and a second end of the sampling resistor is connected to the gate of the device under test;

[0029] The first input end of the current acquisition submodule is connected to the first end of the sampling resistor, the second input end of the current acquisition submodule is connected to the second end of the sampling resistor, and the output end of the current acquisition submodule is connected to the input end of the control module;

[0030] The input end of the voltage acquisition submodule is connected to the first end of the sampling switch, the second end of the sampling switch is connected to the gate of the device under test, the input end of the sampling switch is connected to the output end of the control module, the output end of the voltage acquisition submodule is connected to the input end of the control module, and the sampling switch is used to control the voltage acquisition submodule to acquire the gate voltage of the device under test under the action of the control signal sent by the control module.

[0031] Optionally, the voltage acquisition submodule includes: a high-speed differential amplifier and an analog-to-digital converter;

[0032] The first input end of the high-speed differential amplifier is connected to the first end of the sampling resistor, the second input end of the high-speed differential amplifier is connected to the second end of the sampling resistor, the output end of the high-speed differential amplifier is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the input end of the control module.

[0033] Optionally, the current acquisition submodule includes: a high-speed differential amplifier and an analog-to-digital converter;

[0034] The input end of the high-speed differential amplifier is connected to the first end of the sampling switch, the output end of the high-speed differential amplifier is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the input end of the control module.

[0035] Optionally, the device further comprises an isolation module, the isolation module comprising: a first isolation unit, a second isolation unit, a third isolation unit and a fourth isolation unit;

[0036] The first end of the first isolation unit is connected to the output end of the control module, and the second end of the first isolation unit is connected to the input end of the conversion unit;

[0037] A first end of the second isolation unit is connected to an input end of the control module, and a second end of the second isolation unit is connected to an output end of the current acquisition submodule;

[0038] A first end of the third isolation unit is connected to the output end of the control module, and a second end of the third isolation unit is connected to the input end of the sampling switch;

[0039] A first end of the fourth isolation unit is connected to an input end of the control module, and a second end of the fourth isolation unit is connected to an output end of the voltage acquisition submodule.

[0040] In a second aspect, the present application provides a device testing system, comprising a host computer and the device testing apparatus described in the first aspect, wherein the host computer is connected to the device testing apparatus, and the host computer is used to display the test results of the device testing apparatus.

[0041] The beneficial effects of the present application are: it can realize the regulation of the gate current of the device under test, and then form voltage values ​​of different sizes at the gate of the device under test, so as to meet the test requirements of power semiconductor devices of different powers and models, and realize the accurate measurement of the gate charge of the device under test under different working conditions. In addition, the present application can also output the gate voltage of the device under test as a real-time voltage waveform, so that the user can monitor the current voltage based on the real-time voltage waveform, and adjust the current based on the current real-time voltage value, further improving the accuracy of the gate charge test of the device under test.

[0042] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0043] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0044] Figure 1 The structure diagram of the gate charge test circuit of the prior art is shown;

[0045] Figure 2 A schematic diagram of the structure of a device testing device provided in an embodiment of the present application is shown;

[0046] Figure 3 A schematic diagram of the architecture of a driving module in a device testing apparatus provided in an embodiment of the present application is shown;

[0047] Figure 4 A schematic diagram of a circuit structure of a current generating unit provided in an embodiment of the present application is shown;

[0048] Figure 5 A schematic diagram of the architecture of a driving module in another device testing apparatus provided in an embodiment of the present application is shown;

[0049] Figure 6 A schematic diagram of the circuit structure of a driving module in a device testing apparatus provided in an embodiment of the present application is shown;

[0050] Figure 7A schematic diagram of the architecture of a collection module in a device testing apparatus provided in an embodiment of the present application is shown;

[0051] Figure 8 A schematic diagram of the circuit structure of a collection module in a device testing device provided in an embodiment of the present application is shown;

[0052] Fig. 9 The figure shows an overall circuit structure diagram of a device testing apparatus provided in an embodiment of the present application. DETAILED DESCRIPTION

[0053] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application generally described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0054] It should be noted that the term "comprising" will be used in the embodiments of the present application to indicate the existence of the features declared thereafter, but does not exclude the addition of other features.

[0055] When testing the gate charge of a power semiconductor, the prior art generally uses Figure 1 The circuit shown is used to perform the gate charge test. Figure 1 , the constant current source Ia provides a constant current to the gate of the device under test. By measuring the gate voltage of the device under test and calculating the gate voltage and the constant current, the gate charge of the device under test can be obtained.

[0056] However, different semiconductor manufacturers have different testing requirements for different models of power semiconductor devices. Figure 1 When the gate charge test circuit shown is tested, the current cannot be adjusted according to the working conditions for different working conditions, so the starting value and ending value of the gate charge voltage cannot be configured and changed. Therefore, the traditional gate test charge circuit cannot meet the actual test requirements.

[0057] Based on this, the present application proposes a device testing device, which can be integrated in a test platform. The device testing device is connected to a device to be tested. The device to be tested works in a high-voltage environment. An isolation device can be used to isolate the device testing device and the high-voltage environment to ensure the normal operation of the device testing device.

[0058] like Figure 2 As shown in FIG. 1 , it is a schematic diagram of the structure of a device testing device provided in the present application. Figure 2 As shown, the device includes: a control module 10, an acquisition module 30 and a driving module 20. The device testing device is connected to the device under test 40 and the host computer respectively, and is used to send the output result to the host computer, so that the gate charge calculation result of the device under test 40 and the gate voltage waveform and / or gate current waveform of the device under test 40 are displayed through the host computer. The user can send instructions to the control module 10 of the device testing device through the host computer, so that the control module 10 adjusts the gate current of the device under test 40 according to the user's instructions. The host computer can be an electronic device with a graphical user interface.

[0059] The output end of the control module 10 is connected to the input end of the driving module 20. The control module 10 is used to send a control signal to the driving module 20 to control the driving module 20 to generate a current signal of a signal sending duration and a current size corresponding to the control signal under the instruction of the control signal.

[0060] The output end of the driving module 20 is connected to the gate of the device under test 40 . The driving module 20 is used to send a current signal to the gate of the device under test 40 under the control of the control module 10 to charge the device under test 40 .

[0061] The acquisition end of the acquisition module 30 is connected to the gate of the device under test 40, and the output end of the acquisition module 30 is connected to the input end of the control module 10. The acquisition module 30 is used to collect the gate voltage and gate current of the device under test 40, and send the gate voltage and gate current to the control module 10, so that the control module 10 determines the test result of the device under test 40 based on the gate voltage and gate current.

[0062] Optionally, the control module 10 may be an MCU (Microcontroller Unit), specifically an FPGA (Field Programmable Gate Array) module or a CPLD (Complex Programmable Logic Device) module. The user may input the test current size and signal transmission duration of the current device under test 40 through the control module 10, so that the control module 10 can send a control signal according to the instruction input by the user.

[0063] The driving module 20 may include a constant current source and a driving circuit for driving the constant current source. The driving circuit is used to drive the constant current source according to the control signal of the control module 10 to generate a current of a magnitude indicated by the control signal, and to make the duration of the current the same as the duration indicated by the signal transmission duration.

[0064] In a possible implementation, the control module 10 may send a digital signal. After receiving the digital signal sent by the control module 10 , the driving module 20 converts the digital signal into an analog signal and performs current control based on the analog signal.

[0065] The output end of the driving unit is connected to the gate of the device under test 40 , and is used to provide a test current to the gate of the device under test 40 to charge the gate of the device under test 40 .

[0066] The acquisition module 30 can perform voltage acquisition and current acquisition on the device under test 40. As an optional implementation method, the acquisition module 30 may include a voltage acquisition submodule 303 and a current acquisition submodule 301. The voltage acquisition submodule 303 is used to acquire the gate voltage of the device under test 40, and the current acquisition submodule 301 is used to acquire the gate current of the device under test 40.

[0067] The output end of the acquisition module 30 is connected to the control module 10. After the acquisition module 30 outputs the acquired gate voltage and gate current to the control module 10, the control module 10 can analyze and process the gate voltage and gate current to obtain and display the gate charge value and voltage waveform.

[0068] It should be noted that the control module 10 can also be connected to an electronic device, and the user inputs the test current and signal transmission duration used for this test on the electronic device, so that the device testing apparatus can test the device under test 40 according to the user's instructions. After the acquisition module 30 acquires the gate voltage and the gate current, the gate voltage and the gate current are sent to the control module 10. After the control module 10 calculates the gate charge of the device under test 40, the gate charge, the acquired gate voltage and the gate current can be sent to the electronic device. The electronic device outputs the gate voltage and the gate current as a waveform diagram, so that the user can monitor the real-time voltage based on the voltage waveform diagram and correct the output current according to the real-time voltage.

[0069] The embodiment of the present application can adjust the gate current of the device under test, and then form voltage values ​​of different sizes at the gate of the device under test, so as to meet the test requirements of power semiconductor devices of different powers and models, and realize accurate measurement of the gate charge of the device under test under different working conditions. In addition, the present application can also output the gate voltage of the device under test as a real-time voltage waveform, so that the user can monitor the current voltage based on the real-time voltage waveform, and adjust the current based on the current real-time voltage value, further improving the accuracy of the gate charge test of the device under test.

[0070] like Figure 3 As shown, the driving module 20 includes: a conversion unit 201 and a current generating unit 202 .

[0071] The input end of the conversion unit 201 is connected to the output end of the control module 10, and the output end of the conversion unit 201 is connected to the input end of the current generating unit 202. The conversion unit 201 is used to convert the control signal sent by the control module 10 from a digital signal to an analog signal;

[0072] An input end of the current generating unit 202 is connected to an output end of the conversion unit 201 , and an output end of the current generating unit 202 is connected to the device under test 40 .

[0073] The conversion unit 201 may be a digital-to-analog converter DAC, which is used to convert the digital signal sent by the control module 10 into an analog signal, and send the analog signal to the current generating unit 202 .

[0074] The output end of the current generating unit 202 is connected to the gate of the device under test 40 . After receiving the analog signal, the current generating module controls the switch inside the current generating unit 202 to open and close according to the instruction of the analog signal, thereby adjusting the output current of the gate of the device under test 40 .

[0075] In the first implementation, Figure 4 As shown, the current generating unit 202 can realize the adjustable current based on the operational amplifier U1. Figure 4 The current generating unit 202 includes a current source Ib, an operational amplifier U1, a resistor Ra and a resistor Rb. The input terminal 1 and the input terminal 2 in the figure are connected to the output terminal of the conversion unit 201, and the output terminal of the operational amplifier U1 is connected to the gate of the device under test 40.

[0076] The first end of the resistor Ra is connected to the output end of the conversion unit 201, the other end of the resistor Ra is connected to the inverting input end of the operational amplifier U1, the inverting input end of the operational amplifier U1 and the other end of the resistor Ra are also connected to one end of the resistor Rb, the other end of the resistor Rb is connected to the output end of the operational amplifier U1, the positive electrode of the current source is connected to the inverting input end of the operational amplifier, and is used to provide a basic constant current to the operational amplifier U1, the output end of the operational amplifier U1 is connected to the gate current of the device under test 40, and a protective resistor Rc can be added between the output end of the operational amplifier U1 and the gate of the device under test 40. After applying voltage to the operational amplifier, the operational amplifier U1 can adjust the output current based on the converted control signal sent by the conversion unit 201, thereby realizing the adjustment of the gate current of the device under test 40.

[0077] In the second implementation, Figure 5 As shown, the current generating unit 202 may include a first switch subunit 2021 , a second switch subunit 2023 , a first current source 2022 and a second current source 2024 .

[0078] A first end of the first switch subunit 2021 is connected to the output end of the conversion unit 201, a second end of the first switch subunit 2021 is connected to a first end of the first current source 2022, a second end of the first current source 2022 is connected to the device under test 40, and a third end of the first switch subunit 2021 is connected to a positive voltage source;

[0079] The first end of the second switch subunit 2023 is connected to the output end of the conversion unit 201, the second end of the second switch subunit 2023 is connected to the first end of the second current source 2024, the second end of the second current source 2024 is connected to the device under test 40, the third end of the second switch subunit 2023 is connected to the negative voltage source, and the fourth end of the first switch subunit 2021 is connected to the fourth end of the second switch subunit 2023.

[0080] Among them, the first switch subunit 2021 is used to control the opening and closing of the first current source 2022, and the second switch subunit 2023 is used to control the opening and closing of the second current source 2024. By controlling the opening and closing of the first current source 2022 and the second current source 2024, the output current of the current generating unit 202 can be adjusted. Specifically, the first switch subunit 2021 can realize positive charging of the gate of the device under test 40, and the second switch subunit 2023 can realize negative charging of the gate of the device under test 40, that is, draining energy from the gate of the device under test 40.

[0081] It should be noted that the voltage values ​​of the positive voltage source and the negative voltage source can be fixed values. The control module 10 controls the on-off of the switch inside the current generating unit 202, thereby changing the resistance of the loop in the current generating unit 202, thereby changing the output current of the current generating unit 202.

[0082] The first current source 2022 and the second current source 2024 can be current sources with the same internal resistance value, or can be current sources with different internal resistance values, which is not limited in the present application.

[0083] The control module 10 may also be connected to the first current source 2022 and the second current source 2024 (not shown in the figure) to set basic property parameters of the first current source 2022 and the second current source 2024. Before performing the gate charge test, the control module 10 may pre-set the property parameters of the first current source 2022 and the second current source 2024 based on the current test conditions.

[0084] Furthermore, Figure 6 The present application provides a schematic diagram of the specific structure of the current generating unit 202 in the device testing apparatus, in which each module and each unit are shown as specific circuit elements. Figure 6 As shown, the first switch Q1 subunit 2021 includes a first switch Q1, a second switch Q2, a first resistor R1, a second resistor R2 and a first diode.

[0085] The cathode of the first diode is connected as the first end of the first switch Q1 subunit 2021 to the first end of the second switch Q2 subunit 2023 and is connected to the output end of the conversion unit 201;

[0086] An anode of the first diode is connected to the collector of the second switch Q2 and the first end of the first current source 2022, and is also connected to a positive voltage source;

[0087] The emitter of the second switch Q2 is connected to one end of the second resistor R2 and the base of the first switch Q1, and the other end of the second resistor R2 is connected to the positive voltage source;

[0088] The emitter of the first switch Q1 is connected to a positive voltage source, the collector of the first switch Q1 is connected to one end of the first resistor R1, and the other end of the first resistor R1 is connected to the fourth end of the second switch Q2 subunit 2023 as the fourth end of the first switch Q1 subunit 2021.

[0089] The second switch Q2 subunit 2023 includes: a third switch Q3, a fourth switch Q4, a third resistor R3, a fourth resistor R4 and a second diode;

[0090] The anode of the second diode is connected as the first end of the first switch Q1 subunit 2021 to the first end of the second switch Q2 subunit 2023 and is connected to the output end of the conversion unit 201;

[0091] The cathode of the second diode is connected to the collector of the third switch Q3 and the first end of the second current source 2024, and is connected to the negative voltage source;

[0092] The emitter of the third switch Q3 is connected to one end of the third resistor R3 and the base of the fourth switch Q4, and the other end of the third resistor R3 is connected to the negative voltage source;

[0093] The emitter of the fourth switch Q4 is connected to the negative voltage source, the collector of the fourth switch Q4 is connected to one end of the fourth resistor R4, and the other end of the fourth resistor R4 is connected to the fourth end of the first switch Q1 subunit 2021 as the fourth end of the second switch Q2 subunit 2023.

[0094] The first switch Q1, the second switch Q2, the third switch Q3 and the fourth switch Q4 may be triodes. Figure 6 The current generating unit 202 shown can provide symmetrical positive and negative currents to the gate of the device under test 40 .

[0095] Specifically, when the first switch Q1 and the second switch Q2 are closed, and the third switch Q3 and the fourth switch Q4 are opened, the current direction of the first current source 2022 is Figure 6 The current direction shown is that the first current source 2022 charges the gate of the device under test 40 in the forward direction. When the third switch Q3 and the fourth switch Q4 are disconnected and the first switch Q1 and the second switch Q2 are closed, the current direction of the second current source 2024 is Figure 6 As shown in the current direction, the second current source 2024 charges the gate of the device under test 40 in a negative direction.

[0096] During the process of charging or draining energy from the device under test 40, the gate voltage and gate current of the device under test 40 can be collected by the collection module 30. Figure 7 FIG. 1 is a schematic diagram of the structure of a collection module 30 in a device testing apparatus provided in the present application.

[0097] Reference Figure 7 The acquisition module 30 includes a current acquisition submodule 301 , a voltage acquisition submodule 303 , and a sampling switch 302 .

[0098] The acquisition module 30 further includes a sampling resistor Rd, a first end of the sampling resistor Rd is connected to the output end of the driving module 20, and a second end of the sampling resistor Rd is connected to the gate of the device under test 40;

[0099] The first input end of the current acquisition submodule 301 is connected to the first end of the sampling resistor Rd, the second input end of the current acquisition submodule 301 is connected to the second end of the sampling resistor Rd, and the output end of the current acquisition submodule 301 is connected to the input end of the control module 10;

[0100] The input end of the voltage acquisition submodule 303 is connected to the first end of the sampling switch 302, the second end of the sampling switch 302 is connected to the gate of the device under test 40, the input end of the sampling switch 302 is connected to the output end of the control module 10, the output end of the voltage acquisition submodule 303 is connected to the input end of the control module 10, and the sampling switch 302 is used to control the voltage acquisition submodule 303 to collect the gate voltage of the device under test 40 under the action of the control signal sent by the control module 10.

[0101] The current acquisition submodule 301 can acquire the voltage across the sampling resistor Rd, and then calculate the gate current of the device under test 40 based on the acquired voltage and the resistance value of the sampling resistor Rd.

[0102] The voltage acquisition submodule 303 can acquire the gate voltage of the device under test 40 and output the gate voltage to the control module 10. The control module 10 can send the gate voltage to the host computer, and the host computer generates a real-time voltage waveform of the device under test 40 based on the received real-time gate voltage. The user can determine whether it is necessary to adjust the test voltage of the device under test 40 based on the real-time voltage waveform displayed by the host computer and the test requirement voltage of the device under test 40. If adjustment is required, the gate voltage of the device under test 40 can be adjusted by issuing instructions to adjust the gate current of the device under test 40.

[0103] Exemplarily, after the user issues a current adjustment instruction, the control module 10 can determine the output current that needs to be generated based on the instruction issued by the user, and determine the switches that need to be opened and the switches that need to be closed in the current generating unit 202, and control the opening and closing of the corresponding switches, thereby changing the resistance of the internal loop of the current generating unit 202, thereby achieving regulation of the output current.

[0104] Further, such as Figure 8 As shown, the current acquisition submodule 301 includes: a high-speed differential amplifier and an analog-to-digital converter.

[0105] The first input end of the high-speed differential amplifier is connected to the first end of the sampling resistor Rd, the second input end of the high-speed differential amplifier is connected to the second end of the sampling resistor Rd, the output end of the high-speed differential amplifier is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the input end of the control module 10.

[0106] Optionally, the high-speed differential amplifier can collect the real-time voltage value across the sampling resistor Rd. The analog-to-digital converter is used to convert the real-time voltage value of the high-speed differential amplifier into an analog signal, and send the converted analog signal to the control module 10.

[0107] Among them, the resistance value of the sampling resistor Rd is known, the high-speed differential amplifier sends the collected real-time voltage value to the analog-to-digital converter, the analog-to-digital converter converts the real-time voltage value into a digital signal and then sends it to the control module 10, and the control module 10 can calculate the gate current of the device under test 40 according to the real-time voltage value and the resistance value of the sampling resistor Rd.

[0108] Continue to refer to Figure 8 The voltage acquisition submodule 303 includes: a high-speed differential amplifier and an analog-to-digital converter.

[0109] The input end of the high-speed differential amplifier is connected to the first end of the sampling switch 302 , the output end of the high-speed differential amplifier is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the input end of the control module 10 .

[0110] The control module 10 can control the opening and closing of the sampling switch 302, thereby controlling the voltage acquisition submodule 303 to acquire the gate voltage of the device under test 40. The high-speed differential amplifier can sample the voltage signal of the sampling resistor Rd and send the collected gate voltage to the analog-to-digital converter. The analog-to-digital converter converts the gate voltage into a digital signal and sends it to the control module 10.

[0111] In order to further ensure the working stability of the device testing apparatus, an isolation module may be added between the control module 10 and each module. Fig. 9 The present invention is a schematic diagram of a device testing apparatus including an isolation module. The apparatus includes the isolation module, and the isolation module includes: a first isolation unit 501 , a second isolation unit 502 , a third isolation unit 503 and a fourth isolation unit 504 .

[0112] A first end of the first isolation unit 501 is connected to the output end of the control module 10 , and a second end of the first isolation unit 501 is connected to the input end of the conversion unit 201 ;

[0113] A first end of the second isolation unit 502 is connected to an input end of the control module 10 , and a second end of the second isolation unit 502 is connected to an output end of the current acquisition submodule 301 ;

[0114] A first end of the third isolation unit 503 is connected to the output end of the control module 10 , and a second end of the third isolation unit 503 is connected to the input end of the sampling switch 302 ;

[0115] A first end of the fourth isolation unit 504 is connected to the input end of the control module 10 , and a second end of the fourth isolation unit 504 is connected to the output end of the voltage acquisition submodule 303 .

[0116] The first isolation unit 501, the second isolation unit 502 and the fourth isolation unit 504 may be magnetic coupling isolators for realizing bidirectional data interaction between digital quantities and analog quantities. The third isolation unit 503 may be an optical coupling isolator for providing a digital isolation channel between the control module 10 and the acquisition module 30 to realize unidirectional transmission of control signals.

[0117] Based on the same inventive concept, the present application also provides a device testing system in an embodiment, the device testing system includes a host computer and the device testing device, the host computer may be an electronic device. The device testing device is connected to the device under test 40 .

[0118] The user can send instructions to the device testing device through the host computer. After receiving the instructions, the device generates a control signal based on the user's instructions, and generates a current indicated by the instruction based on the control signal to charge the gate of the device under test 40, and controls the sampling switch 302 to turn on, so as to collect the gate current and gate voltage of the device under test 40 through the current acquisition submodule 301 and the voltage acquisition submodule 303 and send them to the control module 10. The control module 10 analyzes and processes the gate voltage and gate current, and displays the gate charge value and gate voltage waveform of the device under test 40 through the host computer.

[0119] In the embodiments provided in the present application, it should be understood that the disclosed device can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interface, the indirect coupling or communication connection of the device or unit can be electrical, mechanical or other forms.

[0120] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0121] In addition, each functional unit in the embodiments provided in the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0122] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present application. The aforementioned storage medium includes: U disk, mobile hard disk, ROM (Read-Only Memory), RAM (Random Access Memory), disk or optical disk, and other media that can store program codes.

[0123] It should be noted that similar numbers and letters represent similar items in the following figures. Therefore, once an item is defined in one figure, it does not need to be further defined and explained in subsequent figures. In addition, the terms "first", "second", "third", etc. are only used to distinguish the description and are not to be understood as indicating or implying relative importance.

[0124] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-mentioned embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-mentioned embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application. They should all be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A device testing apparatus, characterized in that: The device comprises: a control module, a collection module, and a driving module; The output end of the control module is connected to the input end of the driving module, and the control module is used to send a control signal to the driving module to control the driving module to generate a current signal of a signal sending duration and a current magnitude corresponding to the control signal under the instruction of the control signal; The output end of the driving module is connected to the gate of the device under test, and the driving module is used to send a current signal to the gate of the device under test under the control of the control module to charge the device under test; The acquisition end of the acquisition module is connected to the gate of the device under test, and the output end of the acquisition module is connected to the input end of the control module. The acquisition module is used to acquire the gate voltage and gate current of the device under test, and send the gate voltage and gate current to the control module, so that the control module determines the test result of the device under test based on the gate voltage and gate current.

2. The device according to claim 1, characterized in that The driving module includes: a conversion unit and a current generating unit; The input end of the conversion unit is connected to the output end of the control module, the output end of the conversion unit is connected to the input end of the current generating unit, and the conversion unit is used to convert the control signal sent by the control module from a digital signal to an analog signal; The input end of the current generating unit is connected to the output end of the conversion unit, and the output end of the current generating unit is connected to the device under test.

3. The device according to claim 2, characterized in that The current generating unit comprises: a first switch subunit, a second switch subunit, a first current source and a second current source; The first end of the first switch subunit is connected to the output end of the conversion unit, the second end of the first switch subunit is connected to the first end of the first current source, the second end of the first current source is connected to the device under test, and the third end of the first switch subunit is connected to a positive voltage source; The first end of the second switch subunit is connected to the output end of the conversion unit, the second end of the second switch subunit is connected to the first end of the second current source, the second end of the second current source is connected to the device under test, the third end of the second switch subunit is connected to the negative voltage source, and the fourth end of the first switch subunit is connected to the fourth end of the second switch subunit.

4. The device according to claim 3, characterized in that The first switch subunit includes: a first switch, a second switch, a first resistor, a second resistor and a first diode; The cathode of the first diode is connected to the first end of the second switch subunit as the first end of the first switch subunit, and is connected to the output end of the conversion unit; The anode of the first diode is connected to the collector of the second switch and the first end of the first current source, and is also connected to the positive voltage source; The emitter of the second switch is connected to one end of the second resistor and the base of the first switch, and the other end of the second resistor is connected to the positive voltage source; The emitter of the first switch is connected to the positive voltage source, the collector of the first switch is connected to one end of the first resistor, and the other end of the first resistor is connected to the fourth end of the second switch subunit as the fourth end of the first switch subunit.

5. The device according to claim 3, characterized in that The second switch subunit includes: a third switch, a fourth switch, a third resistor, a fourth resistor and a second diode; The anode of the second diode is connected to the first end of the second switch subunit as the first end of the first switch subunit, and is connected to the output end of the conversion unit; The cathode of the second diode is connected to the collector of the third switch and the first end of the second current source, and is also connected to the negative voltage source; The emitter of the third switch is connected to one end of the third resistor and the base of the fourth switch, and the other end of the third resistor is connected to the negative voltage source; The emitter of the fourth switch is connected to the negative voltage source, the collector of the fourth switch is connected to one end of the fourth resistor, and the other end of the fourth resistor is connected to the fourth end of the first switch subunit as the fourth end of the second switch subunit.

6. The device according to claim 1, characterized in that The acquisition module includes a current acquisition submodule, a voltage acquisition submodule, and a sampling switch; The device further comprises a sampling resistor, a first end of the sampling resistor is connected to the output end of the driving module, and a second end of the sampling resistor is connected to the gate of the device under test; The first input end of the current acquisition submodule is connected to the first end of the sampling resistor, the second input end of the current acquisition submodule is connected to the second end of the sampling resistor, and the output end of the current acquisition submodule is connected to the input end of the control module; The input end of the voltage acquisition submodule is connected to the first end of the sampling switch, the second end of the sampling switch is connected to the gate of the device under test, the input end of the sampling switch is connected to the output end of the control module, the output end of the voltage acquisition submodule is connected to the input end of the control module, and the sampling switch is used to control the voltage acquisition submodule to acquire the gate voltage of the device under test under the action of the control signal sent by the control module.

7. The device according to claim 6, characterized in that The voltage acquisition submodule includes: a high-speed differential amplifier and an analog-to-digital converter; The first input end of the high-speed differential amplifier is connected to the first end of the sampling resistor, the second input end of the high-speed differential amplifier is connected to the second end of the sampling resistor, the output end of the high-speed differential amplifier is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the input end of the control module.

8. The device according to claim 6, characterized in that The current acquisition submodule includes: a high-speed differential amplifier and an analog-to-digital converter; The input end of the high-speed differential amplifier is connected to the first end of the sampling switch, the output end of the high-speed differential amplifier is connected to the input end of the analog-to-digital converter, and the output end of the analog-to-digital converter is connected to the input end of the control module.

9. The device according to any one of claims 1 to 8, characterized in that: The device further includes an isolation module, the isolation module including: a first isolation unit, a second isolation unit, a third isolation unit and a fourth isolation unit; The first end of the first isolation unit is connected to the output end of the control module, and the second end of the first isolation unit is connected to the input end of the conversion unit; A first end of the second isolation unit is connected to an input end of the control module, and a second end of the second isolation unit is connected to an output end of the current acquisition submodule; A first end of the third isolation unit is connected to the output end of the control module, and a second end of the third isolation unit is connected to the input end of the sampling switch; A first end of the fourth isolation unit is connected to an input end of the control module, and a second end of the fourth isolation unit is connected to an output end of the voltage acquisition submodule.

10. A device testing system, characterized in that: It comprises a host computer and the device testing device according to any one of claims 1 to 9, wherein the host computer is connected to the device testing device, and the host computer is used to display the test results of the device testing device.

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