Merkle tree hardware acceleration system for block chain data verification

By designing a Merkle tree hardware acceleration system for blockchain data verification, the problems of high power consumption, slow speed and insufficient flexibility in the Merkle tree verification process in the prior art are solved, and an efficient and flexible data verification solution is realized, suitable for high concurrency scenarios.

CN119557305AActive Publication Date: 2025-03-04NORTHWESTERN POLYTECHNICAL UNIV
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Patent Information

Application Number
CN202411688067.9
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-22
Publication Date
2025-03-04
Estimated Expiration
2044-11-22

AI Technical Summary

Technical Problem

The existing blockchain data verification platform has problems such as high power consumption, slow speed and insufficient flexibility during the Merkle tree verification process, which is difficult to meet the needs of high concurrency scenarios.

Method used

A Merkle tree hardware acceleration system for blockchain data verification is designed. Through the coordinated work of control modules, address generators, storage units, computing modules and buffers, hardware acceleration architecture optimization is carried out for Merkle tree structure characteristics, improving computing efficiency and achieving low-power operations.

Benefits of technology

An efficient and flexible blockchain data verification solution is realized, solving the problems of high power consumption, slow speed and insufficient flexibility, and is suitable for performance requirements of different blockchain application scenarios.

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Abstract

The invention relates to the technical field of block chains, and discloses a Merkle tree hardware acceleration system for block chain data verification, in the system, a control module performs coordination control on each module; the address generator is used for generating addresses of brother nodes and father nodes in the Merkle tree according to the input indexes of the leaf nodes; the storage unit is used for storing data of leaf nodes, internal nodes and root nodes of the Merkle tree; the calculation module is used for performing data splicing, hash operation and data comparison on the Merkle tree nodes according to the address provided by the address generator, and generating an intermediate result and a verification result; and the buffer area is used for temporarily storing the node data read from the storage unit and the intermediate result output by the calculation module. According to the method, a hardware acceleration architecture is designed for the structural characteristics of the Merkle tree, the calculation efficiency of block chain data verification is improved, low-power-consumption operation is achieved, and the method is suitable for performance requirements in different block chain application scenes.
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Description

Technical Field

[0001] The present invention relates to the technical field of blockchain, and in particular to a Merkle tree hardware acceleration system for blockchain data verification. Background Art

[0002] Merkle Tree is a tree-like data structure that is widely used in blockchain systems to efficiently verify the integrity and consistency of data. By hashing data blocks and building hash trees layer by layer, Merkle Tree can quickly confirm whether the data has been tampered with. Therefore, in blockchain, Merkle Tree is used as an important tool to ensure data security. However, with the continuous expansion of blockchain data scale and the increase in verification needs, the amount of calculation for Merkle Tree verification has also increased, resulting in a time-consuming verification process, which has become a bottleneck affecting the performance of Merkle Tree verification.

[0003] At present, traditional Merkle tree verification is usually implemented through software, which has high computational complexity and takes a long time. With the growth of data scale, the processing speed of software verification solutions can no longer meet the needs of some high-concurrency scenarios. At the same time, some existing acceleration solutions mainly rely on general-purpose hardware, such as CPU or GPU. Although these solutions can improve the processing speed to a certain extent, they are highly versatile and difficult to deeply optimize the Merkle tree structure characteristics, and the improvement in computing efficiency is limited. Existing hardware acceleration solutions lack in-depth understanding and optimization of the Merkle tree structure, fail to fully utilize the hierarchical structure and hash operation characteristics of the Merkle tree, and it is difficult to further improve the computing efficiency. Summary of the invention

[0004] The purpose of the present invention is to provide a Merkle tree hardware acceleration system for blockchain data verification, design a hardware acceleration architecture based on the Merkle tree structure characteristics, improve the computational efficiency of blockchain data verification, and achieve low-power operation through hardware optimization. It is suitable for the performance requirements in different blockchain application scenarios and provides an efficient and flexible blockchain data verification solution.

[0005] To achieve the above object, the present invention provides the following solutions: A Merkle tree hardware acceleration system for blockchain data verification, comprising: A control module is used to coordinate and control various modules in the system; The address generator is used to generate the addresses of the sibling nodes and parent nodes in the Merkle tree according to the index of the input leaf node; Storage unit, used to store leaf nodes, internal nodes and root node data of the Merkle tree; The calculation module is used to perform data splicing, hash operation and data comparison on the Merkle tree node according to the address provided by the address generator, and generate intermediate results and verification results; The buffer is used to temporarily store the node data read from the storage unit and the intermediate results output by the computing module; Among them, the calculation module includes a splicing module, a hash module, a node comparison module and a status register. The splicing module is used to splice data on the leaf node of the Merkle tree and its brother node. The hash module is used to perform hash operation on the spliced ​​data. The node comparison module is used to compare the operation result with the root node of the Merkle tree to verify the integrity of the data. The status register is used to record the current state of the calculation module and generate a calculation status signal to feed back to the control module.

[0006] Furthermore, the control module includes an arbitration unit, an encoding unit, a scheduling unit and an instruction fetch unit. The arbitration unit is used to monitor the computing status signals fed back by each computing module and generate a control signal; the encoding unit is used to receive the control signal of the arbitration unit, encode the instructions to be fetched by the instruction fetch unit and the scheduling unit, and generate an execution instruction; the instruction fetch unit is used to extract the execution instruction from the encoding unit and send an address generation signal to the address generator; the scheduling unit is used to extract the execution instruction from the encoding unit, send a data selection signal to the data selector, and allocate different computing tasks to each computing module through the data selector.

[0007] Furthermore, the working method of the control module is as follows: When the control module receives the calculation status signal, the arbitration unit generates a control signal according to the calculation status signals fed back by each calculation module; the encoding unit receives the control signal of the arbitration unit, encodes the instructions to be extracted by the instruction fetch unit and the scheduling unit, and generates an execution instruction; the instruction fetch unit extracts the execution instruction from the encoding unit, and sends an address generation signal to the address generator to extract the node data in the Merkle tree; the scheduling unit extracts the execution instruction from the encoding unit, sends a data selection signal to the data selector, and allocates different calculation tasks to each calculation module according to the task priority through the data selector, so as to realize parallel processing of the calculation tasks.

[0008] Furthermore, the address generator includes an index update unit, a sibling node index calculation unit, an address conversion unit and a control unit. The index update unit is used to use an iterative algorithm to update the current node index of each level and output the currently processed level; the sibling node index calculation unit is used to obtain the sibling node index according to the current node index; the address conversion unit is used to receive the sibling node index and the currently processed level, calculate the corresponding node address according to the index using a formula; the control unit is used to obtain the currently processed level and use a counter to control the number of iterations according to the total number of layers of the Merkle tree to end the iterative algorithm loop of the index update unit.

[0009] Furthermore, the working method of the address generator is as follows: First, the index update unit receives the input leaf node index and uses the iterative algorithm to update the node index that needs to be calculated currently according to the instruction of the control unit; Subsequently, the sibling node index calculation unit generates a sibling node index through an XOR operation according to the updated node index, wherein it is determined whether the current node needs to continue to update the index or whether the root node has been reached. If m is less than n, the recursive operation continues upward to calculate the parent node and sibling node indexes of the current node; if m is equal to n, it indicates that the root node has been reached, and the recursive operation is stopped, wherein m represents the current processing level, and n represents the total number of layers of the Merkle tree; Finally, the address conversion unit converts the node index generated by the sibling node index calculation unit into a node address for reading the corresponding node data in the storage unit.

[0010] Furthermore, in the storage unit, leaf node, internal node and root node data are stored in sequence according to a tree-like hierarchical structure; all leaf node data are located at the top layer of the storage unit and are stored in sequence from top to bottom; internal nodes are stored layer by layer according to the results of hash operations, and the root node is located at the bottom layer.

[0011] Furthermore, the hash module adopts a parallel computing structure to improve the efficiency of Merkle tree verification; the intermediate results are transmitted between the splicing module and the hash module through a buffer to avoid data processing bottlenecks.

[0012] Furthermore, the intermediate result includes the concatenated data and the result of the hash operation.

[0013] Furthermore, the working method of the calculation module is as follows: The calculation module performs data splicing on the leaf node and its sibling nodes of the Merkle tree corresponding to the blockchain data according to the address provided by the address generator, generates the hash value of the parent node of the leaf node through hash operation, and calculates the hash value of the parent node of each layer through layer-by-layer hash operation until the root node hash value of the Merkle tree is finally generated; in this process, the node comparison module generates a complete "hash path", that is, all the intermediate hash values ​​from the leaf node to the root node. Once the new root node hash value is generated, the node comparison module compares the new root node hash value with the original Merkle tree root node hash value stored in the system. If the two are consistent, it is determined that the blockchain data has not been tampered with, the verification is passed, and the integrity of the data is confirmed; if the two are inconsistent, it is determined that the blockchain data has been tampered with or incomplete, and the verification fails.

[0014] Furthermore, the storage unit includes a memory for storing leaf nodes, internal nodes and root node data of the Merkle tree, and the system also includes a storage read-write unit, which is used to perform read and write operations on the node data of the memory according to the address provided by the address generator.

[0015] According to the specific embodiments provided by the present invention, the present invention discloses the following technical effects: the Merkle tree hardware acceleration system for blockchain data verification provided by the present invention can solve the problems of high power consumption, slow speed and insufficient flexibility in the Merkle tree verification process of the existing blockchain data verification platform; the system is based on a hardware acceleration architecture and is specially designed for Merkle tree verification, aiming to improve the efficiency of blockchain data verification and achieve low-power operation through hardware optimization. In addition, the present invention can effectively solve the performance requirements in different blockchain application scenarios and provide an efficient and flexible blockchain data verification solution by optimizing the configuration of multiple computing modules and processing different computing tasks in parallel. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative labor.

[0017] Figure 1 A schematic diagram of the structural framework of the Merkle tree hardware acceleration system for blockchain data verification provided by the present invention; Figure 2 This is a workflow diagram of the Merkle tree hardware acceleration system for blockchain data verification of the present invention; Figure 3It is a structural schematic diagram of the control module in the present invention; Figure 4 It is a structural schematic diagram of the calculation module in the present invention; Figure 5 A schematic diagram of the data structure of the storage unit in the present invention; Figure 6 It is a structural schematic diagram of the address generator in the present invention; Figure 7 Schematic diagram of the work flow of the address generator in the present invention; Figure 8 It is a calculation status indication diagram of the status register in the present invention. DETAILED DESCRIPTION

[0018] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0019] The Merkle tree hardware acceleration system for blockchain data verification provided by the present invention designs a hardware acceleration architecture based on the Merkle tree structure characteristics, improves the computational efficiency of blockchain data verification, and achieves low-power operation through hardware optimization. It is suitable for performance requirements in different blockchain application scenarios and provides an efficient and flexible blockchain data verification solution.

[0020] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0021] like Figure 1 As shown, the present invention provides a Merkle tree hardware acceleration system for blockchain data verification, including a control module, an address generator, a storage unit, a computing module, and a buffer zone; the entire system realizes efficient Merkle tree verification through the collaborative work of various modules, thereby accelerating the verification process of blockchain data.

[0022] like Figure 2 As shown in FIG. 1 , the Merkle tree hardware acceleration system based on blockchain data verification first receives a control signal I and the blockchain data D to be verified from the user end. i , and then use the address generator and storage read-write unit to extract the data corresponding to the merkle path from the storage unit according to the control signal, and then compare the extracted data with the blockchain data D to be verified. iEnter the hash module in turn through data selector 1 and data selector 2 respectively to obtain the final root hash value, and finally compare the calculated root hash value with the stored root node value to obtain the verification result.

[0023] The following is a description of each module in the Merkle tree hardware acceleration system for blockchain data verification: First, control module The control module provided in the embodiment of the present invention is used to coordinate and control various modules in the system.

[0024] The control module includes an arbitration unit, an encoding unit, a scheduling unit and an instruction fetch unit. The arbitration unit is used to monitor the computing state signals fed back by each computing module, generate control signals, ensure that conflicts between computing tasks can be handled in a timely manner, and ensure the correct and smooth execution of each computing task. The encoding unit is used to receive the control signal of the arbitration unit, encode the instructions to be extracted by the instruction fetch unit and the scheduling unit, generate execution instructions, and instruct the computing module and the storage unit to perform corresponding operations. The instruction fetch unit extracts the execution instruction from the encoding unit, and sends an address generation signal to the address generator to extract the relevant node data in the Merkle tree. The scheduling unit extracts the instruction from the encoding unit, sends a data selection signal to the data selector 2, and assigns different computing tasks to each computing module to realize parallel processing of computing tasks.

[0025] See also Figure 3 The control module effectively completes the scheduling and computing management of system tasks through the collaboration of the instruction fetch unit, the scheduling unit, the encoding unit and the arbitration unit. The workflow of the control module in this embodiment is as follows: Figure 3 As shown in the figure, through the cooperation of the instruction fetch unit, scheduling unit, encoding unit and arbitration unit, the system can efficiently complete the allocation and execution of computing tasks.

[0026] The working method of the control module is as follows: When the control module receives the calculation status signal, the arbitration unit generates a control signal according to the calculation status signals fed back by each calculation module; the encoding unit receives the control signal of the arbitration unit, encodes the instructions to be extracted by the instruction fetch unit and the scheduling unit, and generates an execution instruction; the instruction fetch unit extracts the execution instruction from the encoding unit, and sends an address generation signal to the address generator to extract the node data in the Merkle tree; the scheduling unit extracts the execution instruction from the encoding unit, sends a data selection signal to the data selector, and allocates different calculation tasks to each calculation module according to the task priority through the data selector, so as to realize parallel processing of the calculation tasks.

[0027] Second, address generator The address generator is used to generate the addresses of the sibling nodes and parent nodes in the Merkle tree according to the index of the input leaf node. The address generator can recursively generate the addresses of each sibling node and parent node according to the given node index, ensuring that the node data in the verification path can be accessed quickly and accurately.

[0028] The structural diagram and working principle diagram of the address generator in this embodiment are as follows Figure 6 and Figure 7 As shown in the figure, the index update unit, the sibling node index calculation unit and the address conversion unit cooperate to complete the generation and update operation of the node address. The index update unit is responsible for receiving the current node index i k (Indicates the position index of the node currently being processed in the Merkle tree), and uses the iterative algorithm, i.e., the right shifter, to update the current node index. The sibling node index calculation unit is used to calculate the sibling node index based on the current node index, and is usually used to verify the sibling nodes in the Merkle tree. The address conversion unit receives the sibling node index and the currently processed level m (used to indicate the tree level height where the node is located), performs further address calculation, and generates the final node address. The control unit receives the currently processed level and uses a counter to control the calculation process to end the loop. Figure 7 As shown, the address generator recursively generates brother node and parent node addresses, thereby providing necessary data support for Merkle tree verification.

[0029] The workflow of the address generator is as follows: First, the index update unit receives the input leaf node index and updates the node index that needs to be calculated according to the instructions of the control unit. The control unit is responsible for the overall scheduling and task allocation. By updating the input index, it determines the sibling node or parent node that needs to be processed next. Then, the sibling node index calculation unit generates the sibling node index through XOR operation based on the updated node index. In this process, the system Figure 7 The m / n structure in the Merkle tree (where m represents the current processing level and n represents the total number of levels in the Merkle tree) determines whether the current node needs to continue to update the index or whether the root node has been reached. If m is less than n, the system will continue to recurse upward to calculate the parent node and sibling node indexes of the current node; if m is equal to n, it means that the root node has been reached and the recursive operation stops. Finally, the address conversion unit converts the node index generated by the sibling node index calculation unit into a memory address to ensure that the data of the corresponding node can be accurately read in the storage unit. This address conversion operation is a key link in the hardware acceleration system. By directly calculating the physical address of the node in the storage, it avoids the traditional recursive traversal and greatly improves the efficiency of data access.

[0030] The entire process is carried out in an orderly manner under the scheduling of the control unit, ensuring that the node index can be updated, calculated and converted quickly and efficiently during large-scale data verification, thereby achieving fast Merkle tree verification.

[0031] Third, storage unit The storage unit is used to store the leaf nodes, internal nodes and root node data of the Merkle tree.

[0032] Figure 5 The figure shows how the memory cells store data in a hierarchical structure. The design of the memory cells ensures efficient data storage and reading, thus supporting a fast data verification process.

[0033] The storage unit is closely integrated with the address generator and index update unit, which can quickly find the corresponding node data according to the input leaf node index. At the same time, the storage unit also allows the parent node and sibling node addresses generated by the recursive algorithm to ensure that each required node can be efficiently accessed in the verification path.

[0034] See also Figure 5 The storage unit of this embodiment realizes efficient storage of leaf nodes, internal nodes and root nodes through reasonable structural design, and supports fast read and write operations of hardware accelerated verification. The specific working principle is as follows: In the storage unit of the Merkle tree, leaf nodes, internal nodes, and root nodes are stored in sequence according to the tree hierarchy. The storage location of each node is calculated by the address generator, which implements the node storage address allocation through hardware based on the node index and the current hierarchical relationship. The entire process is automatic without the need for complex recursive traversal, which ensures that the node address calculation can be completed in constant time, thereby improving the efficiency of storage and access.

[0035] Specifically, the index update unit first determines the node index that needs to be stored, which can be used to indicate the location of a node in the Merkle tree. Next, the sibling node index calculation unit uses an XOR operation to generate the sibling node index of the current node to ensure that the related sibling nodes are calculated and stored at the same time. Then, the address conversion unit converts the node index into a physical storage address to ensure that the physical storage location of the data in the storage unit is unique and efficient.

[0036] exist Figure 5In the storage structure, all leaf nodes are located at the top of the storage unit and are stored from top to bottom. Internal nodes are stored layer by layer according to the hash calculation results, and the root node is located at the bottom. Since the storage location of each node is dynamically calculated by the address generator, this ensures efficient access to data during reading and writing. The system directly obtains the physical address of the node through hardware, avoiding complex recursive searches in software processing, thereby greatly improving the access speed of the storage unit.

[0037] The storage unit includes a memory for storing leaf nodes, internal nodes and root node data of the Merkle tree, and the system also includes a storage read-write unit, which is used to perform read and write operations on node data of the memory according to the address provided by the address generator.

[0038] In addition, hardware-accelerated verification can directly access the storage address of the node when reading or writing data, without going through complex path search. The address of each node is generated through calculation and directly stored in the physical memory. When verification is required, the system only needs to directly access the node data according to the address, which greatly shortens the data access time during the verification process and realizes efficient storage and reading operations.

[0039] In summary, by rationally designing the structure of the storage unit and combining the hardware acceleration mechanism of the address generator and address conversion unit, the system can achieve efficient storage and fast access to each node in the Merkle tree, significantly improving the performance of blockchain data verification.

[0040] Fourth, computing module The calculation module is used to perform data splicing, hash operations and data comparison on the Merkle tree nodes according to the addresses provided by the address generator, and generate intermediate results and verification results.

[0041] The computing module is one of the core modules of the entire system, responsible for data splicing, hashing and comparison. Figure 4 As shown, the computing module includes a splicing module, a hash module, a node comparison module and a status register. The splicing module is used to perform data splicing on the leaf node of the Merkle tree and its brother node. The hash module is used to perform hash operation on the spliced ​​data based on the SHA-256 algorithm. The node comparison module is used to compare the operation result with the root node of the Merkle tree to verify the integrity of the data. The status register is used to record the calculation status of the computing module and generate a calculation status signal to feed back to the control module.

[0042] The hash module adopts a parallel computing structure to improve the efficiency of Merkle tree verification; the intermediate results are transmitted between the splicing module and the hash module through a buffer to avoid data processing bottlenecks. The intermediate results include the spliced ​​data and the result of the hash operation.

[0043] When the system receives blockchain data to be verified (such as a transaction in the blockchain), it first uses the data as a leaf node of the Merkle tree and starts performing hash operations layer by layer.

[0044] The working method of the calculation module is as follows: The calculation module performs data splicing on the leaf node and its sibling node of the Merkle tree corresponding to the blockchain data according to the address provided by the address generator, generates the hash value of the parent node of the leaf node through hash operation, and calculates the hash value of the parent node of each layer through layer-by-layer hash operation until the root node hash value of the Merkle tree is finally generated; in this process, the node comparison module generates a complete "hash path", that is, all the intermediate hash values ​​from the leaf node to the root node. Once the new root node hash value is generated, the node comparison module compares the new root node hash value with the original Merkle tree root node hash value stored in the system. If the two are consistent, it is determined that the blockchain data has not been tampered with, the verification is passed, and the integrity of the data is confirmed; if the two are inconsistent, it is determined that the blockchain data has been tampered with or incomplete, and the verification fails. Therefore, the node comparison module ensures the integrity of the data during transmission and processing by comparing the calculated root node with the original stored root node.

[0045] The status register in this embodiment is a part of the computing module, which is responsible for recording the progress of the computing task and feeding back to the control module through the status signal. The status bit of the status register identifies the working status of the computing module, such as Figure 8 The status register is used to help the control module understand the progress of the calculation in real time, so as to ensure that the next operation can be started or adjusted in time.

[0046] See also Figure 8 , showing the tracking and recording of each state in the calculation process, ensuring that the system can monitor the execution progress of each computing task in real time. The status register plays an important role in task scheduling and priority adjustment. The control module can adjust the task allocation in time according to the feedback of the status register, thereby ensuring the efficient operation of the system.

[0047] Fifth, buffer zone The buffer is used to temporarily store the node data read from the storage unit and the intermediate results output by the computing module.

[0048] The buffer in this embodiment is used as an intermediate cache between data reading and calculation, storing the node data read from the storage unit and the intermediate results generated during the calculation process. By setting up a buffer, the pressure of data transmission between modules can be effectively alleviated, the data transmission bottleneck problem can be avoided, and the system can still run efficiently in a high-concurrency environment.

[0049] Through the description of the above implementation modes, those skilled in the art can clearly understand that each implementation mode can be implemented by means of software plus a necessary hardware platform. Based on such an understanding, the above technical solution can be essentially or partly embodied in the form of a software product that contributes to the prior art. The computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a magnetic disk, an optical disk, etc., and includes a number of instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to perform the work or control method described in each embodiment or some parts of the embodiment.

[0050] It should be understood by those skilled in the art that the embodiments of the present invention can be implemented in a variety of forms, including methods, systems or computer program products. Therefore, the present invention can be implemented in the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. In addition, the present invention can also be implemented in the form of a computer program product on a computer-usable storage medium, which contains computer-usable program code.

[0051] The present invention is described with reference to the flowchart and / or block diagram of the method, device (system) and / or computer program product in the embodiment. It should be understood that each process and / or box in the flowchart and / or block diagram can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor or other programmable data processing device, so that the instructions executed by the processor of the computer or other programmable device can implement the functions specified by a certain process or multiple processes in the flowchart and / or a certain box or multiple boxes in the block diagram.

[0052] These computer program instructions may also be stored in a computer-readable storage medium that can direct a computer or other programmable data processing device to operate in a specific manner, so that the instructions stored in the computer-readable storage medium produce a manufactured product including an instruction device that can implement the functions specified in one or more processes in the flowchart and / or one or more boxes in the block diagram.

[0053] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are performed on the computer or other device to implement processing through the instructions executed on the computer or other programmable device, thereby providing steps for executing one or more processes in the flowchart and / or one or more boxes in the block diagram. Function specified.

[0054] The principles and implementation methods of the present invention are described in this article using specific examples. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as limiting the present invention.

Claims

1. A Merkle tree hardware acceleration system for blockchain data verification, characterized in that: include: A control module is used to coordinate and control various modules in the system; The address generator is used to generate the addresses of the sibling nodes and parent nodes in the Merkle tree according to the index of the input leaf node; Storage unit, used to store leaf nodes, internal nodes and root node data of the Merkle tree; The calculation module is used to perform data splicing, hash operation and data comparison on the Merkle tree node according to the address provided by the address generator, and generate intermediate results and verification results; The buffer is used to temporarily store the node data read from the storage unit and the intermediate results output by the computing module; Among them, the calculation module includes a splicing module, a hash module, a node comparison module and a status register. The splicing module is used to splice data on the leaf node of the Merkle tree and its brother node. The hash module is used to perform hash operation on the spliced ​​data. The node comparison module is used to compare the operation result with the root node of the Merkle tree to verify the integrity of the data. The status register is used to record the current state of the calculation module and generate a calculation status signal to feed back to the control module.

2. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: The control module includes an arbitration unit, an encoding unit, a scheduling unit and an instruction fetch unit, wherein the arbitration unit is used to monitor the calculation status signals fed back by each calculation module and generate a control signal; The encoding unit is used to receive the control signal of the arbitration unit, encode the instructions to be fetched by the instruction fetch unit and the scheduling unit, and generate execution instructions; the instruction fetch unit is used to extract the execution instructions from the encoding unit and send an address generation signal to the address generator; the scheduling unit is used to extract the execution instructions from the encoding unit, send a data selection signal to the data selector, and allocate different computing tasks to each computing module through the data selector.

3. The Merkle tree hardware acceleration system for blockchain data verification according to claim 2, characterized in that: The working method of the control module is as follows: When the control module receives the calculation status signal, the arbitration unit generates a control signal according to the calculation status signals fed back by each calculation module; the encoding unit receives the control signal of the arbitration unit, encodes the instructions to be extracted by the instruction fetch unit and the scheduling unit, and generates an execution instruction; the instruction fetch unit extracts the execution instruction from the encoding unit, and sends an address generation signal to the address generator to extract the node data in the Merkle tree; the scheduling unit extracts the execution instruction from the encoding unit, sends a data selection signal to the data selector, and allocates different calculation tasks to each calculation module according to the task priority through the data selector, so as to realize parallel processing of the calculation tasks.

4. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: The address generator includes an index update unit, a sibling node index calculation unit, an address conversion unit and a control unit. The index update unit is used to use an iterative algorithm to update the current node index of each level and output the currently processed level; the sibling node index calculation unit is used to obtain the sibling node index according to the current node index; the address conversion unit is used to receive the sibling node index and the currently processed level, calculate the corresponding node address according to the index using a formula; the control unit is used to obtain the currently processed level, and according to the total number of layers of the Merkle tree, use a counter to control the number of iterations to end the iterative algorithm loop of the index update unit.

5. The Merkle tree hardware acceleration system for blockchain data verification according to claim 4, characterized in that: The working method of the address generator is as follows: First, the index update unit receives the input leaf node index and uses the iterative algorithm to update the node index that needs to be calculated currently according to the instruction of the control unit; Subsequently, the sibling node index calculation unit generates a sibling node index through an XOR operation according to the updated node index, wherein it is determined whether the current node needs to continue to update the index or whether the root node has been reached. If m is less than n, the recursive operation continues upward to calculate the parent node and sibling node indexes of the current node; if m is equal to n, it indicates that the root node has been reached, and the recursive operation is stopped, wherein m represents the current processing level, and n represents the total number of layers of the Merkle tree; Finally, the address conversion unit converts the node index generated by the sibling node index calculation unit into a node address for reading the corresponding node data in the storage unit.

6. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: In the storage unit, leaf node, internal node and root node data are stored in sequence according to a tree-like hierarchical structure; all leaf node data are located at the top layer of the storage unit and are stored in sequence from top to bottom; internal nodes are stored layer by layer downward according to the results of hash operations, and the root node is located at the bottom layer.

7. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: The hash module adopts a parallel computing structure; the intermediate results are transmitted between the splicing module and the hash module through a buffer.

8. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: The intermediate result includes the concatenated data and the result of the hash operation.

9. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: The working method of the calculation module is as follows: The calculation module performs data splicing on the leaf node and its sibling nodes of the Merkle tree corresponding to the blockchain data according to the address provided by the address generator, generates the hash value of the parent node of the leaf node through hash operation, and calculates the hash value of the parent node of each layer through layer-by-layer hash operation until the root node hash value of the Merkle tree is finally generated; the node comparison module generates a complete "hash path", that is, all the intermediate hash values ​​from the leaf node to the root node. Once the new root node hash value is generated, the node comparison module compares the new root node hash value with the original Merkle tree root node hash value stored in the system. If the two are consistent, it is determined that the blockchain data has not been tampered with, the verification is passed, and the integrity of the data is confirmed; if the two are inconsistent, it is determined that the blockchain data has been tampered with or incomplete, and the verification fails.

10. The Merkle tree hardware acceleration system for blockchain data verification according to claim 1, characterized in that: The storage unit includes a memory for storing leaf nodes, internal nodes and root node data of the Merkle tree, and the system also includes a storage read-write unit, which is used to perform read and write operations on node data of the memory according to the address provided by the address generator.

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