Semiconductor packaging device and preparation method

Abstract

The invention discloses a semiconductor packaging device and a preparation method, and relates to the technical field of semiconductors, the semiconductor packaging device comprises a substrate provided with conductive through holes, an upper packaging body and a lower packaging body divided based on the substrate, and a plurality of chips arranged in the upper packaging body and the lower packaging body; the at least one chip located on the upper packaging body is electrically connected with the at least one chip located on the lower packaging body based on the conductive through hole; the upper packaging body is provided with a metal radiating fin, the metal radiating fin is connected with a chip positioned on the upper packaging body, and the top surface of the metal radiating fin is exposed on the surface of the upper packaging body; the lower packaging body is provided with a metal frame, the metal frame is connected with a chip located on the lower packaging body, and the bottom face of the metal frame is exposed on the surface of the lower packaging body. The exposed metal radiating fin is connected with the bottom chip, so that the radiating efficiency of the device is improved, and the metal radiating fin is matched with the metal frame in the device, so that the large-current circulation capability of the device is improved, and the working reliability of the semiconductor packaging device is improved.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor packaging device and a preparation method thereof. Background Art

[0002] Small-sized integrated packaging is the main development direction of existing semiconductor packaging devices. Small-sized semiconductor packaging devices meet the current use requirements of electrical equipment. For high-power semiconductor packaging devices, small-volume packaging leads to poor heat dissipation of semiconductor packaging devices, which makes it easy for semiconductor packaging devices to accumulate working heat after long-term operation, affecting the working stability of semiconductor packaging devices. Due to the small size of the welding wire connection inside the semiconductor packaging device under the small-sized packaging structure, the line current carrying capacity of the semiconductor packaging device cannot meet the high current flow requirements of the power chip, affecting the working reliability of the semiconductor packaging device. Summary of the invention

[0003] The purpose of the present invention is to overcome the shortcomings of the prior art. The present invention provides a semiconductor packaging device and a preparation method. By setting an exposed metal heat sink connected to the bottom chip, the heat dissipation efficiency of the device is improved. In combination with the metal frame inside the device, the large current flow capacity of the device is improved, thereby improving the working reliability of the semiconductor packaging device.

[0004] The present invention provides a semiconductor package device, the semiconductor package device comprising: a substrate provided with conductive through holes, an upper package body and a lower package body divided based on the substrate, and a plurality of chips arranged in the upper package body and the lower package body; At least one chip located in the upper package is electrically connected to at least one chip located in the lower package based on the conductive vias; The upper package body is provided with a metal heat sink, the metal heat sink is connected to the chip located on the upper package body, and the top surface of the metal heat sink is exposed on the surface of the upper package body; The lower package body is provided with a metal frame, the metal frame is connected to the chip located in the lower package body, and the bottom surface of the metal frame is exposed on the surface of the lower package body.

[0005] Furthermore, the semiconductor package device further includes a plurality of electronic components, wherein the plurality of electronic components are arranged in the upper package body, and / or the plurality of electronic components are arranged in the lower package body.

[0006] Furthermore, the metal frame is a copper clip, one end of the copper clip is connected to the top surface electrode of the chip, and the other end of the copper clip is connected to the pad of the substrate.

[0007] Further, the metal frame includes a metal connecting plate, a first connecting column and a second connecting column; The bottom end of the first connecting column is fixed on the top surface electrode of the chip, and the bottom end of the second connecting column is connected to the pad of the substrate; One end of the metal connecting plate is fixed to the top end of the first connecting column, and the other end of the metal connecting plate is fixed to the top end of the second connecting column.

[0008] Furthermore, the first connection column is connected to the electrode of the chip based on conductive adhesive bonding, or the first connection column is fixed to the electrode of the chip based on welding; The second connecting column is mounted on the pad of the substrate by means of a conductive adhesive, or the second connecting column is fixed on the pad of the substrate by means of welding.

[0009] Furthermore, the metal frame includes a metal frame body, and the metal frame body is formed with an electrical connection part and a support part based on etching; The electrical connection portion is used to realize electrical connection between at least one chip and a pad of the substrate.

[0010] Furthermore, the metal frame further includes a first support column and a second support column; The electrical connection portion is electrically connected to the top pad of the substrate based on the first support column; The supporting portion is disposed on the top surface of the substrate based on the second supporting pillar.

[0011] The present invention also provides a method for preparing a semiconductor package device, wherein the method for preparing a semiconductor package device is used to prepare the semiconductor package device; The preparation method comprises: Mounting a top chip and several electronic components at positions corresponding to pads on the top surface of the substrate, and performing wire bonding operations on the top chip and the several electronic components; Disposing a metal frame between the top surface pad of the substrate and the top surface electrode of the top chip; The bottom chip is mounted on the pad position where the bottom surface of the substrate is connected to the through hole on the top surface; A metal heat sink and a metal component with a bent structure are mounted on the bottom chip to form pins; The above structure is encapsulated by injection molding, so that the metal heat sink and electrode pins are exposed on the bottom surface of the semiconductor package device.

[0012] Furthermore, the preparation method further comprises: When the metal frame is a semi-etched frame structure, the metal frame body is formed by an integrated molding process; Processing a plurality of support pillars on the top surface pad of the substrate so that the top surfaces of the plurality of support pillars are on the same horizontal plane as the top surface electrode of the top chip; The metal frame body is correspondingly covered on the top surface electrode of the top chip and a plurality of supporting pillars.

[0013] Furthermore, after the plastic encapsulation is completed, the top of the metal frame body is cut so that the metal frame body is divided into an electrical connection part and a support part.

[0014] The present invention provides a semiconductor packaging device and a preparation method thereof, wherein a metal heat sink is arranged on a bottom chip of a substrate and the metal heat sink is exposed on the bottom surface of the semiconductor packaging device, thereby improving the heat dissipation efficiency of the semiconductor packaging device; a metal frame is arranged inside the semiconductor packaging device to reduce the wire connection between the internal chip and the substrate pad, and the current carrying capacity of the internal electrical connection structure is improved through the metal frame structure, thereby improving the large current flow capacity of the semiconductor packaging device, thereby improving the working reliability of the semiconductor packaging device. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a schematic structural diagram of a semiconductor packaging device according to a first embodiment of the present invention; Figure 2 is a schematic structural diagram of a semiconductor packaging device according to a second embodiment of the present invention; Figure 3 is a schematic structural diagram of a semiconductor packaging device according to a third embodiment of the present invention; Figure 4 is a bottom view of the structure of a semiconductor package device in an embodiment of the present invention; Figure 5 is a top view of the structure of a semiconductor package device in an embodiment of the present invention; Figure 6 is a framework diagram of a semiconductor packaging device in an embodiment of the present invention; Figure 7 is a flow chart of a method for preparing a semiconductor packaging device according to an embodiment of the present invention; Figure 8 It is a schematic diagram of the semiconductor packaging device preparation process according to an embodiment of the present invention. DETAILED DESCRIPTION

[0016] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0017] Embodiment 1: Figure 1 The schematic diagram of the structure of the semiconductor package device of the present invention is shown, and the semiconductor package device comprises: a substrate 1 provided with a conductive through hole 6, an upper package body and a lower package body divided based on the substrate 1, and a plurality of chips arranged in the upper package body and the lower package body, At least one chip located in the upper package is electrically connected to at least one chip located in the lower package based on the conductive via 6; Furthermore, the conductive through hole 6 can be a metal-clad through hole, in which a metal layer is plated on the inner wall of the through hole to achieve electrical connection between the electronic components on the top and bottom surfaces of the substrate 1; the conductive through hole 6 can also be a metal-filled through hole, in which metal is filled to achieve the effect of current transmission.

[0018] The upper package body is provided with a metal heat sink 5, the metal heat sink 5 is connected to the chip located on the upper package body, and the top surface of the metal heat sink 5 is exposed on the surface of the upper package body; The lower package body is provided with a metal frame 2 with a bending structure, the metal frame 2 is connected to at least one chip located in the lower package body, and the bottom surface of the metal frame 2 is exposed on the surface of the lower package body.

[0019] Specifically, the plurality of chips include a bottom chip 4 and a top chip 3. In the present embodiment, the bottom chip 4 is disposed in the upper package, and the top chip 3 is disposed in the lower package. The heat dissipation efficiency of the bottom chip 4 is improved based on the metal heat sink 5.

[0020] Furthermore, by exposing the metal heat sink 5 on the surface of the upper package body of the semiconductor package device, the heat dissipation area of ​​the semiconductor package device is increased, and the metal heat sink 5 is directly connected to the bottom chip 4 of the semiconductor package device, so that the working heat of the bottom chip 4 can be directly dissipated to the external environment through the metal heat sink 5, thereby improving the heat dissipation efficiency of the semiconductor package device.

[0021] The top chip 3 is electrically connected to the pad on the top surface of the substrate 1 based on the metal frame 2. The current carrying capacity of the semiconductor packaging device is improved through the metal frame 2, so that the metal frame 2 of the semiconductor packaging device can meet the large current flow requirements of the top chip 3.

[0022] Furthermore, the semiconductor package device also includes a plurality of electronic components, which are electrically connected to the top chip 3 through bonding wires. The plurality of electronic components include: MOS controlled thyristors, integrated gate commutated thyristors (IGCTs), electron injection enhanced gate transistors (IEGTs), etc. The electrical connection requirements of the plurality of electronic components inside the semiconductor package device are achieved through metal bonding wires.

[0023] Specifically, the top chip 3 and the bottom chip 4 are vertical structures, and the top chip 3 and the bottom chip 4 can be directly die-bonded on the pads of the substrate 1, thereby realizing the electrical connection between the top chip 3 and the circuit of the substrate 1, and realizing the electrical connection between the bottom chip 4 and the circuit of the substrate 1.

[0024] Specifically, the metal frame 2 can be a copper clip, one end of the copper clip is connected to the top surface electrode of the top chip 3, and the other end of the copper clip is connected to the top surface pad of the substrate 1. The copper clip is an electrical connection device, mainly made of copper or other conductive metal materials, and has the characteristics of reliable connection, corrosion resistance and good conductivity.

[0025] Furthermore, the metal frame 2 is bent to form a copper clip structure, and the copper clip is configured as a U-shaped profile structure. Based on the U-shaped profile structure, an electrical connection bridge is formed between the top chip 3 and the top surface pad of the substrate 1, thereby satisfying the large current flow connection of the top chip 3.

[0026] Furthermore, the copper clip can be formed by copper metal and other conductive materials, so that the copper clip has good conductive properties and can meet the electrical connection requirements between the top chip 3 and the top surface pad of the substrate 1.

[0027] Specifically, the copper clip can be electrically connected to the substrate 1 and the top chip 3 through a conductive adhesive, and the conductive adhesive is coated on the top surface pad of the substrate 1 and the electrode position of the top chip 3 by steel screen printing, and the copper clip is aligned with the top surface pad of the substrate 1 and the electrode position of the top chip 3 and mounted, and the copper clip is installed by thermal curing, thereby satisfying the electrical connection between the substrate 1 and the top chip 3.

[0028] Embodiment 2: Figure 2A schematic structural diagram of a semiconductor packaging device in an embodiment of the present invention is shown, wherein the semiconductor packaging device comprises: a substrate 1 provided with a conductive through hole 6, a bottom chip 4, a top chip 3, a metal heat sink 5 and a metal frame 2, wherein the metal heat sink 5 is exposed on the bottom surface of the semiconductor packaging device, and the metal heat sink 5 is adhesively connected to the bottom chip 4, and the heat dissipation efficiency of the bottom chip 4 is improved based on the metal heat sink 5.

[0029] Furthermore, the metal heat sink 5 is exposed on the bottom surface of the semiconductor packaging device to increase the heat dissipation area of ​​the semiconductor packaging device, and the metal heat sink 5 is directly connected to the bottom chip 4 of the semiconductor packaging device, so that the working heat of the bottom chip 4 can be directly dissipated to the external environment through the metal heat sink 5, thereby improving the heat dissipation efficiency of the semiconductor packaging device.

[0030] The top chip 3 is electrically connected to the pad on the top surface of the substrate 1 based on the metal frame 2. The current carrying capacity of the semiconductor packaging device is improved through the metal frame 2, so that the metal frame 2 of the semiconductor packaging device can meet the large current flow requirements of the top chip 3.

[0031] Furthermore, the semiconductor package device also includes a plurality of electronic components, which are electrically connected to the top chip 3 through bonding wires. The plurality of electronic components include: MOS controlled thyristors, integrated gate commutated thyristors (IGCTs), electron injection enhanced gate transistors (IEGTs), etc. The electrical connection requirements of the plurality of electronic components inside the semiconductor package device are achieved through metal bonding wires.

[0032] Specifically, the top chip 3 and the bottom chip 4 are vertical structures, and the top chip 3 and the bottom chip 4 can be directly die-bonded on the pads of the substrate 1, thereby realizing the electrical connection between the top chip 3 and the circuit of the substrate 1, and realizing the electrical connection between the bottom chip 4 and the circuit of the substrate 1.

[0033] Specifically, the metal frame 2 includes a metal connecting plate 23, a first connecting column 21 and a second connecting column 22, the bottom end of the first connecting column 21 is fixed to the top surface electrode of the top chip 3, and the bottom end of the second connecting column 22 is connected to the top surface pad of the substrate 1; One end of the metal connecting plate 23 is fixed to the top of the first connecting column 21, and the other end of the metal connecting plate 23 is fixed to the top of the second connecting column 22. Based on the electrical connection structure of the metal connecting plate 23, the first connecting column 21 and the second connecting column 22, the current carrying capacity between the top surface pad of the substrate 1 and the top surface electrode of the top chip 3 is improved, so that the metal frame 2 can meet the circulation requirements of the large working current of the top chip 3.

[0034] Specifically, the first connecting column 21 is connected to the top surface electrode of the top chip 3 based on conductive adhesive bonding, or the first connecting column 21 is fixed to the top surface electrode of the top chip 3 based on welding; The second connecting column 22 is mounted on the top pad of the substrate 1 by means of a conductive adhesive, or the second connecting column 22 is fixed on the top pad of the substrate 1 by means of welding.

[0035] Embodiment three: Figure 3 FIG. 1 shows a schematic structural diagram of a semiconductor packaging device in an embodiment of the present invention. Figure 4 FIG. 2 shows a bottom view of the structure of a semiconductor package device in an embodiment of the present invention. Figure 5 FIG. 2 shows a top view of the structure of a semiconductor package device in an embodiment of the present invention. Figure 6 A frame diagram of a semiconductor packaging device in an embodiment of the present invention is shown, wherein the semiconductor packaging device comprises: a substrate 1 provided with a conductive through hole 6, a bottom chip 4, a top chip 3, a metal heat sink 5 and a metal frame 2, wherein the metal heat sink 5 is exposed on the bottom surface of the semiconductor packaging device, and the metal heat sink 5 is adhesively connected to the bottom chip 4, and the heat dissipation efficiency of the bottom chip 4 is improved based on the metal heat sink 5.

[0036] Furthermore, the metal heat sink 5 is exposed on the bottom surface of the semiconductor packaging device to increase the heat dissipation area of ​​the semiconductor packaging device, and the metal heat sink 5 is directly connected to the bottom chip 4 of the semiconductor packaging device, so that the working heat of the bottom chip 4 can be directly dissipated to the external environment through the metal heat sink 5, thereby improving the heat dissipation efficiency of the semiconductor packaging device.

[0037] The top chip 3 is electrically connected to the pad on the top surface of the substrate 1 based on the metal frame 2. The current carrying capacity of the semiconductor packaging device is improved through the metal frame 2, so that the metal frame 2 of the semiconductor packaging device can meet the large current flow requirements of the top chip 3.

[0038] Furthermore, the semiconductor package device also includes a plurality of electronic components, which are electrically connected to the top chip 3 through bonding wires. The plurality of electronic components include: MOS controlled thyristors, integrated gate commutated thyristors (IGCTs), electron injection enhanced gate transistors (IEGTs), etc. The electrical connection requirements of the plurality of electronic components inside the semiconductor package device are achieved through metal bonding wires.

[0039] Specifically, the top chip 3 and the bottom chip 4 are vertical structures, and the top chip 3 and the bottom chip 4 can be directly die-bonded on the pads of the substrate 1, thereby realizing the electrical connection between the top chip 3 and the circuit of the substrate 1, and realizing the electrical connection between the bottom chip 4 and the circuit of the substrate 1.

[0040] Specifically, the metal frame 2 includes a metal frame body 26, and the metal frame body 26 forms an electrical connection part and a support part based on etching; The electrical connection portion is used to realize electrical connection between the top chip 3 and the top surface pad of the substrate 1 .

[0041] Specifically, the metal frame also includes a first support column 24 and a second support column 25, and the first support column 24 and the second support column 25 are used to support the metal frame body 26. The electrical connection part is electrically connected to the top surface pad of the substrate 1 based on the first support column 24, and the support part is arranged on the top surface of the substrate 1 based on the second support column 25.

[0042] Based on the first support column 24 and the second support column 25, the electrical connection positions of the top solder pad of the substrate 1 and the top surface electrode of the top chip 3 are in the same plane. By mounting the metal frame body 26 on the first support column 24 and the second support column 25, the structural design of the metal frame 2 can be realized.

[0043] Furthermore, the size of the metal frame body 26 is set according to the size of the substrate 1, the area of ​​the metal frame body 26 is S1, the area of ​​the substrate 1 is S2, and the constraint relationship between S1 and S2 is: 0.5S2≤S1≤S2, so that the metal frame body 26 can meet the large current working flow requirements of the top chip 3.

[0044] Furthermore, the metal frame body 26 is prepared based on one-piece molding, and the metal plate is molded into the metal frame body 26 by performing photolithography, etching, degumming and post-processing cleaning on the metal plate.

[0045] The present invention provides a semiconductor packaging device, which improves the heat dissipation efficiency of the semiconductor packaging device by arranging a metal heat sink 5 on a bottom chip 4 of a substrate 1 and exposing the metal heat sink 5 on the bottom surface of the semiconductor packaging device; a metal frame 2 is arranged inside the semiconductor packaging device to reduce the wire connection between the internal chip and the pad of the substrate 1, and the current carrying capacity of the internal electrical connection structure is improved through the structure of the metal frame 2, thereby improving the large current flow capacity of the semiconductor packaging device, thereby improving the working reliability of the semiconductor packaging device.

[0046] Embodiment 4: Figure 7 FIG. 1 shows a flow chart of a method for preparing a semiconductor packaging device in an embodiment of the present invention. Figure 8 A schematic diagram of a preparation process of a semiconductor package device in an embodiment of the present invention is shown, wherein the preparation method of the semiconductor package device is used to prepare the semiconductor package device; The preparation method comprises: S11: mounting the top chip 3 and a plurality of electronic components at positions corresponding to the top pads of the substrate 1, and performing wire bonding operations on the top chip 3 and the plurality of electronic components.

[0047] A circuit layer is prepared on the substrate 1, and a top solder pad is formed on the circuit layer on the top surface of the substrate 1, solder is coated on the corresponding mounting positions of the top chip 3, the bottom chip 4 and several electronic components, and the top chip 3 and several electronic components are mounted on the top surface of the substrate 1 accordingly, and the top chip 3 and several electronic components can be solid-die-bonded on the top circuit layer of the substrate 1 through reflow soldering.

[0048] Furthermore, wire bonding is performed between the several electronic components and the corresponding pads on the top surface of the substrate 1 to achieve electrical connection between the several electronic components, and the several electronic components include other passive chips, to construct a complete semiconductor packaging device structure on the substrate 1.

[0049] Furthermore, the material of the bonding wire may be Au gold, Al aluminum, Cu copper, Ag silver, etc., so that the bonding wire can meet the electrical connection requirements between electronic components.

[0050] S12 : a metal frame 2 is provided between the top surface pad of the substrate 1 and the top surface electrode of the top chip 3 .

[0051] When the metal frame 2 is a copper clip, solder is coated on the top surface pad of the substrate 1 and the top surface electrode of the top chip 3, and the connecting ends of the copper clip are correspondingly mounted on the top surface pad of the substrate 1 and the top surface electrode of the top chip 3, and the copper clip is fixed by welding, so that the top surface pad of the substrate 1 and the top surface electrode of the top chip 3 can be electrically connected based on the copper clip.

[0052] Specifically, when the metal frame 2 is implemented based on the metal connecting plate 23 and the connecting column, the first connecting column 21 is welded and fixed on the top surface electrode of the top chip 3, and the second connecting column 22 is welded and fixed on the top pad position of the substrate 1, so that the top surfaces of the first connecting column 21 and the second connecting column 22 are on the same horizontal plane, and the metal connecting plate 23 is placed on the horizontal plane where the top surfaces of the first connecting column 21 and the second connecting column 22 are located, so that one end of the metal connecting plate 23 is fixed on the first connecting column 21, and the other end of the metal connecting plate 23 is fixed on the second connecting column 22, and the metal frame 2 between the top surface pad of the substrate 1 and the top surface electrode of the top chip 3 is constructed by the metal connecting plate 23 in conjunction with the first connecting column 21 and the second connecting column 22. Based on the electrical connection structure of the metal connecting plate 23, the first connecting column 21 and the second connecting column 22, the current carrying capacity between the top surface pad of the substrate 1 and the top surface electrode of the top chip 3 is improved, so that the metal frame 2 can meet the circulation requirements of the large working current of the top chip 3.

[0053] Specifically, when the metal frame 2 is a half-etched frame structure, the metal frame body 26 is formed by an integrated molding process, which specifically includes: Prepare metal sheets: Select appropriate metal sheets, such as copper metal sheets, etc., and apply a uniform layer of photoresist on the surface of the metal sheet. Photoresist is a light-sensitive chemical material that can undergo chemical reactions under light.

[0054] A photolithography machine is used to project the designed pattern onto a metal plate coated with photoresist. During the exposure process of the photoresist, the chemical properties of the photoresist in the pattern area will change.

[0055] The exposed metal sheet is placed in a developer, and the unexposed photoresist will be dissolved, thereby exposing the surface of the metal sheet.

[0056] The etching process is to remove the metal plate in the pattern area to form the required frame structure. According to the material of the metal plate and the required etching depth, the appropriate etching solution is selected. The etching solution is usually a solution that can chemically react with the metal.

[0057] The developed metal sheet is placed in the etching solution, and the metal in the pattern area reacts with the etching solution and is removed. During the etching process, the concentration, temperature and time of the etching solution need to be controlled to ensure the uniformity and depth of etching.

[0058] According to the type and properties of the photoresist, choose the appropriate degumming solution, put the etched metal sheet into the degumming solution, the photoresist will be dissolved, and the complete frame structure will be exposed. During the degumming process, the concentration, temperature and time of the degumming solution need to be controlled to avoid corrosion or damage to the metal sheet.

[0059] Use cleaning fluid to thoroughly clean the metal sheet to remove the residue on the surface. Spraying, soaking and other methods can be used during the cleaning process to ensure uniformity and thoroughness of the cleaning.

[0060] The cleaned metal sheet is dried to remove the moisture on the surface. During the drying process, care should be taken to avoid deformation or damage to the metal sheet.

[0061] Processing a plurality of support pillars on the top pad of the substrate 1 so that the top surfaces of the plurality of support pillars are on the same horizontal plane as the top surface electrodes of the top chip 3; The metal frame body 26 is correspondingly covered on the top surface electrode of the top chip 3 and a plurality of supporting pillars.

[0062] After the plastic packaging is completed, the metal frame body 26 is cut so that the metal frame body 26 is divided into an electrical connection part and a support part.

[0063] Furthermore, during the preparation process of the metal frame body 26, marking is performed on the metal frame body 26 so that after the semiconductor packaging device is completed by plastic packaging, the metal frame body 26 is cut by laser etching or mechanical cutting equipment, so that the metal frame body 26 is cut at any position between the top chip 3 and the second support column 25, thereby dividing the metal frame body 26 into an electrical connection part and a support part.

[0064] S13 : The bottom chip 4 is mounted on the bottom pad of the substrate 1 .

[0065] Solder is coated on the bottom pad of the substrate 1 , the bottom chip 4 is mounted on the bottom pad of the substrate 1 , and the bottom chip 4 is die-bonded on the bottom pad of the substrate 1 by reflow soldering.

[0066] Furthermore, when the metal frame 2 is a half-etched frame structure, the cooperation between the metal frame body 26 and the support column can ensure the stability of the packaging structure of the substrate 1, thereby improving the installation and die bonding reliability of the bottom chip 4.

[0067] S14: a metal heat sink 5 is arranged on the bottom chip 4, and injection molding is performed to package the chip so that the metal heat sink 5 and the electrode pins are exposed on the bottom surface of the semiconductor package device.

[0068] Specifically, solder is coated on the bottom chip 4, and the metal heat sink 5 is mounted on the electrode of the bottom chip 4, so that the metal heat sink 5 is directly connected to the bottom chip 4. The metal pins are die-bonded on the bottom pads of the substrate 1, and the bottom pads of the substrate 1 form fan-out electrodes to meet the electrical connection requirements of the semiconductor packaging device.

[0069] The substrate 1 is placed in an injection mold, and the integrated structure of the substrate 1 is encapsulated with glue, and the encapsulation structure of the substrate 1 is encapsulated with glue, so that the encapsulation glue can cover the substrate 1 to form a plastic encapsulation layer structure.

[0070] The present invention provides a method for preparing a semiconductor packaging device, wherein a metal heat sink 5 is arranged on a bottom chip 4 of a substrate 1, and the metal heat sink 5 is exposed on the bottom surface of the semiconductor packaging device, thereby improving the heat dissipation efficiency of the semiconductor packaging device; a metal frame 2 is arranged inside the semiconductor packaging device to reduce the wire connection between the internal chip and the pad of the substrate 1, and the current carrying capacity of the internal electrical connection structure is improved through the structure of the metal frame 2, thereby improving the large current flow capacity of the semiconductor packaging device, thereby improving the working reliability of the semiconductor packaging device.

[0071] A person skilled in the art may understand that all or part of the steps in the various methods of the above embodiments may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, and the storage medium may include: a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk, etc.

[0072] In addition, the embodiments of the present invention are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method of the present invention and its core idea. At the same time, for those skilled in the art, according to the idea of ​​the present invention, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present invention.

Claims

1. A semiconductor packaging device, characterized in that: The semiconductor package device comprises: a substrate provided with conductive through holes, an upper package body and a lower package body divided based on the substrate, and a plurality of chips arranged in the upper package body and the lower package body; At least one chip located in the upper package is electrically connected to at least one chip located in the lower package based on the conductive vias; The upper package body is provided with a metal heat sink, the metal heat sink is connected to the chip located on the upper package body, and the top surface of the metal heat sink is exposed on the surface of the upper package body; The lower package body is provided with a metal frame, the metal frame is connected to the chip located in the lower package body, and the bottom surface of the metal frame is exposed on the surface of the lower package body.

2. The semiconductor package device according to claim 1, wherein: The semiconductor package device further includes a plurality of electronic components, wherein the plurality of electronic components are arranged in the upper package body, and / or the plurality of electronic components are arranged in the lower package body.

3. The semiconductor package device according to claim 1, wherein: The metal frame is a copper clip, one end of which is connected to the top surface electrode of the chip, and the other end of which is connected to the pad of the substrate.

4. The semiconductor package device according to claim 1, wherein: The metal frame includes a metal connecting plate, a first connecting column and a second connecting column; The bottom end of the first connecting column is fixed on the top surface electrode of the chip, and the bottom end of the second connecting column is connected to the pad of the substrate; One end of the metal connecting plate is fixed to the top end of the first connecting column, and the other end of the metal connecting plate is fixed to the top end of the second connecting column.

5. The semiconductor package device according to claim 4, characterized in that: The first connection column is connected to the electrode of the chip based on conductive adhesive bonding, or the first connection column is fixed to the electrode of the chip based on welding; The second connecting column is mounted on the pad of the substrate by means of a conductive adhesive, or the second connecting column is fixed on the pad of the substrate by means of welding.

6. The semiconductor package device according to claim 1, wherein: The metal frame comprises a metal frame body, wherein the metal frame body is formed with an electrical connection part and a support part based on etching; The electrical connection portion is used to realize electrical connection between at least one chip and a pad of the substrate.

7. The semiconductor package device according to claim 6, wherein: The metal frame also includes a first support column and a second support column; The electrical connection portion is electrically connected to the top pad of the substrate based on the first support column; The supporting portion is disposed on the top surface of the substrate based on the second supporting pillar.

8. A method for preparing a semiconductor packaging device, characterized in that: The method for preparing the semiconductor package device is used to prepare the semiconductor package device as claimed in any one of claims 1 to 7; The preparation method comprises: Mounting a top chip and several electronic components at positions corresponding to pads on the top surface of the substrate, and performing wire bonding operations on the top chip and the several electronic components; Disposing a metal frame between the top surface pad of the substrate and the top surface electrode of the top chip; The bottom chip is mounted on the pad position where the bottom surface of the substrate is connected to the through hole on the top surface; A metal heat sink and a metal component with a bent structure are mounted on the bottom chip to form pins; The above structure is encapsulated by injection molding, so that the metal heat sink and electrode pins are exposed on the bottom surface of the semiconductor package device.

9. The method for preparing a semiconductor package device according to claim 8, wherein: The preparation method further comprises: When the metal frame is a semi-etched frame structure, the metal frame body is formed by an integrated molding process; Processing a plurality of support pillars on the top surface pad of the substrate so that the top surfaces of the plurality of support pillars are on the same horizontal plane as the top surface electrode of the top chip; The metal frame body is correspondingly covered on the top surface electrode of the top chip and a plurality of supporting pillars.

10. The method for preparing a semiconductor package device according to claim 9, wherein: After the plastic packaging is completed, the top of the metal frame body is cut so that the metal frame body is divided into an electrical connection part and a support part.

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