Power sharing method, power sharing system and multi-port power transmission system

Abstract

The invention provides a power sharing method, a power sharing system and a multi-port power transmission system. Techniques are described for intelligently and adaptively sharing power between charging ports of a multi-port power transfer (PD) system. In some implementations, a method includes monitoring power consumption of at least one device of a plurality of devices. Each device of the plurality of devices is connected to a port of a plurality of ports having allocated system power. Monitoring the power consumption includes obtaining at least one current measurement of an actual current consumption of the at least one device. The method further includes determining whether the at least one current measurement satisfies a threshold condition, and in response to determining that the at least one current measurement satisfies the threshold condition, causing system power to be redistributed between each of the plurality of ports.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of U.S. Provisional Application No. 63 / 536,195, filed on September 1, 2023, entitled “INTELLIGENT AND ADAPTIVE SHARINGOF POWER AMONG USB TYPE-C / PD PORTS,” the entire contents of which are hereby incorporated by reference. Technical Field

[0003] The invention relates to a power sharing method, a power sharing system and a multi-port power transmission system. Background Art

[0004] Various electronic devices (e.g., smart phones, tablets, notebooks, laptops, hubs, chargers, adapters, etc.) are configured to transmit power through a Universal Serial Bus (USB) connector according to the USB power transmission protocol defined in various revisions of the USB Power Transmission (USB-PD) specification. For example, in some applications, an electronic device may be configured as a power consumer to receive power (e.g., for battery charging) through a USB connector, while in other applications, an electronic device may be configured as a power provider to provide power to another device connected thereto through a USB connector. However, the USB-PD specification allows a power provider and a power consumer to dynamically negotiate the levels of the voltage (V) and current provided. Summary of the invention

[0005] The present invention provides a power sharing method, comprising: monitoring power consumption of at least one device among a plurality of devices by at least one processing device, wherein each device of the plurality of devices is connected to a port among a plurality of ports having allocated system power, and wherein monitoring power consumption comprises obtaining at least one current measurement result of actual current consumption of the at least one device; determining by the at least one processing device whether the at least one current measurement result satisfies a threshold condition; and in response to determining that the at least one current measurement result satisfies the threshold condition, causing the system power to be redistributed between each of the plurality of ports by the at least one processing device.

[0006] The present invention also provides a power sharing system, comprising: a memory; and at least one processing device, which is operably coupled to the memory to: monitor the power consumption of at least one device by obtaining at least one current measurement result of the actual current consumption of at least one device among a plurality of devices, wherein each of the plurality of devices is connected to a port among a plurality of ports having allocated system power; determine whether the at least one current measurement result satisfies a threshold condition; and in response to determining that the at least one current measurement result satisfies the threshold condition, reallocate the system power among each of the plurality of ports.

[0007] The present invention also provides a multi-port power transmission system, comprising: a plurality of Universal Serial Bus Type-C USB-C ports with system power distribution; a plurality of devices, wherein each of the plurality of devices is connected to a corresponding USB-C port of the plurality of USB-C ports; and at least one processing device, which is operably coupled to a memory to perform the following processing: monitoring the power consumption of at least one device by obtaining at least one current measurement result of the actual current consumption of at least one device of the plurality of devices; determining whether the at least one current measurement result meets a threshold condition; and in response to determining that the at least one current measurement result meets the threshold condition, causing the system power to be redistributed between each USB-C port of the plurality of USB-C ports. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The present disclosure is illustrated by way of example and not limitation in the figures of the accompanying drawings.

[0009] Figure 1 A block diagram of a multi-port power delivery (PD) system having master and slave device ports is shown in accordance with some embodiments.

[0010] FIG. 2A to FIG. 2B Together, a flow chart of a method for implementing intelligent power sharing between ports in a multi-port PD system according to some embodiments is shown.

[0011] Figure 3 A flow chart of a method of determining power charging characteristics for adaptive power sharing according to some embodiments is shown.

[0012] Figure 4 A schematic diagram is shown of an example finite state machine (FSM) for a slave device controller of a multi-port PD system in accordance with some embodiments.

[0013] Figure 5 A schematic diagram is shown of an example finite state machine (FSM) of a master device controller of a multi-port PD system in accordance with some embodiments.

[0014] Figure 6A schematic diagram illustrating an example finite state machine (FSM) for master and slave controller communication fault handling according to some embodiments.

[0015] 7A to 7C is a flow chart of an example method for implementing intelligent power sharing between ports in a multi-port PD system according to some implementations.

[0016] Fig. 8A is a block diagram of various multi-port power adapters configured to intelligently allocate power among ports using a firmware-based approach in accordance with some implementations.

[0017] Figure 8B is an illustration of a multi-port alternating current (AC) power adapter configured to intelligently distribute power using a firmware-based approach, according to some implementations.

[0018] Fig. 9 is a block diagram illustrating a system for USB enabled devices according to some implementations. DETAILED DESCRIPTION

[0019] The following description sets forth many specific details, such as examples of specific systems, components, methods, etc., to provide a good understanding of various embodiments of the technology described herein, which is used for intelligent and adaptive power sharing between multiple power transmission ports. However, it will be apparent to those skilled in the art that at least some embodiments can be practiced without these specific details. In other cases, well-known components, elements, or methods are not described in detail or presented in simple block diagram form to avoid unnecessarily obscuring the technology described herein. Therefore, the specific details set forth below are merely exemplary. Specific implementations may differ from these exemplary details and may still be considered to be within the spirit and scope of embodiments of the present invention.

[0020] References in the specification to "an embodiment", "one embodiment", "example embodiment", "some embodiments", and "various embodiments" mean that a particular feature, structure, step, operation, or characteristic described in conjunction with the embodiment is included in some embodiments of the present invention. In addition, the phrases "an embodiment", "one embodiment", "example embodiment", "some embodiments", and "various embodiments" appearing in different places in the specification do not necessarily refer to the same embodiment.

[0021] The specification includes references to the accompanying drawings, which form a part of the detailed description. The accompanying drawings illustrate illustrations according to exemplary embodiments. These embodiments, which may also be referred to herein as "examples," are described in sufficient detail to enable those skilled in the art to practice the embodiments of the claimed subject matter described herein. The embodiments may be combined, other embodiments may be utilized, or structural, logical, and electrical changes may be made without departing from the scope and spirit of the claimed subject matter. It should be understood that the embodiments described herein are not intended to limit the scope of the subject matter, but rather to enable those skilled in the art to practice, manufacture, and / or use the subject matter.

[0022] Various embodiments of the technology for realizing intelligent and adaptive system power sharing between multiple power transmission (PD) ports or multi-port controllers connected to electronic devices are described herein. In some embodiments, the electronic device is an electronic device supporting a universal serial bus (USB) that uses a universal serial bus (USB) connector (interface) for communication, battery charging and / or PD. Examples of such electronic devices include, but are not limited to: personal computers (e.g., laptop computers, notebook computers, etc.), mobile computing devices (e.g., tablet computers, tablet computers, e-reader devices, etc.), mobile communication devices (e.g., smart phones, mobile phones, personal digital assistants, messaging devices, handheld computers, etc.), connection devices (e.g., hubs, docking stations, etc.), audio / video / data recording and / or playback devices (e.g., cameras, recorders, handheld scanners, monitors, etc.) and other similar electronic devices. The embodiments described herein can be used in power adapter solutions together with USB PD functions. Aspects of the present disclosure can enable a power supply to have a much lower capacity, thereby reducing cost and complexity, while continuing to effectively utilize the maximum charging potential of its multiple ports.

[0023] The electronic device or system supporting USB can follow at least one version of the USB specification. Examples of such USB specifications include, but are not limited to, USB specification revision 2.0, USB 3.0 specifications, USB 3.1 specifications and / or various supplements (e.g., On-The-Go or OTG), versions and errata thereof. The USB specification generally defines the characteristics (e.g., attributes, protocol definitions, service types, bus management, programming interfaces, etc.) of the differential serial bus required for designing and building standard communication systems and peripheral devices. For example, a peripheral device supporting USB is attached to a host device supporting USB through a USB port of a host device to form a system supporting USB. A USB 2.0 port includes a 5V power supply voltage line (expressed as VBUS), a data line differential pair (expressed as D+ or DP, and D- or DN) and a ground line (expressed as GND) for power return. A USB 3.0 port also provides VBUS, D+, D- and GND lines for backward compatibility with USB2.0. In addition, to support a faster differential bus (USB SuperSpeed ​​bus), USB 3.0 ports also provide a differential pair of transmitter data lines (denoted as SSTX+ and SSTX-), a differential pair of receiver data lines (denoted as SSRX+ and SSRX-), a power line for power delivery (denoted as DPWR), and a ground line for power return (denoted as DGND). USB 3.1 ports provide the same lines as USB 3.0 ports for backward compatibility with USB 2.0 and USB 3.0 communications, but extend the performance of the SuperSpeed ​​bus through a series of features called Enhanced SuperSpeed.

[0024] A more recent technology for USB connectors, known as USB Type-C (USB-C), is defined in various releases and / or versions of the USB Type-C specification. The USB-C specification defines a Type-C receptacle, a Type-C plug, and a Type-C cable that can support USB communications and power delivery via the newer USB power delivery protocol defined in various revisions / versions of the USB-PD specification. Examples of USB-C features and requirements may include, but are not limited to: data and other communications according to USB 2.0 and USB 3.0 / 3.1, electromechanical definitions and performance requirements for Type-C cables, electromechanical definitions and performance requirements for Type-C receptacles, electromechanical definitions and performance requirements for Type-C plugs, requirements for Type-C to legacy cable assemblies and adapters, requirements for Type-C-based device detection and interface configuration, requirements for optimized power delivery for Type-C connectors, and the like. According to the USB-C specification, a Type-C port provides VBUS, D+, D-, GND, SSTX+, SSTX-, SSRX+, and SSRX- lines, and the like. In addition, the Type-C port also provides a sideband use (denoted as SBU) line for signal transmission of sideband functions, and a configuration channel (denoted as CC) line for discovery, configuration, and management of connections across Type-C cables. The Type-C port can be associated with a Type-C plug and / or a Type-C receptacle. For ease of use, the Type-C plug and Type-C receptacle are designed as a reversible pair that operates regardless of the direction of the plug to the receptacle. Thus, a standard USB-C connector arranged as a standard Type-C plug or receptacle provides terminals for four VBUS lines, four ground return (GND) lines, two D+ lines (DP1 and DP2), two D- lines (DN1 and DN2), two SSTX+ lines (SSTXP1 and SSTXP2), two SSTX- lines (SSTXN1 and SSTXN2), two SSRX+ lines (SSRXP1 and SSRXP2), two SSRX- lines (SSRXN1 and SSRXN2), two CC lines (CC1 and CC2), and two SBU lines (SBU1 and SBU2), among others.

[0025] Some USB-enabled electronic devices may follow specific revisions and / or versions of the USB-PD specification. The USB-PD specification defines the following standard protocol designed to provide more flexible power delivery along with data communication over a single USB Type-C cable through a USB Type-C port to achieve maximum functionality of USB-enabled devices. The USB-PD specification also describes the architecture, protocols, power delivery behaviors, parameters, and wiring necessary to manage power delivery over a USB Type-C cable at up to 100W (or up to 240W in the case of an extended power range or EPR). According to the USB-PD specification, a device with a USB Type-C port (e.g., a USB-enabled device) can negotiate a larger current and / or a higher or lower voltage over a USB Type-C cable than allowed by older USB specifications (e.g., the USB 2.0 specification, the USB Battery Charging Specification Version 1.1 / 1.2, etc.). For example, the USB-PD specification defines requirements for a power delivery protocol (PD protocol) that can be negotiated between pairs of USB-enabled devices. The PD protocol can specify power levels and directions of power transfer that both devices can adapt to, and can be dynamically renegotiated (e.g., without unplugging the devices) upon request of either device and / or in response to various events and conditions, such as power role swaps, data role swaps, hard resets, power failures, etc.

[0026] According to the USB-PD specification, an electronic device is typically configured to transfer power to another device through a power path configured on a USB VBUS line. A device that provides power is typically referred to as (or includes) a "provider" (or power supply), and a device that consumes power is typically referred to as (or includes) a "consumer" (or power consumer). The power path typically includes a power switch coupled in series to the VBUS line and configured to turn on and off power transmission. In some embodiments, a USB-PD power supply may be configured to draw power from a direct current (DC) power supply and may include a direct current to direct current (DC-DC) converter. In other embodiments, a USB-PD power supply may be configured to draw power from an alternating current (AC) power adapter or from another AC source.

[0027] In some implementations of USB chargers with multiple USB ports (e.g., USB-C / PD chargers with multiple USB-C ports), a power sharing solution may be required to match the port budget (PB) of the power allocated to the USB port ("port"). Using a lower capacity power supply that provides lower system power may cause failures when each port utilizes its full power capacity at the same time. In addition, for a given power supply, it is impossible to increase the capacity of each port without increasing the system power or fuse rating. Some power sharing technologies are implemented with little or no adaptability and use technologies such as fair sharing, first come first serve, and / or limit the available power of each port. In fair sharing, each port is allocated the same amount of power regardless of how many devices are connected or how the power requirements of the connected devices are. In first come first serve, the first consumer device to be connected will be allocated power based on its power requirements, but any subsequently connected consumer devices may not be able to meet their power requirements. By limiting the available power of each port (e.g., limited to 15W), power cannot be redistributed between other ports. In each of these technologies, fault detection between ports cannot be transmitted. In another power sharing technique, an external controller separate from the USB-C / PD controller coupled to each port may be implemented to allocate PB. However, this technique may lack fair sharing implementation, may not be able to reallocate unused power, and may be limited to sharing power between two ports. Other communication failures between the external controller and the port may not be detected.

[0028] Some power sharing implementations use a load sharing algorithm to distribute power among multiple ports based on a request data object (RDO) received from a sink device that specifies the required power of the corresponding device. However, these power sharing implementations do not take into account the actual power consumed by each device; instead, the power share is calculated based on the initial RDO rather than the actual power consumed. Therefore, multiple consumer devices charged at different rates can constantly change the power they consume without changing the initial requested RDO. For example, once the consumer device is charged, it will continue to provide power based on the initial requested RDO and will not effectively redistribute power in the system, which does not allow the consumer device connected to another port to receive more power and charge faster. Since the consumer device can charge at different rates and constantly change the power consumed without changing the RDO, a mechanism is needed to redistribute power for effectively distributing power in a multi-port system.

[0029] Various embodiments of technologies for implementing intelligent and adaptive power sharing between connected charging ports are described herein. In some embodiments, the port is a USB port (e.g., a USB-C port). The embodiments described herein can solve the above-mentioned challenges and other challenges by providing a technology to sense the actual power consumed by the connected consumer device (if any) and intelligently allocate the available system power between multiple ports independently of the connection order. By defining a power sharing master device ("master device") as the only power transmission decision maker and defining one or more power sharing slave devices ("slave devices") that respond to the power sharing master device, the embodiments described herein can be used to reduce the form factor and can be seamlessly integrated into existing designs. The embodiments described herein can also facilitate runtime configuration of the master device role and the slave device role based on system requirements, which can implement a symmetric firmware-based approach with little impact on data transmission or user experience. The power sharing ports are independent, so they can continue to work in the event of a communication interruption between the ports. The embodiments described herein can also achieve fair and intelligent redistribution of available system power, can be resilient to communication failures, can be extended to systems with more than two ports, and can be compatible with dynamic power throttling algorithms.

[0030] In some embodiments, at least one processing device senses the power demand of at least one connected consumer (if any) and intelligently allocates or distributes power between ports connected to the at least one connected consumer. Once the system power is allocated, the at least one processing device can monitor the power consumption by the at least one connected consumer and determine whether to reallocate (e.g., increase and / or decrease) the system power to any and / or all of the at least one connected consumer. In some embodiments, the at least one processing device is configured to detect and store the charging characteristics of the connected consumer and use the stored data from the next time to provide a better charging experience to the particular consumer and also perform efficient and stable power sharing. This adaptive power allocation mechanism is particularly useful for end users who repeatedly use the same system settings to charge the same device, such as the same laptop, mobile phone, etc.

[0031] Figure 11 is a block diagram of a multi-port power delivery system 100 having a master device port 102 and a slave device port 104 according to one embodiment. The multi-port PD system 100 may be a USB-C / PD system. A firmware-based approach may be implemented to share system power between ports of the multi-port PD system 100, such as a master device port 102 and a slave device port 104. The master device port 102 is controlled by a master device controller 112, which is the only PD decision maker, and the slave device port 104 is controlled by a slave device controller 114, which is a PD responder that can respond to commands initiated by the master device controller 112. The master device controller 112 is also referred to as a load sharing (LS) master device controller 112, and the slave device controller 114 is also referred to as an LS slave device controller 114 herein. The master device controller 112 is configured to obtain a port connection status of the slave device port 104 from the slave device controller 114. The master device controller 112 is also configured to allocate fair share power to all ports. The master device controller 112 and the slave device controller 114 can then perform power redistribution based on the connected ports. In some embodiments, the master device port 102 and the slave device port 104 are identical. In some embodiments, the master device controller 112 and the slave device controller 114 are identical, except that the master device controller 112 is designated (or otherwise programmed) by a firmware-based approach to operate as a master device to control the slave device controller 114, and the slave device controller 114 is designated (or otherwise programmed) by a firmware-based approach to operate as a slave device and respond to the master device controller 112.

[0032] The multi-port PD system 100 has an input voltage V at the input line 106 from a power source. IN The power supply provides system power (or total system power) to the multi-port PD system 100. The power converter 108 converts the input voltage to a different voltage to provide to the master device port 102. The power converter 109 converts the input voltage to a different voltage to provide to the slave device port 104. In some embodiments, the power converters 108 and 109 can convert the input voltage V IN104. The serial bus 110 couples the power converter 108 to the LS master controller 112. The serial bus 111 couples the power converter 109 to the LS slave controller 114. In the described embodiment, the power supplies coupled to the power converters 108 and 109 provide system power to be distributed between the master port 102 and the slave port 104. The field effect transistor (FET) 122 can be turned on or off to provide power to the master port 102. The LS master controller 112 provides a signal to turn the FET 122 on or off. The FET 124 can be turned on or off to provide power to the slave port 104. The LS slave controller 114 provides a signal to turn the FET 124 on or off. The FET 122 and the FET 124 are respectively connected through V BUS Lines 116 and 132 are coupled to the master port 102 and the slave port 104 .

[0033] In some embodiments, the power converter 108 may be a linear DC-DC converter, a switching DC-DC converter, an AC-DC converter, etc. Figure 1 108 is shown as a DC-DC converter, but the power converter 108 can be implemented as an AC-DC converter or other power converter. FET 122 and FET 124 can be N-channel FETs, P-channel FETs, etc. The master device port 102 and the slave device port 104 can be USB Type-C ports or other ports that provide power or receive power, etc.

[0034] The LS master controller 112 and the LS slave controller 114 may be configured to communicate for load sharing (or power sharing) via a communication interface 118. The communication interface 118 may be on the following lines: a unidirectional clock (CLK) line, where the LS master controller 112 sends a clock signal to the LS slave controller 114; a unidirectional interrupt line, where the LS slave controller 114 sends an interrupt signal to the LS master controller 112; and a bidirectional data line, where signals are sent between the LS master controller 112 and the LS slave controller 114. The communication interface 118 may be a serial communication interface such as I2C, Recommended Standard (RS)-232, RS-485, Serial Peripheral Interface (SPI), Local Interconnect Network (LIN), etc. The role of the LS master controller 112 is to keep track of all port connection states, including the port connection state of its own port (master port 102) and the port connection state of the slave port 104. In some embodiments, the LS slave device controller 114 notifies the LS master device controller 112 about the port connection status of the slave device port 104. In another embodiment, the LS master device controller 112 may query the LS slave device controller 114 about the port connection status of the slave device port 104. The port connection status may indicate whether a consumer device is attached or connected to a port. If a consumer device is connected to a port, the port is referred to as attached. If no consumer device is connected to a port, the port is referred to as detached. The LS master device controller 112 may send a command to the LS slave device controller 114 to update the PD of the slave device port 104. In response to receiving a command from the LS master device controller 112, the LS slave device controller 114 triggers a PD change based on the received command. The consumer device may be any device that is attached or connected to a port and consumes power from the port, such as a mobile phone, a tablet computer, a laptop computer, etc.

[0035] In some embodiments, the LS master controller 112 includes a first terminal 134 coupled to the master port 102 and a first set of terminals 136 coupled to the communication interface 118. The LS slave controller 114 includes a second terminal 138 coupled to the slave port 104 and a second set of terminals 140 coupled to the communication interface 118. The LS master controller 112 and the LS slave controller 114 are coupled and communicate via the communication interface 118.

[0036] The commands sent by the LS master controller 112 depend on the connection status of all ports of the multi-port PD system 100. The LS master controller 112 may send a first type of command when all ports of the multi-port PD system 100 are disconnected, a second type of command when one port of the multi-port PD system 100 is connected, and a third type of command when more than one port of the multi-port PD system 100 is connected.

[0037] Some embodiments that can be implemented on the multi-port PD system 100 can use symmetric firmware (FW) that can dynamically detect the LS master device controller 112 and the LS slave device controller 114. In these embodiments, the LS master device controller 112 can be dynamically configured as the only PD power sharing decision maker, and the LS slave device controller 114 can be dynamically configured as a responder. The LS master device controller 112 is configured to detect or otherwise determine the total / total port power and reallocate the available / total system power based on the actual / real-time power consumption of the consumer devices connected to port 102 and port 104. The power sharing configuration of the LS master device controller 112 and the LS slave device controller 114 ensures that it will not adversely affect any USB data communication and will not otherwise reduce the end-user experience during operation. In addition, the power sharing configuration provides support for any combination of PD ports and pure Type-C device operations.

[0038] In some embodiments, a firmware-based method is implemented to allocate the total system power (SP) among the N ports independently of the order in which the consumers are attached to the ports. The total system power can be allocated without leaving any of the total system power unallocated. It is worth noting that although Figure 1Two ports are shown, but a multi-port PD system can have some positive integer (N) number of ports, such as three, four, five, or more ports. Each port is capable of providing a separate port budget (PB) (also referred to herein as port power). The PB can be less than the total system power (SP), e.g., PB < SP. However, the total port power of all ports (N*PB) can be greater than the total system power, e.g., N*PB > SP, although the algorithms described herein for adaptive and intelligent power sharing prevent the multi-port PD system from outputting power greater than SP. In the case where all N ports are detached from consuming devices, each of the N ports can be allocated an amount of power for fair sharing, e.g., SP / N. In the case where a consuming device is attached to one port, the attached port can be allocated PB. The remaining power or unused power of the system is the difference between the system power and the PB of the connected port (e.g., SP - PB). The remaining detached ports (where there are N - 1 of them) can be allocated an amount of the remaining power for fair sharing, e.g., (SP - PB) / (N - 1), where N - 1 represents the number of remaining detached ports. According to the techniques described herein, in the case where more than one port is connected to a corresponding consuming device, an initial allocation of SP / N can be made to each port, and then the unused power can be reallocated among the attached ports. If a port selects or is allocated an amount of power less than SP / N, then that port can be referred to herein as a DOWN port. If a port selects or is allocated an amount of power equal to SP / N, then that port can be referred to herein as an UP port. A lower PD is reallocated to the DOWN ports, resulting in remaining power to be reallocated among the UP ports. The remaining power is reallocated to the UP ports in a fair sharing model.

[0039] The LS master device controller 112 may send a message to the LS slave device controller 114 to determine whether there is a communication failure between the LS master device controller 112 and the LS slave device controller 114. In some embodiments, the message is a heartbeat message that the LS master device controller 112 sends to the LS slave device controller 114 at regular predetermined intervals. In some embodiments, the regular predetermined interval may be several seconds and may be programmable. In another embodiment, the message is a heartbeat message that the LS master device controller 112 sends to the LS slave device controller 114 at various points in time during the operation of the multi-port PD system 100. In some embodiments, for example, if there is a temporary communication problem between the LS master device controller 112 and the LS slave device controller 114, or if there is a permanent communication failure, the heartbeat message may not be at a regular predefined interval. If the LS slave device controller 114 does not receive a heartbeat message within a first threshold amount of time, it is determined that there is a communication failure between the LS slave device controller 114 and the LS master device controller 112. When the LS slave controller 114 receives the heartbeat message, it sends an acknowledgement or heartbeat acknowledgment to the LS master controller 112. If the LS master controller 112 does not receive the heartbeat acknowledgment within a second threshold amount of time, it is determined that there is a communication failure between the LS master controller 112 and the LS slave controller 114. Once the communication failure is detected, if the PBs previously allocated to the master port 102 and the slave port 104 are greater than the fair share, then the PB of the master port 102 and the PB of the slave port 104 are both reduced to the fair share, e.g., SP / N.

[0040] The LS master controller 112 can determine whether a state change of the master port 102 or the slave port 104 is valid or invalid. In some embodiments, the change of state can be determined to be valid if a user is attaching or detaching a consumer device to or from the multi-port PD system 100, if the consumer device is no longer drawing power, etc. In some embodiments, the change of state can be determined to be invalid if the consumer device has an incorrect connection to the multi-port PD system 100, if the consumer device fails, etc. In some embodiments, when at least one port (master port 102 or slave port 104) has been attached, if any subsequent port state change does not change or stabilize after a threshold duration (referred to herein as tDebounce), it is considered valid. tDebounce is the duration that the port state change should remain consistent when at least one other port is attached to be considered valid. If the port connection state is inconsistent within the threshold duration, the LS master controller 112 ignores the change of the port connection state. In some embodiments, tDebounce can be several milliseconds. Alternatively, tDebounce may be other amounts of time. Any power sharing specific PD updates for the master device port 102 or the slave device port 104 occur only after tDebounce has elapsed. This allows the multi-port PD system 100 to be resilient to bad consumer device connections or disconnections, and prevents unnecessary power reallocation to already connected ports in such scenarios.

[0041] Although the multi-port PD system 100 Figure 1 100 is shown as having one slave device port, but in other embodiments, the multi-port PD system may have a different number of slave device ports, such as two, three, four, or other positive integer N ports. Figure 1 Although shown as a single device in FIG. 1 , the firmware-based approach for intelligent and adaptive power sharing described herein can be implemented among multiple PD devices having a common power source.

[0042] Although the multi-port PD system 100 Figure 1 , the multi-port PD system may have only a master controller that controls all ports in the system. In such an embodiment, to allocate power between the ports, the master controller sends commands directly to each corresponding port, rather than to the slave controllers.

[0043] Figure 2A and Figure 2B 1 and 2, and a flowchart of a method 200 for implementing intelligent power sharing between ports in a multi-port PD system according to some embodiments is shown together. In an example embodiment, the method 200 is performed on an LS master device controller. The method 200 may be performed by processing logic including hardware (e.g., circuits, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 200 may be performed by any of the processing devices described herein. In some embodiments, the method 200 is performed by a master device controller such as Figure 1 The method 200 is performed by processing logic instantiated in the LS master controller 112. In some embodiments, the master controller executes a firmware-based method that performs the method 200. In another embodiment, the master controller has embedded code or logic and is configured to execute instructions to perform the operations shown.

[0044] Method 200 starts at point A202 representing the previous running state. In the previous running state, the master device controller can monitor the change of the port connection state of the port. The port connection state indicates whether the port has a connected consumer. The change of the port connection state indicates that the consumer has been connected or disconnected from the port. After completing the power allocation for the previously determined port connection state change, the master device controller is in the RUNNING state. While monitoring the change, the master device controller can determine whether a communication error or communication failure is detected (frame 204). The master device controller can send a heartbeat message to all slave device controllers at a predetermined regular time interval tHeartBeat. If the slave device controller does not receive a heartbeat message within the duration tCommunicationFailure, it is determined that there is a fault in the communication with the master device controller. In some embodiments, the communication failure is caused by a failure of the serial communication interface between the master device controller and the slave device controller. In another embodiment, the communication failure is caused by a failure of the master device controller or the slave device controller. If the slave device controller receives a heartbeat message within the duration tCommunicationFailure, it will send a heartbeat confirmation to the master device controller. If the master device controller does not receive a heartbeat confirmation from the slave device controller within a time greater than the duration tCommunicationFailure, it determines that there is a communication failure with the slave device controller. In some embodiments, if a communication failure is detected, the master device controller sets the PB of the master device port to a fair share value SP / N equal to the total system power divided by the total number of ports if the PB of the master device port was previously greater than the fair share value, and the slave device controller sets the PB of the slave device port to the fair share value SP / N if the PB of the slave device port was previously greater than the fair share value (box 206). In another embodiment, if a communication failure is detected, the master device controller sets the PB of the master device port to a value less than the fair share value if the PB of the master device port was previously greater than the fair share value, and the slave device controller sets the PB of the slave device port to a value less than the fair share value if the PB of the slave device port was previously greater than the fair share value.

[0045] The master device controller can evaluate the port connection state (frame 208). When the master device controller evaluates the port connection state, the master device controller is in the DETERMINE_PORT_CONNECT_STATUS state. When the master device controller is in the DETERMINE_PORT_CONNECT_STATUS state, the master device controller determines or evaluates the port connection state of all ports, and then determines the power allocation based on the port connection state of all ports. Any change in the port state will trigger the master device controller to change its state to DETERMINE_PORT_CONNECT_STATUS. In some embodiments, when one or more consumer devices are connected to any power sharing port or disconnected from any power sharing port, a change in the port state will be caused, thereby causing the port connection state to be attached or separated respectively. In another embodiment, when one or more consumer devices have an error connection with a port, a change in the port state will be caused, at which time the master device controller performs a debounce method. The master device controller can determine the port connection state as one of three possibilities: all ports are disconnected, one port is attached, or more than one port is attached. Once the master device controller determines the port connection state, the master device controller enters the DISTRIBUTE_LOAD state. The DISTRIBUTE_LOAD state is the first level of power allocation (e.g., port budget (PB) allocation). PB is the amount of power allocated to the port by the master device controller, which corresponds to the maximum amount of power that the port is allowed to provide to the connected consumer. In some cases, the consumer can request a power amount (request power or demand power) lower than the port budget or indicate a higher power demand (e.g., in the case of a capacity mismatch), and the master device controller reconfigures the PB allocated to each port.

[0046] In the first case, the master device controller determines the port connection state in which all ports are disconnected. The master device controller may enter the DISTRIBUTE_LOAD state and assign ALL PORTS to the variable X (box 210). ALL PORTS refers to the total number of ports, so X=N. Then, the master device controller checks whether the state of any port has changed so that the multi-port PD system does not have any attached ports (box 212). If the state of any port has not changed, this may indicate that the multi-port PD system is initialized without an attached port, and the PB of each port is equal to the PB of each other port. The master device controller may allocate power equal to a portion of the total system power to each of the X ports (box 214). The portion is equal to the total system power divided by the number of ports, or SP / N. In other embodiments, the portion may be equal to a portion of the total system power, and each portion may be a different portion of the total system power that, when added together, equals the total system power. In other words, in some cases, the total system power is allocated so that no system power in the total system power is not allocated. In other cases, the total system power is allocated roughly. In order to distribute power to each port, the master device controller can send a signal to the slave device controller corresponding to each port, and this can make the slave device controller update the PB of its corresponding port. The master device controller can also update the PB of its own corresponding port. In order to ensure that the PB of each port has been successfully updated, the master device controller exits the DISTRIBUTE_LOAD state and enters the WAIT_FOR_SLAVE_COMPLETE (waiting for the slave device to complete) state or the WAIT_FOR_MASTER_COMPLETE (waiting for the master device to complete) state. Under the WAIT_FOR_SLAVE_COMPLETE state, the master device controller has triggered the change of the slave device PB, and must wait for the slave device controller to update the PB of its corresponding slave device port. When the operation is completed, the slave device controller can send a notification to the master device controller to notify the master device controller to complete. Under the WAIT_FOR_MASTER_COMPLETE state, the master device controller has triggered the PB change of its own master device port, and must wait for the operation to complete. The master controller performs a power handling completion check to check that the PBs of all ports have been successfully updated (block 216). Once the PBs of all ports have been successfully updated and the master controller has received notification from the slave controller, the master controller exits the WAIT_FOR_SLAVE_COMPLETE state and the WAIT_FOR_MASTER_COMPLETE state and reenters the RUNNING state.The master device controller may monitor the status of all ports to determine if there has been a change (eg, communication failure, port is attached, etc.) (block 218). The master device controller may then repeat the process.

[0047] Returning to block 212, when the master controller is in the DISTRIBUTE_LOAD state, if the master controller alternatively determines that the state of one or more ports has changed, this indicates that there is a consumer attached to one of the ports, and the consumer has been disconnected, so that the multi-port PD system no longer has any attached consumer. As described in further detail below in the second case, when a consumer is attached, the port to which it is attached is allocated an amount of power PB, and the remaining ports are allocated a portion of the total remaining power equal to (SP-PB) / (N-1), where (SP-PB) / (N-1) is less than PB. In other embodiments, the portion may be equal to a portion of the total remaining system power, and each portion may be a different portion of the total remaining system power that, when added together, equals the total remaining system power. The master controller may allocate a first portion of the total system power to each of the one or more ports in descending order of power demand (e.g., from high PB to low PB), the first portion being SP / N (block 220). This is done so that the total power allocated to all ports never exceeds the total system power SP. Then, the master controller exits the DISTRIBUTE_LOAD state, and enters WAIT_FOR_SLAVE_COMPLETE state and WAIT_FOR_MASTER_COMPLETE state. Then, the master controller can perform power processing to complete inspection (power processing similar to frame 216 to complete inspection) (frame 222). Once the master controller determines that power processing is completed, and the PB of one or more ports has been successfully updated, the master controller exits WAIT_FOR_SLAVE_COMPLETE state and WAIT_FOR_MASTER_COMPLETE state, and re-enters the DISTRIBUTE_LOAD state. The master controller will be assigned to variable X (frame 224) corresponding to the REMAINING PORTS (remaining ports) of the port that has not yet updated PB. Then, the master controller performs the steps of frame 214,216 and 218 described above.

[0048] In some embodiments, the master device controller need not allocate the first portion SP / N of the total system power to each of the one or more ports in descending order of power demand. For example, the master device controller may allocate the first portion to each of the one or more ports in a random order, a sequential order, or other order.

[0049] In the second case, where the master controller determines that there is an attached port (after box 208) while the master controller is in the DETERMINE_PORT_CONNECT_STATUS state, the master controller enters the DISTRIBUTE_LOAD state and allocates the second portion of the total system power to each attached port from high PB to low PB (box 226), where the second portion is (SP-PB) / (N-1). The master controller then changes its state to WAIT_FOR_SLAVE_COMPLETE and WAIT_FOR_MASTER_COMPLETE, and a power processing completion check may be performed to ensure that the PB of each unattached port has been successfully updated (box 228). Once the master controller determines that the PB of each unattached port has been successfully updated, the master controller changes its state to DISTRIBUTE_LOAD and allocates the power of the PB to the attached ports, which allows the attached ports to have the maximum power supported by the port (box 230). The master controller may then perform a power handling completion check to ensure that the PB of the attached port has been successfully updated (block 216). Once the master controller has determined that the PB of the attached port has been successfully updated, the master port changes its state to RUNNING and monitors all port states to determine if there has been a change (block 218).

[0050] In the third case, where the master controller determines that there is more than one attached port during the DETERMINE_PORT_CONNECT_STATUS state (after box 208), the master controller enters the DISTRIBUTE_LOAD state. The master controller can then allocate a fair share of power of SP / N to each port in order from high PB to low PB to ensure that the total allocated power never exceeds the total system power SP (box 232). The master controller changes its state to WAIT_FOR_SLAVE_COMPLETE and / or WAIT_FOR_MASTER_COMPLETE, and performs a power processing completion check to ensure that the port's PB has been successfully updated (box 234). The master controller then changes its state to REDISTRIBUTE_UNUSED_LOAD and performs a power redistribution method at point B 236.

[0051] In each of the second and third cases, before the master controller changes its state from DETERMINE_PORT_CONNECT_STATUS (frame 208) to DISTRIBUTE_LOAD (frame 226 and frame 232), the master controller waits for a threshold time tDebounce before starting to redistribute power. tDebounce is a time parameter that defines a duration that a port state change should remain consistent to be considered valid when at least one port is already connected. When at least one port has been attached, if any subsequent port state changes remain consistent within the threshold time tDebounce, the port state change can be considered valid. When the state change is considered valid, power sharing specific PB updates will occur. This allows the system to have recoverability to the poor connection or disconnection of a consumer device and a port, and prevents unnecessary power redistribution of an already connected port in such a scenario. Before performing any power distribution or redistribution, the master controller can apply the threshold time tDebounce to check whether the change of the port state is valid, because the port can be attached or separated at any time during operation.

[0052] The method starting at point B 236 may be implemented when the master device controller determines that there is more than one attachment port and that power should be redistributed between the attachment ports. In executing the method of dynamic and intelligent power sharing, the master device controller enters various operating states.

[0053] At box 238, the master device controller changes its state to REDISTRIBUTE_UNUSED_LOAD. When a consumer is connected or attached to a port, the port connection state of the port is attached, and the consumer requests a power amount RP from the port. The requested power amount or the requested power can be configured as a selected power data object (PDO) voltage multiplied by a PDO current, or a selected PDO voltage multiplied by a requested data object (RDO) current. If there is no consumer connected to the port (for example, if the port is separated), the requested power of the corresponding port is zero. The master device controller can define the initial number of DOWN devices as zero, and define the initial number of UP devices as zero (box 238). An UP port refers to a port whose requested power is greater than or equal to a threshold. In some embodiments, the threshold is SP / N. In another embodiment, the threshold can be selected as (SP / N)-1 to avoid any decimal conversion problems. The master device controller compares the RP of each port with the threshold value (box 240), and counts the number of UP ports and the number of DOWN ports (boxes 242 to 246). In the REDISTRIBUTE_UNUSED_LOAD state, the master device controller attempts to redistribute the remaining or unused power load of the DOWN port to the UP port (if any). After the master device controller counts the number of UP ports and the number of DOWN ports, the master device controller can check whether the number of UP ports is zero or the total number of ports N (box 248). If there is no port that is requested to transmit a power greater than or equal to the threshold, the master device controller does not need to redistribute power between ports, and each port maintains a fair share of power of SP / N. If all ports are requested to transmit a power greater than or equal to the threshold, there will be no unused power load to be redistributed by the master device controller. If the number of UP ports is equal to zero or N, the master device controller does not need or cannot redistribute power, and changes its state to RUNNING, and continues to monitor port state changes (box 250).

[0054] If the number of UP ports is not equal to 0 or N, the master device controller remains in the REDISTRIBUTE_UNUSED_LOAD state and continues to reduce the power allocated to the DOWN ports and then increases the power allocated to the UP ports. The master device controller calculates a first value SP / N-DOWN(RP) for each DOWN port and adds each first value to obtain PDOWN(TOTAL) (box 252). The master device controller calculates a second value PUP(TOTAL)=(PB-SP / N)*UP(COUNT) for all UP ports (box 254). The master device controller calculates a third value as the minimum of the first value and the second value: REDISTRIBUTE_POWER=MIN(PDOWN(TOTAL), PUP(TOTAL)) (box 256). The master device controller then reduces each DOWN port PB by allocating MAX((SP-REDISTRIBUTE_POWER) / N, RP) power to each DOWN port (box 258), where RP is the requested power of the corresponding DOWN port. The master controller then enters the WAIT_FOR_SLAVE_COMPLETE or WAIT_FOR_MASTER_COMPLETE state to ensure that the PB values ​​for all DOWN ports have been successfully updated (block 260).

[0055] Once the PB values ​​for all DOWN ports have been successfully updated, the master controller returns to the REDISTRIBUTE_UNUSED_LOAD state. The master controller increases each UP port PB by allocating (SP+REDISTRIBUTE_POWER) / N power to each UP port (box 262). The master controller then enters the WAIT_FOR_SLAVE_COMPLETE or WAIT_FOR_MASTER_COMPLETE state to ensure that the PB values ​​for all UP ports have been successfully updated (box 264). The master controller then changes its state to RUNNING and monitors port state changes (box 266).

[0056] Figure 3 A flow chart of a method 300 for determining charging characteristics for adaptive power sharing according to some embodiments is shown. In some embodiments, the method 300 is performed on a LS master device controller. The method 300 may be performed by processing logic including hardware (e.g., circuits, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 300 may be performed by any of the processing devices described herein. In some embodiments, the method 300 is performed by a master device controller such as Figure 1The method 300 is performed by processing logic instantiated in the LS master controller 112. In some embodiments, the master controller executes a firmware-based method that performs the method 300. In some embodiments, the master controller has embedded code or logic and is configured to execute instructions to perform the operations shown.

[0057] At operation 310, processing logic determines whether the device is connected. If not, processing returns to operation 310. At operation 320, it is determined that the device is connected, and then processing logic determines whether the device is a known device. A known device refers to a device that has been previously determined to be connected.

[0058] At operation 330, if it is determined that the device is a known device, processing logic retrieves a charging table associated with the device. In some embodiments, retrieving the charging table includes retrieving the charging table from a flash memory corresponding to the device. At operation 340, processing logic obtains a battery charge state from the device. At operation 350, processing logic causes power to be provided to the port based on the battery charge state and the charging table.

[0059] At operation 360, if it is determined that the device is an unknown device (e.g., a device that has not been previously connected is not determined), the processing logic saves the charging mode associated with the device. In some embodiments, the charging mode is saved to a flash memory corresponding to the device. At operation 370, the processing logic causes power to be provided to the port using a load sharing algorithm.

[0060] Figure 4 4 is a schematic diagram of a FSM 400 of a slave device controller of a multi-port PD system according to some embodiments. FSM 400 may correspond to operations performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. FSM 400 may correspond to operations performed by any of the processing devices described herein. In some embodiments, FSM 400 corresponds to operations performed by a slave device controller such as Figure 1 The LS corresponds to the operations performed by the processing logic of the slave device controller 114. In some embodiments, the slave device controller executes a firmware-based method that performs the operations associated with the following states. In another embodiment, the slave device controller has embedded code or logic and is configured to execute instructions to perform the operations associated with the following states.

[0061] The role of the slave device controller is to respond to the master device controller, such as Figure 1The LS master device controller 112 receives a command, triggers the power change (e.g., PB change) of the slave device port associated with the slave device controller, and notifies the slave device port state to the master device controller. The slave device controller notifies the master device controller of the slave device port connection state (e.g., whether the slave device port is attached to the consumer device), and notifies the master device controller when the power change of the slave device port is successfully completed. The slave device controller receives periodic heartbeat messages from the master device controller at predefined regular intervals (tHeartBeat) to check for communication failures. The slave device controller sends a heartbeat confirmation message to the master device controller to confirm that the heartbeat message has been received. If the slave device controller does not receive a heartbeat message within a threshold time amount (tCommunicationFailure), a communication failure may occur. In the case of a failure in the communication with the master device controller, the slave device controller can perform any required PB reduction. In some embodiments, when a communication failure occurs, the PB of the slave device port is greater than the fair share value SP / N, and the slave device controller performs necessary PB reduction by updating the PB of the slave device port to the fair share value. In another embodiment, when communication fails, the PB of the slave port is less than or equal to the fair share value SP / N, and the slave controller performs any required PB reduction by taking no action.

[0062] During the operation of the multi-port PD system, the slave controller operates in various states. First, when the multi-port PD system starts, the slave controller is in the WAIT_FOR_ATTACH (wait for attachment) state (frame 402). As long as the slave port is not attached, the slave controller is in the WAIT_FOR_ATTACH state. In the WAIT_FOR_ATTACH state, the slave controller can receive a command from the master device controller to trigger the power change of the slave port. When the slave controller updates the power of the slave port and the power change is in progress, the slave controller enters the WAIT_FOR_LOAD_CHANGE_COMPLETE (wait for load change to complete) state (frame 404). When the slave controller sends a notification of the completion and success of the power change of the slave port to the master device controller, the slave controller exits the WAIT_FOR_LOAD_CHANGE_COMPLETE state. When the power change is completed, the slave controller returns to the WAIT_FOR_ATTACH state.

[0063] If the consumer is connected to the slave device port, then the slave device port becomes attached, and the slave device controller enters the RUNNING state (frame 406), in which power is provided to the consumer. When attached and no power change is performed, the slave device controller remains in the RUNNING state. When the slave device controller is in the RUNNING state, it can receive a command from the master device controller to trigger the power change of the slave device port when the real-time current or RDO voltage changes. When the slave device controller updates the power of the slave device port and when the power change is in progress, the slave device controller enters the WAIT_FOR_LOAD_CHANGE_COMPLETE state. When the slave device controller sends the power change of the slave device port to the master device controller to complete and successfully notify, the slave device controller exits the WAIT_FOR_LOAD_CHANGE_COMPLETE state. When the power change is completed, the slave device controller returns to the RUNNING state. If the consumer is disconnected from the slave device port, then the slave device port becomes separated, and the slave device controller returns to the WAIT_FOR_ATTACH state.

[0064] Figure 5 5 is a schematic diagram of a FSM 500 of a master device controller of a multi-port PD system according to some embodiments. FSM 500 may correspond to operations performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. FSM 500 may correspond to operations performed by any of the processing devices described herein. In some embodiments, FSM 500 corresponds to operations performed by a master device controller such as Figure 1 The operations performed by the processing logic of the LS master device controller 112 correspond to the operations performed by the processing logic of the LS master device controller 112. In some embodiments, the master device controller executes a firmware-based method that performs the operations associated with the following states. In some embodiments, the master device controller has embedded code or logic and is configured to execute instructions to perform the operations associated with the following states. The master device controller may be Figure 1 LS master device controller 112, and the multi-port PD system can be Figure 1 A multi-port PD system 100 is provided.

[0065] According to the technology described herein, in some embodiments, the role of the master device controller is to continuously track the port connection state of each port (including slave device port and master device port), and distribute system power based on the actual / real-time power consumed by the corresponding consumer device attached to each port. The master device controller corresponds to the master device port, and the master device controller determines the port connection state and the actual power consumption of the master device port. The master device controller can determine the port connection status and the actual power consumption of the slave device port by receiving a notification from the corresponding slave device controller. According to the technology described herein, the master device controller sends a command to the slave device controller to update the PB of the corresponding slave device port. When the corresponding PB has been successfully updated, the master device controller receives a notification or indication from the slave device controller. If necessary, the master device controller can update the PB of the master device port. The master device controller can send a periodic heartbeat message to the slave device controller at a predefined regular interval to monitor communication failures.

[0066] If the master device controller does not receive a heartbeat confirmation from the slave device controller within a threshold amount of time (tCommunicationFailure), a communication failure with the slave device controller may occur. In the event of a communication failure with the slave device controller, the master device controller can perform any required PB reduction. In some embodiments, when the communication failure occurs, the PB of the master device port is greater than the fair share value SP / N, and the master device controller performs a PB reduction by updating the PB of the master device port to the fair share value. The PB budget of the master device port is less than or equal to the fair share value SP / N, and the master device controller performs a PB reduction by taking no action.

[0067] In some embodiments, when a consumer is connected to a port or disconnected from a port, resulting in the port becoming attached or detached, respectively, the master device controller may determine to redistribute power between the ports. In some cases, for example, when a consumer is faulty or intermittently connected to a port, the port connection state may change rapidly. If the port connection state changes within the threshold debounce time tDebounce, the master device controller considers it invalid. The threshold debounce time is a time parameter that the port connection state change should remain consistent to be considered valid when at least another port has been attached.

[0068] During operation of a multi-port PD system, the master controller operates in various states. First, when the multi-port PD system starts up, the master controller is in the DETERMINE_PORT_CONNECT_STATUS state (block 502). Figure 2AAs described in block 208 of FIG. 1 , in the DETERMINE_PORT_CONNECT_STATUS state, the master device controller determines the port connection status of each port including the master device port and the slave device port. FIG. 2A to FIG. 2B As described, the master device controller determines how to allocate power between ports based on the port connection status.

[0069] When the port connection status of each port is known, the master controller enters the DISTRIBUTE_LOAD state (block 504). The DISTRIBUTE_LOAD state is the first level of PB allocation. If there are no attached ports, the master controller allocates a fair share of power of SP / N to each port. If there is an attached port, the master controller allocates a PB of (SP-PB) / (N-1) to each unattached port and allocates the power of the PB to an attached port.

[0070] In the DISTRIBUTE_LOAD state, the master controller may trigger a power change (e.g., a PB change). In some embodiments, the power change is a decrease power event. In some embodiments, the power change is an increase power event. After triggering the power change, the master controller may enter the WAIT_FOR_LOAD_CHANGE_COMPLETE state (block 506). When the power change is complete, the master controller may return to the DISTRIBUTE_LOAD state.

[0071] When power allocation (e.g., load sharing) is completed for the last determined port connection state, the master device controller can enter the RUNNING state (box 508). After completing the power allocation for each port for the last determined port connection state, the master device controller is in the RUNNING state. Any change or change request (e.g., asynchronous change) of the port connection state different from the last determined state can trigger the master device controller to enter the DETERMINE_PORT_CONNECION_STATUS state. In addition, any port debounce failure can trigger the master device controller to enter the DETERMINE_PORT_CONNECTION_STATUS state. In some embodiments, the master device controller spends the most time in the RUNNING state (compared to other states).

[0072] If there are multiple attached ports, the master device controller can increase or decrease the real-time current by a real-time current threshold ("threshold") and enter the REDISTRIBUTE_UNUSED_LOAD state (box 510). In the REDISTRIBUTE_UNUSED_LOAD state, the master device controller attempts to reallocate power from unattached ports or ports with low-power-requesting consumers attached (DOWN ports) to ports with high-power-requesting consumers attached (UP ports). The increase or decrease in real-time current can cause the master device controller to enter the WAIT_FOR_LOAD_CHANGE_COMPLETE state. When the power change for all ports is completed, the master device controller returns to the REDISTRIBUTE_UNUSED_LOAD state. When power redistribution (e.g., load sharing) is completed for the last determined port connection state, the master device controller enters the RUNNING state. The master device controller can enter the RUNNING state after completing the power allocation for each port for the last determined port connection state. The following will refer to Figure 7B Further details regarding the operations described for FSM 400 and FSM 500 are described.

[0073] Figure 6 6 is a schematic diagram of a FSM 600 for handling communication failures between a master device controller and a slave device controller according to some embodiments. The FSM 600 may correspond to operations performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. The FSM 600 may correspond to operations performed by any of the processing devices described herein. In some embodiments, the FSM 600 is performed by a controller such as Figure 1 In some embodiments, the FSM 600 is executed by the processing logic of the LS master controller 112. Figure 1 The LS is executed by the processing logic of the device controller 114. In some embodiments, the controller executes a firmware-based method that performs operations associated with the following states. In another embodiment, the controller has embedded code or logic and is configured to execute instructions to perform operations associated with the following states.

[0074] At any time, and during any state of the master device controller and the slave device controller, a communication failure may occur. The master device controller sends periodic heartbeat messages to the slave device controller at predefined regular intervals (tHeartBeat) to monitor communication failures. The slave device controller receives the heartbeat message and can send a heartbeat confirmation message to the master device controller to confirm receipt of the heartbeat message. If the slave device controller does not receive a heartbeat message from the master device controller within a threshold amount of time (tCommunicationFailure), and the master device controller does not receive a heartbeat confirmation from the slave device controller, a communication failure between the slave device controller and the master device controller may occur. In the event of a communication failure between the master device controller and the slave device controller, both the master device controller and the slave device controller can perform any required PB reduction.

[0075] If the PB of the master port is greater than the fair share value SP / N at the time of the communication failure, the master controller may perform a PB reduction by updating the PB of the master port to the fair share value. If the PB of the master port is less than or equal to the fair share value SP / N at the time of the communication failure, the master controller performs a PB reduction by taking no action. When a PB reduction occurs, the master controller enters the WAIT_FOR_MASTER_COMPLETE state (block 602), and returns to its previous state when the PB reduction is complete.

[0076] If when communication failure, the PB of slave device port is greater than fair share value SP / N, then slave device controller can reduce PB by updating the PB of slave device port to fair share value. If when communication failure, the PB of slave device port is less than or equal to fair share value SP / N, then slave device controller can reduce PB by not taking any action. When PB reduction occurs, slave device controller enters WAIT_FOR_LOAD_CHANGE_COMPLETE state (frame 604), and when PB reduction is complete, returns to its previous state.

[0077] Fig. 7A 700 is a flow chart of a method 700 for implementing intelligent power sharing between ports in a multi-port PD system according to some embodiments. The method 700 may be performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 700 may be performed by any of the processing devices described herein. In some embodiments, the method 700 is performed by a controller such as Figure 1 In some embodiments, the method 700 is performed by the processing logic of the LS master device controller 112. Figure 1The LS of the slave device controller 114 is executed by processing logic. In some embodiments, the controller executes a firmware-based method that performs the following operations. In some embodiments, the controller has embedded code or logic and is configured to execute instructions to perform the following operations. In some embodiments, the operations of method 700 can be distributed between the master device controller and the slave device controller.

[0078] At operation 710, processing logic identifies a system power between each of a plurality of ports in a multi-port PD system. In some embodiments, identifying the system power includes dynamically allocating the system power. Figures 1 to 6 An example implementation of dynamically allocating system power is described and will be referred to below. Figure 7B Describe in more detail.

[0079] At operation 720, processing logic updates the allocation of system power based on the power consumption. Figures 1 to 6 Example implementations for updating system power allocation based on power consumption are described and will be referred to below. Figure 7C Describe in more detail.

[0080] Figure 7B 7 is a flow chart of a method 710 for dynamically allocating system power among each of a plurality of ports in a multi-port PD system according to some embodiments. The method 710 may be performed by processing logic including hardware (e.g., circuitry, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 710 may be performed by any of the processing devices described herein. In some embodiments, the method 710 is performed by a controller such as Figure 1 In some embodiments, method 710 is performed by a controller such as LS master controller 112. Figure 1 LS is executed by the processing logic of the slave device controller 114. In some embodiments, the controller executes a firmware-based method that performs the following operations. In some embodiments, the controller has embedded code or logic and is configured to execute instructions to perform the following operations. In some embodiments, the operations of method 710 can be distributed between the master device controller and the slave device controller.

[0081] At operation 712, processing logic determines a port connection state of each of the plurality of ports, wherein the port connection state indicates the number of devices connected to the plurality of ports. The plurality of ports may be included in a multi-port PD system. In some embodiments, each of the plurality of ports is a USB-C / PD port.

[0082] At operation 714, processing logic determines a power requirement for each device in the plurality of devices.

[0083] At operation 716, processing logic dynamically allocates system power between each of the plurality of ports. System power may be allocated independent of the order in which the plurality of devices are connected.

[0084] In some embodiments, to dynamically allocate system power, processing logic determines an order for the device. Processing logic allocates a portion of the system power to each of the multiple ports in order. The portion is equal to the system power divided by the number of USB-C / PD ports. After allocating the portion to each of the multiple ports, processing logic can determine an unused power amount of the system power. Processing logic can reallocate the unused power amount to at least one of the multiple ports. In some embodiments, processing logic reallocates the unused power amount between each of the multiple ports connected to a corresponding device having a power demand (or requested power or real-time power consumption) greater than the portion.

[0085] In some embodiments, the order is in descending order of power requirements for the devices. In other embodiments, the order may be a random order of the devices, the order in which the devices are connected, or another order.

[0086] In some embodiments, to determine the power requirements of each device, processing logic determines a first power requirement of a first device connected to a first port of the plurality of ports and a second power requirement of a second device connected to a second port of the plurality of ports. In some embodiments, processing logic determines that the second power requirement is less than the first power requirement. Processing logic may allocate half of the system power to the first port and half of the system power to the second port. Processing logic may determine a remaining amount of power as a difference between half of the system power and the second power requirement and allocate the remaining amount of power to the first port in addition to the half of the system power already allocated to the first port. In some embodiments, processing logic allocates a portion of the remaining amount of power to the first port and the second port.

[0087] In some embodiments, processing logic determines a change in a port connection state of one or more of the plurality of ports. In some embodiments, the change in the port connection state indicates that no device is connected to any of the plurality of ports. In some embodiments, processing logic is initialized to no device connected to any of the plurality of ports, and in response to the change in the port connection state, processing logic allocates a portion of system power to each of the plurality of ports. In some embodiments, a portion of system power is equal to the system power divided by the number of ports in the plurality of ports. Alternatively, a portion of system power may be equal to a portion of total system power, and each portion of system power may be a different portion of total system power that, when added together, equals total system power. In some embodiments, the change in the port connection state indicates that a device connected to the port has been disconnected, and no device is connected to any of the plurality of ports. In response to the change in the port connection state, processing logic may allocate a portion of system power to each of the plurality of ports in the order of the port with the highest PB to the port with the lowest PB.

[0088] In some embodiments, the change in the port connection state indicates that only the first device is connected to the first port of the plurality of ports. The processing logic allocates an amount of system power to the first port. In some embodiments, the amount is equal to the first power requirement of the first device. In another embodiment, the amount may be greater than the first power requirement of the first device. In another embodiment, the amount may be less than the first power requirement of the first device but greater than the fair share amount, which is equal to the system power divided by the number of ports in the plurality of ports. The processing logic may determine a residual power equal to the difference between the system power and the amount of power (allocated to the first port). In response to the change in the port connection state, the processing logic may allocate a portion of the residual power to each of the unconnected ports, the portion of the residual power being equal to the residual power divided by the number of unconnected ports. Alternatively, the processing logic may allocate a portion of the residual power. The portion may be equal to a portion of the residual power, and each portion may be a different portion of the residual power that, when added together, is equal to the residual power. In response to the change in the port connection state, the processing logic allocates a portion of the residual power to each of the plurality of ports in the order of the port with the highest PB to the port with the lowest PB.

[0089] In some embodiments, the change in the port connection state indicates that a device subset of multiple devices is connected to a port subset of multiple ports. The device subset may include more than one device. The processing logic may determine an order for the device subset. The processing logic may allocate a portion of the system power equal to the system power divided by the number of ports of the port subset to each port in the port subset in order. Alternatively, the processing logic may allocate a portion of the system power. The portion may be equal to a portion of the system power, and each portion may be a different portion of the system power, which equals the system power when added. After allocating the portion to each port in the port subset, the processing logic determines the amount of unused power of the system power. The processing logic may reallocate the unused power amount to at least one port in the port subset. In some embodiments, the order is a descending order of the power requirements of the device subset. In some embodiments, the order may be a random order of the device subsets, an order in which the device subsets are connected, or another order.

[0090] In some implementations, processing logic determines whether the change in port connection state is valid. Processing logic may determine whether the change in port connection state is consistent for a specified duration. If the change in port connection state is not consistent for a specified duration, processing logic may ignore the change in port connection state. If the port connection state is consistent for a specified duration, processing logic may reallocate system power between each port in the USB-C / PD port.

[0091] In some embodiments, processing logic detects a communication failure between a first controller and a second controller. In some embodiments, the processing logic is the processing logic of the first controller. In some embodiments, the processing logic is the processing logic of the second controller. The processing logic may perform PB reduction in response to detecting the communication failure. The processing logic performs PB reduction by allocating a portion of system power to a subset of ports of a plurality of ports. The portion may be equal to the system power divided by the number of ports in the plurality of ports or the number of ports in the subset of ports. In some embodiments, the processing logic allocates the portion to each of the plurality of ports. In some embodiments, the processing logic allocates the portion to the first controller and the second controller. In some embodiments, if the first controller previously had a power allocation greater than the portion, the processing logic allocates the portion to the first controller, and if the second controller previously had a power allocation greater than the portion, the processing logic allocates the portion to the second controller.

[0092] In some embodiments, processing logic determines a load sharing role of a controller coupled to a first port of a plurality of ports. The load sharing role may be a master device or a slave device. In some embodiments, processing logic determines the load sharing role of the controller as a master device. Processing logic may poll one or more slave devices through a communication interface and start a master device finite state machine. Each of the slave devices may be another controller coupled to a corresponding port of the plurality of ports. In some embodiments, processing logic determines the load sharing role of the controller as a slave device. Processing logic may register the controller with a master device through a communication interface to receive a master device command. The master device may be a second controller coupled to a second port of the plurality of ports.

[0093] In some embodiments, when the load sharing role of the controller is a slave device, the processing logic determines whether a master device command has been received from the master device. The master device command can be at least one of the following: a first command for setting a PB for a first port coupled to the controller, a second command for starting or stopping a heartbeat signal transmission (signaling) between a slave device and a master device through a communication interface, or a third command for providing a port connection state of a first port to the master device. The processing logic can determine whether a communication failure between a master device and a slave device through a communication interface has occurred. If the processing logic determines that a communication failure between a master device and a slave device through a communication interface has occurred, the processing logic can adjust the slave device PB for the first port to a fair share allocation when the slave device PB is greater than the fair share allocation. When the slave device PB is less than the fair share allocation, the processing logic may not adjust the slave device PB. The processing logic can monitor the change of the port connection state of the first port, and if the processing logic detects a change in the port connection state of the first port, the processing logic can report the change to the master device through the communication interface.

[0094] In some embodiments, when the load sharing role of the controller is a master device, the processing logic determines whether a communication failure between the master device and the slave device through the communication interface has occurred. If the processing logic determines that the communication failure has occurred, in the case where the master device PB is greater than the fair share allocation, the processing logic can adjust the master device PB coupled to the first port of the controller to the fair share allocation. In the case where the master device PB is less than the fair share allocation, the processing logic may not adjust the master device PB. In some embodiments, the processing logic determines the port connection state of each port in the plurality of ports as indicating that more than one port in the plurality of ports is connected to a plurality of devices. The processing logic can determine the order of the power requirements of the plurality of devices, and can sequentially allocate a first portion (or a first share) of the system power to each port in the plurality of ports. The first portion can be equal to the system power divided by the number of ports in the plurality of ports. After the first portion is allocated to each port in the plurality of ports, the processing logic can reallocate the unused power amount of the system power to one or more ports in the plurality of ports, wherein one or more ports in the plurality of ports are correspondingly coupled to one or more devices having a power requirement greater than the first portion. The order can be in descending order for the power requirements of the devices. Alternatively, the order may be a random order of the devices, the order in which the devices were connected, or another order.

[0095] In some embodiments, the processing logic determines the port connection state of each of the plurality of ports to indicate that only the first port of the plurality of ports is connected to the first device. The processing logic may allocate a certain amount of system power to the first port. In some embodiments, the certain amount is equal to the first power requirement of the first device. In some embodiments, the certain amount is greater than the first power requirement of the first device. In some embodiments, the certain amount is less than the first power requirement of the first device but greater than the fair share amount, which is equal to the system power divided by the number of ports in the plurality of ports. The processing logic may determine the order of the PBs for the plurality of ports, and may allocate the second portion (or second share) of the remaining power to the remaining number of ports in the plurality of ports in order. The remaining power may be determined as the difference between the system power and the first power requirement. The second portion may be equal to the remaining power divided by the remaining number of ports. The order may be in descending order of the power requirements for the devices. Alternatively, the order may be a random order of the devices, an order in which the devices are connected, or another order.

[0096] In some embodiments, the processing logic may determine the port connection state of each of the plurality of ports to indicate that no device is connected to any of the plurality of ports. The processing logic may determine an order of PBs for the plurality of ports and allocate a first portion of the system power to each of the plurality of ports in order. The first portion is equal to the system power divided by the number of ports in the plurality of ports. The order may be in descending order of power requirements for the devices. Alternatively, the order may be a random order of the devices, an order in which the devices are connected, or another order.

[0097] Figure 7C 7 is a flow chart of a method 720 for updating the allocation of system power based on power consumption according to some embodiments. The method 720 can be performed by processing logic including hardware (e.g., circuits, dedicated logic, programmable logic, microcode, etc.), software, firmware, or a combination thereof. In some embodiments, the method 720 can be performed by any of the processing devices described herein. In some embodiments, the method 720 is performed by a controller such as Figure 1 In some embodiments, method 720 is performed by the processing logic of the LS master device controller 112. Figure 1 LS is executed by the processing logic of the slave device controller 114. In some embodiments, the controller executes a firmware-based method that performs the following operations. In some embodiments, the controller has embedded code or logic and is configured to execute instructions to perform the following operations. In some embodiments, the operations of method 720 can be distributed between the master device controller and the slave device controller.

[0098] At operation 722, processing logic monitors power consumption of at least one device in the plurality of devices. Each device in the plurality of devices may be connected to a port in the plurality of ports of the multi-port PD system. In some embodiments, the port is a USB port. For example, the port may be a USB-C / PD port. System power is distributed between each of the plurality of ports.

[0099] At operation 724, processing logic determines whether to reallocate system power between each of the plurality of ports based on the power consumption of the at least one device. If processing logic determines not to reallocate system power between each of the plurality of ports, processing logic may return to operation 722 to continue monitoring power consumption of the at least one device.

[0100] At operation 726, if processing logic determines to reallocate system power between each of the plurality of ports, processing logic may cause system power to be reallocated between each of the plurality of ports.Reallocating system power may include reallocating system power.

[0101] In some embodiments, monitoring power consumption at operation 722 includes causing data indicating real-time current consumption to be obtained. More specifically, the data may include at least one current measurement of actual current consumption of at least one device. Current Measurement (I meas ) can reflect the amount of current (e.g., power) consumed by a device connected to a port of the multi-port PD system. For example, the current measurement result can correspond to the amount of current or power consumed by a device connected to a port of the multi-port PD system that is less than or equal to the PB allocated to the port.

[0102] In some embodiments, at least one current measurement is periodically polled at a real-time current polling time interval. The real-time current polling time interval can be configured according to system requirements. In some embodiments, the real-time current polling time interval ranges from about 50 milliseconds (ms) to about 200 ms. In some embodiments, at least one current measurement is obtained using an interrupt-based method.

[0103] In some embodiments, determining whether to reallocate system power at operation 724 includes determining whether at least one current measurement satisfies a threshold condition. The threshold condition indicates that meas Whether the real-time current measurement threshold (I T In some embodiments, determining whether at least one current measurement satisfies a threshold condition includes determining whether the at least one current measurement is greater than a previously stored real-time current measurement (I stored ) plus the real-time current measurement threshold (I meas >I stored +I T ), or determining whether the at least one current measurement result is less than the stored real-time current measurement result minus the real-time current measurement threshold (I meas stored -I T ). In some embodiments, I T is based on the power threshold (P T ) and RDO voltage (V RDO ) is determined by T can be determined as P T / V RDO In some embodiments, based on the power offset (P offset ) to determine the power threshold. Power offset refers to the additional power that can be provided to a port above its actual power consumption. For example, P T =P offset -P OR , where P OR ​The real-time current measurement threshold, power threshold, power offset and / or power offset reduction may be determined based on system requirements (eg, how much power is needed to trigger power reallocation).

[0104] As an illustration, assume that the RDO voltage is 20V, the real-time current measurement (e.g., actual current consumption) is 3 amps (A), the power threshold is set to 3W, and the power offset is set to 5W. The actual power consumption, which is equal to the product of the RDO voltage and the actual current consumption, is 60W. The power allocation, which is equal to the sum of the actual power consumption and the power offset, is therefore 65W. The current offset, which is defined as the power threshold divided by the RDO voltage, is 0.15A = 150 milliamps (mA). Therefore, in this illustrative example, if the real-time current measurement increases or decreases by 150mA, the system power can be reallocated.

[0105] In some embodiments, a debounce count is used to improve efficiency to reduce or eliminate false triggers. For example, the debounce count may be equal to 3. However, any suitable debounce count may be used in accordance with the embodiments described herein.

[0106] If the at least one current measurement does not satisfy the threshold condition, the processing logic may continue to monitor power consumption. If the at least one current measurement satisfies the threshold condition, causing the system power to be reallocated at operation 726 may include causing the processing logic to cause the system power to be reallocated based on the at least one current measurement. Cause the system power to be reallocated may include determining the amount of power consumed by the at least one device (P consumed ). In some embodiments, based on V RDO with I live The product of the P consumed For example, the device's P consumed can be determined as P consumed =V RDO ×I live +P offset The processing logic can be further utilized live Update I stored .

[0107] Fig. 8A is a block diagram of various multi-port power adapters 800A configured to dynamically and intelligently allocate power between ports using a firmware-based approach according to one embodiment. As indicated by similar reference numerals, the multi-port power adapter 800A may be similar to Figure 1The multi-port PD system 100 of the present invention. The multi-port power adapter 800A includes a master device port 102 and one or more slave device ports 104. The master device port 102 can be controlled by a master device controller 112. The slave device port 104 can be controlled by a corresponding slave device controller 114. The power converter 108 converts the input voltage into a different voltage. In the depicted embodiment, the power converter 108 is a DC-DC power converter. In some embodiments, the multi-port power adapter 800A is a multi-port USB-C car rear seat charger for a car. In another embodiment, the multi-port power adapter 800A is part of the rear seat entertainment system of the car. The rear seat entertainment system may include a display system on a chip (SoC), and one or more displays or other power consuming devices may be connected to the display system SoC. In another embodiment, the multi-port power adapter 800A is part of the main control unit of the car. The main control unit of the car may include a USB hub, and the power consuming device may be connected to the USB hub. The powered device may consume power from the same power source as the master device port 102 and the slave device port 104, or the powered device may consume power from a different source. In the case where the powered device consumes power from the same source as the master device port 102 and the slave device port 104, a firmware-based approach may dynamically and intelligently allocate power between the master device port 102, the slave device port 104, and each of the powered devices.

[0108] In other embodiments, the multi-port power adapter 800A can be part of a multi-port USB-C charger in a vehicle, car, truck, van, boat, airplane, building, house, etc. In other embodiments, the multi-port power adapter 800A is a multi-port USB-C wall charger, a multi-port USB-C power bank, a multi-port USB-C power hub, a shared multi-port power adapter, etc. In other embodiments, the multi-port power adapter 800A can use ports other than USB-C ports and is a multi-port wall charger, a multi-port power hub, a multi-port power bank, etc. In other embodiments, the multi-port power adapter 800A can use ports other than USB-C, such as a wall outlet, a micro USB port, etc. In some embodiments, the ports of the multi-port USB-C power adapter 800A may not be exactly the same. For example, the multi-port USB-C power adapter may include multiple USB Type-C ports and multiple other ports, such as USB-A, micro USB, and USB-A3.0 ports.

[0109] The firmware-based approach can be implemented by a multi-port power adapter 800A to dynamically share total system power between connected USB-C / PD charging ports or multi-port USB-C / PD controllers by sensing the power requirements of the connected consuming devices. The multi-port power adapter distributes available power between the ports without relying on the order in which the ports are connected. In some embodiments, the multi-port power adapter 800A can include additional power consuming devices or power consuming devices 850, such as a video display, audio output, etc. In some embodiments, the firmware-based approach can be applied to any resource allocation.

[0110] Figure 8B 8 is a diagram of a multi-port AC power adapter 800B configured to dynamically and intelligently allocate power using a firmware-based approach according to one embodiment. In some embodiments, the multi-port AC power adapter 800B may be a wall power adapter including a master device port 102, a slave device port 104, and a power port 850. The master device port 102 may be controlled by a master device controller ( Figure 8B ), and the slave device port 104 can be controlled by the slave device controller ( Figure 8B The AC-DC converter (not shown) can convert the input AC supply voltage into a DC voltage to be provided to the master device controller and the slave device controller. In some embodiments, the multi-port AC power adapter 800B can be configured to implement operations to distribute system power between the master device port 102 and the slave device port 104, and each port 850 can provide a fixed port power. In other embodiments, the port 850 can be configured as a slave device port, and the multi-port AC power adapter 800B can be configured to implement operations to distribute system power between the master device port 102, the slave device port 104, and the port 850. Although in Figure 8B 800B may be another type of multi-port AC power adapter, such as may be found in a vehicle, car, truck, van, boat, airplane, building, house, etc.

[0111] Fig. 9is a block diagram illustrating a system 900 for a USB device used in USB power transmission according to some embodiments. The system 900 may include a peripheral subsystem 910, which includes several components for use in USB power transmission (USB-PD). The peripheral subsystem 910 may include a peripheral interconnect 911, which includes a clock module, a peripheral clock (PCLK) 912 for providing a clock signal to various components of the peripheral subsystem 910. The peripheral interconnect 911 may be a peripheral bus such as a single-stage or multi-stage advanced high-performance bus (AHB), and may provide a data and control interface between the peripheral subsystem 910, the CPU subsystem 930, and the system resources 940. The peripheral interconnect 911 may include a controller circuit such as a direct memory access (DMA) controller, which may be programmed to transfer data between peripheral blocks without the input, control, or burden of the CPU subsystem 930.

[0112] The peripheral interconnect 911 can be used to couple components of the peripheral subsystem 910 to other components of the system 900. Coupled to the peripheral interconnect 911 can be a plurality of general purpose input / output (GPIO) 915 for sending and receiving signals. The GPIO 915 can include circuits configured to implement various functions such as pull-ups, pull-downs, input threshold selection, input and output buffer enable / disable, single multiplexing, etc. The GPIO 915 can also implement other functions. One or more timer / counter / pulse width modulators (TCPWM) 917 can also be coupled to the peripheral interconnect and include circuits for implementing timing circuits (timers), counters, pulse width modulators (PWM) decoders, and other digital functions that can operate on I / O signals and provide digital signals to system components of the system 900. The peripheral subsystem 910 may also include one or more serial communication blocks (SCBs) 919 for implementing a serial communication interface, such as I2C, a serial peripheral interface (SPI), a universal asynchronous receiver / transmitter (UART), a controller area network (CAN), a clock expansion peripheral interface (CXPI), etc.

[0113] For USB power transmission applications, the peripheral subsystem 910 may include a USB power transmission subsystem 920 coupled to the peripheral interconnect and including a set of USB-PD modules 921 for use in USB power transmission. The USB-PD modules 921 may be coupled to the peripheral interconnect 911 via a USB-PD interconnect 923. The USB-PD module 921 may include: an analog-to-digital conversion (ADC) module for converting various analog signals into digital signals; an error amplifier (AMP) for adjusting the output voltage on the VBUS line according to the PD contract; a high voltage (HV) regulator for converting the power supply voltage into an accurate voltage (e.g., 3.5V to 5V) to the power system 900; a low-side current sensing amplifier (LSCSA) for accurately measuring the load current; an overvoltage protection (OVP) module and an overcurrent protection (OCP) module for providing overcurrent and overvoltage protection on the VBUS line with configurable thresholds and response times; one or more gate drivers for external power field effect transistors (FETs) used in USB power transmission in provider and consumer configurations; and a communication channel PHY (CC BB PHY) module for supporting communication on a Type-C communication channel (CC) line. The USB-PD module 921 may also include: a charger detection module for determining the presence of a charging circuit and coupling the charging circuit to the system 900; and a VBUS discharge module for controlling the discharge of the voltage on the VBUS. The discharge control module can be configured to couple to a power node on the VBUS line or an output (power consumer) node on the VBUS line and discharge the voltage on the VBUS line to a desired voltage level (i.e., the voltage level negotiated in the PD contract). The USB power transmission subsystem 920 may also include a pad 927 for external connection and an electrostatic discharge (ESD) protection circuit 929, which may be required on a Type-C port. The USB-PD module 921 may also include a bidirectional communication module for supporting bidirectional communication with another controller, such as between a primary side controller and a secondary side controller of a flyback converter.

[0114] The GPIO 915, TCPWM 917, and SCB 919 may be coupled to an input / output (I / O) subsystem 950, which may include a high-speed (HS) I / O matrix 951 coupled to a plurality of GPIOs 953. The GPIO 915, TCPWM 917, and SCB 919 may be coupled to the GPIO 953 via the HS I / O matrix 951.

[0115] The system 900 may also include a central processing unit (CPU) subsystem 930 for processing commands, storing program information and data. The CPU subsystem 930 may include one or more processing units 931 for executing instructions and reading and writing from memory locations of multiple memories to memory locations. The processing unit 931 may be a processor suitable for operating in an integrated circuit (IC) or a system on chip (SOC) device. In some embodiments, the processing unit 931 may be optimized for low-power operation using extended clock gating. In this embodiment, various internal control circuits may be implemented for the operation of the processing unit in various power states. For example, the processing unit 931 may include a wake-up interrupt controller (WIC) configured to wake up the processing unit from a sleep state, thereby allowing the power supply to be cut off when the IC or SOC is in a sleep state. The CPU subsystem 930 may include one or more memories, the one or more memories including a flash memory 933 and a static random access memory (SRAM) 935 and a read-only memory (ROM) 937. Flash memory 933 may be a non-volatile memory (NAND flash memory, NOR flash memory, etc.) configured to store data, programs, and / or other firmware instructions. Flash memory 933 may include a read accelerator and may improve access time by being integrated into CPU subsystem 930. SRAM 935 may be a volatile memory configured to store data and firmware instructions accessible by processing unit 931. ROM 937 may be configured to store startup routines, configuration parameters, and other firmware parameters and settings that do not change during operation of system 900. SRAM 935 and ROM 937 may have associated control circuits. Processing unit 931 and memory may be coupled to system interconnect 939 to route signals to and from various components of CPU subsystem 930 to other blocks or modules of system 900. System interconnect 939 may be implemented as a system bus such as a single-stage or multi-stage AHB. System interconnect 939 may be configured to be an interface that couples various components of CPU subsystem 930 to each other. System interconnect 939 may be coupled to peripheral interconnect 911 to provide a signal path between components of CPU subsystem 930 and peripheral subsystem 910 .

[0116] The system 900 may also include a plurality of system resources 940, including a power module 941, a clock module 943, a reset module 945, and a test module 947. The power module 941 may include a sleep control module, a wake-up interrupt control (WIC) module, a power-on reset (POR) module, a plurality of voltage references (REF), and a PWRSYS module. In some embodiments, the power module 941 may include a circuit that allows the system 900 to draw power from an external source and / or provide power to an external source at different voltage and / or current levels and supports the controller to operate in different power states such as activity, low power, or sleep. In various embodiments, more power states may be achieved when the system 900 decelerates the operation to achieve the desired power consumption or output. The clock module 943 may include a clock control module, a watchdog timer (WDT), an internal low-speed oscillator (ILO), and an internal main oscillator (IMO). The reset module 945 may include a reset control module and an external reset (XRES) module. The test module 947 may include modules for controlling and entering a test mode and test control modules for analog and digital functions (digital test and analog DFT).

[0117] The system 900 can be implemented in a monolithic (e.g., single) semiconductor die. In other embodiments, various parts or modules of the system 900 can be implemented on different semiconductor dies. For example, the memory modules of the CPU subsystem 930 can be on-chip or separate. In other embodiments, separate die circuits can be packaged into a single multi-chip module, or kept separate and arranged as separate components on a circuit board (or in a USB cable connector).

[0118] System 900 can be implemented in many application environments to provide USB-PD functions thereto. In each application environment, an IC controller or SOC implementing system 900 can be arranged and configured in an electronic device (e.g., a device supporting USB) to perform operations according to the techniques described herein. In one example embodiment, system 900 can be arranged and configured in a personal computer (PC) power adapter for a laptop computer, a notebook computer, etc. In another example embodiment, system 900 can be arranged and configured in a power adapter (wall charger) for a mobile electronic device (e.g., a smart phone, a tablet computer, etc.). In another example embodiment, system 900 can be arranged and configured in a wall socket configured to provide power through a USB A type and / or a USB C type port. In another example embodiment, system 900 can be arranged and configured in a car charger configured to provide power through a USB A type and / or a USB C type port. In yet another example embodiment, system 900 can be arranged and configured in a power pack that can be charged and then provide power to another electronic device through a USB A type or USB C type port. In other implementations, a system such as system 900 may be configured with the power switch gating circuits described herein and may be disposed in various other USB-enabled electronic or electromechanical devices.

[0119] It should be understood that systems such as system 900 implemented on or as an IC controller can be deployed in different applications, which can vary with respect to the type of power source being used and the direction in which power is being transmitted. For example, in the case of a car charger, the power source is an on-board battery that provides DC power, while in the case of a mobile power adapter, the power source is an AC wall outlet. In addition, in the case of a PC power adapter, the flow of power transmission is from a provider device to a consumer device, while in the case of a mobile power supply, the flow of power transmission can be bidirectional, depending on whether the mobile power supply is operating as a power provider (e.g., powering another device) or as a power consumer (e.g., being charged itself). For these reasons, the various applications of system 900 should be viewed in an illustrative rather than a restrictive sense.

[0120] In the above description, some parts of the specific embodiments are presented according to the algorithms and symbolic representations of the operations of the data bits in the computer memory. These algorithmic descriptions and representations are the means by which the technical personnel in the field of data processing use to most effectively convey the essence of their work to other technical personnel in the field. Here, the algorithm is usually conceived as a self-consistent sequence of steps that produce a desired result. These steps require physical operations on physical quantities. Although not necessary, these quantities usually take the form of electrical or magnetic signals that can be stored, transmitted, combined, compared, and otherwise manipulated. It has been proven that it is convenient to refer to these signals as bits, values, elements, symbols, characters, items, numbers, etc., mainly for general reasons.

[0121] It should be remembered, however, that all of these and similar terms will be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless otherwise noted, it will be apparent from the above discussion that it should be understood that throughout the description, discussions using terms such as "determine," "allocate," "dynamically allocate," "redistribute," "ignore," "reallocate," "detect," "execute," "poll," "register," "monitor," and the like refer to the actions and processes of a computing system or similar electronic computing device that manipulates and transforms data represented as physical (e.g., electronic) quantities in the computing system's registers and memories into other data similarly represented as physical quantities in the computing system's memories or registers or other such information storage, transmission, or display devices.

[0122] The words "example" or "exemplary" are used herein to mean serving as an example, instance or illustration. Any aspect or design described herein as "example" or "exemplary" is not necessarily to be interpreted as being preferred or advantageous over other aspects or designs. On the contrary, the use of the words "example" or "exemplary" is intended to present concepts in a specific way. As used in this application, the term "or" is intended to mean an inclusive "or", not an exclusive "or". That is, unless otherwise stated or becomes clear from the context, "X includes A or B" is intended to mean any natural inclusive replacement. That is, if X includes A; X includes B; or X includes both A and B, then "X includes A or B" is satisfied in any of the foregoing cases. In addition, unless otherwise stated or clearly pointed to a singular form from the context, the articles "one" and "an" used in this application and the appended claims should generally be interpreted as meaning "one or more". In addition, the use of the terms "embodiment" or "one embodiment" or "embodiment" or "one embodiment" throughout the text is not intended to mean the same embodiment or embodiments, unless so described.

[0123] The embodiments described herein may also be related to a device for performing the operations herein. The device may be specially constructed for the desired purpose, or it may include a general-purpose computer selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a non-transitory computer-readable storage medium, such as but not limited to: any type of disk including a floppy disk, an optical disk, a CD-ROM, and a magneto-optical disk, a read-only memory (ROM), a random access memory (RAM), an EPROM, an EEPROM, a magnetic card or an optical card, a flash memory, or any type of medium suitable for storing electronic instructions. The term "computer-readable storage medium" should be understood to include a single medium or multiple media (e.g., a centralized database or a distributed database and / or associated caches and servers) storing one or more sets of instructions. The term "computer-readable medium" should also be understood to include any medium that can store, encode, or carry a set of instructions for execution by a machine and cause the machine to execute any one or more methods of the present embodiment. Therefore, the term "computer-readable storage medium" should be understood to include but is not limited to: solid-state memory, optical media, magnetic media, any medium that can store a set of instructions for execution by a machine and cause the machine to execute any one or more methods of the present embodiment.

[0124] The methods and displays presented herein are not inherently related to any particular computer or other device. According to the teachings herein, various general purpose systems can be used with the program, or it may prove convenient to construct a more specialized device to perform the required method steps. The structures required for various these systems will appear in the following description. In addition, the present embodiment is not described with reference to any particular programming language. It should be understood that the teachings of the embodiments described herein can be implemented using various programming languages.

[0125] The above description sets forth many specific details, such as examples of specific systems, parts, methods, etc., to provide a good understanding of several embodiments of the present disclosure. It should be understood that the above description is intended to be illustrative and not restrictive. After reading and understanding the above description, many other embodiments will be apparent to those skilled in the art. Therefore, the scope of the present disclosure should be determined with reference to the full range of equivalents given by the attached claims and these claims.

Claims

1. A power sharing method, comprising: monitoring, by at least one processing device, power consumption of at least one device of a plurality of devices, wherein each device of the plurality of devices is connected to a port of a plurality of ports having allocated system power, and wherein monitoring the power consumption comprises obtaining at least one current measurement of an actual current consumption of the at least one device; determining, by the at least one processing device, whether the at least one current measurement satisfies a threshold condition; and In response to determining that the at least one current measurement satisfies the threshold condition, causing, by the at least one processing device, the system power to be reallocated between each of the plurality of ports.

2. The power sharing method according to claim 1, wherein: Determining whether the at least one current measurement satisfies the threshold condition further includes determining whether the at least one current measurement is greater than a sum of a stored current measurement and a first current measurement threshold, or whether the at least one current measurement is less than a difference between the stored current measurement and a second current measurement threshold.

3. The power sharing method according to claim 1, wherein: Causing the system power to be redistributed between each of the plurality of ports further comprises: determining at least an amount of power consumed by the at least one device based on the at least one requested data object voltage and the at least one current measurement; and The system power is caused to be reallocated between each port of the plurality of ports based on the at least an amount of power consumed by the at least one device.

4. The power sharing method according to claim 1, further comprising: obtaining, by the at least one processing device, a set of charging characteristics for a given device of the plurality of devices, the given device being connected to a given port of the plurality of ports; as well as The set of charging characteristics is used by the at least one processing device to reallocate the system power.

5. The power sharing method according to claim 4, wherein: The given device is a known device; Obtaining the set of charging characteristics further comprises obtaining a charging table and a charging state corresponding to the given device; as well as Reallocating the system power using the set of charging characteristics also includes causing an amount of power to be provided to the given port based on the charging table and the state of charge.

6. The power sharing method according to claim 4, characterized in that: The given device is an unknown device; Obtaining the set of charging characteristics further comprises saving a charging mode corresponding to the given device; as well as Reallocating the system power using the set of charging characteristics also includes causing an amount of power to be provided to the given port after saving the charging pattern.

7. The power sharing method according to claim 1, further comprising: Prior to monitoring the power consumption of the at least one device: determining, by the at least one processing device, for each device in the plurality of devices, a power requirement of the device; as well as The system power is allocated, by the at least one processing device, among each of the plurality of ports based on each power demand, independent of the order in which the plurality of devices are connected.

8. A power sharing system, comprising: Memory; as well as At least one processing device operably coupled to the memory to perform the following processing: monitoring power consumption of at least one device of a plurality of devices by obtaining at least one current measurement of actual current consumption of the at least one device of the plurality of devices, wherein each device of the plurality of devices is connected to a port of a plurality of ports having allocated system power; determining whether the at least one current measurement satisfies a threshold condition; and In response to determining that the at least one current measurement satisfies the threshold condition, system power is caused to be reallocated between each of the plurality of ports.

9. The power sharing system according to claim 8, wherein: The at least one processing device also determines whether the at least one current measurement satisfies the threshold condition by determining whether the at least one current measurement is greater than a sum of a stored current measurement and a first current measurement threshold or whether the at least one current measurement is less than a difference between the stored current measurement and a second current measurement threshold.

10. The power sharing system according to claim 8, wherein: The at least one processing device further causes the system power to be redistributed between each of the plurality of ports by: determining at least an amount of power consumed by the at least one device based on at least one request data object voltage and the at least one current measurement; as well as The system power is caused to be reallocated between each of the plurality of ports based on the at least an amount of power consumed by the at least one device.

11. The power sharing system according to claim 8, wherein: The at least one processing device also performs the following processing: obtaining a set of charging characteristics for a given device of the plurality of devices, the given device being connected to a given port of the plurality of ports; and The system power is redistributed using the set of charging characteristics.

12. The power sharing system according to claim 11, wherein: The given device is a known device; the at least one processing device obtaining the set of charging characteristics by obtaining a charging table and a charging state corresponding to the given device; as well as The at least one processing device uses the set of charging characteristics to reallocate the system power by causing an amount of power to be provided to the given port based on the charging table and the charging status.

13. The power sharing system according to claim 11, wherein: The given device is an unknown device; The at least one processing device obtains the set of charging characteristics by storing a charging mode corresponding to the given device; as well as The at least one processing device reallocates the system power using the set of charging characteristics by causing an amount of power to be provided to the given port after saving the charging mode.

14. The power sharing system according to claim 8, wherein: Before monitoring the power consumption of the at least one processing device, the at least one processing device further performs the following processing: determining, for each device of the plurality of devices, a power requirement of the device; as well as The system power is allocated between each of the plurality of ports based on each power requirement, independent of the order in which the plurality of devices are connected.

15. A multi-port power transmission system comprising: Multiple Universal Serial Bus Type-C USB-C ports with distributed system power; a plurality of devices, wherein each device of the plurality of devices is connected to a corresponding USB-C port of the plurality of USB-C ports; and At least one processing device operably coupled to the memory to perform the following processing: monitoring power consumption of at least one device of the plurality of devices by obtaining at least one current measurement of an actual current consumption of the at least one device; determining whether the at least one current measurement satisfies a threshold condition; and In response to determining that the at least one current measurement satisfies the threshold condition, system power is caused to be reallocated between each of the plurality of USB-C ports.

16. The multi-port power transmission system according to claim 15, wherein: The at least one processing device also determines whether the at least one current measurement satisfies the threshold condition by determining whether the at least one current measurement is greater than a sum of a stored current measurement and a first current measurement threshold or whether the at least one current measurement is less than a difference between the stored current measurement and a second current measurement threshold.

17. The multi-port power transmission system according to claim 15, wherein: The at least one processing device further causes the system power to be redistributed between each of the plurality of USB-C ports by performing the following processing: determining at least an amount of power consumed by the at least one device based on at least one request data object voltage and the at least one current measurement; as well as The system power is reallocated between each of the plurality of USB-C ports based on the at least an amount of power consumed by the at least one device.

18. The multi-port power transmission system according to claim 15, wherein: The at least one processing device also performs the following processing: obtaining a set of charging characteristics for a given device of the plurality of devices, the given device being connected to a given USB-C port of the plurality of USB-C ports; and The system power is redistributed using the set of charging characteristics.

19. The multi-port power transmission system of claim 18, wherein: The given device is a known device; the at least one processing device obtaining the set of charging characteristics by obtaining a charging table and a charging state corresponding to the given device; as well as The at least one processing device reallocates the system power using the set of charging characteristics by causing an amount of power to be provided to the given USB-C port based on the charging table and the charging status.

20. The multi-port power transfer system of claim 18, wherein: The given device is an unknown device; The at least one processing device obtains the set of charging characteristics by storing a charging mode corresponding to the given device; as well as The at least one processing device reallocates the system power using the set of charging characteristics by causing an amount of power to be provided to the given USB-C port after saving the charging mode.

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