Multilayer ceramic capacitor, package, and circuit board

Abstract

The present invention provides a multilayer ceramic capacitor having a dimension in a first axial direction of 1.5 times or more of a dimension in a second axial direction, the multilayer ceramic capacitor including a ceramic body and a pair of external electrodes. The external electrode is mainly composed of Cu and covers an end surface of the ceramic body. The ceramic body has: a laminated part having Ni as a main component, and having a plurality of internal electrodes which are alternately laminated with the ceramic layers in a lamination direction parallel to a first axis or a second axis, and which are led out to a connection end on an end surface; and a pair of edge portions covering the laminated portion from the width direction of the internal electrode and containing a low-melting-point metal having a melting point lower than that of Ni. In the internal electrode, the width dimension of the connection end in the width direction is smaller than the width dimension of the center portion in the third axis direction in the width direction.

Description

Technical Field

[0001] The present invention relates to a high-profile multilayer ceramic capacitor. Background Art

[0002] Patent document 1 discloses a technique in which a small green sheet is formed in which the internal electrode is exposed on the side, and a ceramic green sheet for the side surface is attached to the side surface to form a ceramic protective layer. In such a technique, the ceramic protective layer can be formed thinner, but on the other hand, the reliability of the ceramic protective layer becomes a problem. Therefore, for example, Patent document 2 discloses a technique in which Sn is added to an internal electrode paste containing Ni, and a barrier containing Ni and Sn is formed between the internal electrode layer and the side edge to improve insulation.

[0003] On the other hand, Patent Document 3 describes a phenomenon in which when an external electrode mainly composed of Cu is sintered (baked) on a ceramic body having an internal electrode mainly composed of Ni, the Cu in the external electrode diffuses into the internal electrode while reacting with Ni. This phenomenon causes expansion at the end of the internal electrode close to the external electrode in the ceramic body.

[0004] In the ceramic body, due to the expansion of the internal electrode, only the area close to the external electrode expands in the stacking direction. In the ceramic body, the internal stress generated by this is concentrated at the corners, making it easy to crack. The generation of such cracks becomes more prominent in a high-height structure with a large number of internal electrodes stacked.

[0005] Prior art literature

[0006] Patent Literature

[0007] Patent Document 1: Japanese Patent Application Publication No. 2012-209539

[0008] Patent Document 2: Japanese Patent Application Publication No. 2021-034648

[0009] Patent Document 3: Japanese Patent Application No. 2014 / 175034 Summary of the invention

[0010] Technical problem to be solved by the invention

[0011] From the viewpoint of improving insulation, if a metal having a lower melting point than Ni, such as Sn, is added to the ceramic body, the amount of Cu diffused from the external electrode further increases, making it easier for cracks to occur.

[0012] In view of the above circumstances, an object of the present invention is to provide a multilayer ceramic capacitor, a package, and a circuit board that can improve insulation and suppress the occurrence of cracks in a ceramic body in a high-profile structure.

[0013] Technical solutions for solving technical problems

[0014] To achieve the above object, a multilayer ceramic capacitor according to one embodiment of the present invention has a dimension in a first axis direction that is 1.5 times or more of a dimension in a second axis direction perpendicular to the first axis, and the multilayer ceramic capacitor can be mounted on a mounting surface perpendicular to the first axis.

[0015] The above-mentioned laminated ceramic capacitor includes a ceramic body and a pair of external electrodes.

[0016] The ceramic body has a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis perpendicular to the first axis and the second axis.

[0017] The pair of external electrodes includes Cu as a main component and covers the pair of end surfaces.

[0018] The ceramic body also has:

[0019] a stacked portion having Ni as a main component, which is alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis and has a plurality of internal electrodes led out to connection ends on the end surface; and

[0020] a pair of edge portions formed along the stacking direction, covering the stacking portion from a width direction of the internal electrode orthogonal to the stacking direction and the third axis, and comprising a low melting point metal having a melting point lower than Ni,

[0021] In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

[0022] A multilayer ceramic capacitor according to another aspect of the present invention has a dimension in a first axis direction that is 1.3 times or more of a dimension in a second axis direction perpendicular to the first axis, and the multilayer ceramic capacitor can be mounted on a mounting surface perpendicular to the first axis.

[0023] The above-mentioned laminated ceramic capacitor includes a ceramic body and a pair of external electrodes.

[0024] The ceramic body has a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis perpendicular to the first axis and the second axis.

[0025] The pair of external electrodes includes Cu as a main component and covers the pair of end surfaces.

[0026] The ceramic body also has:

[0027] a stacked portion having Ni as a main component, which is alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis and has a plurality of internal electrodes led out to connection ends on the end surface; and

[0028] a pair of edge portions formed along the stacking direction, covering the stacking portion from a width direction of the internal electrode orthogonal to the stacking direction and the third axis, and comprising a low melting point metal having a melting point lower than Ni,

[0029] In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

[0030] In the above structure, the connection end is spaced apart from the edge portion, thereby alleviating the influence of the low melting point metal at the connection end. As a result, when the external electrode is sintered, the increase in the amount of Cu diffusion from the external electrode that may be caused by the low melting point metal can be suppressed. Therefore, in the above structure, the insulation of the edge portion can be improved by the low melting point metal, and cracks in the ceramic body caused by expansion near the connection end can be suppressed.

[0031] For example, the low melting point metal may be at least any one of Sn, Zn, Al, Ga, Ge, and Ag.

[0032] For example, the width of the connection terminal may be greater than 1 / 2 and less than 3 / 4 of the width of the central portion, thereby sufficiently ensuring the distance between the connection terminal and the edge portion and the width of the connection terminal so that the connection terminal is stably connected to the external electrode.

[0033] For example, the stacking direction may be parallel to the second axis.

[0034] The width direction of the internal electrode is parallel to the first axis.

[0035] In this case, the main surface may have a higher flatness than the side surface.

[0036] A package body according to another embodiment of the present invention includes a multilayer ceramic capacitor, a carrier tape, and a top tape.

[0037] The multilayer ceramic capacitor has a dimension in a first axis direction that is 1.5 times or more of a dimension in a second axis direction perpendicular to the first axis, and the multilayer ceramic capacitor can be mounted on a mounting surface perpendicular to the first axis.

[0038] The above-mentioned laminated ceramic capacitor includes a ceramic body and a pair of external electrodes.

[0039] The ceramic body has a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis perpendicular to the first axis and the second axis.

[0040] The pair of external electrodes includes Cu as a main component and covers the pair of end surfaces.

[0041] The ceramic body also has:

[0042] a stacked portion having Ni as a main component, which is alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis and has a plurality of internal electrodes led out to connection ends on the end surface; and

[0043] A pair of edge portions are formed along the stacking direction, cover the stacking portion from a width direction of the internal electrode perpendicular to the stacking direction and the third axis, and include a low melting point metal having a lower melting point than Ni.

[0044] In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

[0045] The carrier tape includes: a sealing surface perpendicular to the first axis; and a recessed portion recessed from the sealing surface in the first axis direction and accommodating the multilayer ceramic capacitor.

[0046] The top tape is adhered to the sealing surface to cover the recessed portion.

[0047] A package body according to another embodiment of the present invention includes a multilayer ceramic capacitor, a carrier tape, and a top tape.

[0048] The multilayer ceramic capacitor has a dimension in a first axis direction that is 1.3 times or more of a dimension in a second axis direction perpendicular to the first axis, and the multilayer ceramic capacitor can be mounted on a mounting surface perpendicular to the first axis.

[0049] The above-mentioned laminated ceramic capacitor includes a ceramic body and a pair of external electrodes.

[0050] The ceramic body has a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis perpendicular to the first axis and the second axis.

[0051] The pair of external electrodes includes Cu as a main component and covers the pair of end surfaces.

[0052] The ceramic body also has:

[0053] a stacked portion having Ni as a main component, which is alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis and has a plurality of internal electrodes led out to connection ends on the end surface; and

[0054] A pair of edge portions are formed along the stacking direction, cover the stacking portion from a width direction of the internal electrode perpendicular to the stacking direction and the third axis, and include a low melting point metal having a lower melting point than Ni.

[0055] In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

[0056] The carrier tape includes: a sealing surface perpendicular to the first axis; and a recessed portion recessed from the sealing surface in the first axis direction and accommodating the multilayer ceramic capacitor.

[0057] The top tape is adhered to the sealing surface to cover the recessed portion.

[0058] A circuit board according to another embodiment of the present invention includes a multilayer ceramic capacitor and a mounting substrate.

[0059] The multilayer ceramic capacitor has a dimension in a first axis direction that is 1.5 times or more of a dimension in a second axis direction that is perpendicular to the first axis, and is mounted on a mounting surface that is perpendicular to the first axis.

[0060] The above-mentioned laminated ceramic capacitor includes a ceramic body and a pair of external electrodes.

[0061] The ceramic body has a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis perpendicular to the first axis and the second axis.

[0062] The pair of external electrodes includes Cu as a main component and covers the pair of end surfaces.

[0063] The ceramic body also has:

[0064] a stacked portion having Ni as a main component, which is alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis and has a plurality of internal electrodes led out to connection ends on the end surface; and

[0065] A pair of edge portions are formed along the stacking direction, cover the stacking portion from a width direction of the internal electrode perpendicular to the stacking direction and the third axis, and include a low melting point metal having a lower melting point than Ni.

[0066] In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

[0067] The mounting substrate includes: a mounting surface perpendicular to the first axis; and a pair of connection electrodes provided on the mounting surface and connected to the pair of external electrodes of the multilayer ceramic capacitor via solder.

[0068] A circuit board according to another embodiment of the present invention includes a multilayer ceramic capacitor and a mounting substrate.

[0069] The multilayer ceramic capacitor has a dimension in a first axis direction that is 1.3 times or more of a dimension in a second axis direction that is perpendicular to the first axis, and is mounted on a mounting surface that is perpendicular to the first axis.

[0070] The above-mentioned laminated ceramic capacitor includes a ceramic body and a pair of external electrodes.

[0071] The ceramic body has a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis perpendicular to the first axis and the second axis.

[0072] The pair of external electrodes includes Cu as a main component and covers the pair of end surfaces.

[0073] The ceramic body also has:

[0074] a stacked portion having Ni as a main component, which is alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis and has a plurality of internal electrodes led out to connection ends on the end surface; and

[0075] A pair of edge portions are formed along the stacking direction, cover the stacking portion from a width direction of the internal electrode perpendicular to the stacking direction and the third axis, and include a low melting point metal having a lower melting point than Ni.

[0076] In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

[0077] The mounting substrate includes: a mounting surface perpendicular to the first axis; and a pair of connection electrodes provided on the mounting surface and connected to the pair of external electrodes of the multilayer ceramic capacitor via solder.

[0078] Effects of the Invention

[0079] As described above, according to the multilayer ceramic capacitor, the package, and the circuit board of the present invention, it is possible to improve the insulation and suppress the occurrence of cracks in the ceramic body in a high-profile structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0080] Figure 1 It is a perspective view of a multilayer ceramic capacitor according to a first embodiment of the present invention.

[0081] Figure 2 The above-mentioned multilayer ceramic capacitor is along Figure 1 A1-A1' line cross-sectional view.

[0082] Figure 3 The above-mentioned multilayer ceramic capacitor is along Figure 1 Cross-sectional view of line B1-B1'.

[0083] Figure 4 FIG. 1 is a diagram showing a partially exploded view of a ceramic body of the multilayer ceramic capacitor.

[0084] Figure 5 The above-mentioned multilayer ceramic capacitor is along Figure 1 Cross-sectional view of line A2-A2'.

[0085] Figure 6 The above-mentioned multilayer ceramic capacitor is along Figure 1 Cross-sectional view of line B2-B2'.

[0086] Figure 7 : is a flowchart showing a method for manufacturing the above-mentioned multilayer ceramic capacitor.

[0087] Fig. 8A , Figure 8B and Figure 8C Each of them is a plan view of the ceramic sheet prepared in step S01.

[0088] Fig. 9 It is a schematic diagram showing step S02.

[0089] Fig.10 It is a plan view showing step S03.

[0090] Fig.11A and Fig. 11B Each of them is a cross-sectional view showing step S04.

[0091] Fig.12 This is a side view of a circuit board including the above-mentioned multilayer ceramic capacitor.

[0092] Fig.13 It is a partial plan view of the package of the above-mentioned multilayer ceramic capacitor.

[0093] Fig.14 The packaging body is along Fig.15 Cross-sectional view of the C-C' line.

[0094] Fig.15 The multilayer ceramic capacitor according to the second embodiment of the present invention is Figure 1 Cross-sectional view of line B1-B1'.

[0095] Fig.16 The above-mentioned multilayer ceramic capacitor is along Figure 1 Cross-sectional view along line D1-D1'.

[0096] Fig.17 FIG. 1 is a diagram showing a partially exploded view of a ceramic body of the multilayer ceramic capacitor.

[0097] Fig.18 The above-mentioned multilayer ceramic capacitor is along Figure 1 Cross-sectional view of line B2-B2'.

[0098] Fig.19 The above-mentioned multilayer ceramic capacitor is along Figure 1 Cross-sectional view of line D2-D2'.

[0099] Fig. 20A , Fig. 20B and Fig. 20C Each of them is a plan view of a ceramic sheet prepared in step S01 of the method for manufacturing the multilayer ceramic capacitor.

[0100] Fig.21 1 is a schematic diagram showing step S02 of the method for manufacturing the multilayer ceramic capacitor.

[0101] Fig.22A and Fig. 22B are partial cross-sectional views for explaining a method for calculating the flatness of the main surface and the side surface of the above-mentioned multilayer ceramic capacitor, Fig.22A is a diagram showing a cross section of the central portion of the main surface, Fig. 22B It is a figure which shows the cross section of the center part of a side surface. DETAILED DESCRIPTION

[0102] Hereinafter, a multilayer ceramic capacitor 10 according to an embodiment of the present invention will be described with reference to the drawings. In the drawings, mutually orthogonal X-axis, Y-axis, and Z-axis are appropriately indicated. The X-axis, Y-axis, and Z-axis define a fixed coordinate system fixed to the multilayer ceramic capacitor 10.

[0103] <First Embodiment>

[0104] [Structure of Multilayer Ceramic Capacitor 10]

[0105] Figures 1 to 3 FIG. 1 is a diagram showing a multilayer ceramic capacitor 10 according to an embodiment of the present invention. Figure 1 It is a perspective view of the multilayer ceramic capacitor 10 . Figure 2 The multilayer ceramic capacitor 10 is Figure 1 A1-A1' line cross-sectional view. Figure 3 The multilayer ceramic capacitor 10 is Figure 1 Cross-sectional view of line B1-B1'.

[0106] Figure 1 and 2 1 shows a longitudinal cross section of a region including a central portion of the multilayer ceramic capacitor 10. Specifically, Figure 2 FIG. 1 shows a cross section along the XZ plane of the center portion of the multilayer ceramic capacitor 10 in the Y-axis direction. Figure 3 FIG. 1 shows a cross section of the center portion of the multilayer ceramic capacitor 10 in the X-axis direction along the YZ plane.

[0107] The multilayer ceramic capacitor 10 includes a ceramic body 11, a first external electrode 14, and a second external electrode 15. The ceramic body 11 is configured as a hexahedron having first and second main faces M1, M2 orthogonal to the Z axis, first and second end faces E1, E2 orthogonal to the X axis, and first and second side faces S1, S2 orthogonal to the Y axis. In addition, the "hexahedron" may be substantially a hexahedron, for example, the edges connecting the faces of the ceramic body 11 may also be rounded.

[0108] The main surfaces M1, M2, end surfaces E1, E2 and side surfaces S1, S2 of the ceramic body 11 are all configured as flat surfaces. The flat surface of the present embodiment may not be a strict plane as long as it is a surface that is recognized as flat when observed as a whole, for example, it also includes a surface with tiny concave and convex shapes, a surface with a gently curved shape existing in a specified range, etc.

[0109] The multilayer ceramic capacitor 10 is a high-height type in which the dimension T in the Z-axis direction is 1.5 times or more the dimension W in the Y-axis direction. In the multilayer ceramic capacitor 10, the capacity is increased by increasing the dimension T corresponding to the height. Thus, the multilayer ceramic capacitor 10 can be mounted in a mounting space that is limited in the Y-axis direction.

[0110] The multilayer ceramic capacitor 10 may be of a high-profile type in which the dimension T in the Z-axis direction is 1.3 times or more the dimension W in the Y-axis direction.

[0111] In the multilayer ceramic capacitor 10, the dimension L of the ceramic body 11 in the X-axis direction may be larger than the dimension W or smaller than the dimension T. In the multilayer ceramic capacitor 10, the dimensions T, W, and L of the ceramic body 11 may be arbitrarily determined within the range satisfying the above conditions.

[0112] Specifically, in the multilayer ceramic capacitor 10 , for example, the dimension L can be set to be 0.2 mm to 1.2 mm, the dimension W can be set to be 0.1 mm to 0.7 mm, and the dimension T can be set to be 0.15 mm to 1.0 mm. The dimensions T, W, and L are all set to be the maximum dimensions of the multilayer ceramic capacitor 10 in each direction.

[0113] In the following description, "the inner side in the Z-axis direction" refers to the side close to the imaginary XY plane that bisects the multilayer ceramic capacitor 10 in the Z-axis direction, and "the outer side in the Z-axis direction" refers to the side away from the imaginary XY plane. Similarly, "the inner side in the Y-axis direction" refers to the side close to the imaginary XZ plane that bisects the multilayer ceramic capacitor 10 in the Y-axis direction, and "the outer side in the Y-axis direction" refers to the side away from the imaginary XZ plane.

[0114] The first and second external electrodes 14 and 15 extend from the end faces E1 and E2 of the ceramic body 11 along the main faces M1 and M2 and the side faces S1 and S2 inward in the X-axis direction, and are spaced apart from each other on the main faces M1 and M2 and the side faces S1 and S2. Thus, the cross-sections of the external electrodes 14 and 15 along the XY plane and the XZ plane are both U-shaped.

[0115] The external electrodes 14 and 15 are both formed of copper (Cu) as a main component. In the present embodiment, the main component refers to a component with the highest content ratio.

[0116] The ceramic body 11 has a stacked portion 20 and a pair of edge portions 18. The stacked portion 20 has a capacitor forming portion 16 and a pair of covering portions 17. The capacitor forming portion 16 includes a plurality of first and second internal electrodes 12, 13 alternately stacked along the Z-axis direction with a plurality of ceramic layers 19. In the present embodiment, the internal electrodes 12, 13 and the ceramic layers 19 are each configured in a sheet shape extending along the XY plane.

[0117] The internal electrodes 12 and 13 are both formed of nickel (Ni) as a main component. The internal electrodes 12 and 13 are opposed to each other in the Z-axis direction in the opposing region in the center of the X-axis and Y-axis directions. The first internal electrode 12 is led out from the opposing region to the connection end En on the first end surface E1, and is connected to the first external electrode 14 at the connection end En. The second internal electrode 13 is led out from the opposing region to the connection end En on the second end surface E2, and the connection end En on the second end surface E2 is connected to the second external electrode 15.

[0118] With such a structure, in the multilayer ceramic capacitor 10, when a voltage is applied between the external electrodes 14 and 15, a voltage is applied to the plurality of ceramic layers 19 between the internal electrodes 12 and 13 in the facing region. Thus, in the multilayer ceramic capacitor 10, charges corresponding to the voltage between the external electrodes 14 and 15 are accumulated.

[0119] Here, the stacking direction of the internal electrodes 12 and 13 is defined as a “stacking direction”, the leading direction of the internal electrodes 12 and 13 is defined as a “leading direction”, and the direction orthogonal to the stacking direction and the leading direction is defined as a “width direction (of the internal electrodes 12 and 13)”. In the present embodiment, the stacking direction is a direction parallel to the Z axis, the leading direction is a direction parallel to the X axis, and the width direction is a direction parallel to the Y axis.

[0120] In the laminated portion 20, a dielectric ceramic with a high dielectric constant is used to increase the electrostatic capacitance of each ceramic layer 19 between the internal electrodes 12 and 13. Examples of dielectric ceramic with a high dielectric constant include materials having a perovskite structure containing barium (Ba) and titanium (Ti), such as barium titanate (BaTiO3).

[0121] In addition, dielectric ceramics can also be composed of strontium titanate (SrTiO3), calcium titanate (CaTiO3), magnesium titanate (MgTiO3), calcium zirconate (CaZrO3), calcium zirconate titanate (Ca(Zr, Ti)O3), barium calcium zirconate titanate ((Ba, Ca)(Zr, Ti)O3), barium zirconate (BaZrO3), titanium oxide (TiO2), etc.

[0122] A pair of covering portions 17 covers the capacitor forming portion 16 from both sides in the stacking direction, i.e., the Z-axis direction. The covering portion 17 is composed of, for example, a stack of ceramic sheets extending along the XY plane. From the viewpoint of suppressing internal stress, the dielectric ceramic constituting the covering portion 17 is preferably of the same composition as the ceramic layer 19.

[0123] A pair of edge portions 18 are formed along the Z-axis direction and cover the laminated portion 20 from the Y-axis direction. As described later, the edge portion 18 is later mounted on the surface of the laminated portion 20 perpendicular to the Y-axis. For example, the edge portion 18 is formed of a ceramic sheet and is configured in a sheet shape extending along the XZ plane. From the viewpoint of suppressing internal stress, the dielectric ceramic constituting the edge portion 18 is preferably of the same composition as the ceramic layer 19.

[0124] In addition, from the viewpoint of improving insulation, the edge portion 18 contains a low melting point metal having a lower melting point than Ni which is the main component of the internal electrodes 12 and 13. The low melting point metal is, for example, at least one of tin (Sn), zinc (Zn), aluminum (Al), gallium (Ga), germanium (Ge), and silver (Ag), preferably Sn. The edge portion 18 may contain one low melting point metal or a plurality of low melting point metals. In addition, the ceramic layer 19 of the laminated portion 20 may contain a low melting point metal at a lower concentration than the edge portion 18, but preferably does not contain a low melting point metal.

[0125] In the multilayer ceramic capacitor 10, the connection ends En of the external electrodes 14 and 15 mainly composed of Cu and the internal electrodes 12 and 13 mainly composed of Ni are connected to the end surfaces E1 and E2 of the ceramic body 11. The external electrodes 14 and 15 are formed as sintered films sintered to the ceramic body 11.

[0126] When the external electrodes 14 and 15 are sintered to the ceramic body 11, the Cu in the external electrodes 14 and 15 reacts with the Ni constituting the internal electrodes 12 and 13 while diffusing from the connection end En to the internal electrodes 12 and 13. That is, in the internal electrodes 12 and 13, the Ni constituting the end portions in the X-axis direction including the connection end En reacts with the Cu to form a copper-nickel alloy. Furthermore, when the low melting point metal is distributed near the connection end En, the diffusion of the Cu in the internal electrodes 12 and 13 is further promoted.

[0127] In the internal electrodes 12 and 13, the ends in the X-axis direction including the connection end En expand in the stacking direction parallel to the Z-axis due to the diffusion of Cu. Therefore, in the ceramic body 11, the two ends in the X-axis direction where the expansion of the internal electrodes 12 and 13 occurs expand in the stacking direction along the Z-axis, thereby generating internal stress.

[0128] Generally speaking, in the ceramic body 11, the internal stress caused by the expansion of both ends in the X-axis direction is likely to be concentrated on the corners C. Figure 1 As shown, the corners C in the ceramic body 11 are eight portions connecting three types of surfaces, namely, the main surfaces M1 and M2 , the end surfaces E1 and E2 , and the side surfaces S1 and S2 .

[0129] In the ceramic body 11, as the number of stacked internal electrodes 12 and 13 increases, the force to expand due to the expansion of each internal electrode 12 and 13 increases, and thus the internal stress concentrated at the corner C increases. In the ceramic body 11, the greater the internal stress concentrated at the corner C, the easier it is for a crack to occur at the corner C.

[0130] In the laminated ceramic capacitor 10, when cracks occur at the corners C of the ceramic body 11, the cracks become a path for water to enter, and moisture resistance is easily reduced. In addition, in the ceramic body 11, since the corners C are covered by the external electrodes 14 and 15, it is difficult to detect cracks generated at the corners C by visual inspection.

[0131] In contrast, in the multilayer ceramic capacitor 10 of the present embodiment, the internal electrodes 12 and 13 are configured to effectively suppress the concentration of internal stress generated by the diffusion of Cu in the external electrodes 14 and 15 into the internal electrodes 12 and 13 on the corners C of the ceramic body 11. The internal electrodes 12 and 13 will be described in detail below.

[0132] Figure 4 1 is a diagram showing the ceramic layers 19 on which the internal electrodes 12 and 13 are formed layer by layer. Figure 4 Also shown is the edge portion 18 adjacent to the ceramic layer 19 . Figure 5 The multilayer ceramic capacitor 10 is Figure 1 A2-A2' longitudinal section view of the line. Figure 6 The multilayer ceramic capacitor 10 is Figure 1 Longitudinal section view of line B2-B2'. Figure 5 , Figure 6 Each of the diagrams shows a cross section of a region including the vicinity of a corner C of the ceramic body 11 in the multilayer ceramic capacitor 10 .

[0133] like Figure 4 As shown in FIG. 1 , in the internal electrodes 12 and 13, the width dimension D1 of the connection end En in the Y-axis direction is smaller than the width dimension D2 of the central portion in the X-axis direction of the internal electrodes 12 and 13. That is, the ends in the X-axis direction of each internal electrode 12 and 13 including the connection end En are in a planar shape that narrows inward from both sides in the Y-axis direction. In addition, the central portion in the X-axis direction of the internal electrodes 12 and 13 is located at a position that divides the opposing region into two equal parts in the X-axis direction.

[0134] In this structure, the connection end En is separated from the edge portion 18, and the capacitance forming portion 16 has an electrode non-existent region F that does not include an electrode material disposed between the connection end En and the edge portion 18. The electrode non-existent region F does not include a low melting point metal, or includes a low melting point metal at a lower concentration than the edge portion 18.

[0135] As a result, the amount of low-melting-point metal distributed around the connection end En is reduced, and diffusion of Cu from the external electrodes 14 and 15 to the ends of the internal electrodes 12 and 13 including the connection end En is suppressed. Therefore, in the above structure, the insulation of the edge portion 18 is maintained by the low-melting-point metal, and the expansion of the ends of the internal electrodes 12 and 13 including the connection end En is suppressed. As a result, in the ceramic body 11, the internal stress generated by the expansion of the internal electrodes 12 and 13 can be suppressed, and the generation of cracks in the corner C can be suppressed.

[0136] And, if Figure 5 , Figure 6 As shown, in the internal electrodes 12 and 13, by providing the electrode non-existing region F, the spacing from the side surfaces S1 and S2 becomes larger at the end in the X-axis direction including the connection end En than at the center in the X-axis direction. In the ceramic body 11, by providing the electrode non-existing region F in any of the internal electrodes 12 and 13, the internal electrodes 12 and 13 are not present near the four edges along the Z-axis direction.

[0137] As a result, in the ceramic body 11, the influence of the expansion of the internal electrodes 12 and 13 becomes less likely to affect the corner C. In addition, in the ceramic body 11, the internal stress generated by the expansion of the internal electrodes 12 and 13 is relaxed near the four edges. As a result, in the ceramic body 11, the generation of cracks in the corner C can also be effectively suppressed.

[0138] In the internal electrodes 12 and 13, as the size of the electrode non-existing region F in the Y-axis direction increases, the distance from the edge portion 18 becomes larger, so that the generation of cracks in the ceramic body 11 can be more effectively suppressed. Therefore, in the internal electrodes 12 and 13, the width dimension D1 of the connection end En is preferably 4 / 5 or less of the width dimension D2 of the central portion in the X-axis direction, and more preferably 3 / 4 or less.

[0139] On the other hand, in the internal electrodes 12 and 13, the smaller the size of the electrode non-existing region F in the Y-axis direction, the larger the connection area with the external electrodes 14 and 15 at the connection end En, so it is possible to more effectively suppress the occurrence of poor connection to the external electrodes 14 and 15. Therefore, in the internal electrodes 12 and 13, the width dimension D1 of the connection end En is preferably 1 / 2 or more of the width dimension D2 of the central portion in the X-axis direction, and more preferably 2 / 3 or more.

[0140] In addition, if Figure 5 As shown, the electrode non-existence region F between the edge portion 18 and the internal electrodes 12 and 13 preferably extends to the inner side of the X-axis direction than the portion of the external electrodes 14 and 15 extending to the main surfaces M1 and M2. Thus, the generation of cracks in the portion of the ceramic body 11 covered by the external electrodes 14 and 15, which is difficult to inspect visually, can be suppressed.

[0141] [Method of Manufacturing Multilayer Ceramic Capacitor 10]

[0142] Figure 7 1 is a flowchart showing a method for manufacturing the multilayer ceramic capacitor 10 according to the present embodiment. Figure 8A to Figure 12 1 and 2 are diagrams showing a manufacturing process of the multilayer ceramic capacitor 10. Hereinafter, a method for manufacturing the multilayer ceramic capacitor 10 will be described with reference to these drawings as appropriate.

[0143] (Step S01: preparing ceramic sheet)

[0144] In step S01 , first and second ceramic sheets 101 , 102 for forming the capacitance forming portion 16 and a third ceramic sheet 103 for forming the cover portion 17 are prepared. Fig. 8A , Figure B and Figure 8C They are plan views of ceramic sheets 101, 102, and 103 respectively.

[0145] Ceramic sheets 101, 102, 103 are all made of unfired dielectric green sheets mainly composed of dielectric ceramics. The materials of the ceramic sheets include, for example, ceramic powder, organic compounds such as binders and organic solvents, and other additives. Ceramic sheets 101, 102, 103 are formed into sheets using, for example, a roll coater, a doctor blade, or the like.

[0146] At this stage, each of the ceramic sheets 101, 102, and 103 is constituted as a large sheet that has not been singulated. Fig. 8A , Figure 8B and Figure 8C In FIG. 1 , a first cutting line Lx parallel to the X axis and a second cutting line Ly parallel to the Y axis are indicated by dashed lines as cutting lines when each of the multilayer ceramic capacitors 10 is singulated.

[0147] Unfired conductor patterns 112 and 113 corresponding to the internal electrodes 12 and 13 are formed on the ceramic sheets 101 and 102 constituting the capacitance forming portion 16. No unfired conductor pattern is formed on the third ceramic sheet 103 corresponding to the cover portion 17 where no internal electrode is provided.

[0148] Conductive patterns 112 and 113 are formed by applying a conductive paste to ceramic sheets 101 and 102. The conductive paste can be applied by any method selected from known techniques, and for example, a screen printing method or a gravure printing method can be used.

[0149] A gap along the X-axis direction of the cutting line Ly is formed in each of the conductor patterns 112 and 113 across one cutting line Ly. The conductor patterns 112 and 113 are arranged so that the gaps are offset from each other along the X-axis direction.

[0150] The conductor patterns 112 and 113 are respectively formed continuously in the Y-axis direction. However, a region corresponding to the electrode non-existing region F where the conductive paste is not applied is provided in the conductor patterns 112 and 113 .

[0151] (Step S02: stacking)

[0152] In step S02, the ceramic sheets 101, 102, 103 prepared in step S01 are Fig. 9 The laminated sheet 104 is produced by laminating the laminated ceramic sheets 101, 102, and 103 as shown. The laminated sheet 104 is obtained by integrating the laminated ceramic sheets 101, 102, and 103 by hydrostatic pressure, uniaxial pressure, or the like.

[0153] In the laminated sheet 104, ceramic sheets 101 and 102 are alternately laminated in the Z-axis direction at positions corresponding to the capacitor forming portions 16. In the laminated sheet 104, third ceramic sheets 103 corresponding to the cover portions 17 are laminated on both sides of the laminated ceramic sheets 101 and 102 in the Z-axis direction.

[0154] (Step S03: Cutting off)

[0155] In step S03, the laminated sheet 104 obtained in step S02 is Fig.10 By cutting along the cutting lines Lx and Ly, unfired laminated small pieces 120 corresponding to the laminated portion 20 are obtained. For cutting the laminated sheet 104 in step S03, for example, a cutting device with a press cutter or a dicing device with a rotary blade can be used.

[0156] (Step S04: Forming an edge portion)

[0157] In step S04, the unfired edge portion 118 is formed on the cut surface 120s perpendicular to the Y axis of the stacked small piece 120 obtained in step S03. In this way, the unfired ceramic body 11 is manufactured.

[0158] The edge portion 118 is formed, for example, by pasting ceramic sheets together, applying ceramic slurry, etc. The material of the edge portion 118 includes, for example, ceramic powder, the low melting point metal, an organic compound such as a binder and an organic solvent, other additives, etc. The low melting point metal is added to the edge portion 118 in a manner that makes the concentration higher than that of the ceramic sheets 101, 102, and 103 that form the stacked small piece 120.

[0159] From the viewpoint of making the thickness of the edge portion 18 uniform and thin, the edge portion 18 is preferably formed of a ceramic sheet. Fig.11A and Fig. 11B Provide explanation.

[0160] like Fig.11A As shown, first, one cut surface 120s of the stacked small piece 120 is made to face the ceramic sheet 118s. The ceramic sheet 118s is arranged on the elastic body R. The other cut surface 120s of the stacked small piece 120 is held by the tape Tp.

[0161] Then, if Fig.11A As shown in FIG. 1 and B, the stacked small piece 120 is pressed against the ceramic piece 118s in the Y-axis direction, and the ceramic piece 118s is punched out using the cut surface 120s. Thus, the ceramic piece 118s punched out along the periphery of the cut surface 120s is attached to the cut surface 120s, and an unfired edge portion 118 is formed on the cut surface 120s.

[0162] Similarly, a ceramic sheet 118s is punched out on the other cut surface 120s of the stacked small piece 120, and an unfired edge portion 118 is formed on the cut surface 120s. Thus, an unfired ceramic body 11 having the stacked small pieces 120 and a pair of edge portions 118 is formed.

[0163] (Step S05: Firing)

[0164] In step S05, the ceramic body 11 obtained in step S04 is fired. The firing temperature in step S05 may be about 1000 to 1300° C. when using a barium titanate (BaTiO 3 ) material. The firing may be performed in a reducing atmosphere or a low oxygen partial pressure atmosphere.

[0165] (Step S06: Forming External Electrodes)

[0166] In step S06, external electrodes 14 and 15 are formed at both ends of the ceramic body 11 obtained in step S05 in the X-axis direction, thereby producing Figures 1 to 3 The multilayer ceramic capacitor 10 shown in FIG. 1 is formed by applying a conductive paste to a ceramic body 11 and sintering the paste.

[0167] In step S06, Cu in the conductor paste diffuses into the internal electrodes 12 and 13 while reacting with Ni constituting the internal electrodes 12 and 13. However, as described above, in the ceramic body 11, the connection ends En of the internal electrodes 12 and 13 are not easily affected by the low melting point metal, so the diffusion of Cu near the connection ends En of the internal electrodes 12 and 13 can be suppressed, and the generation of cracks can be suppressed.

[0168] [Mounting of Multilayer Ceramic Capacitor 10]

[0169] Fig.12 1 is a side view of a circuit board 200 including a multilayer ceramic capacitor 10 of the present embodiment. The circuit board 200 has a mounting substrate 210 on which the multilayer ceramic capacitor 10 is mounted. The mounting substrate 210 has: a base material 211 extending along the XY plane and having a mounting surface G perpendicular to the Z axis; and a pair of connection electrodes 212 provided on the mounting surface G.

[0170] In the wiring board 200 , the external electrodes 14 and 15 of the multilayer ceramic capacitor 10 are connected to a pair of connection electrodes 212 of the mounting substrate 210 via solder H. Thus, in the wiring board 200 , the multilayer ceramic capacitor 10 is fixed to the mounting substrate 210 and electrically connected thereto.

[0171] Here, it is known that in the laminated ceramic capacitor 10, when the circuit board 200 is driven, if a voltage is applied to the external electrodes 14 and 15 via the connection electrodes 212 of the mounting substrate 210, electrostrain (electrostriction) is generated in the ceramic body 11 due to the piezoelectric effect. Among the electrostrain generated in the ceramic body 11, the internal electrodes 12 and 13 are deformed relatively greatly in the stacking direction.

[0172] In circuit board 200, since electro-induced deformation is repeatedly generated in multilayer ceramic capacitor 10 to which an AC voltage is applied, vibration in the thickness direction may occur in base material 211 of mounting substrate 210. In circuit board 200, when the vibration generated in base material 211 increases, a phenomenon called "howling" may occur in which noise is generated from base material 211.

[0173] In this regard, in the multilayer ceramic capacitor 10 of the present embodiment, there is an electrode non-existing region F outside the connection end En in the Y-axis direction. Since the piezoelectric effect is not generated in the electrode non-existing region F, the deformation amount of the ceramic body 11 caused by electro-induced deformation can be suppressed by increasing the size of the electrode non-existing region F in the X-axis direction. Therefore, in the present embodiment, howling in the circuit board 200 can be suppressed.

[0174] When the multilayer ceramic capacitor 10 is mounted on the mounting substrate 210 , it is prepared in a packaged state as the package body 300 . Fig.13 , Fig.14 It is a figure which shows the package 300. Fig.13 It is a partial plan view of the packaging body 300. Fig.14 It is along Fig.13 A cross-sectional view of the package body 300 taken along line CC'.

[0175] The package 300 includes a multilayer ceramic capacitor 10, a carrier tape 310, and a top tape 320. The carrier tape 310 is configured as a long strip extending in the Y-axis direction. In the carrier tape 310, a plurality of recesses 311 are arranged at intervals in the Y-axis direction, and each of the plurality of recesses 311 accommodates one multilayer ceramic capacitor 10.

[0176] Carrier tape 310 has a sealing surface P that faces upward and is perpendicular to the Z axis, and a plurality of recesses 311 are recessed downward in the Z axis direction from sealing surface P. That is, carrier tape 310 is configured so that multilayer ceramic capacitors 10 in recesses 311 can be taken out from sealing surface P side.

[0177] In the carrier tape 310, a plurality of feed holes 312 are arranged at intervals in the Y-axis direction and penetrate in the Z-axis direction at positions offset from the rows of the plurality of recesses 311 in the X-axis direction. The feed holes 312 are configured as engagement holes for the tape conveying mechanism to convey the carrier tape 310 in the Y-axis direction.

[0178] In package 300 , top tape 320 is attached to sealing surface P of carrier tape 310 along the row of recesses 311 , and recesses 311 containing multilayer ceramic capacitors 10 are collectively covered by top tape 320 . Thus, multilayer ceramic capacitors 10 are held in recesses 311 .

[0179] like Fig.14 As shown, regarding the laminated ceramic capacitor 10 in the recess 311 of the carrier tape 310, the first main surface M1 of the ceramic body 11 facing upward in the Z-axis direction faces the top tape 320. In addition, the second main surface M2 of the ceramic body 11 facing downward in the Z-axis direction faces the bottom surface of the recess 311.

[0180] When installing the multilayer ceramic capacitor 10 packaged as the package 300, the top tape 320 is peeled off from the sealing surface P of the carrier tape 310 in the Y-axis direction. Thus, in the package 300, the plurality of recesses 311 containing the plurality of multilayer ceramic capacitors 10 can be opened sequentially upward in the Z-axis direction.

[0181] The multilayer ceramic capacitor 10 accommodated in the open recess 110 is taken out in a state where the first main surface M1 of the ceramic body 11 facing upward in the Z-axis direction is adsorbed to the front end of the adsorption nozzle of the mounting device. Then, the mounting device moves the multilayer ceramic capacitor 10 to the mounting surface G of the mounting substrate 210 by moving the adsorption nozzle.

[0182] The mounting device releases the suction nozzle from the first main surface M1 of the ceramic body 11 while the second main surface M2 of the ceramic body 11 faces the mounting surface G and the external electrodes 14 and 15 are positioned on the pair of connection electrodes 212 coated with solder paste.

[0183] Then, the solder paste is melted and solidified in a reflow furnace or the like on the mounting substrate 210 with the multilayer ceramic capacitor 10 placed on the mounting surface G. Thus, the external electrodes 14 and 15 of the multilayer ceramic capacitor 10 are connected to the pair of connection electrodes 212 of the mounting substrate 210 via the solder H, thereby obtaining Fig.12 The circuit board 200 is shown.

[0184] <Second Embodiment>

[0185] The multilayer ceramic capacitor 10 of the second embodiment of the present invention is different from the multilayer ceramic capacitor 10 of the first embodiment only in the structure of the internal electrodes 12 and 13. Figure 1 In this embodiment, the same reference numerals are given to the same or corresponding structures as those in the first embodiment described above, and detailed descriptions thereof are omitted.

[0186] [Structure of Multilayer Ceramic Capacitor 10]

[0187] Figure 15 to Figure 19 FIG. 1 is a diagram showing a multilayer ceramic capacitor 10 according to a second embodiment of the present invention. Fig.15 The multilayer ceramic capacitor 10 is Figure 1 A longitudinal section view of the line B1-B1'.

[0188] Fig.16 The multilayer ceramic capacitor 10 is Figure 1 Cross-sectional view of the D1-D1' line. Fig.17 The figure shows the ceramic body 11 of the multilayer ceramic capacitor 10 partially exploded for each ceramic layer 19 . Fig.18 The multilayer ceramic capacitor 10 is Figure 1 Longitudinal section view of line B2-B2'. Fig.19 The multilayer ceramic capacitor 10 is Figure 1 The cross-sectional view of the D2-D2' line. In addition, Fig.17 Also shown is an edge portion 18 adjacent to the ceramic layer 19 .

[0189] In the capacitor forming portion 16 of the first embodiment, the stacking direction of the internal electrodes 12 and 13 is parallel to the Z axis, and the width direction of the internal electrodes 12 and 13 is parallel to the Y axis. In contrast, in the capacitor forming portion 16 of the present embodiment, the stacking direction is parallel to the Y axis, the extraction direction of the internal electrodes 12 and 13 is parallel to the X axis, and the width direction of the internal electrodes 12 and 13 is parallel to the Z axis.

[0190] The internal electrodes 12 and 13 of the capacitance forming portion 16 are formed in a sheet shape extending along the XZ plane, and are alternately stacked in the Y-axis direction with the ceramic layers 19. In the present embodiment, a pair of covering portions 17 covers the capacitance forming portion 16 in the Y-axis direction.

[0191] In this embodiment, the edge portion 18 is formed along the Y-axis direction and covers the laminated portion 20 from the Z-axis direction. The edge portion 18 contains a low melting point metal having a lower melting point than Ni which is the main component of the internal electrodes 12 and 13, similarly to the first embodiment.

[0192] like Fig.17As shown, in the present embodiment, in the internal electrodes 12 and 13, the width dimension D1 of the connection end En in the Z-axis direction is also smaller than the width dimension D2 of the central portion of the internal electrodes 12 and 13 in the Z-axis direction. As a result, the connection end En of the internal electrodes 12 and 13 is spaced apart from the edge portion 18, and an electrode non-existent region F is arranged between the end portion including the connection end En of the internal electrodes 12 and 13 and the edge portion 18. Therefore, the distribution of the low melting point metal near the connection end En can be suppressed, and the diffusion of Cu from the external electrodes 14 and 15 to the end portion of the internal electrodes 12 and 13 including the connection end En can be suppressed. As a result, in the ceramic body 11, the internal stress generated by the expansion of the internal electrodes 12 and 13 can be suppressed, and the generation of cracks in the corner C can be suppressed.

[0193] In addition, in this embodiment, since the stacking direction is parallel to the Y axis, the total stacking number of the internal electrodes 12 and 13 is reduced compared to the first embodiment in which the stacking direction is parallel to the Z axis. Therefore, in the ceramic body 11, the amount of expansion of the internal electrodes 12 and 13 in the Y axis direction accompanying the diffusion of Cu in the external electrodes 14 and 15 can be suppressed to be small as a whole. Therefore, in the ceramic body 11, the internal stress generated by the expansion of the internal electrodes 12 and 13 can be suppressed to be small, so the generation of cracks can be suppressed.

[0194] Furthermore, in the present embodiment, since the width direction of the internal electrodes 12 and 13 is parallel to the Z axis, the width dimension D1 of the connection end En along the Z axis direction can be made larger than that in the first embodiment. Therefore, the area of ​​the connection end En at the end faces E1 and E2 can be sufficiently ensured. Therefore, in the present embodiment, even if the width dimension D1 of the connection end En is made smaller than the width dimension D2 of the central portion of the internal electrodes 12 and 13, poor connection between the internal electrodes 12 and 13 and the external electrodes 14 and 15 can be suppressed. As a result, according to the present embodiment, a decrease in the electrostatic capacitance of the multilayer ceramic capacitor 10 caused by such poor connection can be suppressed.

[0195] [Method of Manufacturing Multilayer Ceramic Capacitor 10]

[0196] Hereinafter, a method for manufacturing the multilayer ceramic capacitor 10 according to the present embodiment will be described. The method for manufacturing the multilayer ceramic capacitor 10 according to the present embodiment is as follows: Figure 7 However, the manufacturing method of this embodiment is different from that of the first embodiment in the planar shape of the conductor pattern, the number of ceramic sheets stacked, and the like.

[0197] In step S01, Fig. 20A , Fig. 20B and Fig. 20CAs shown in the plan view of FIG. 1 , first and second ceramic sheets 101 and 102 for forming the capacitance forming portion 16 and a third ceramic sheet 103 for forming the covering portion 17 are prepared.

[0198] like Fig. 20A , Fig. 20B and Fig. 20C As shown in FIG. 1 , the ceramic sheets 101, 102, and 103 of this embodiment extend not along the XY plane but along the XZ plane. Therefore, the ceramic sheets 101, 102, and 103 of this embodiment are configured such that Fig. 8A , Figure 8B and Figure 8C The shape of each ceramic sheet shown is stretched in the Y-axis direction as a whole. Fig. 8A , Figure 8B and Figure 8C The Y axis in FIG. 1 is changed to the Z axis. The cutting lines when individualizing the multilayer ceramic capacitors 10 are formed by first cutting lines Lx parallel to the X axis and second cutting lines Lz parallel to the Z axis.

[0199] Next, in step S02, Fig.21 As shown, the laminated sheet 104 is manufactured by laminating and pressing ceramic sheets 101, 102, 103 in the Y-axis direction. The number of laminated ceramic sheets 101, 102, 103 is appropriately set according to the Y-axis dimension of the ceramic body 11, and is typically set smaller than that in the first embodiment.

[0200] Next, in step S03 , the laminated sheet 104 obtained in step S02 is cut along cutting lines Lx and Lz to obtain unfired laminated small pieces 120 .

[0201] Next, in step S04, an unfired edge portion 118 is formed on a cut surface 120s perpendicular to the Z axis of the stacked small piece 120 obtained in step S03. In this way, an unfired ceramic body 11 is produced.

[0202] Then, the same step S05 (firing) as in the first embodiment is performed, and in the same step S6 (external electrode formation) as in the first embodiment, external electrodes 14 and 15 are formed at both ends of the ceramic body 11 in the X-axis direction, thereby producing Figure 15 to Figure 19 A stacked ceramic capacitor 10 is shown.

[0203] Here, in the ceramic body 11 of the present embodiment, since the stacking direction is parallel to the Y axis, it is possible to have a structure in which the main surfaces M1 and M2 have a higher flatness than the side surfaces S1 and S2 as described below.

[0204] The side surfaces S1 and S2 are formed by surfaces that are substantially perpendicular to the Y-axis of the laminate 104. Fig. 20A , Fig. 20B , Fig. 20C As shown, the ceramic sheets 101 and 102 have areas where the conductor patterns 112 and 113 are not formed in a part. Therefore, the surface of the laminated sheet 104 on which these are laminated, which is substantially perpendicular to the Y axis, is likely to have height differences and undulations caused by the thickness of the conductor patterns 112 and 113. That is, the flatness of the side surfaces S1 and S2 is likely to be reduced.

[0205] On the other hand, the main surfaces M1 and M2 are formed by the edge portion 18. In the present embodiment, the edge portion 18 is formed by attaching a ceramic sheet 118s to a cut surface 120s of the stacked small piece 120 that is substantially perpendicular to the Z axis. Since it is difficult to form a height difference or undulation on the cut surface 120s and the ceramic sheet 118s, the main surfaces M1 and M2 can be made flatter than the side surfaces S1 and S2.

[0206] Reference Fig.12 , the main surfaces M1 and M2 are opposite to the mounting substrate 210 when mounted on the mounting substrate 210. Therefore, by making the main surfaces M1 and M2 have high flatness, the posture of the multilayer ceramic capacitor 10 on the mounting substrate 210 can be stabilized. As a result, the multilayer ceramic capacitor 10 is a high-height type with a high center of gravity, and can be suppressed from tilting on the mounting substrate 210. By suppressing the tilt of the multilayer ceramic capacitor 10, the contact between the multilayer ceramic capacitor 10 and the adjacent electronic components is suppressed, and defects such as short circuits can be suppressed.

[0207] In addition, by making the main surfaces M1 and M2 have high flatness, Fig.14 , the multilayer ceramic capacitor 10 can be easily sucked from the package 300 including the multilayer ceramic capacitor 10 by a chip mounter for mounting.

[0208] If there is a height difference or undulation on the first main surface M1, it is difficult for the suction nozzle of the chip mounter to stably suck the first main surface M1. In contrast, in the present embodiment, the main surfaces M1 and M2 have high flatness, so that the suction nozzle can stably suck the first main surface M1. Therefore, in the multilayer ceramic capacitor 10, poor suction during mounting can be effectively suppressed.

[0209] In addition, the flatness of each surface can be compared as follows. Fig.22A The cross-sectional view of exemplifies an example in which the first principal surface M1 is a surface to be measured. Fig. 22B The cross-sectional view shows an example in which the first side surface S1 is a measurement target surface.

[0210] First, if Fig.22AAs shown, a cross section perpendicular to the first principal surface M1 and parallel to the XZ plane that bisects the first principal surface M1 is exposed. In addition, in this cross section, a first imaginary line L1 that passes through the center point C1 of the first principal surface M1 in the X-axis direction and is parallel to the X-axis direction, and a second imaginary line L2 that is parallel to the first imaginary line L1 and has an interval of 1% (T*0.01) of the dimension T in the Z-axis direction of the ceramic body 11 are defined. In addition, the distance between the two points where the second imaginary line L2 intersects the first principal surface M1 is measured as the dimension D3 of the flat area of ​​the first principal surface M1. In addition, the dimension D3 of the second principal surface M2 is measured in the same manner.

[0211] In addition, if Fig. 22B As shown, a cross section perpendicular to the first side surface S1 and parallel to the XY plane that bisects the first side surface S1 is exposed. And, in this cross section, a third imaginary line L3 passing through the center point C2 of the first side surface S1 in the X-axis direction and parallel to the X-axis direction, and a fourth imaginary line L4 parallel to the third imaginary line L3 and having an interval of 1% (T*0.01) of the dimension T in the Z-axis direction of the ceramic body 11 are defined. And, the distance between the two points where the fourth imaginary line L4 intersects the first side surface S1 is measured as the dimension D4 of the flat area of ​​the first side surface S1. In addition, the dimension D4 of the second side surface S2 is measured in the same manner.

[0212] Then, the average value of the dimension D3 of the main surfaces M1 and M2 and the average value of the dimension D4 of the side surfaces S1 and S2 are calculated for five or more multilayer ceramic capacitors 10. The calculated average value of the dimension D3 is compared with the average value of the dimension D4. When the average value of the dimension D3 is larger than the average value of the dimension D4, it can be determined that the main surfaces M1 and M2 have a higher flatness than the side surfaces S1 and S2.

[0213] Furthermore, as described below, multilayer ceramic capacitor 10 according to the present embodiment can effectively suppress howling in circuit board 200 .

[0214] In the laminated ceramic capacitor 10 of the present embodiment, the stacking direction of the internal electrodes 12 and 13 is in the in-plane direction of the substrate 211, so it is not easy to generate vibration in the substrate 211 due to the electro-strain of the ceramic body 11. In addition, the ceramic body 11 of the present embodiment not only has the electrode non-existent region F as in the first embodiment, but also can reduce the number of stacking of the internal electrodes 12 and 13. Therefore, in the present embodiment, in the ceramic body 11, the deformation amount caused by the electro-strain can be suppressed to a smaller extent, and the howling in the circuit board 200 can be suppressed more effectively.

[0215] <Example>

[0216] As Example 1 of the present invention, a sample of the laminated ceramic capacitor 10 of the first embodiment described above was produced. In addition, as Example 2 of the present invention, a sample of the laminated ceramic capacitor 10 of the second embodiment described above was produced. As a comparative example of the present invention, a sample of a laminated ceramic capacitor was produced in which the stacking direction of the internal electrodes 12 and 13 was parallel to the Z axis and the width dimension of each internal electrode 12 and 13 in the Y axis direction was constant along the X axis direction. 100 samples of each of Examples 1 and 2 and the comparative example were produced.

[0217] As Example 3 of the present invention, a sample of the laminated ceramic capacitor 10 of the first embodiment described above was produced. Also, as Example 4 of the present invention, a sample of the laminated ceramic capacitor 10 of the second embodiment described above was produced. 100 samples of each of Examples 3 and 4 were produced.

[0218] In the samples of Examples 1, 2 and the comparative example, the dimension L in the X-axis direction is 0.6 mm, the dimension W in the Y-axis direction is 0.3 mm, and the dimension T in the Z-axis direction is 0.5 mm. In addition, in the samples of Examples 1, 2 and the comparative example, the thickness of each cover portion 17 is 25 μm, the thickness of each edge portion 18 is 25 μm, and the thickness of each internal electrode 12, 13 and each ceramic layer 19 is 0.5 μm.

[0219] In the samples of Examples 3 and 4, the dimension L in the X-axis direction is 0.6 mm, the dimension W in the Y-axis direction is 0.3 mm, and the dimension T in the Z-axis direction is 0.4 mm. In addition, in the samples of Examples 3 and 4, the thickness of each cover portion 17 is 25 μm, the thickness of each edge portion 18 is 25 μm, and the thickness of each internal electrode 12, 13 and each ceramic layer 19 is 0.5 μm.

[0220] In the sample of Example 1, the width dimension D2 of the central portion in the X-axis direction is set to 0.25 mm, the width dimension D1 of the connection end En is set to 0.15 mm, and the dimension in the X-axis direction of the end portion (electrode non-existent region F) including the connection end En is set to 25 μm. In addition, in the sample of Example 1, the total number of layers of the internal electrodes 12 and 13 is set to 450.

[0221] In the internal electrodes 12 and 13 of the sample of Example 2, the width dimension D2 of the central portion in the X-axis direction is set to 0.45 mm, the width dimension D1 of the connection end En is set to 0.30 mm, and the dimension in the X-axis direction of the end portion (electrode non-existent region F) including the connection end En is set to 25 μm. In addition, in the sample of Example 2, the total number of layers of the internal electrodes 12 and 13 is set to 250.

[0222] In the sample of the comparative example, the width dimension of the internal electrodes 12 and 13 was set to 0.25 mm, and the total number of stacked layers of the internal electrodes 12 and 13 was set to 450.

[0223] In the internal electrodes 12 and 13 of the sample of Example 3, the width dimension D2 of the central portion in the X-axis direction is set to 0.25 mm, the width dimension D1 of the connection end En is set to 0.15 mm, and the dimension in the X-axis direction of the end portion (electrode non-existent region F) including the connection end En is set to 25 μm. In addition, in the sample of Example 1, the total number of layers of the internal electrodes 12 and 13 is set to 350.

[0224] In the internal electrodes 12 and 13 of the sample of Example 4, the width dimension D2 of the central portion in the X-axis direction is set to 0.35 mm, the width dimension D1 of the connection end En is set to 0.25 mm, and the dimension in the X-axis direction of the end portion (electrode non-existent region F) including the connection end En is set to 25 μm. In addition, in the sample of Example 2, the total number of layers of the internal electrodes 12 and 13 is set to 250.

[0225] In the samples of Examples 1 and 2 and the comparative example, a low melting point metal having a melting point lower than Ni is added to the ceramic sheet 118s constituting the edge portion 18. In addition, no low melting point metal is added to the ceramic sheets 101, 102, 103 constituting the laminated portion 20.

[0226] In the samples of Examples 3 and 4, a low melting point metal having a melting point lower than Ni is added to the ceramic sheet 118s constituting the edge portion 18. In addition, no low melting point metal is added to the ceramic sheets 101, 102, and 103 constituting the laminated portion 20.

[0227] For Examples 1, 2, and the comparative example, 100 samples were prepared, and the internal cross-section of the portion covered by the external electrodes 14 and 15 was observed. As a result, no cracks were confirmed in the samples of Examples 1 and 2. On the other hand, in the sample of the comparative example, cracks were confirmed in at least one of the corners C. It can be seen that the samples of Examples 1 and 2 can suppress cracks compared to the sample of the comparative example.

[0228] Regarding Examples 3 and 4, 100 samples were prepared, and the internal cross-section of the portion covered by the external electrodes 14 and 15 was observed. As a result, no cracks were confirmed in the samples of Examples 3 and 4. This shows that the samples of Examples 3 and 4 can suppress cracks compared to the sample of the comparative example.

[0229] For the samples of Examples 1 and 2 and the comparative example, a reliability test was performed in which a DC voltage of 10V was applied in an environment of 105°C. Among the samples of the comparative example, there were samples that reached insulation breakdown in less than 500 hours, but for the samples of Examples 1 and 2, there were no samples that reached insulation breakdown in less than 500 hours. It can be seen that the samples of Examples 1 and 2 can suppress insulation failure compared with the samples of the comparative example.

[0230] The samples of Examples 3 and 4 were subjected to a reliability test in which a DC voltage of 10 V was applied in an environment of 105° C. No sample of Examples 3 and 4 reached insulation breakdown in less than 500 hours. It can be seen that the samples of Examples 3 and 4 can suppress insulation failure compared to the samples of the comparative examples.

[0231] In addition, the electrostatic capacitance was measured under the conditions of 1kHz·0.5Vrms for 100 samples of each of Examples 1 and 2. Furthermore, the maximum and minimum values ​​relative to the average value of the electrostatic capacitance were calculated for Examples 1 and 2, respectively, and it was confirmed whether the maximum and minimum values ​​were within ±5% relative to the average value. In Example 2, the maximum and minimum values ​​of the electrostatic capacitance were within ±5% of the average value. On the other hand, in Example 1, although the maximum and minimum values ​​of the electrostatic capacitance did not converge within ±5%.

[0232] From this result, it is found that the sample of Example 2 can suppress the variation of electrostatic capacitance compared with the sample of Example 1. The reason for this is presumably that in the sample of Example 2, the connection failure between the external electrodes 14 and 15 and the internal electrodes 12 and 13 is suppressed.

[0233] For 100 samples of each of Examples 3 and 4, the electrostatic capacitance was measured under the conditions of 1kHz·0.5Vrms. In addition, for Examples 3 and 4, the maximum and minimum values ​​relative to the average value of the electrostatic capacitance were calculated, and it was confirmed whether the maximum and minimum values ​​were within ±5% relative to the average value. In Example 4, the maximum and minimum values ​​of the electrostatic capacitance were within ±5% of the average value. On the other hand, in Example 3, although the maximum and minimum values ​​of the electrostatic capacitance did not converge within ±5%.

[0234] From this result, it is found that the sample of Example 4 can suppress the variation of electrostatic capacitance compared with the sample of Example 3. The reason for this is presumably that in the sample of Example 4, the connection failure between the external electrodes 14 and 15 and the internal electrodes 12 and 13 is suppressed.

[0235] As an important factor causing the poor connection between the external electrodes 14 and 15 and the internal electrodes 12 and 13, the area of ​​the connection end En of the internal electrodes 12 and 13 on the end faces E1 and E2 can be cited. For example, in the internal electrodes 12 and 13 of Example 2, the thickness is 0.5 μm, and the width of the connection end En is 300 μm. Therefore, the area is 150 μm obtained by multiplying these two. 2 On the other hand, in the internal electrodes 12 and 13 of the first embodiment, the thickness is 0.5 μm, and the width of the connection end En is 150 μm. Therefore, the area is 75 μm obtained by multiplying these two. 2 .

[0236] As described above, in the sample of Example 2, the area of ​​the connection end En of the internal electrodes 12 and 13 exposed at the end faces E1 and E2 is increased by two times compared to the sample of Example 1, and the connection end En is easily and stably connected to the external electrodes 14 and 15. As a result, it is inferred that in the sample of Example 2, the variation of the electrostatic capacitance is suppressed compared to the sample of Example 1.

[0237] In the embodiment 4, the internal electrodes 12 and 13 have a thickness of 0.5 μm and a width of the connection end En of 250 μm. Therefore, the area is 125 μm obtained by multiplying these two. 2 On the other hand, in the internal electrodes 12 and 13 of the third embodiment, the thickness is 0.5 μm, and the width of the connection end En is 150 μm. Therefore, the area is 75 μm obtained by multiplying these two. 2 .

[0238] As described above, in the sample of Example 4, the area of ​​the connection end En of the internal electrodes 12 and 13 exposed at the end faces E1 and E2 is increased by 1.6 times compared with the sample of Example 3, and the connection end En is easily and stably connected to the external electrodes 14 and 15. As a result, it is inferred that in the sample of Example 4, the variation of the electrostatic capacitance is suppressed compared with the sample of Example 3.

[0239] <Other Implementation Methods>

[0240] As mentioned above, although embodiment of this invention was described, this invention is not limited to the said embodiment, It is a matter of course that various changes can be added.

[0241] For example, the shape of the electrode non-existing region F in the internal electrodes 12 and 13 can be changed within the scope of achieving the effect of the present invention. For example, the electrode non-existing region F in the internal electrodes 12 and 13 may also have a contour including a curve. In addition, the shape of the electrode non-existing region F in the internal electrodes 12 and 13 may also be different.

[0242] In addition, in the multilayer ceramic capacitor 10, the first main surface M1 and the second main surface M2 of the ceramic body 11 may be reversed. Fig.12 The circuit board 200 and Fig.14 In the ceramic body 11 of the multilayer ceramic capacitor 10 in the package 300 shown, the first principal surface M1 may face downward in the Z-axis direction, and the second principal surface M2 may face upward in the Z-axis direction.

[0243] Description of Reference Numerals

[0244] 10…Multilayer ceramic capacitors

[0245] 11…Ceramic body

[0246] 12, 13…Internal electrodes

[0247] 14, 15…External electrodes

[0248] 16…Capacitor forming part

[0249] 17… Covering

[0250] 18…Edge

[0251] 19…Ceramic layer

[0252] 20…Lamination

[0253] 200…Circuit Board

[0254] 300…Packaging

[0255] M1, M2…main surface

[0256] E1, E2…end face

[0257] S1, S2…side

[0258] En…Connection

[0259] F…Electrode does not exist area.

Claims

1. A laminated ceramic capacitor, characterized in that: The dimension in the first axis direction is 1.5 times or more of the dimension in the second axis direction perpendicular to the first axis, and the multilayer ceramic capacitor can be mounted on a mounting surface perpendicular to the first axis. The stacked ceramic capacitor comprises: a ceramic body having a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis orthogonal to the first axis and the second axis; and a pair of external electrodes mainly composed of Cu and covering the pair of end faces, The ceramic body also has: a stacked portion having Ni as a main component, alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis, and having a plurality of internal electrodes led out to connection ends on the end surface; and a pair of edge portions formed along the stacking direction, covering the stacking portion from a width direction of the internal electrode orthogonal to the stacking direction and the third axis, and containing a low melting point metal having a lower melting point than Ni, In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

2. The multilayer ceramic capacitor according to claim 1, wherein: The low melting point metal is at least any one of Sn, Zn, Al, Ga, Ge, and Ag.

3. The multilayer ceramic capacitor according to claim 1, wherein: The width dimension of the connection end is not less than 1 / 2 and not more than 3 / 4 of the width dimension of the central portion.

4. The multilayer ceramic capacitor according to any one of claims 1 to 3, wherein: The stacking direction is parallel to the second axis, The width direction of the internal electrode is parallel to the first axis.

5. The multilayer ceramic capacitor according to claim 4, wherein: The main surface has a higher flatness than the side surface.

6. A packaging body, characterized in that: include: The laminated ceramic capacitor according to claim 1; a carrier tape having a sealing surface perpendicular to the first axis and a recessed portion recessed from the sealing surface in the direction of the first axis and accommodating the multilayer ceramic capacitor; and A top tape is adhered to the sealing surface and covers the recessed portion.

7. A circuit board, characterized in that: include: The multilayer ceramic capacitor according to claim 1; and The mounting substrate includes the mounting surface and a pair of connection electrodes provided on the mounting surface, wherein the pair of connection electrodes are connected to the pair of external electrodes of the multilayer ceramic capacitor via solder.

8. A laminated ceramic capacitor, characterized in that: The dimension in the first axis direction is 1.3 times or more of the dimension in the second axis direction perpendicular to the first axis, and the multilayer ceramic capacitor can be mounted on a mounting surface perpendicular to the first axis. The stacked ceramic capacitor comprises: a ceramic body having a pair of main surfaces perpendicular to the first axis, a pair of side surfaces perpendicular to the second axis, and a pair of end surfaces perpendicular to a third axis orthogonal to the first axis and the second axis; and a pair of external electrodes mainly composed of Cu and covering the pair of end faces, The ceramic body also has: a stacked portion having Ni as a main component, alternately stacked with ceramic layers along a stacking direction parallel to the first axis or the second axis, and having a plurality of internal electrodes led out to connection ends on the end surface; and a pair of edge portions formed along the stacking direction, covering the stacking portion from a width direction of the internal electrode orthogonal to the stacking direction and the third axis, and containing a low melting point metal having a lower melting point than Ni, In the internal electrode, a width dimension of the connection end in the width direction is smaller than a width dimension of a central portion in the third axis direction in the width direction.

9. The multilayer ceramic capacitor according to claim 8, wherein: The low melting point metal is at least any one of Sn, Zn, Al, Ga, Ge, and Ag.

10. The multilayer ceramic capacitor according to claim 8, wherein: The width dimension of the connection end is not less than 1 / 2 and not more than 3 / 4 of the width dimension of the central portion.

11. The multilayer ceramic capacitor according to any one of claims 8 to 10, wherein: The stacking direction is parallel to the second axis, The width direction of the internal electrode is parallel to the first axis.

12. The multilayer ceramic capacitor according to claim 11, wherein: The main surface has a higher flatness than the side surface.

13. A packaging body, characterized in that: include: The laminated ceramic capacitor according to claim 8; a carrier tape having a sealing surface perpendicular to the first axis and a recessed portion recessed from the sealing surface in the direction of the first axis and accommodating the multilayer ceramic capacitor; and A top tape is adhered to the sealing surface and covers the recessed portion.

14. A circuit board, characterized in that: include: The laminated ceramic capacitor according to claim 8; and The mounting substrate includes the mounting surface and a pair of connection electrodes provided on the mounting surface, wherein the pair of connection electrodes are connected to the pair of external electrodes of the multilayer ceramic capacitor via solder.

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