Band-gap reference circuit with second-order temperature compensation and high power supply rejection ratio

Abstract

The invention discloses a band-gap reference circuit with a second-order temperature compensation and a high power supply rejection ratio in the technical field of semiconductor circuits. The band-gap reference circuit comprises a starting circuit which is used for providing a bias current when the circuit is started and preventing the circuit from working at a stable working point where the current of positive and negative feedback branches at the input end of an operational amplifier circuit is zero; the operational amplifier circuit is used for clamping, and the voltages of the two input ends of the operational amplifier are approximately equal by utilizing the virtual short characteristic; the second-order temperature compensation circuit is used for compensating linear and non-linear terms in base-emitter voltage of the bipolar transistor and reducing the temperature drift of the band-gap reference circuit; the reference voltage output circuit is used for outputting reference voltage, providing a stable and accurate reference voltage source and meanwhile participating in control over starting current generated by the starting circuit. The circuit is innovative and efficient, stable reference voltage with small temperature excursion can be provided, and meanwhile the circuit has a large voltage input range, a high power supply rejection ratio and a reliable starting circuit.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductor circuits, and in particular is a bandgap reference circuit with a high power supply rejection ratio and second-order temperature compensation. Background Art

[0002] The bandgap reference circuit is a circuit used to generate a stable reference voltage. This circuit uses an internal mechanism to perform weighted addition of a voltage with a positive temperature coefficient and a voltage with a negative temperature coefficient, so that the temperature coefficient of the output voltage is close to zero, thereby outputting a stable voltage that is almost unaffected by temperature changes. For example, the base-emitter voltage V BE It is negatively correlated with temperature and has a negative temperature coefficient, while the thermal voltage V T It is a positive temperature coefficient. By offsetting the two in a certain proportion, a voltage with almost zero temperature coefficient can be obtained.

[0003] The traditional bandgap reference circuit uses first-order low-temperature compensation, that is, only the V BE The linear part of the reference power supply is compensated. This compensation can basically meet the needs when the chip working environment is not complicated. However, when the temperature requirement is high, there will be a large temperature drift problem, which requires improving the temperature characteristics of the reference power supply. BE The relationship with temperature is not linear, it contains nonlinear terms, so if the nonlinear terms are further compensated for by second-order temperature, the temperature characteristics of the reference power supply can be further improved.

[0004] Therefore, it is necessary to propose a bandgap reference circuit which can perform second-order low-temperature compensation on the bandgap reference circuit and output a sufficiently stable voltage and has a high power supply rejection ratio and second-order temperature compensation. Summary of the invention

[0005] In order to solve the above problems, the purpose of the present invention is to provide a bandgap reference circuit with a high power supply rejection ratio and second-order temperature compensation, which not only provides a stable voltage reference with a certain absolute accuracy and a small temperature drift coefficient, but also has a larger input voltage range and a high power supply rejection ratio as well as a reliable startup circuit.

[0006] In order to achieve the above object, the technical solution of the present invention is as follows:

[0007] A bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation, characterized in that it includes a startup circuit, an operational amplifier circuit, a second-order temperature compensation circuit and a reference voltage output circuit;

[0008] The startup circuit is electrically connected to the operational amplifier circuit. The startup circuit is used to provide a bias current when the circuit is started, so as to prevent the circuit from operating at a stable operating point where the positive and negative feedback branch currents at the input end of the operational amplifier circuit are both 0, thereby helping the circuit to smoothly enter a normal working state.

[0009] The operational amplifier circuit is electrically connected to the second-order temperature compensation circuit and the second current mirror circuit. The operational amplifier circuit is used to clamp the voltage and make the voltages at two input terminals of the operational amplifier approximately equal by using its virtual short characteristic.

[0010] The second-order temperature compensation circuit is electrically connected to the reference voltage output circuit and is used to compensate for linear and nonlinear terms in the base-emitter voltage of the bipolar transistor, reduce the temperature drift of the bandgap reference circuit, and improve the accuracy of the reference voltage;

[0011] The output terminal of the reference voltage output circuit is VBG. The output terminal VBG is used to output the reference voltage, provide a stable and accurate reference voltage source, and participate in controlling the flow direction of the startup current generated by the startup circuit.

[0012] The principle of the basic scheme is: the startup circuit is composed of MP0-MP8, MN0, MN1, MN8, R0 and C0; the operational amplifier circuit is composed of MP9-MP 16 , MN2-MN7 and C1; the second-order temperature compensation circuit is composed of MP 17 -MP 25 , R1-R5, Q0-Q2; the output reference voltage circuit is composed of MP 26 -MP 28 , R6 and C2.

[0013] The beneficial effects of the basic scheme are: 1. By introducing a second-order temperature compensation circuit, the bandgap reference circuit of the present invention can output a reference voltage with extremely small temperature drift in an operating environment of -40°C to 125°C, so that the reference voltage can maintain high stability and accuracy at the operating temperature.

[0014] 2. The design of the operational amplifier circuit is not only used to clamp the input signal, but also to adjust the appropriate gain and bandwidth so that the circuit has a high power supply rejection ratio (PSRR), that is, the circuit's ability to suppress changes in power supply voltage. This helps to reduce the impact of power supply voltage fluctuations on the reference voltage, thereby improving the stability and reliability of the entire circuit.

[0015] 3. The circuit structure of the present invention allows operation within a wider input voltage range, which is of great significance for the adaptability of the power supply in different application scenarios. At the same time, the circuit can maintain stable performance even in an environment where the input voltage is not very stable.

[0016] 4. The design of the startup circuit ensures that the circuit will not operate at the stable operating point when the positive and negative feedback branch currents are 0. This is crucial to prevent the circuit from falling into a deadlock state or failing to work properly during operation.

[0017] 5. By comprehensively applying first-order and second-order temperature compensation techniques, the bandgap reference circuit of the present invention can provide a reference voltage with high precision and low temperature drift, which is a significant advantage for electronic systems that require high precision and low temperature drift.

[0018] Furthermore, the startup circuit also includes a startup current generating circuit and a first current mirror circuit. The startup current generating circuit is used to receive the change of the enable signal to generate a startup current, and to control the direction of the startup current flow through a reference voltage output from the reference voltage output circuit. The first current mirror circuit is used to proportionally replicate the startup current input into the operational amplifier circuit.

[0019] The beneficial effect of the basic scheme is that the startup current generating circuit includes PMOS transistors MP0-MP5 connected in series with the gate controlled by the enable signal PD, R0 connected in series with the drain of MP5, and NMOS transistors MN0, MN1 and MN2 connected in series with the gate controlled by the output signal VBG. O The source is connected in series with R0; the first current mirror circuit includes MN1 whose gate is electrically connected to the source of MN0, a PMOS tube MP7 whose gate is electrically connected to the PD signal, a drain of MP7 electrically connected to the source of MN1, MP6 connected in series with the source of MP7, MP8 whose gate is electrically connected to the gate of MP6, MP9 and MP8 connected in series with the source and drain of MP8. 10 in parallel.

[0020] 1. In the startup current generating circuit, the MP0-MP5 PMOS tubes are connected in the form of diodes. Through multiple PMOS tubes, they can quickly respond to the control of the enable signal PD and flip, thereby accelerating the startup process of the circuit. When MP0-MP5 is turned on by the enable signal, a voltage difference is generated across R0, thereby generating a startup current. This fast response mechanism is particularly important for application scenarios that require fast startup.

[0021] 2. If the circuit is not at the working point where the positive and negative feedback branch current is 0, VBG will output normally at this time; if it is, when the startup circuit works, VBG will rise from a low level to the designed output voltage. The bandgap design is about 1.2V, which is greater than the threshold voltage V of MN0. TN Both situations will eventually turn on MN0. At this time, the startup current will directly pass through MN0 to the ground and no longer flow through MN1. The startup circuit will no longer affect the subsequent circuits. If the set VBG is less than V TN , the startup circuit needs to be adjusted accordingly, such as using a resistor divider at the output to generate a voltage higher than the V of the NMOS tube in the process library used.TN A large voltage replaces the control signal VBG here, or replaces the startup circuit. This mechanism can ensure that the startup circuit will not affect the operation of subsequent circuits after completing the work, so as to protect the normal working state of subsequent circuits.

[0022] 3. The first current mirror circuit can mirror the startup current and input it into the operational amplifier circuit. This current replication mechanism ensures that the operational amplifier circuit can receive a current proportional to the startup current that is sufficient for the subsequent circuit to operate normally, thereby improving the reliability of the circuit operation.

[0023] 4. After the startup circuit is turned on, there will always be a voltage difference across R0, that is, there will always be a startup current. The current mirror circuit can copy the current in proportion, which can increase R0 to reduce the startup current and then copy enough current for the subsequent circuit to work normally. When the subsequent copy circuit is turned off, it will not increase too much power consumption. This is an important advantage for low-power applications.

[0024] Furthermore, a capacitor C0 is connected in parallel to NM0 whose gate is controlled by the output signal VBG.

[0025] The beneficial effect of the basic solution is that the source and drain of MN0 are connected in parallel with capacitor C0 to avoid sudden startup of the circuit and V BG Normal output causes the circuit to oscillate or even jump transiently.

[0026] Furthermore, the operational amplifier circuit uses PMOS as a cascode structure operational amplifier with an input differential pair.

[0027] The beneficial effect of the basic solution is that the operational amplifier circuit includes MP9 and MP8 connected in parallel with the MOS tube MP9. 10 , MP9 gate and MP 11 The gate electrical connections, MP9 and MP 11 The source of MP is electrically connected to the input voltage VDD. 11 Drain and MP 12 Source series, MP 12 Gate and MP 10 Gate electrical connection, MP 10 The drain is connected in series with MN2 and MN3. The gates of MN2 and MN3 are electrically connected to their own sources. The drain of MN3 is electrically connected to the drain of MN5 and to GND. 12 The drain of MP 13 and MP 14 The source of MP 13 The gate receives the input signal IN1, MP 14 The gate of MN5 receives the input signal IN2, and the source of MN5 is connected in series with MN4 and MP15 , and MN5 and MN7, MN4 and MN6, MP 15 and MP 16 The gates of MN7 are electrically connected to the drain of MN5, and the drain of MN7 is electrically connected to MN6 and MP 16 Series, MP 16 The source and MP 15 Source electrical connection, MP 13 The drain of MP is electrically connected to the drain of MN4. 14 The drain of MN is electrically connected to the drain of MN6, the source of MN3 is electrically connected to the gate of MN5, the source of MN2 is electrically connected to the gate of MN4, and MP 15 The drain and MP 15 The gate is electrically connected.

[0028] 1. This structure can effectively increase the output impedance of the circuit by adding additional transistor stages. The increase in output impedance means that the circuit is less sensitive to power supply voltage fluctuations, thereby improving the power supply rejection ratio.

[0029] 2. The use of Cascode structure can make the DC matching of the circuit better, which helps to reduce the noise and interference caused by circuit mismatch.

[0030] 3. The transistor cascade method in the cascode structure can reduce the impact of power supply voltage fluctuations on the core part of the circuit. Through reasonable circuit design, the power supply noise can be effectively attenuated during the transmission process.

[0031] 4. The use of PMOS input differential pairs can reduce 1 / f noise and is suitable for low input common mode conditions. The Cascode structure amplifier has a wide common mode input range and a large output voltage swing.

[0032] Furthermore, a capacitor C1 is connected in parallel to the output end of the operational amplifier circuit.

[0033] The beneficial effect of the basic solution is that a capacitor C1 is connected in parallel to the source of MN6 and the drain of MN7.

[0034] The function of capacitor C1 is mainly to compensate the output phase. In addition, 1. When the operational amplifier works in the high frequency band, the circuit may oscillate or become unstable due to the influence of internal parasitic capacitance and inductance. The parallel capacitor C1 can provide an additional phase lag, thereby offsetting the phase advance caused by parasitic elements, making the overall phase response of the circuit flatter and helping to improve the stability of the circuit.

[0035] 2. Phase margin is an important indicator of circuit stability. It indicates the phase difference between the input signal and the output signal before the circuit reaches the critical stable state. By using the parallel capacitor C1 for phase compensation, the phase margin of the circuit can be increased, making the circuit further away from the oscillation point, thereby improving the circuit's anti-interference ability and stability.

[0036] 3. The frequency response of an operational amplifier is usually affected by its internal parasitic elements, resulting in high-frequency gain reduction and phase distortion. The parallel capacitor C1 can form a high-frequency bypass channel, allowing high-frequency signals to pass more through the capacitor rather than the internal parasitic elements of the operational amplifier, thereby improving the high-frequency response and phase characteristics of the circuit.

[0037] Furthermore, the base-emitter voltage V of the bipolar transistors Q0 and Q2 during the second-order temperature compensation circuit is BE0 and V BE2 The expressions are:

[0038] V BE0 =V G0 -β0K0-(η-α0)V T ln

[0039] V BEh =V Gh -β h K h -(η-α h )V T LqCy h

[0040] Where V G is the bandgap voltage of silicon at absolute temperature; β is V G Subtract the residual value of the base-emitter voltage at the reference temperature; K is the ratio of the absolute temperature to the reference temperature; η is a process-related constant; α is a quantity related to the current flowing through the transistor. When a current proportional to the temperature flows through the transistor, α is 1, and when a current unrelated to the temperature flows through the transistor, α is 0. Here, α0 is 1 and α2 is 0; V T is the thermal voltage.

[0041] The beneficial effect of the basic scheme is: the second-order temperature compensation circuit includes a MOS tube MP connected in series 17 、MP 18 and MP 19 , M.P. 17 、MP 18 and MP 19 The gates of MP 20 、MP 21 and MP 22 The gate electrical connection, MP 17 The source and MP20 The source is electrically connected to the MP 16 The source of the electrical connection, MP 17 The gate of is electrically connected to the gate of MP9, and MP 18 The gate and MP 10 The gate electrical connection, MP 19 The source and MP 10 The gate electrical connection, MP 19 The drain of the bipolar transistor Q0 is electrically connected to the emitter base, the base of Q0 is electrically connected to the base of Q1 and is electrically connected to the collectors of Q0 and Q1, the emitter base and collector of Q0 are connected in parallel with the resistor R1, the emitter of Q1 is electrically connected to R2, R2 and the collector of Q1 are connected in parallel with R3, MP 22 The drain of Q1 is electrically connected to R2, and R1 and R2 have the same resistance value. The collector of Q1 is electrically connected to the collector and base of Q2. The emitter of Q2 is electrically connected to R5 and R4. R5 is electrically connected to MP 22 The drain is electrically connected to R4 and MP 19 The drain of is electrically connected, and the resistance of R4 and R5 is the same.

[0042] The base-emitter voltage V of a bipolar transistor is known. BE The relationship with temperature is:

[0043]

[0044] Where, V G is the bandgap voltage of silicon at absolute temperature, T is the absolute temperature, T0 is the reference temperature, η is the process-related constant, α is the collector temperature index, V T is the thermal voltage. G -V BE (T0))](T / T0) is a linear term, (η-α)V T ln(T / T0) is a nonlinear term.

[0045] The base-emitter voltage V of bipolar transistors Q0 and Q2 during second-order temperature compensation BE0 and V BE2 The expressions are:

[0046] V BE0 =V G0 -β0K0-(η-α0)V T ln

[0047] V BEh =V Gh -β h K h -(η-α h )V T LqCy h

[0048] Where V G is the bandgap voltage of silicon at absolute temperature; β is V G Subtract the residual value of the base-emitter voltage at the reference temperature; K is the ratio of the absolute temperature to the reference temperature; η is a process-related constant; α is a quantity related to the current flowing through the transistor. When a current proportional to the temperature flows through the transistor, α is 1, and when a current unrelated to the temperature flows through the transistor, α is 0. Here, α0 is 1 and α2 is 0; V T is the thermal voltage. When Q0=Q2, then ΔV BE0,2 =V BE0 -V BE2 =V T lnK+δ, where δ is a residual, which has almost no effect on the nonlinear term in the relationship between the base-emitter voltage and temperature of the bipolar transistor and can be discarded.

[0049]

[0050] In the formula, I4 is the current flowing through R4. If it is used to offset the nonlinear term in the formula, then:

[0051]

[0052] Since a current proportional to the temperature flows through the transistor Q0, α0 is 1. Let R4=R5, then R5=R4=R1 / (η-1).

[0053] 1. Through a carefully designed second-order temperature compensation circuit, the temperature coefficient of the bandgap reference circuit can be further reduced. This means that the reference voltage can remain highly stable under various temperature changes, thereby improving the temperature stability of the circuit. This is crucial for analog circuits that require high-precision voltage references because it ensures that the circuit can work properly under various environmental conditions.

[0054] 2. The second-order temperature compensation circuit compensates the bipolar transistor V BE The nonlinear part that changes with temperature significantly improves the stability of the reference voltage. This stability is critical for key functions such as signal processing and data conversion in analog circuits because it can reduce errors and drifts caused by temperature changes.

[0055] 3. In the second-order temperature compensation circuit, the resistance ratio can be roughly calculated by the formula (such as R4 = R1 / (η-1)), which can accurately and quickly determine the required resistance value and achieve accurate compensation for nonlinear terms. This flexibility allows circuit designers to select appropriate resistance values ​​to optimize circuit performance according to different application scenarios and performance requirements.

[0056] Furthermore, a second current mirror circuit is connected between the reference voltage output circuit and the second-order temperature compensation circuit, and the second current mirror circuit is used to mirror the MP in the second-order temperature compensation circuit in the same proportion. 23 -MP 25 The branch current.

[0057] The beneficial effect of the basic scheme is that the reference voltage output circuit includes a MOS tube MP connected in series 25 、MP 24 and MP 23 , M.P. 25 、MP 24 and MP 23 The gates of MP 28 、MP 27 and MP 26 The gate electrical connection, MP 28 、MP 27 and MP 26 Also connected in series, MP 26 The source and MP 23 The source is electrically connected to the MP 20 The source of the electrical connection, MP 25 The drain of is electrically connected to the emitter of Q2, MP 28 The drain of MN8 is electrically connected to R6, R6 is connected in parallel with the source and drain of MN8, the drain of MN8 is electrically connected to the collector of Q2, the gate of MN8 is controlled by the enable signal PD, the source of MN8 outputs the VBG voltage, MP 24 The gate and MP 18 The gate electrical connection, MP 23 The gate and MP 17 The gate of the MP9-MP 12 、MP 17 、MP 18 、MP 20 、MP 21 、MP 23 、MP 24 、MP 26 、MP 27 Together they form a second current mirror circuit.

[0058] 1. The current mirror circuit itself has the ability to copy current with high precision. By copying the current I3 of the second-order temperature compensation circuit with the same proportion, it can ensure that the current in the reference voltage output circuit has the same accuracy and stability as the second-order temperature compensation circuit. This helps to reduce the error and fluctuation of the current during transmission, thereby improving the performance and stability of the entire circuit.

[0059] 2. By using a current mirror circuit to mirror the current in the same proportion, the design of the reference voltage output circuit can be simplified. No additional current regulator or complex circuit structure is required to achieve accurate replication and regulation of the current, thereby reducing the complexity and cost of the circuit design.

[0060] 3. Since the current mirror circuit has a flexible current replication ratio and wide applicability, the current size in the reference voltage output circuit can be easily adjusted to meet different application requirements.

[0061] Furthermore, a capacitor C2 is connected in parallel to the output end of the reference voltage output circuit.

[0062] The beneficial effect of the basic solution is that the resistor R6 is connected in parallel with the capacitor C2.

[0063] The main function of capacitor C2 is to output a transient stable reference voltage VBG. 1. Capacitor C2 has the ability to charge and discharge. When the voltage in the circuit changes transiently, capacitor C2 can absorb or release charge, thereby slowing down the mutation speed and overshoot amplitude of voltage VBG, making the output of reference voltage VBG more stable.

[0064] 2. During transient processes such as circuit startup or load changes, the presence of capacitor C2 can significantly reduce the fluctuation of the reference voltage VBG, ensuring that the circuit can still output a stable voltage under these conditions.

[0065] 3. At low frequencies, the impedance of capacitor C2 is very large, equivalent to an open circuit, and does not affect the power supply rejection performance of the circuit. At high frequencies, the impedance of the capacitor is small, and it can reduce the equivalent impedance after being connected in parallel with the resistor, thereby improving the power supply rejection performance in the high frequency band. In this way, even under high-frequency working conditions, the bandgap reference circuit can maintain a high power supply rejection ratio. Capacitor C2 can also be used for zero point adjustment and phase compensation to ensure the stability and performance of the circuit.

[0066] Furthermore, the structure of the second current mirror circuit used as the operational amplifier circuit, the second-order temperature compensation circuit and the current source of the reference voltage output circuit is a Cascode structure made of a PMOS tube.

[0067] The beneficial effect of the basic scheme is: in order to further improve the power supply rejection ratio of the bandgap circuit, we make the structure of the second current mirror circuit, which is the current source of the operational amplifier circuit, the second-order temperature compensation circuit and the reference voltage output circuit, a cascode structure made of PMOS tubes, that is, adding MP 10 、MP 12 、MP 18 、MP 21 、MP 24 、MP 27At the same time, in order to reduce the shutdown power consumption of the circuit, enable control is introduced for the branches that can control the generation and direction of the circuit current, specifically through MP0-MP5, MP7, MP 19 、MP 22 、MP 25 、MP 28 , and the conduction and cutoff of MN8 are controlled.

[0068] 1. The Cascode structure current source made of PMOS tube can more effectively suppress the influence of power supply voltage fluctuation on circuit output, thus ensuring that the circuit can output stable voltage under various power supply voltage conditions. The introduction of the Cascode structure made of PMOS tube makes the current source part of the circuit have higher stability and anti-interference ability. This helps to reduce the influence of power supply voltage fluctuation on the reference voltage output circuit, thereby improving the power supply rejection ratio of the entire bandgap circuit.

[0069] 2. Introducing enable control in branches that can generate current and influence the direction of current can achieve precise control of circuit current. When the circuit does not need to work, the shutdown power consumption of the circuit can be reduced by turning off the branches that can generate current and influence the direction of current through enable control. The introduction of enable control allows the circuit to quickly enter a low-power state when it does not need to work. This helps to extend battery life and reduce the overall energy consumption of the system.

[0070] 3. This design significantly improves the overall performance of the bandgap circuit by improving the power supply rejection ratio and reducing the shutdown power consumption. This allows the circuit to show better stability and energy efficiency in various applications. The introduction of the Cascode structure and enable control made of PMOS tubes enhances the anti-interference ability and stability of the circuit. This helps to reduce the risk of circuit failure and improve the reliability of the system. At the same time, by reducing unnecessary power consumption, the energy waste caused by the circuit during standby is reduced.

[0071] Furthermore, the number of transistors in the bipolar transistor Q1 is N times the number of transistors of the same type in the bipolar transistor Q0 , and the number of bipolar transistors Q2 and bipolar transistor Q0 is the same.

[0072] The benefit of the basic scheme is that transistors of the same size are also similar in terms of thermal effects. Therefore, when the temperature changes, the performance of individual transistors of the same type may change in a similar trend, which helps the circuit maintain stable performance over a wide temperature range. BRIEF DESCRIPTION OF THE DRAWINGS

[0073] Figure 1 Schematic diagram of a bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to an embodiment of the present invention.

[0074] Figure 2Schematic diagram of a startup circuit of a bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to an embodiment of the present invention.

[0075] Figure 3 4 is a circuit schematic diagram of a bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to an embodiment of the present invention.

[0076] The figure marks in the drawings of the specification include: 1. startup circuit; 2. operational amplifier circuit; 3. second-order temperature compensation circuit; 4. reference voltage output circuit; 5. first current mirror circuit; 6. second current mirror circuit. DETAILED DESCRIPTION

[0077] The following is further described in detail through specific implementation methods:

[0078] Example

[0079] Basically as attached Figure 1 , Figure 2 and Figure 3 As shown: A bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation, comprising a startup circuit 1, an operational amplifier circuit 2, a second-order temperature compensation circuit 3, a reference voltage output circuit 4, a first current mirror circuit 5 and a second current mirror circuit 6.

[0080] The startup circuit 1 is electrically connected to the operational amplifier circuit 2. The startup circuit 1 is used to provide a bias current when the circuit is started, so as to prevent the circuit from operating at a stable operating point where the positive and negative feedback branch currents at the input end of the operational amplifier circuit are both 0, and to help the circuit smoothly enter a normal working state. The startup circuit 1 also includes a startup current generating circuit and a first current mirror circuit 5. The startup current generating circuit is used to receive the change of the enable signal to generate a startup current, and to control the direction of the startup current flow through the reference voltage output from the reference voltage output circuit 4. The first current mirror circuit 5 is used to proportionally copy the startup current input to the operational amplifier circuit 2, and the NM0 of the gate controlled by the output signal VBG is connected in parallel with a capacitor C0.

[0081] The operational amplifier circuit 2 is electrically connected to the second-order temperature compensation circuit 3 and the second current mirror circuit 6. The operational amplifier circuit 2 is used to clamp the voltage and use its virtual short characteristic to make the voltages at the two input terminals of the operational amplifier approximately equal. The operational amplifier circuit 2 uses PMOS as a Cascode structure operational amplifier with an input differential pair. The output terminal of the operational amplifier circuit 2 is connected in parallel with a capacitor C1.

[0082] The second-order temperature compensation circuit 3 is electrically connected to the reference voltage output circuit 4, and is used to compensate for the linear and nonlinear terms in the base-emitter voltage of the bipolar transistor, reduce the temperature drift of the bandgap reference circuit, and improve the accuracy of the reference voltage. The number of transistors in the bipolar transistor Q1 is N times the number of transistors of the same type as the bipolar transistor Q0, and the number of bipolar transistors Q2 and bipolar transistor Q0 is the same. When the second-order temperature compensation circuit 3 performs the second-order temperature compensation, the V BE0 and V BE2 The expressions are:

[0083] V BE0 =V G0 -β0K0-(η-α0)V T ln

[0084] V BEh =V Gh -β h K h -(η-α h )V T LqCy h

[0085] Where V G is the bandgap voltage of silicon at absolute temperature; β is V G Subtract the residual value of the base-emitter voltage at the reference temperature; K is the ratio of the absolute temperature to the reference temperature; η is a process-related constant; α is a quantity related to the current flowing through the transistor. When a current proportional to the temperature flows through the transistor, α is 1, and when a current unrelated to the temperature flows through the transistor, α is 0. Here, α0 is 1 and α2 is 0; V T is the thermal voltage.

[0086] The output terminal of the reference voltage output circuit 4 is VBG, and the output terminal VBG is used to output the reference voltage, provide a stable and accurate reference voltage source, and participate in controlling the flow direction of the startup current generated by the startup circuit. A second current mirror circuit 6 is connected between the reference voltage output circuit 4 and the second-order temperature compensation circuit 3. The second current mirror circuit 6 is used to mirror the MP in the second-order temperature compensation circuit 3 in the same proportion. 23 -MP 25 The output end of the reference voltage output circuit 4 is connected in parallel with a capacitor C2.

[0087] The specific implementation process is as follows: the startup circuit 1 is composed of MP0-MP8, MN0, MN1, MN8, R0 and C0; the operational amplifier circuit 2 is composed of MP9-MP 16 , MN2-MN7 and C1; the second-order temperature compensation circuit 3 is composed of MP 17 -MP 25, R1-R5, Q0-Q2; the output reference voltage circuit 4 is composed of MP 26 -MP 28 , R6 and C2.

[0088] The startup current generating circuit includes a series of PMOS transistors MP0-MP5 whose gates are controlled by an enable signal PD, R0 connected in series with the drain of MP5, and NMOS transistors MN0, MN5 and MN6 connected in series with the gates of the NMOS transistors MN0, MN6 and MN7 controlled by an output signal VBG. O The source is connected in series with R0; the first current mirror circuit 5 includes MN1 whose gate is electrically connected to the source of MN0, a PMOS tube MP7 whose gate is electrically connected to the PD signal, a drain of MP7 electrically connected to the source of MN1, MP6 connected in series with the source of MP7, MP8 connected in series with the gate of MP6, MP9 and MP8 connected in series with the source and drain of MP8. 10 In parallel, the source and drain of MN0 are connected in parallel with capacitor C0.

[0089] The operational amplifier circuit 2 includes MP9 and MP8 connected in parallel with the MOS tube MP9. 10 , MP9 gate and MP 11 The gate electrical connections, MP9 and MP 11 The source of MP is electrically connected to the input voltage VDD. 11 Drain and MP 12 Source series, MP 12 Gate and MP 10 Gate electrical connection, MP 10 The drain is connected in series with MN2 and MN3. The gates of MN2 and MN3 are electrically connected to their own sources. The drain of MN3 is electrically connected to the drain of MN5 and to GND. 12 The drain of MP 13 and MP 14 The source of MP 13 The gate receives the input signal IN1, MP 14 The gate of MN5 receives the input signal IN2, and the source of MN5 is connected in series with MN4 and MP 15 , and MN5 and MN7, MN4 and MN6, MP 15 and MP 16 The gates of MN7 are electrically connected to the drain of MN5, and the drain of MN7 is electrically connected to MN6 and MP 16 Series, MP 16 The source and MP 15 Source electrical connection, MP 13 The drain of MP is electrically connected to the drain of MN4. 14 The drain of MN is electrically connected to the drain of MN6, the source of MN3 is electrically connected to the gate of MN5, the source of MN2 is electrically connected to the gate of MN4, and MP 15The drain and MP 15 The gate of MN6 is electrically connected, and the source of MN6 and the drain of MN7 are connected in parallel with capacitor C1.

[0090] The second-order temperature compensation circuit 3 includes a MOS tube MP in series 17 、MP 18 and MP 19 , M.P. 17 、MP 18 and MP 19 The gates of MP 20 、MP 21 and MP 22 The gate electrical connection, MP 17 The source and MP 20 The source is electrically connected to the MP 16 The source of the electrical connection, MP 17 The gate of is electrically connected to the gate of MP9, and MP 18 The gate and MP 10 The gate electrical connection, MP 19 The source and MP 10 The gate electrical connection, MP 19 The drain of the bipolar transistor Q0 is electrically connected to the emitter base, the base of Q0 is electrically connected to the base of Q1 and is electrically connected to the collectors of Q0 and Q1, the emitter base and collector of Q0 are connected in parallel with the resistor R1, the emitter of Q1 is electrically connected to R2, R2 and the collector of Q1 are connected in parallel with R3, MP 22 The drain of Q1 is electrically connected to R2, and R1 and R2 have the same resistance value. The collector of Q1 is electrically connected to the collector and base of Q2. The emitter of Q2 is electrically connected to R5 and R4. R5 is electrically connected to MP 22 The drain is electrically connected to R4 and MP 19 The drain of is electrically connected, and the resistance of R4 and R5 is the same.

[0091] The reference voltage output circuit 4 includes a MOS tube MP connected in series. 25 、MP 24 and MP 23 , M.P. 25 、MP 24 and MP 23 The gates of MP 28 、MP 27 and MP 26 The gate electrical connection, MP 28 、MP 27 and MP 26 Also connected in series, MP 26 The source and MP 23 The source is electrically connected to the MP 20 The source of the electrical connection, MP 25The drain of is electrically connected to the emitter of Q2, MP 28 The drain of MN8 is electrically connected to R6, R6 is connected in parallel with the source and drain of MN8, the drain of MN8 is electrically connected to the collector of Q2, the gate of MN8 is controlled by the enable signal PD, the source of MN8 outputs the VBG voltage, MP 24 The gate and MP 18 The gate electrical connection, MP 23 The gate and MP 17 The gate of the MP9-MP 12 、MP 17 、MP 18 、MP 20 、MP 21 、MP 23 、MP 24 、MP 26 、MP 27 Together they form a second current mirror circuit 6, with the resistor R6 and the capacitor C2 connected in parallel.

[0092] When the enable signal PD jumps from high level to low level, VBG is 0, MN0 is turned off, MP0-MP5 is turned on, and they and the branch of R0 will generate current, and the mirror current is given to MP8 through MP6, so that MP9, MP 10 MN2, MN3 branch current is not 0 at this moment, thus preventing the bandgap circuit from entering the steady state where the positive and negative feedback loop currents are all 0. When the circuit starts normally, VBG rises to the set voltage. This bandgap is 1.2V, which is greater than the threshold voltage V of MN0. TN , so that it is turned on. At this time, the current will no longer flow through MN1, and the startup circuit 1 will no longer affect the subsequent circuits. If the set VBG is less than V TN , the startup circuit needs to be adjusted accordingly, such as using a resistor divider at the output end to generate a voltage higher than the V of the NMOS tube under the process used. TN A larger voltage can be used to replace VBG, or the startup circuit 1 can be replaced. The function of C0 is to prevent the circuit from oscillating or even jumping when the circuit is suddenly started and VBG outputs normally.

[0093] Operational amplifier circuit 2 is a cascode structure operational amplifier with PMOS as input differential pair. Using PMOS as input differential pair can reduce 1 / f noise and is suitable for low input common mode. The folded common source and common gate amplifier has a wide common mode input range and a large output voltage swing. C1 performs phase compensation on the output.

[0094] The base-emitter voltage V of a bipolar transistor is known. BE The relationship with temperature is:

[0095]

[0096] Where: V G is the bandgap voltage of silicon at absolute temperature, T is the absolute temperature, T0 is the reference temperature, η is the process-related constant, α is the collector temperature index, V T is the thermal voltage. G -V BE (T0))](T / T0) is a linear term, (η-α)V T ln(T / T0) is a nonlinear term.

[0097] When performing first-order linear temperature compensation, let the number of Q1 be N times that of Q0, then the ΔV between them is BE0,1 =V T lnN, let the current flowing through the resistor R2 be I1, then the current I1=ΔV BE0,1 / R2=V T lnN / R2, and it is a positive temperature coefficient current. Let R1 = R3, let the current flowing through the two ends of the resistor R1 be I2, then I2 = ΔV BE0 / R1, and it is a negative temperature coefficient current. By adjusting the ratio of R1 to R2 so that I1 and I2 cancel each other out, the linear term in formula (1) can be eliminated.

[0098] When performing second-order temperature compensation, for the convenience of expression, we use V G -V BE (T0) is set to β, and T / T0 is set to K. At this time, the current flowing through Q0 is proportional to the temperature, α0 is 1; the current flowing through Q2 is almost independent of the temperature, α2 is 0, then the base-emitter voltage V of Q0 and Q2 is BE The expressions are:

[0099] V BE0 =VG0-β0K0-(η-α0)V T lnK0 (2)

[0100] V BEh =V Gh -β h K h -(η-α h )V T LqCy h (3)

[0101] When Q0=Q2, ΔV BE0,2 =V BE0 -V BE2 =V TlnK+δ, where δ is a residual, which has almost no effect on the nonlinear term in the relationship between the base-emitter voltage and temperature of the bipolar transistor and can be discarded.

[0102]

[0103] In the formula, I4 is the current flowing through R4. If it is used to offset the nonlinear term in the formula, then:

[0104]

[0105] Since a current proportional to the temperature flows through the transistor Q0, α0 is 1. Let R4=R5, then R5=R4=R1 / (η-1).

[0106] The reference voltage output circuit 4 is a mirror image MP with the same ratio. 23 -MP 25 The current in the branch where it is located is the same as the current flowing through MP 26 -MP 28 The currents of the branches are equal, let it be I3, then I3=I1+I2+I4, and finally VBG=I3×R6. The function of C2 is to output a transient stable VBG. In order to further improve the power supply rejection ratio of the bandgap circuit, the structure of the second current mirror circuit as the current source of the operational amplifier circuit, the second-order temperature compensation circuit and the reference voltage output circuit is made into a Cascode structure made of PMOS tube, that is, the MP 10 、MP 12 、MP 18 、MP 21 、MP 24 、MP 27 At the same time, in order to reduce the shutdown power consumption of the circuit, enable control is introduced in each branch that can generate current by itself. Accurate control of the circuit current is achieved. When the circuit does not need to work, the shutdown power consumption of the circuit can be reduced by enabling control to shut down the branches that can generate current and affect the direction of current. The introduction of enable control allows the circuit to quickly enter a low-power state when it does not need to work. This helps to extend battery life and reduce the overall energy consumption of the system.

[0107] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.

[0108] The above is only an embodiment of the present invention. The common sense such as the known specific structure and characteristics in the scheme is not described in detail here. The ordinary technicians in the relevant field know all the common technical knowledge in the technical field of the invention before the application date or priority date, can obtain all the existing technologies in the field, and have the ability to apply the conventional experimental means before that date. The ordinary technicians in the relevant field can improve and implement this scheme in combination with their own abilities under the enlightenment given by this application. Some typical known structures or known methods should not become obstacles for ordinary technicians in the relevant field to implement this application. It should be pointed out that for those skilled in the art, without departing from the structure of the present invention, several deformations and improvements can be made, which should also be regarded as the protection scope of the present invention, which will not affect the effect of the implementation of the present invention and the practicality of the patent. The protection scope required by this application shall be based on the content of its claims, and the specific implementation methods and other records in the specification can be used to interpret the content of the claims.

Claims

1. A bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation, characterized in that: It comprises a start-up circuit (1), an operational amplifier circuit (2), a second-order temperature compensation circuit (3) and a reference voltage output circuit (4); The startup circuit (1) is electrically connected to the operational amplifier circuit (2). The startup circuit (1) is used to provide a bias current when the circuit is started, so as to prevent the circuit from operating at a stable operating point where the positive and negative feedback branch currents at the input end of the operational amplifier circuit are both zero, thereby helping the circuit to smoothly enter a normal operating state. The operational amplifier circuit (2) is electrically connected to the second-order temperature compensation circuit (3) and the second current mirror circuit (6); the operational amplifier circuit (2) is used to clamp the voltage, and utilizes its virtual short characteristic to make the voltages at the two input terminals of the operational amplifier approximately equal; The second-order temperature compensation circuit (3) is electrically connected to the reference voltage output circuit (4) and is used to compensate for linear and nonlinear terms in the base-emitter voltage of the bipolar transistor, reduce the temperature drift of the bandgap reference circuit, and improve the accuracy of the reference voltage; The output terminal of the reference voltage output circuit (4) is VBG, and the output terminal VBG is used to output the reference voltage, provide a stable and accurate reference voltage source, and participate in controlling the flow direction of the starting current generated by the starting circuit.

2. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 1, characterized in that: The startup circuit (1) comprises a startup current generating circuit and a first current mirror circuit (5). The startup current generating circuit is used to receive a change in an enable signal to generate a startup current and control the flow direction of the startup current by means of a reference voltage output from a reference voltage output circuit (4). The first current mirror circuit (5) is used to proportionally replicate the startup current and input it into an operational amplifier circuit (2).

3. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 2, characterized in that: A capacitor C0 is connected in parallel to NM0 whose gate is controlled by the output signal VBG.

4. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 3, characterized in that: The operational amplifier circuit (2) uses PMOS as a cascode structure operational amplifier with an input differential pair.

5. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 4, characterized in that: The output end of the operational amplifier circuit (2) is connected in parallel with a capacitor C1.

6. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 5, characterized in that: Second-order temperature compensation circuit (3) When performing second-order temperature compensation, the base-emitter voltage V of the bipolar transistors Q0 and Q2 BE0 and V BE2 The expressions are: V BE0 =V G0 -β0K0-(η-α0)V T lnK0 V BE2 =V G2 -β2K2-(η-α2)V T lnK2 Where V G is the bandgap voltage of silicon at absolute temperature; β is V G Subtract the residual value of the base-emitter voltage at the reference temperature; K is the ratio of the absolute temperature to the reference temperature; η is a process-related constant; α is a quantity related to the current flowing through the transistor. When a current proportional to the temperature flows through the transistor, α is 1, and when a current irrelevant to the temperature flows through the transistor, α is 0. Here, α0 is 1 and α2 is 0. V T is the thermal voltage.

7. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 6, characterized in that: A second current mirror circuit (6) is connected between the reference voltage output circuit (4) and the second-order temperature compensation circuit (3), and the second current mirror circuit (6) is used to mirror-copy the MP in the second-order temperature compensation circuit (3) in the same proportion. 23 -MP 25 The branch current.

8. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 7, characterized in that: A capacitor C2 is connected in parallel to the output end of the reference voltage output circuit (4).

9. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 8, characterized in that: The structure of the second current mirror circuit (6) used as the current source of the operational amplifier circuit (2), the second-order temperature compensation circuit (3) and the reference voltage output circuit (4) is a cascode structure made of a PMOS tube.

10. The bandgap reference circuit with high power supply rejection ratio and second-order temperature compensation according to claim 9, characterized in that: The number of transistors in the bipolar transistor Q1 is N times the number of transistors of the same type in the bipolar transistor Q0, and the number of bipolar transistors Q2 is the same as that of bipolar transistor Q0.

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