Wafer core particle test data monitoring method and device, electronic equipment and storage medium

By making multi-dimensional rule judgment and action decisions at the waiting site for core particles, the problem of inaccurate wafer control in the prior art is solved, and higher-precision wafer core particles test data control and abnormal warning are achieved.

CN119576686APending Publication Date: 2025-03-07SUZHOU WEIDA DATA TECH CO LTD
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Patent Information

Application Number
CN202411561239.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-04
Publication Date
2025-03-07

AI Technical Summary

Technical Problem

The existing CP testing system can only block production through the dimension of wafer yield, resulting in inaccurate wafer control.

Method used

By making rule judgments on multiple core test data at the core test waiting site based on the preset default configuration rule group, customized rule group and configuration product parameter list, multiple judgment results of the wafer to be detected are determined, and the next execution action is determined based on the judgment results, including retesting or sending an early warning notification.

Benefits of technology

Multi-dimensional wafer core test data control is realized, the control accuracy of wafer core test data is improved, and early warning is made for wafers with abnormal data.

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Abstract

The invention provides a wafer core particle test data monitoring method and device, electronic equipment and a storage medium, and the method comprises the steps: a core particle receiving test waiting site receives a core particle test data file, sent by a core particle receiving test site, of a to-be-detected wafer in a target batch, carrying out file analysis on the core particle test data file to determine a plurality of core particle test data of the to-be-detected wafer in the target batch; performing rule judgment on the multiple pieces of core particle test data based on at least one of a preset default configuration rule group, a customized rule group and a configuration product parameter list at the core particle test receiving waiting station, and determining multiple judgment results of the to-be-detected wafers in the target batch; and if any judgment result of the to-be-detected wafer in the target batch is failure, determining the next execution action of the to-be-detected wafer in the target batch based on the decision information corresponding to the default configuration rule group and the customized rule group, thereby improving the control precision of the core particle test data of the wafer.
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Description

Technical Field

[0001] The present application relates to the field of semiconductor manufacturing technology, and in particular to a method, device, electronic equipment and storage medium for monitoring chip test data of a wafer. Background Art

[0002] CP test (wafer test, Circuit Probing) can more accurately reflect the quality details of the product. It is an important data used for product quality monitoring and product quality problem solving. With the use of related systems, it can perform multiple checks on product quality, as well as early warnings, and make timely treatment for the causes of the problems. The test object in the CP test is for each chip (die) in the entire wafer (wafer). The purpose is to ensure that each die in the entire wafer can basically meet the characteristics of the device or the design specification, usually including voltage, current, timing and function verification. Usually, the CP test system can only control production through the dimension of wafer yield, which will lead to technical problems of inaccurate wafer control. Therefore, how to improve the control accuracy of wafers has become a technical issue that cannot be underestimated. Summary of the invention

[0003] In view of this, the purpose of the present application is to provide a method, device, electronic device and storage medium for monitoring the chip test data of a wafer, which realizes multi-dimensional control of the chip test data of the wafer and issues early warning for wafers with abnormal data, thereby improving the control accuracy of the chip test data of the wafer.

[0004] The present application provides a method for monitoring chip test data of a wafer, and the chip test data monitoring method includes:

[0005] The chip acceptance test waiting station receives a chip test data file of the wafers to be tested in the target batch sent by the chip acceptance test station, and performs file parsing on the chip test data file to determine a plurality of chip test data of the wafers to be tested in the target batch;

[0006] At the chip acceptance test waiting station, based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, a plurality of chip test data are subjected to rule judgment to determine a plurality of judgment results of the wafers to be inspected under the target batch;

[0007] If any judgment result of the wafers to be inspected under the target batch is failure, the next execution action of the wafers to be inspected under the target batch is determined based on the decision information corresponding to the default configuration rule group and the customized rule group; wherein the execution action includes retesting or sending an early warning notification.

[0008] In a possible implementation, for the default configuration rule group, at the chip acceptance test waiting station, a plurality of the chip test data are subjected to rule judgment based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, to determine a plurality of judgment results of the wafers to be inspected under the target batch, including:

[0009] If the wafer yield of the core test data of the wafer to be tested is less than a first preset value, the determination result of the wafer to be tested is failure;

[0010] If the number of cores tested of the wafer to be tested is inconsistent with the number of cores owned by the wafer to be tested, the determination result of the wafer to be tested is failure;

[0011] If the difference in wafer yield of the core test data of any two wafers to be inspected is greater than a second preset value, the judgment result of the wafers to be inspected in the target batch is failure.

[0012] In a possible implementation, for the customized rule group, at the chip acceptance test waiting station, a plurality of the chip test data are subjected to rule judgment based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, to determine a plurality of judgment results of the wafers to be inspected under the target batch, including:

[0013] Determine the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user;

[0014] If the test results of the core test data corresponding to multiple consecutive chip test points of the wafer to be tested fail and correspond to the same Bin, it is determined that the judgment result of the wafer to be tested is a failure;

[0015] If the average wafer yield of the plurality of wafers to be inspected in the target batch is lower than a third preset value, it is determined that the judgment result of the wafers to be inspected in the target batch is a failure;

[0016] If the Bin test result in the die test data of the wafer to be inspected is not within the range of the lower limit value and the upper limit value of the Bin configured by the user, the judgment result of the wafer to be inspected is determined.

[0017] In a possible implementation manner, determining the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user includes:

[0018] Detecting whether the wafer yield of the wafer to be detected is lower than the lower limit of the wafer yield. Detecting whether the wafer yield of the wafer to be detected is lower than the lower limit of the wafer yield or higher than the lower limit of the wafer yield;

[0019] If any one of the above is yes, the determination result of the wafer to be inspected is failure;

[0020] If both are yes, the determination result of the wafer to be inspected is successful.

[0021] In a possible implementation manner, the step of performing rule judgment on the plurality of chip test data based on the configured product parameter list to determine the judgment result of the wafer to be tested under the target batch includes:

[0022] If the name information of the wafer to be detected in the core test data file is inconsistent with the name information in the configuration product parameter list, the judgment result of the wafer to be detected is failure.

[0023] In a possible implementation manner, after performing rule judgment on a plurality of the chip test data based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list at a chip acceptance test waiting station and determining a plurality of judgment results of the wafers to be inspected under a target batch, the chip test data monitoring method further includes:

[0024] If the judgment results of the wafers to be inspected in the target batch are all successful, the wafers to be inspected in the target batch are processed in the next process flow.

[0025] The embodiment of the present application also provides a wafer chip test data monitoring device, the chip test data monitoring device comprising:

[0026] The parsing module is used for receiving the chip test data file of the wafers to be tested under the target batch sent by the chip test waiting station at the chip acceptance test waiting station, and performing file parsing on the chip test data file to determine a plurality of chip test data of the wafers to be tested under the target batch;

[0027] A judgment module, configured to perform rule judgment on the plurality of chip test data based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list at a chip acceptance test waiting station, and determine a plurality of judgment results of the wafers to be tested under a target batch;

[0028] A determination module is used to determine the next execution action of the wafers to be inspected under the target batch based on the decision information corresponding to the default configuration rule group and the customized rule group if any judgment result of the wafers to be inspected under the target batch is failure; wherein the execution action includes retesting or sending an early warning notification.

[0029] In a possible implementation manner, when the judgment module is used to perform rule judgment on the plurality of chip test data based on the default configuration rule group, the customized rule group, and at least one of the configured product parameter list at the chip acceptance test waiting station for the default configuration rule group, and determine a plurality of judgment results of the wafers to be tested under the target batch, the judgment module is specifically used to:

[0030] If the wafer yield of the core test data of the wafer to be tested is less than a first preset value, the determination result of the wafer to be tested is failure;

[0031] If the number of cores tested of the wafer to be tested is inconsistent with the number of cores owned by the wafer to be tested, the determination result of the wafer to be tested is failure;

[0032] If the difference in wafer yield of the core test data of any two wafers to be inspected is greater than a second preset value, the judgment result of the wafers to be inspected in the target batch is failure.

[0033] An embodiment of the present application also provides an electronic device, including: a processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate through the bus, and when the machine-readable instructions are executed by the processor, the steps of the wafer core test data monitoring method as described above are performed.

[0034] An embodiment of the present application further provides a computer-readable storage medium having a computer program stored thereon. When the computer program is executed by a processor, the steps of the wafer core grain test data monitoring method as described above are executed.

[0035] The embodiment of the present application provides a method, device, electronic device and storage medium for monitoring the chip test data of a wafer, wherein the chip test data monitoring method includes: a chip acceptance test waiting station receives a chip test data file of a wafer to be detected under a target batch sent by the chip acceptance test station, and performs file analysis on the chip test data file to determine multiple chip test data of the wafer to be detected under the target batch; at the chip acceptance test waiting station, a plurality of the chip test data are subjected to rule judgment based on at least one of a preset default configuration rule group, a customized rule group and a configuration product parameter list, to determine multiple judgment results of the wafer to be detected under the target batch; if any judgment result of the wafer to be detected under the target batch is a failure, the next execution action of the wafer to be detected under the target batch is determined based on the decision information corresponding to the default configuration rule group and the customized rule group; wherein the execution action includes retesting or sending an early warning notification. The chip test data of the wafer is controlled in multiple dimensions, and an early warning is issued for wafers with abnormal data, thereby improving the control accuracy of the chip test data of the wafer.

[0036] In order to make the above-mentioned objects, features and advantages of the present application more obvious and easy to understand, preferred embodiments are specifically cited below and described in detail with reference to the attached drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present application and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0038] Figure 1 A flowchart of a method for monitoring chip test data of a wafer provided in an embodiment of the present application;

[0039] Figure 2 One of the structural schematic diagrams of a wafer core test data monitoring device provided in an embodiment of the present application;

[0040] Figure 3 A second structural schematic diagram of a wafer chip test data monitoring device provided in an embodiment of the present application;

[0041] Figure 4 A schematic diagram of the structure of an electronic device provided in an embodiment of the present application. DETAILED DESCRIPTION

[0042] To make the purpose, technical scheme and advantages of the embodiments of the present application clearer, the technical scheme in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only a part of the embodiments of the present application, rather than all of the embodiments. The components of the embodiments of the present application usually described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the application claimed for protection, but merely represents the selected embodiments of the present application. Based on the embodiments of the present application, each other embodiment obtained by those skilled in the art without making creative work belongs to the scope of protection of the present application.

[0043] First, the application scenarios to which the present application is applicable are introduced. The present application can be applied in the field of semiconductor manufacturing technology.

[0044] After research, it was found that CP testing (wafer testing, Circuit Probing) can more accurately reflect the quality details of the product. It is an important data used for product quality monitoring and product quality problem solving. With the use of related systems, it can perform multiple checks on product quality, as well as early warnings, and make timely treatment for the causes of the problems. The test object in the CP test is for each chip (die) in the entire wafer (wafer). The purpose is to ensure that each die in the entire wafer can basically meet the characteristics of the device or the design specification, usually including voltage, current, timing and function verification. Usually, the CP test system can only control production through the dimension of wafer yield, which will lead to technical problems of inaccurate control of wafers. Therefore, how to improve the control accuracy of wafers has become a technical issue that cannot be underestimated.

[0045] Based on this, an embodiment of the present application provides a method for monitoring the chip test data of a wafer, which realizes multi-dimensional control of the chip test data of the wafer and issues early warning for wafers with abnormal data, thereby improving the control accuracy of the chip test data of the wafer.

[0046] See also Figure 1 , Figure 1 The flowchart of a method for monitoring chip test data of a wafer provided in an embodiment of the present application is as follows. Figure 1 As shown in , the chip test data monitoring method provided by the embodiment of the present application includes:

[0047] S101: a chip acceptance test waiting station receives a chip test data file of wafers to be tested in a target batch sent by a chip acceptance test station, and performs file analysis on the chip test data file to determine a plurality of chip test data of the wafers to be tested in the target batch.

[0048] In this step, the chip acceptance test waiting station receives the chip test data file of the wafers to be tested in the target batch sent by the chip acceptance test station, and parses the chip test data file to determine multiple chip test data of the wafers to be tested in the target batch.

[0049] The device uploads the generated data files to the specified file directory. Then the Mes Server monitors the directory through a scheduled task (WipmCPLoaderService) and parses and stores new files when new files are found.

[0050] S102: At a chip acceptance test waiting station, rule judgment is performed on the plurality of chip test data based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list to determine a plurality of judgment results of the wafers to be inspected under a target batch.

[0051] In this step, at the chip acceptance test waiting station, rule judgment is performed on multiple chip test data according to at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list to determine multiple judgment results of the wafers to be tested under the target batch.

[0052] Among them, the default configuration rule group must be executed during the rule judgment process. The default configuration rule group is a general rule judgment for all products. The customized rule group is the rule that will be executed only after the user configures it in the client interface.

[0053] In a possible implementation, for the default configuration rule group, at the chip acceptance test waiting station, a plurality of the chip test data are subjected to rule judgment based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, to determine a plurality of judgment results of the wafers to be inspected under the target batch, including:

[0054] A: If the wafer yield of the core test data of the wafer to be tested is less than a first preset value, the judgment result of the wafer to be tested is failure.

[0055] Here, if the wafer yield of the die test data of the wafer to be tested is less than a first preset value, the determination result of the wafer to be tested is failure.

[0056] B: If the number of cores tested of the wafer to be tested is inconsistent with the number of cores tested owned by the wafer to be tested, the judgment result of the wafer to be tested is failure.

[0057] Here, if the number of cores tested of the wafer to be tested is inconsistent with the number of cores tested of the wafer to be tested, the determination result of the wafer to be tested is failure. For example, if the number of cores tested of the wafer to be tested is 4 and the total number of cores tested of the wafer to be tested is 5, the determination result of the wafer to be tested is failure.

[0058] C: If the difference in wafer yield of the core test data of any two wafers to be inspected is greater than a second preset value, the judgment result of the wafer to be inspected in the target batch is failure.

[0059] Here, if the difference in wafer yield of the die test data of any two wafers to be tested is greater than a second preset value, the target batch is judged to be a failure.

[0060] In a possible implementation, for the customized rule group, at the chip acceptance test waiting station, a plurality of the chip test data are subjected to rule judgment based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, to determine a plurality of judgment results of the wafers to be inspected under the target batch, including:

[0061] (1): Determine the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user.

[0062] Here, the judgment result of the wafer to be inspected is determined according to the lower limit value and the upper limit value of the wafer yield configured by the user.

[0063] In a possible implementation manner, determining the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user includes:

[0064] When detecting whether the wafer yield of the wafer to be detected is lower than the lower limit value of the wafer yield or higher than the lower limit value of the wafer yield; if either one is yes, the judgment result of the wafer to be detected is failure; if both are yes, the judgment result of the wafer to be detected is success.

[0065] Here, it is detected whether the wafer yield of the wafer to be inspected is lower than the lower limit of the wafer yield or higher than the lower limit of the wafer yield; if either one is yes, the judgment result of the wafer to be inspected is failure; if both are yes, the judgment result of the wafer to be inspected is success.

[0066] Among them, the user can set the lower limit and upper limit of the yield of multiple wafers. When the number of wafers in the same batch that meet the set value is lower than the lower limit or higher than the upper limit at the same time, the judgment result of the target batch is failed.

[0067] (2): If the test results of the core test data corresponding to multiple consecutive chip test points of the wafer to be tested fail and correspond to the same Bin, it is determined that the judgment result of the wafer to be tested is a failure.

[0068] Here, if the test results of the core test data corresponding to a plurality of consecutive chip test points of the wafer to be tested fail and correspond to the same Bin, it is determined that the judgment result of the wafer to be tested is a failure.

[0069] (3): If the average wafer yield of the plurality of wafers to be inspected in the target batch is lower than a third preset value, it is determined that the judgment result of the wafers to be inspected in the target batch is failure.

[0070] Here, if the average wafer yield of multiple wafers to be inspected in the target batch is lower than the third preset value, it is determined that the judgment result of the wafers to be inspected in the target batch is failure.

[0071] (4): If the Bin test result in the core test data of the wafer to be inspected is not within the range of the lower limit value and the upper limit value of the Bin configured by the user, the judgment result of the wafer to be inspected is determined.

[0072] Here, for wafers, users can set the upper and lower limits of the quantity of a certain Bin. If the quantity of the Bin is not within the limit, the judgment result of the Wafer is failure.

[0073] The customized rule group also includes: for Wafer, the user can set the upper limit of the number of multiple Bin combinations. If the number of Bins in the Bin combination in the CP data exceeds the upper limit, the Wafer will fail.

[0074] The first preset value, the second preset value and the third preset value are set based on expert experience.

[0075] In a possible implementation manner, the step of performing rule judgment on the plurality of chip test data based on the configured product parameter list to determine the judgment result of the wafer to be tested under the target batch includes:

[0076] If the name information of the wafer to be detected in the core test data file is inconsistent with the name information in the configuration product parameter list, the judgment result of the wafer to be detected is failure.

[0077] Here, if the name information of the wafer to be tested in the core test data file is inconsistent with the name information in the configuration product parameter list, the judgment result of the wafer to be tested is failure. For example, if the product ID of the wafer in the test file is inconsistent with the product ID in the configuration product parameter list, Wafer Fail.

[0078] S103: If any judgment result of the wafers to be inspected under the target batch is failure, the next execution action of the wafers to be inspected under the target batch is determined based on the decision information corresponding to the default configuration rule group and the customized rule group; wherein the execution action includes retesting or sending an early warning notification.

[0079] In this step, if any judgment result of the wafers to be inspected in the target batch is failure, the next execution action of the wafers to be inspected in the target batch is determined according to the decision information corresponding to the default configuration rule group and the customized rule group.

[0080] The decision information corresponding to the default configuration rule group and the customized rule group is sending an early warning email to the product manager or waiting for retesting. Here, the decision information of the default configuration rule group and the customized rule group is consistent.

[0081] In a possible implementation manner, after performing rule judgment on a plurality of the chip test data based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list at a chip acceptance test waiting station and determining a plurality of judgment results of the wafers to be inspected under a target batch, the chip test data monitoring method further includes:

[0082] If the judgment results of the wafers to be inspected in the target batch are all successful, the wafers to be inspected in the target batch are processed in the next process flow.

[0083] Here, if the judgment results of the wafers to be inspected in the target batch are all successful, the wafers to be inspected in the target batch are processed in the next process flow.

[0084] In this application, the default configuration rule group is the CP rule that will be executed regardless of the CP data of any product. The customized rule group is the rule that will be executed only after the user configures it in the client interface. By controlling the CP data of the entire Lot, managing the CP data of the wafer from multiple dimensions such as yield and Bin, and issuing early warnings for wafers with abnormal data, the CP data control accuracy of the wafer is greatly improved.

[0085] The embodiment of the present application provides a method for monitoring the core grain test data of a wafer, the method comprising: a core grain acceptance test waiting station receives a core grain test data file of a wafer to be detected under a target batch sent by the core grain acceptance test station, and performs file analysis on the core grain test data file to determine multiple core grain test data of the wafer to be detected under the target batch; at the core grain acceptance test waiting station, based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, multiple core grain test data are subjected to rule judgment to determine multiple judgment results of the wafer to be detected under the target batch; if any judgment result of the wafer to be detected under the target batch is a failure, the next execution action of the wafer to be detected under the target batch is determined based on the decision information corresponding to the default configuration rule group and the customized rule group; wherein the execution action includes retesting or sending an early warning notification. The multi-dimensional control of the core grain test data of the wafer is realized, and an early warning is issued for wafers with abnormal data, thereby improving the control accuracy of the core grain test data of the wafer.

[0086] See also Figure 2 , Figure 3 , Figure 2 One of the structural schematic diagrams of a wafer core test data monitoring device provided in an embodiment of the present application; Figure 3 This is a second structural diagram of a wafer core test data monitoring device provided in an embodiment of the present application. Figure 2 As shown in , the chip test data monitoring device 200 includes:

[0087] The parsing module 210 is used for receiving the chip test data file of the wafers to be tested in the target batch sent by the chip test waiting station at the chip acceptance test waiting station, and performing file parsing on the chip test data file to determine a plurality of chip test data of the wafers to be tested in the target batch;

[0088] A judgment module 220 is used to perform rule judgment on the plurality of chip test data based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list at a chip acceptance test waiting station to determine a plurality of judgment results of the wafers to be tested under a target batch;

[0089] The determination module 230 is used to determine the next execution action of the wafer to be inspected under the target batch based on the decision information corresponding to the default configuration rule group and the customized rule group if any judgment result of the wafer to be inspected under the target batch is failure; wherein the execution action includes retesting or sending an early warning notification.

[0090] Further, when the judgment module 220 is used to perform rule judgment on the plurality of the chip test data based on the default configuration rule group, the customized rule group and at least one of the configuration product parameter list at the chip acceptance test waiting station for the default configuration rule group, and determine the plurality of judgment results of the wafers to be tested under the target batch, the judgment module 220 is specifically used to:

[0091] If the wafer yield of the core test data of the wafer to be tested is less than a first preset value, the determination result of the wafer to be tested is failure;

[0092] If the number of cores tested of the wafer to be tested is inconsistent with the number of cores owned by the wafer to be tested, the determination result of the wafer to be tested is failure;

[0093] If the difference in wafer yield of the core test data of any two wafers to be inspected is greater than a second preset value, the judgment result of the wafers to be inspected in the target batch is failure.

[0094] Further, when the judgment module 220 is used to perform rule judgment on the plurality of the chip test data based on the preset default configuration rule group, the customized rule group and at least one of the configuration product parameter list at the chip acceptance test waiting station for the customized rule group, and determine the plurality of judgment results of the wafers to be inspected under the target batch, the judgment module 220 is specifically used to:

[0095] Determine the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user;

[0096] If the test results of the core test data corresponding to multiple consecutive chip test points of the wafer to be tested fail and correspond to the same Bin, it is determined that the judgment result of the wafer to be tested is a failure;

[0097] If the average wafer yield of the plurality of wafers to be inspected in the target batch is lower than a third preset value, it is determined that the judgment result of the wafers to be inspected in the target batch is a failure;

[0098] If the Bin test result in the die test data of the wafer to be inspected is not within the range of the lower limit value and the upper limit value of the Bin configured by the user, the judgment result of the wafer to be inspected is determined.

[0099] Further, when the judgment module 220 is used to determine the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user, the judgment module 220 is specifically used to:

[0100] When detecting whether the wafer yield of the wafer to be detected is lower than the lower limit of the wafer yield or higher than the lower limit of the wafer yield;

[0101] If any one of the above is yes, the determination result of the wafer to be inspected is failure;

[0102] If both are yes, the determination result of the wafer to be inspected is successful.

[0103] Further, when the judgment module 220 is used to perform rule judgment on the plurality of the core particle test data based on the configuration product parameter list to determine the judgment result of the wafer to be tested under the target batch, the judgment module 220 is specifically used to:

[0104] If the name information of the wafer to be detected in the core test data file is inconsistent with the name information in the configuration product parameter list, the judgment result of the wafer to be detected is failure.

[0105] Further, such as Figure 3 As shown, the chip test data monitoring device 200 further includes an execution module 240, and the execution module 240 is used to:

[0106] If the judgment results of the wafers to be inspected in the target batch are all successful, the wafers to be inspected in the target batch are processed in the next process flow.

[0107] The embodiment of the present application provides a wafer chip test data monitoring device, the chip test data monitoring device includes: a parsing module, which is used for the chip acceptance test waiting site to receive the chip test data file of the wafer to be detected under the target batch sent by the chip acceptance test site, and to perform file parsing on the chip test data file to determine multiple chip test data of the wafer to be detected under the target batch; a judgment module, which is used to perform rule judgment on multiple chip test data based on at least one of a preset default configuration rule group, a customized rule group and a configuration product parameter list at the chip acceptance test waiting site to determine multiple judgment results of the wafer to be detected under the target batch; a determination module, which is used to determine the next execution action of the wafer to be detected under the target batch based on the decision information corresponding to the default configuration rule group and the customized rule group if any judgment result of the wafer to be detected under the target batch is failure; wherein the execution action includes retesting or sending an early warning notification. It realizes multi-dimensional control of the chip test data of the wafer, and issues an early warning for wafers with abnormal data, thereby improving the control accuracy of the chip test data of the wafer.

[0108] See also Figure 4 , Figure 4 This is a schematic diagram of the structure of an electronic device provided in an embodiment of the present application. Figure 4 As shown in , the electronic device 400 includes a processor 410 , a memory 420 and a bus 430 .

[0109] The memory 420 stores machine-readable instructions executable by the processor 410. When the electronic device 400 is running, the processor 410 communicates with the memory 420 via the bus 430. When the machine-readable instructions are executed by the processor 410, the above-mentioned Figure 1 The steps of the method for monitoring the wafer core test data in the method embodiment shown in the figure, and the specific implementation method thereof can be referred to the method embodiment, which will not be described in detail here.

[0110] The present application also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, the computer program can execute the above-mentioned Figure 1 The steps of the method for monitoring the wafer core test data in the method embodiment shown in the figure, and the specific implementation method thereof can be referred to the method embodiment, which will not be described in detail here.

[0111] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0112] In the several embodiments provided in the present application, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. The device embodiments described above are merely schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some communication interfaces, and the indirect coupling or communication connection of devices or units can be electrical, mechanical or other forms.

[0113] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0114] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0115] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present application can essentially be embodied in the form of a software product, or in other words, the part that contributes to the prior art or the part of the technical solution. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk.

[0116] Finally, it should be noted that the above-described embodiments are only specific implementation methods of the present application, which are used to illustrate the technical solutions of the present application, rather than to limit them. The protection scope of the present application is not limited thereto. Although the present application is described in detail with reference to the above-mentioned embodiments, ordinary technicians in the field should understand that any technician familiar with the technical field can still modify the technical solutions recorded in the above-mentioned embodiments within the technical scope disclosed in the present application, or can easily think of changes, or make equivalent replacements for some of the technical features therein; and these modifications, changes or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application, and should be included in the protection scope of the present application. Therefore, the protection scope of the present application shall be based on the protection scope of the claims.

Claims

1. A method for monitoring chip test data of a wafer, characterized in that: The core particle test data monitoring method comprises: The chip acceptance test waiting station receives a chip test data file of the wafers to be tested in the target batch sent by the chip acceptance test station, and performs file parsing on the chip test data file to determine a plurality of chip test data of the wafers to be tested in the target batch; At the chip acceptance test waiting station, based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, a plurality of chip test data are subjected to rule judgment to determine a plurality of judgment results of the wafers to be inspected under a target batch; If any judgment result of the wafers to be inspected under the target batch is failure, the next execution action of the wafers to be inspected under the target batch is determined based on the decision information corresponding to the default configuration rule group and the customized rule group; wherein the execution action includes retesting or sending an early warning notification.

2. The chip test data monitoring method according to claim 1, characterized in that: For the default configuration rule group, at the chip acceptance test waiting station, based on at least one of the preset default configuration rule group, the customized rule group and the configuration product parameter list, a plurality of the chip test data are subjected to rule judgment to determine a plurality of judgment results of the wafers to be inspected under the target batch, including: If the wafer yield of the core test data of the wafer to be tested is less than a first preset value, the determination result of the wafer to be tested is failure; If the number of cores tested of the wafer to be tested is inconsistent with the number of cores owned by the wafer to be tested, the determination result of the wafer to be tested is failure; If the difference in wafer yield of the core test data of any two wafers to be inspected is greater than a second preset value, the judgment result of the wafers to be inspected in the target batch is failure.

3. The chip test data monitoring method according to claim 1, characterized in that: For the customized rule group, at the chip acceptance test waiting station, a plurality of the chip test data are subjected to rule judgment based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, to determine a plurality of judgment results of the wafers to be inspected under the target batch, including: Determine the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user; If the test results of the core test data corresponding to multiple consecutive chip test points of the wafer to be tested fail and correspond to the same Bin, it is determined that the judgment result of the wafer to be tested is a failure; If the average wafer yield of the plurality of wafers to be inspected in the target batch is lower than a third preset value, it is determined that the judgment result of the wafers to be inspected in the target batch is a failure; If the Bin test result in the die test data of the wafer to be inspected is not within the range of the lower limit value and the upper limit value of the Bin configured by the user, the judgment result of the wafer to be inspected is determined.

4. The chip test data monitoring method according to claim 3, characterized in that: The determination of the judgment result of the wafer to be inspected based on the lower limit value and the upper limit value of the wafer yield configured by the user includes: When detecting whether the wafer yield of the wafer to be detected is lower than the lower limit of the wafer yield or higher than the lower limit of the wafer yield; If any one of the above is yes, the determination result of the wafer to be inspected is failure; If both are yes, the determination result of the wafer to be inspected is successful.

5. The chip test data monitoring method according to claim 1, characterized in that: The step of performing rule judgment on the plurality of chip test data based on the configured product parameter list to determine the judgment result of the wafer to be tested under the target batch includes: If the name information of the wafer to be detected in the core test data file is inconsistent with the name information in the configuration product parameter list, the judgment result of the wafer to be detected is failure.

6. The chip test data monitoring method according to claim 1, characterized in that: At the chip acceptance test waiting station, after performing rule judgment on the plurality of chip test data based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list to determine a plurality of judgment results of the wafers to be inspected under a target batch, the chip test data monitoring method further includes: If the judgment results of the wafers to be inspected in the target batch are all successful, the wafers to be inspected in the target batch are processed in the next process flow.

7. A wafer chip test data monitoring device, characterized in that: The chip test data monitoring device comprises: The parsing module is used for receiving the chip test data file of the wafers to be tested under the target batch sent by the chip test waiting station at the chip acceptance test waiting station, and performing file parsing on the chip test data file to determine a plurality of chip test data of the wafers to be tested under the target batch; A judgment module, configured to perform rule judgment on the plurality of chip test data at the chip acceptance test waiting station based on at least one of a preset default configuration rule group, a customized rule group, and a configuration product parameter list, and determine a plurality of judgment results of the wafers to be tested under a target batch; A determination module is used to determine the next execution action of the wafers to be inspected under the target batch based on the decision information corresponding to the default configuration rule group and the customized rule group if any judgment result of the wafers to be inspected under the target batch is failure; wherein the execution action includes retesting or sending an early warning notification.

8. The chip test data monitoring device according to claim 7, characterized in that: When the judgment module is used to perform rule judgment on the plurality of the chip test data at the chip acceptance test waiting station based on the default configuration rule group, the customized rule group and at least one of the configuration product parameter list, and determine a plurality of judgment results of the wafers to be tested under the target batch, the judgment module is specifically used to: If the wafer yield of the core test data of the wafer to be tested is less than a first preset value, the determination result of the wafer to be tested is failure; If the number of cores tested of the wafer to be tested is inconsistent with the number of cores owned by the wafer to be tested, the determination result of the wafer to be tested is failure; If the difference in wafer yield of the core test data of any two wafers to be inspected is greater than a second preset value, the judgment result of the wafers to be inspected in the target batch is failure.

9. An electronic device, characterized in that: include: A processor, a memory and a bus, wherein the memory stores machine-readable instructions executable by the processor, and when the electronic device is running, the processor and the memory communicate through the bus, and the machine-readable instructions are executed by the processor to execute the steps of the wafer core grain test data monitoring method as described in any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the method for monitoring chip test data of a wafer as claimed in any one of claims 1 to 6 are executed.