Chip defect detection method and system of wafer and electronic equipment

Abstract

The invention relates to a wafer chip defect detection method and system and electronic equipment, and relates to the technical field of semiconductors. The method comprises the steps that a to-be-detected chip image and an adjacent chip image are acquired, the to-be-detected chip image represents the image of a to-be-detected chip on a wafer, and the adjacent chip image represents the image of any chip adjacent to the to-be-detected chip on the wafer; according to the image of the chip to be detected and the image of the adjacent chip, generating a gray difference image which is used for describing the gray difference between the image of the chip to be detected and the image of the adjacent chip; judging whether a potential defect area exists in the gray difference image or not, if yes, obtaining the potential defect area from the gray difference image, and performing defect retest according to each potential defect area to obtain a defect detection result; and if not, determining that the to-be-detected chip has no defect.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a wafer chip defect detection method, system and electronic equipment. Background Art

[0002] Wafer defect detection is an essential step in the wafer manufacturing process. Generally, defects on wafers are divided into the following two types: random defects and systematic defects. For systematic defects, they are mainly caused by changes in the mask and exposure process, and will occur in the same position on the circuit pattern of all projected molds, or in places where the exposure conditions are very difficult and require fine adjustment. This defect is suitable for the Die-to-Database detection method, which essentially compares the image of the chip with the model image based on the chip design layout to identify the systematic defects of the chip. Random defects are mainly caused by particles attached to the surface of the wafer, so their location cannot be predicted.

[0003] For random defect detection, the mainstream detection methods are mainly Die-to-Golden Die and Die to Die. Die-to-Golden Die will pre-select and obtain the image of the specified golden die, which refers to the template known to be defect-free in manufacturing. However, due to changes in manufacturing production lines, it is often difficult to obtain the golden die image as the specified template.

[0004] The Die to Die method compares the inspection die image with other die images to obtain a differential image, and then obtains defects by post-processing the differential image. Although this method saves the trouble of obtaining the golden die template, it usually needs to be compared with multiple images of adjacent dies. An obvious problem is that it is time-consuming. Another problem is to identify and locate various defects based on the original inspection image. The key is to ensure that the signal intensity of the defective area in the differential image of different dies should be significantly greater than the predefined threshold. However, setting the predefined threshold is usually not an easy task. It often needs to be manually adjusted according to image changes, which also leads to a very high rate of false defect capture, which brings inconvenience to users. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a wafer chip defect detection method, system and electronic equipment to solve the above-mentioned calculation problem.

[0006] The technical solution of the present invention to solve the above-mentioned technical problems is as follows: A chip defect detection method for a wafer, comprising: obtaining an image of a chip to be detected and an image of an adjacent chip, the image of the chip to be detected representing the image of the chip to be detected on the wafer, and the image of the adjacent chip representing the image of any chip adjacent to the chip to be detected on the wafer; generating a grayscale difference map based on the image of the chip to be detected and the image of the adjacent chip, the grayscale difference map being used to describe the grayscale difference between the image of the chip to be detected and the image of the adjacent chip; judging whether there is a potential defect area in the grayscale difference map, and if so, obtaining the potential defect area from the grayscale difference map, and performing defect retesting based on each of the potential defect areas to obtain a defect detection result; if not, determining that the chip to be detected is defect-free.

[0007] The beneficial effect of the present invention is that: in the present invention, the image of the chip to be detected is compared with an image of an adjacent chip to obtain a preliminary defect result. Based on the preliminary defect result, each defect is then re-detected to finally obtain a high-quality defect detection result. The present invention can complete chip defect detection through two chip images, and through the defect reconfirmation link, the instability of human intervention is reduced, and the accuracy of the defect detection result is ensured.

[0008] Based on the above technical solution, the present invention can also be improved as follows.

[0009] Furthermore, the grayscale difference map is generated based on the chip image to be detected and the adjacent chip image, including: aligning the chip image to be detected and the adjacent chip image to obtain a new chip image to be detected and a new adjacent chip image; calculating the first grayscale difference between each pixel point in the new chip image to be detected and each pixel point in the new adjacent chip image based on the new chip image to be detected and the new adjacent chip image; generating the grayscale difference map based on each of the first grayscale differences.

[0010] Further, the determination of whether there is a potential defect area in the grayscale difference map includes: calculating a truncation threshold based on the new chip image to be detected, the new adjacent chip image and the grayscale difference map; for each pixel in the grayscale difference map, determining whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, setting the grayscale value corresponding to the pixel to zero to obtain a new grayscale difference map; performing binarization and morphological dilation processing on the new grayscale difference map respectively to obtain a first binarized image; determining whether there is a pixel with a grayscale value of zero in the first binarized image, and if so, determining that there is a potential defect area in the grayscale difference map; otherwise, determining that there is no potential defect area in the grayscale difference map.

[0011] Further, the calculation of the truncation threshold according to the new chip image to be detected, the new adjacent chip image and the grayscale difference map includes: extracting a first background area image and a second background area image from the new chip image to be detected and the new adjacent chip image, respectively, the first background area image representing the image of the area other than the chip to be detected in the new chip image, and the second background area image representing the image of the area other than the adjacent chips in the new adjacent chip image; calculating the second grayscale difference between each pixel point in the first background area image and each pixel point in the second background area image according to the first background area image and the second background area image; calculating the first standard deviation according to each of the first grayscale differences; calculating the second standard deviation according to each of the second grayscale differences; and calculating the truncation threshold according to the first standard deviation and the second standard deviation.

[0012] Further, calculating the truncation threshold according to the first standard deviation and the second standard deviation includes: calculating the truncation threshold according to the first standard deviation and the second standard deviation by a first formula, wherein the first formula is:

[0013] threshold=min{3*sigma2,sigma1};

[0014] Among them, threshold is the cutoff threshold, sigma1 is the first standard deviation, and sigma2 is the second standard deviation.

[0015] Furthermore, the step of obtaining the potential defect region from the grayscale difference image includes: obtaining the potential defect region through a connected domain analysis technique according to the first binarized image.

[0016] Furthermore, defect retesting is performed on each of the potential defect areas to obtain a defect detection result, including: for each of the potential defect areas, defect detection is performed on the potential defect area according to the grayscale difference map and the truncation threshold to obtain a detection result; and the defect detection result is obtained based on each of the detection results.

[0017] Further, the method performs defect detection on the potential defect area according to the grayscale difference map and the truncation threshold to obtain a detection result, including: obtaining an image of the local area where the potential defect area is located in the grayscale difference map to obtain a defective local image; for each pixel in the defective local image, determining whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, setting the grayscale value corresponding to the pixel to zero to obtain a new defective local image; performing binarization and morphological dilation processing on the new defective local image in turn to obtain a second binarized image; determining whether there are pixels with a grayscale value of zero in the second binarized image, and if so, generating the detection result according to the second binarized image through a connected domain analysis technique, the detection result including the location information and size information of the defect in the potential defect area; otherwise, determining that the detection result is that there is no defect in the potential defect area.

[0018] In order to solve the above technical problems, the present invention also provides a wafer chip defect detection system, comprising:

[0019] An image acquisition module is used to acquire an image of a chip to be detected and an image of an adjacent chip, wherein the image of the chip to be detected represents an image of the chip to be detected on the wafer, and the image of the adjacent chip represents an image of any chip adjacent to the chip to be detected on the wafer;

[0020] An image processing module, used to generate a grayscale difference map according to the chip image to be detected and the adjacent chip image, wherein the grayscale difference map is used to describe the grayscale difference between the chip image to be detected and the adjacent chip image;

[0021] The defect detection module is used to determine whether there is a potential defect area in the grayscale difference image. If so, the potential defect area is obtained from the grayscale difference image, and defect retest is performed according to each potential defect area to obtain a defect detection result; if not, it is determined that the chip to be detected is defect-free.

[0022] To solve the above technical problems, the present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, the chip defect detection method for a wafer as described above is implemented. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 A flow chart of a wafer chip defect detection method of the present invention;

[0024] Figure 2A schematic diagram of calculating a grayscale difference image of a wafer chip defect detection method of the present invention;

[0025] Figure 3 A schematic diagram of potential defect areas of a wafer chip defect detection method of the present invention;

[0026] Figure 4 A schematic diagram of a wafer chip defect detection system according to the present invention. DETAILED DESCRIPTION

[0027] The principles and features of the present invention are described below. The examples given are only used to explain the present invention and are not used to limit the scope of the present invention.

[0028] like Figure 1 As shown, this embodiment provides a method for detecting chip defects of a wafer, comprising:

[0029] S1. Acquire an image of a chip to be detected and an image of an adjacent chip, wherein the image of the chip to be detected represents an image of the chip to be detected on a wafer, and the image of the adjacent chip represents an image of any chip adjacent to the chip to be detected on the wafer.

[0030] Specifically, the optical inspection device obtains the scanned images of each die (chip) on the wafer to be inspected, that is, the scanned images of each chip. According to the scanning order, each die image can be combined with its adjacent die images to perform defect detection.

[0031] S2. Generate a grayscale difference map according to the chip image to be detected and the adjacent chip image, wherein the grayscale difference map is used to describe the grayscale difference between the chip image to be detected and the adjacent chip image.

[0032] Optionally, in an embodiment, generating a grayscale difference map based on the chip image to be detected and the adjacent chip image includes: aligning the chip image to be detected and the adjacent chip image to obtain a new chip image to be detected and a new adjacent chip image; calculating, based on the new chip image to be detected and the new adjacent chip image, first grayscale differences between each pixel point in the new chip image to be detected and each pixel point in the new adjacent chip image; generating the grayscale difference map based on each of the first grayscale differences.

[0033] During the image acquisition process, due to the influence of equipment accuracy, there will usually be a slight offset between the two chip images. Therefore, in order to ensure the accuracy of the test results, it is necessary to first align the image of the chip to be tested and the image of the adjacent chip. For each pixel in the new image of the chip to be tested, calculate the difference between the grayscale value of the pixel and the grayscale value of the pixel corresponding to the pixel in the new adjacent chip image to obtain a first grayscale difference. According to the above method, the first grayscale difference is calculated for each pixel in the new image of the chip to be tested and each pixel in the new adjacent chip image to obtain a grayscale difference map, such as Figure 2 shown.

[0034] S3. Determine whether there is a potential defect area in the grayscale difference image. If so, obtain the potential defect area from the grayscale difference image, and perform defect retest on each potential defect area to obtain a defect detection result; if not, determine that the chip to be tested is defect-free.

[0035] Optionally, in an embodiment, the determining whether there is a potential defect area in the grayscale difference map includes: calculating a truncation threshold based on the new chip image to be detected, the new adjacent chip image and the grayscale difference map; for each pixel in the grayscale difference map, determining whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, setting the grayscale value corresponding to the pixel to zero to obtain a new grayscale difference map; performing binarization and morphological dilation processing on the new grayscale difference map respectively to obtain a first binarized image; determining whether there is a pixel with a grayscale value of zero in the first binarized image, and if so, determining that there is a potential defect area in the grayscale difference map; otherwise, determining that there is no potential defect area in the grayscale difference map.

[0036] When performing truncation processing, for each pixel in the grayscale difference image, it is necessary to determine whether its corresponding grayscale value is less than or equal to the truncation threshold. If the grayscale value is less than or equal to the truncation threshold, the grayscale value of the pixel is set to zero. If the grayscale value is greater than the truncation threshold, the grayscale value of the pixel remains unchanged.

[0037] Optionally, in an embodiment, the calculating the truncation threshold according to the new chip image to be detected, the new adjacent chip image and the grayscale difference map includes: extracting a first background area image and a second background area image from the new chip image to be detected and the new adjacent chip image, respectively, the first background area image representing the image of the area other than the chip to be detected in the new chip image, and the second background area image representing the image of the area other than the adjacent chips in the new adjacent chip image; calculating the second grayscale difference between each pixel point in the first background area image and each pixel point in the second background area image according to the first background area image and the second background area image; calculating the first standard deviation according to each of the first grayscale differences; calculating the second standard deviation according to each of the second grayscale differences; and calculating the truncation threshold according to the first standard deviation and the second standard deviation.

[0038] The first background area image and the second background area image are acquired based on feature extraction, that is, the chips in the to-be-detected chip image and the adjacent chip image are features, and the area other than the features is the background area.

[0039] Optionally, in an embodiment, calculating the truncation threshold according to the first standard deviation and the second standard deviation includes: calculating the truncation threshold according to the first standard deviation and the second standard deviation by a first formula, where the first formula is:

[0040] threshold=min{3*sigma2,sigma1};

[0041] Among them, threshold is the cutoff threshold, sigma1 is the first standard deviation, and sigma2 is the second standard deviation.

[0042] There is often a lot of noise interference in the grayscale difference image obtained by direct subtraction, and the real defects need to be picked out from it. It is generally believed that the place where the grayscale value difference is large is the location where the defect occurs. Based on this, it is necessary to set a suitable truncation threshold to truncate the grayscale difference image to filter out the noise in order to obtain the real defect. In practical applications, the threshold is usually set manually by the user or based on experience. However, the products are different, and the types of defects are also numerous, and the setting of the threshold needs to be constantly adjusted. For non-professionals, setting the threshold becomes an extremely difficult task. In this embodiment, the truncation threshold can be directly calculated based on the new chip image to be detected, the new adjacent chip image and the grayscale difference image, which solves the problem of difficulty in setting the above threshold.

[0043] Optionally, in an embodiment, the step of obtaining a potential defect region from the grayscale difference image includes: obtaining a potential defect region by a connected domain analysis technique according to the first binarized image, such as Figure 3 shown.

[0044] By extracting the areas with non-zero gray values ​​(i.e., the locations of potential defects) in the first binary image through the connected domain analysis technology, the location and size information of each potential defect can be automatically obtained.

[0045] Optionally, in an embodiment, defect retesting is performed on each of the potential defect areas to obtain a defect detection result, including: for each of the potential defect areas, defect detection is performed on the potential defect area according to the grayscale difference map and the cutoff threshold to obtain a detection result; and the defect detection result is obtained based on each of the detection results.

[0046] The secondary inspection of defects can not only solve the problem of improper setting of automatic thresholds in occasional cases, but also solve the problem of a large number of false positive defects caused by inaccurate image alignment. Based on the above steps, the final defect distribution results and defect size information can be obtained. This technical solution not only solves the problem of difficult threshold setting, but also greatly improves the precision and accuracy of defect detection.

[0047] Optionally, in an embodiment, defect detection is performed on the potential defect area according to the grayscale difference map and the truncation threshold to obtain a detection result, including: obtaining an image of the local area where the potential defect area is located in the grayscale difference map to obtain a defective local image; for each pixel in the defective local image, determining whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, setting the grayscale value corresponding to the pixel to zero to obtain a new defective local image; binarizing and morphologically expanding the new defective local image in sequence to obtain a second binarized image; determining whether there are pixels with a grayscale value of zero in the second binarized image, and if so, generating the detection result according to the second binarized image through a connected domain analysis technique, the detection result including location information and size information of the defect in the potential defect area; otherwise, determining that the detection result is that there is no defect in the potential defect area.

[0048] In this embodiment, the local area where the potential defect area is located refers to the potential defect area being framed by a rectangular frame, and the range within the rectangular frame is the local area where the potential defect area is located.

[0049] The prior art solution obtains a differential image by comparing multiple images, obtains a defect distribution image by manually adjusting and setting a threshold, and outputs a defect detection result. In the present invention, based on the idea of ​​Die to die, the image of the chip to be detected is compared with an image of an adjacent chip, and the differential image processing threshold is automatically determined according to the change in the grayscale of the image to obtain a preliminary defect result. Based on the preliminary defect result, each defect is then subjected to a secondary detection, and finally a high-quality defect detection result is obtained. The present invention can complete chip defect detection through two chip images, and automatically sets the threshold and defect reconfirmation link through the grayscale features of the image, reducing the instability of human intervention and ensuring the accuracy of the defect detection result. In summary, through the present invention, the time-consuming problem of the existing detection method is solved, and the difficulty of manually setting and adjusting the threshold is avoided. And through secondary detection, a large number of false alarms of defects are eliminated, and the accuracy of defect detection is improved. Through this method, each chip in the wafer is detected in turn, and the defect detection of the wafer can be realized.

[0050] Embodiment 2

[0051] like Figure 4 As shown, this embodiment provides a wafer chip defect detection system, including:

[0052] An image acquisition module is used to acquire an image of a chip to be detected and an image of an adjacent chip, wherein the image of the chip to be detected represents an image of the chip to be detected on the wafer, and the image of the adjacent chip represents an image of any chip adjacent to the chip to be detected on the wafer;

[0053] An image processing module, used to generate a grayscale difference map according to the chip image to be detected and the adjacent chip image, wherein the grayscale difference map is used to describe the grayscale difference between the chip image to be detected and the adjacent chip image;

[0054] The defect detection module is used to determine whether there is a potential defect area in the grayscale difference image. If so, the potential defect area is obtained from the grayscale difference image, and defect retest is performed according to each potential defect area to obtain a defect detection result; if not, it is determined that the chip to be detected is defect-free.

[0055] Optionally, in an embodiment, the image processing module includes:

[0056] An alignment processing unit, used for performing alignment processing on the chip image to be detected and the adjacent chip image to obtain a new chip image to be detected and a new adjacent chip image;

[0057] A first difference calculation unit, used for respectively calculating a first grayscale difference between each pixel point in the new chip image to be detected and each pixel point in the new adjacent chip image according to the new chip image to be detected and the new adjacent chip image;

[0058] An image generating unit is used to generate the grayscale difference image according to each of the first grayscale difference values.

[0059] Optionally, in an embodiment, when determining whether there is a potential defect area in the grayscale difference map, the defect detection module is specifically used to: calculate a truncation threshold based on the new chip image to be detected, the new adjacent chip image and the grayscale difference map; for each pixel in the grayscale difference map, determine whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, set the grayscale value corresponding to the pixel to zero to obtain a new grayscale difference map; perform binarization and morphological dilation processing on the new grayscale difference map to obtain a first binarized image; determine whether there is a pixel with a grayscale value of zero in the first binarized image, and if so, determine that there is a potential defect area in the grayscale difference map; otherwise, determine that there is no potential defect area in the grayscale difference map.

[0060] Optionally, in an embodiment, the calculating the truncation threshold according to the new chip image to be detected, the new adjacent chip image and the grayscale difference map includes: extracting a first background area image and a second background area image from the new chip image to be detected and the new adjacent chip image, respectively, the first background area image representing the image of the area other than the chip to be detected in the new chip image, and the second background area image representing the image of the area other than the adjacent chips in the new adjacent chip image; calculating the second grayscale difference between each pixel point in the first background area image and each pixel point in the second background area image according to the first background area image and the second background area image; calculating the first standard deviation according to each of the first grayscale differences; calculating the second standard deviation according to each of the second grayscale differences; and calculating the truncation threshold according to the first standard deviation and the second standard deviation.

[0061] Optionally, in an embodiment, calculating the truncation threshold according to the first standard deviation and the second standard deviation includes: calculating the truncation threshold according to the first standard deviation and the second standard deviation by a first formula, where the first formula is:

[0062] threshold=min{3*sigma2,sigma1};

[0063] Among them, threshold is the cutoff threshold, sigma1 is the first standard deviation, and sigma2 is the second standard deviation.

[0064] Optionally, in an embodiment, when acquiring the potential defect area from the grayscale difference image, the defect detection module is specifically used to: acquire the potential defect area through a connected domain analysis technology based on the first binarized image.

[0065] Optionally, in an embodiment, when the defect detection module performs defect retest according to each of the potential defect areas to obtain a defect detection result, it is specifically used to: for each of the potential defect areas, perform defect detection on the potential defect area according to the grayscale difference map and the cutoff threshold to obtain a detection result; obtain the defect detection result based on each of the detection results.

[0066] Optionally, in an embodiment, defect detection is performed on the potential defect area according to the grayscale difference map and the truncation threshold to obtain a detection result, including: obtaining an image of the local area where the potential defect area is located in the grayscale difference map to obtain a defective local image; for each pixel in the defective local image, determining whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, setting the grayscale value corresponding to the pixel to zero to obtain a new defective local image; binarizing and morphologically expanding the new defective local image in sequence to obtain a second binarized image; determining whether there are pixels with a grayscale value of zero in the second binarized image, and if so, generating the detection result according to the second binarized image through a connected domain analysis technique, the detection result including location information and size information of the defect in the potential defect area; otherwise, determining that the detection result is that there is no defect in the potential defect area.

[0067] Embodiment 3

[0068] This embodiment provides an electronic device, including a memory, a processor, and a computer program stored in the memory and executable on the processor. When the processor executes the computer program, a chip defect detection method for a wafer as described in Embodiment 1 is implemented.

[0069] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0070] Although the embodiments of the present invention have been shown and described above, it is to be understood that the above embodiments are exemplary and are not to be construed as limitations of the present invention. A person skilled in the art may change, modify, replace and vary the above embodiments within the scope of the present invention.

Claims

1. A wafer chip defect detection method, characterized in that: include: Acquire an image of a chip to be detected and an image of an adjacent chip, wherein the image of the chip to be detected represents an image of the chip to be detected on a wafer, and the image of the adjacent chip represents an image of any chip adjacent to the chip to be detected on the wafer; Generate a grayscale difference map according to the chip image to be detected and the adjacent chip image, wherein the grayscale difference map is used to describe the grayscale difference between the chip image to be detected and the adjacent chip image; Determine whether there is a potential defect area in the grayscale difference image. If so, obtain the potential defect area from the grayscale difference image, and perform defect retest on each potential defect area to obtain a defect detection result; if not, determine that the chip to be tested is defect-free.

2. The method for detecting chip defects of a wafer according to claim 1, characterized in that: The step of generating a grayscale difference image according to the chip image to be detected and the adjacent chip image comprises: Performing alignment processing on the chip image to be detected and the adjacent chip image to obtain a new chip image to be detected and a new adjacent chip image; According to the new chip image to be detected and the new adjacent chip image, respectively calculating the first grayscale difference between each pixel point in the new chip image to be detected and each pixel point in the new adjacent chip image; The grayscale difference map is generated according to each of the first grayscale difference values.

3. A wafer chip defect detection method according to claim 2, characterized in that: The determining whether there is a potential defect area in the grayscale difference image includes: Calculating a truncation threshold according to the new chip image to be detected, the new adjacent chip image and the grayscale difference image; For each pixel in the grayscale difference image, determine whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, set the grayscale value corresponding to the pixel to zero to obtain a new grayscale difference image; Performing binarization processing and morphological dilation processing on the new grayscale difference image respectively to obtain a first binarized image; It is determined whether there are pixels with a grayscale value of zero in the first binary image. If so, it is determined that there is a potential defect area in the grayscale difference image; otherwise, it is determined that there is no potential defect area in the grayscale difference image.

4. The method for detecting chip defects of a wafer according to claim 3, characterized in that: The calculating the truncation threshold according to the new chip image to be detected, the new adjacent chip image and the grayscale difference map includes: Extracting a first background area image and a second background area image from the new chip to be detected image and the new adjacent chip image respectively, wherein the first background area image represents an image of an area other than the chip to be detected in the new chip to be detected image, and the second background area image represents an image of an area other than the adjacent chip in the new adjacent chip image; According to the first background area image and the second background area image, respectively calculating a second grayscale difference between each pixel point in the first background area image and each pixel point in the second background area image; Calculating a first standard deviation according to each of the first grayscale differences; Calculating a second standard deviation according to each of the second grayscale differences; The cutoff threshold is calculated according to the first standard deviation and the second standard deviation.

5. The method for detecting chip defects of a wafer according to claim 4, characterized in that: The calculating the cutoff threshold according to the first standard deviation and the second standard deviation includes: The cutoff threshold is calculated according to the first standard deviation and the second standard deviation by using a first formula, where the first formula is: threshold=min{3*sigma2,sigma1}; Among them, threshold is the cutoff threshold, sigma1 is the first standard deviation, and sigma2 is the second standard deviation.

6. The method for detecting chip defects of a wafer according to claim 3, characterized in that: The step of acquiring the potential defect region from the grayscale difference image includes: acquiring the potential defect region through a connected domain analysis technique according to the first binarized image.

7. A wafer chip defect detection method according to claim 6, characterized in that: The defect retesting is performed according to each of the potential defect areas to obtain defect detection results, including: For each of the potential defect regions, performing defect detection on the potential defect region according to the grayscale difference map and the cutoff threshold to obtain a detection result; The defect detection result is obtained according to each of the detection results.

8. A wafer chip defect detection method according to claim 7, characterized in that: The step of performing defect detection on the potential defect area according to the grayscale difference map and the cutoff threshold to obtain a detection result includes: Acquire an image of a local area where the potential defect area is located in the grayscale difference image to obtain a defect local image; For each pixel in the defect local image, determine whether the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, and when the grayscale value corresponding to the pixel is less than or equal to the truncation threshold, set the grayscale value corresponding to the pixel to zero to obtain a new defect local image; Sequentially performing binarization processing and morphological dilation processing on the new defect local image to obtain a second binarized image; Determine whether there are pixels with a grayscale value of zero in the second binary image. If so, generate the detection result according to the second binary image through the connected domain analysis technology, and the detection result includes the position information and size information of the defect in the potential defect area; otherwise, determine that the detection result is that there is no defect in the potential defect area.

9. A wafer chip defect detection system, characterized in that: include: An image acquisition module is used to acquire an image of a chip to be detected and an image of an adjacent chip, wherein the image of the chip to be detected represents an image of the chip to be detected on the wafer, and the image of the adjacent chip represents an image of any chip adjacent to the chip to be detected on the wafer; An image processing module, used to generate a grayscale difference map according to the chip image to be detected and the adjacent chip image, wherein the grayscale difference map is used to describe the grayscale difference between the chip image to be detected and the adjacent chip image; The defect detection module is used to determine whether there is a potential defect area in the grayscale difference image. If so, the potential defect area is obtained from the grayscale difference image, and defect retest is performed according to each potential defect area to obtain a defect detection result; if not, it is determined that the chip to be detected is defect-free.

10. An electronic device, characterized in that: The invention comprises a memory, a processor and a computer program stored in the memory and executable on the processor, wherein when the processor executes the computer program, a chip defect detection method for a wafer as claimed in any one of claims 1 to 8 is implemented.

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