Over-voltage and under-voltage power supply protection circuit with latch function and electric appliance power supply
By designing an overvoltage and undervoltage power supply protection circuit with latch function, the problem of difficulty in effectively dealing with power supply abnormalities in the prior art is solved, and the function of timely disconnecting the power supply circuit and latching the state is realized to protect the safe and stable operation of the equipment.
Patent Information
- Application Number
- CN202411789847.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-06
- Publication Date
- 2025-03-11
AI Technical Summary
Existing power protection technologies are difficult to effectively deal with the overvoltage and undervoltage conditions of power supply in electronic power equipment or systems, especially in abnormal situations, inability to disconnect the power supply circuit in time, which may lead to equipment damage or fire.
An overvoltage and undervoltage power protection circuit with latch function is designed, including a voltage comparison circuit, a state latch circuit and a switching circuit. It can disconnect the power supply circuit in time when the power supply is abnormal and latch the disconnected state until the maintenance personnel manually unlock the latch.
It realizes that when there is a power supply abnormality in electronic power equipment or system, timely and effectively disconnect the power supply circuit, protect the equipment from damage, and avoid losses caused by re-powering in abnormal situations.
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Figure CN119602171A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of power supply protection, and in particular to an overvoltage and undervoltage power supply protection circuit with a latching function and an electrical appliance power supply. Background Art
[0002] With the rapid development of science and technology and electronic power, social life is changing with each passing day. Various electronic power equipment or systems have affected all aspects of daily life, from aerospace and energy supply to work, production, transportation and entertainment. They are inseparable from electronic power equipment or systems. Power safety is the premise to ensure the safe and stable operation of electronic power equipment or systems. Power protection is a reliable and efficient technical means to ensure power safety. In the operation of electronic power equipment or systems, it is inevitable that there will be problems such as abnormal voltage, current overload, short circuit, etc. caused by various reasons, which will affect the normal operation of electronic power equipment, damage, and even cause serious consequences such as fire, resulting in economic losses and safety accidents. Through power protection, the power supply can be cut off in time and quickly when a fault occurs, which can effectively prevent the occurrence of these problems, ensure the safe and stable operation of electronic power equipment or systems, and prevent accidents.
[0003] In the prior art, three power protection schemes are often used. The first is to use magnetic beads and TVS protectors together for power protection, the second is to use fuses to design short-circuit protection circuits, and the third is to use microcontrollers. In the scheme of using magnetic beads and TVS protectors together for power protection, the TVS protector can only play a protective role after the overvoltage and the voltage exceeds the clamping voltage of the TVS protector. If the abnormality is undervoltage caused by some reason, or the overvoltage does not exceed the clamping voltage of the TVS protector, or even the short circuit of the subsequent circuit causes the power supply voltage to be pulled down, then the TVS protector cannot effectively start the protection mechanism; in addition, continuous large current will also cause the magnetic beads to burn and even cause a fire. In the scheme of using fuses to design short-circuit protection circuits, when the circuit is short-circuited, the current in the circuit increases to the limit value and then the fuse is blown, thereby disconnecting the power supply circuit to protect the subsequent circuit or system. However, for the situation where there is no complete short circuit or the overvoltage voltage is not high and the fuse is not blown to the limit value, the protection scheme cannot effectively play a protective role. In the protection scheme in which the microcontroller unit participates, when the microcontroller unit detects that the power supply is abnormal, the microcontroller unit cuts off the power supply circuit by controlling the power switch, thereby avoiding damage to the subsequent circuit. However, if the abnormality causes the power supply of the microcontroller unit itself to be abnormal, then since the microcontroller unit itself is in an abnormal working condition, it is impossible to detect the abnormality in a timely and effective manner, and it is also impossible to quickly cut off the power supply to the subsequent circuit. In addition, the scheme also has no state latching function. If the power supply recovery is started before the fault is eliminated, it may cause abnormal operation of the subsequent circuit.
[0004] Based on this, there is an urgent need for a circuit structure that can promptly and effectively disconnect the power supply circuit when an abnormal power supply occurs in an electronic power device or system and can latch the power supply disconnection state under abnormal conditions. Summary of the invention
[0005] The purpose of the present invention is to provide an overvoltage and undervoltage power supply protection circuit and an electrical power supply with a latching function, which can promptly and effectively disconnect the power supply circuit when an abnormal power supply occurs in an electronic power device or system to protect the electronic power device from being damaged and can latch the power supply disconnection state under abnormal conditions. The power supply circuit of the electronic power device or system will be restored only after the maintenance personnel completes the maintenance and manually releases the latch, thereby avoiding losses caused by power supply again under abnormal conditions of the electronic power device or system.
[0006] The present invention is implemented through the following technical solutions: an overvoltage and undervoltage power supply protection circuit with a latching function, the overvoltage and undervoltage power supply protection circuit comprising a voltage comparison circuit, a state latching circuit and a switch circuit;
[0007] The voltage comparison circuit includes an undervoltage judgment circuit, an undervoltage comparator D2, an overvoltage judgment circuit, an overvoltage comparator D3, a transistor Q1 and a transistor Q2, the inverting input end of the D2 is connected to the undervoltage judgment circuit, the non-phase input end of the D2 is connected to the reference voltage, the non-phase input end of the D3 is connected to the overvoltage judgment circuit, the inverting input end of the D3 is connected to the reference voltage, the input ends of the undervoltage judgment circuit and the overvoltage judgment circuit are both connected to the power supply output, the output end of the D2 is connected to the base of Q1 via a resistor R7, the output end of the D3 is connected to the base of Q2 via a resistor R8, the collector of the Q1 is pulled up to the power supply input via a resistor R9, the emitters of the Q1 and Q2 are connected to ground, and the collectors of the Q1 and Q2 are connected as a control signal output end;
[0008] The input end of the state latch circuit is connected to the control signal output end, the output end of the state latch circuit is connected to the input end of the switch circuit, and the output end of the switch circuit is connected to the power supply output.
[0009] According to a preferred embodiment, the reference voltage is provided by a reference voltage circuit, and the reference voltage circuit includes a precision bandgap reference voltage source D1;
[0010] The positive terminal of D1 is connected to a voltage comparison circuit via a resistor R2 to provide a reference voltage, and is connected to a power supply output via a resistor R1, and the negative terminal of D1 is grounded.
[0011] According to a preferred embodiment, the undervoltage judgment circuit includes a resistor R3 and a resistor R4, a first end of the R3 is connected to the power supply output, a second end of the R3 is connected to the first end of the R4 and then connected to the inverting input end of the D2, and a second end of the R4 is grounded;
[0012] The overvoltage determination circuit includes a resistor R5 and a resistor R6, wherein a first end of R5 is connected to a power supply output, a second end of R5 is connected to a first end of R6 and then to a non-inverting input end of D3, and a second end of R6 is grounded.
[0013] According to a preferred embodiment, the state latch circuit includes a switch control circuit, a NAND gate circuit D4 and a NAND gate circuit D5;
[0014] The switch control circuit includes a switch K1, a first end of K1 is connected to a first input end of D4 and is pulled up to a power supply input through a resistor R10, a second end of K1 is grounded, a second input end of D4 is connected to an output end of D5, an output end of D4 is connected to a switch circuit through a resistor R12 and is pulled up to a power supply input through a resistor R11, a first input end of D5 is connected to a control signal output end, a second input end of D5 is connected to an output end of D4, and an output end of D5 is pulled up to a power supply input through a resistor R13.
[0015] According to a preferred embodiment, K1 is a push button switch or a dip switch.
[0016] According to a preferred embodiment, the switch circuit includes a MOS transistor D7 and a MOS transistor D6;
[0017] The gate of D7 is connected to R12, the source of D7 is grounded, the drain of D7 is connected to the gate of D6 via resistor R15 and is pulled up to the power supply input through resistor R14, the source of D6 is connected to the power supply input, and the drain of D6 is connected to the power supply output.
[0018] According to a preferred implementation, the D7 is an NMOS tube, and the D6 is a PMOS tube.
[0019] According to a preferred embodiment, the switch circuit further includes a capacitor C1, a first end of C1 is connected to the gate of D6, and a second end of C1 is connected to a power supply input.
[0020] According to a preferred embodiment, the overvoltage and undervoltage power supply protection circuit is composed of separate components.
[0021] The present invention also provides an electrical appliance power supply, comprising the overvoltage and undervoltage power supply protection circuit with latching function as described above.
[0022] The technical solution of an overvoltage and undervoltage power supply protection circuit and an electrical power supply with a latching function provided by the present invention has at least the following advantages and beneficial effects: (1) When an abnormal power supply occurs in an electronic power device or system, the overvoltage and undervoltage power supply protection circuit provided by the present invention can promptly and effectively disconnect the power supply circuit to protect the electronic power device from being damaged and can latch the power supply disconnection state under abnormal conditions. The power supply circuit of the electronic power device or system will not be restored until the maintenance personnel completes the maintenance and manually releases the latching state, thereby avoiding losses caused by power supply again under abnormal conditions of the electronic power device or system; (2) The overvoltage and undervoltage power supply protection circuit provided by the present invention is composed of separate components, which can significantly reduce costs. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] Figure 1 A schematic diagram of the structure of a voltage comparison circuit provided in Embodiment 1 of the present invention;
[0024] Figure 2 A schematic diagram of the structure of a state latch circuit and a switch circuit provided in Embodiment 1 of the present invention;
[0025] Figure 3 A schematic diagram of the output of the overvoltage and undervoltage power supply protection circuit provided in Example 1 of the present invention under normal operation;
[0026] Figure 4 A schematic diagram of the output of the overvoltage and undervoltage power supply protection circuit provided in Example 1 of the present invention in an overvoltage state;
[0027] Figure 5 A schematic diagram of the output of the overvoltage and undervoltage power supply protection circuit provided in Embodiment 1 of the present invention after the power supply is restored in the overvoltage state and the state is latched;
[0028] Figure 6 A schematic diagram of the state latch circuit and the output of the switch circuit that releases the latch state after power supply is restored in an overvoltage state provided in Embodiment 1 of the present invention;
[0029] Figure 7 A schematic diagram of the output of the overvoltage and undervoltage power supply protection circuit provided in Example 1 of the present invention in an undervoltage state;
[0030] Figure 8 A schematic diagram of the output of the overvoltage and undervoltage power supply protection circuit provided in Embodiment 1 of the present invention after the power supply is restored in the undervoltage state and the state is latched;
[0031] Fig. 9 This is a schematic diagram of the output of the state latch circuit and the switch circuit provided in Embodiment 1 of the present invention, in which the latch state is released after power is restored in an undervoltage state. DETAILED DESCRIPTION
[0032] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.
[0033] Example 1
[0034] An embodiment of the present invention provides an overvoltage and undervoltage power supply protection circuit with a latching function. The overvoltage and undervoltage power supply protection circuit includes a voltage comparison circuit, a state latching circuit, and a switch circuit. The whole circuit is composed of separate components to reduce costs.
[0035] See also Figure 1 As shown, the voltage comparison circuit includes an undervoltage judgment circuit, an undervoltage comparator D2, an overvoltage judgment circuit, an overvoltage comparator D3, a transistor Q1 and a transistor Q2.
[0036] The inverting input terminal of D2 is connected to the undervoltage judgment circuit, the non-inverting input terminal of D2 is connected to the reference voltage Vref, the non-inverting input terminal of D3 is connected to the overvoltage judgment circuit, and the inverting input terminal of D3 is connected to the reference voltage Vref.
[0037] In this embodiment, the reference voltage Vref is provided by a reference voltage circuit; the reference voltage circuit includes a precision bandgap reference voltage source D1, which is used to provide an accurate 1.225V voltage output, the positive terminal V+ of D1 is connected to the voltage comparison circuit via a resistor R2 as a reference voltage Vref and connected to the power supply output VCC_OUT via a resistor R1, and the negative terminal V- of D1 is grounded.
[0038] Furthermore, input terminals of the undervoltage determination circuit and the overvoltage determination circuit are both connected to the power supply output VCC_OUT.
[0039] In this embodiment, the undervoltage judgment circuit includes a resistor R3 and a resistor R4; the first end of R3 is connected to the power supply output VCC_OUT, the second end of R3 is connected to the first end of R4 and then connected to the inverting input end of D2, and the second end of R4 is grounded. The overvoltage judgment circuit includes a resistor R5 and a resistor R6, the first end of R5 is connected to the power supply output VCC_OUT, the second end of R5 is connected to the first end of R6 and then connected to the non-inverting input end of D3, and the second end of R6 is grounded.
[0040] Furthermore, the collector of Q1 is pulled up to the power supply input VCC_IN via the resistor R9.
[0041] In this embodiment, the output end of D2 is connected to the base of Q1 via resistor R7, the output end of D3 is connected to the base of Q2 via resistor R8, the emitters of Q1 and Q2 are connected to ground, and the collectors of Q1 and Q2 are connected as control signal output ends to send a control signal control to the state latch circuit.
[0042] Furthermore, the input end of the state latch circuit is connected to the control signal output end.
[0043] See also Figure 2 As shown, in this embodiment, the state latch circuit includes a switch control circuit, a NAND gate circuit D4 and a NAND gate circuit D5; the switch control circuit includes a switch K1, which is a button switch or a dial switch; the first end of K1 is connected to the first input end of D4 and is pulled up to the power supply input VCC_IN through a resistor R10, and the second end of K1 is grounded; the second input end of D4 is connected to the output end of D5, the output end of D4 is connected to the switch circuit through a resistor R12 and is pulled up to the power supply input VCC_IN through a resistor R11, the first input end of D5 is connected to the control signal output end, and receives the control signal control, the second input end of D5 is connected to the output end of D4, and the output end of D5 is pulled up to the power supply input VCC_IN through a resistor R13.
[0044] Furthermore, the output end of the state latch circuit is connected to the input end of the switch circuit, and the output end of the switch circuit is connected to the power supply output.
[0045] In this embodiment, the switch circuit includes an NMOS tube D7, a PMOS tube D6 and a capacitor C1; the gate of D7 is connected to R12, the source of D7 is grounded, the drain of D7 is connected to the gate of D6 via a resistor R15 and is pulled up to the power supply input VCC_IN through a resistor R14, the source of D6 is connected to the power supply input VCC_IN, the drain of D6 is connected to the power supply output VCC_OUT, and the working voltage is output to the subsequent power system; the first end of C1 is connected to the gate of D6, and the second end of C1 is connected to the power supply input VCC_IN to ensure that D6 is not turned on at the moment of power-on to avoid instantaneous surge.
[0046] The principle of the overvoltage and undervoltage power supply protection circuit provided in the embodiment of the present invention is described below:
[0047] See also Figure 3As shown, D1 provides an accurate 1.225V voltage output. When the system is operating normally, R3 and R4 divide the voltage to obtain a voltage level slightly lower than 1.225V, which is connected to the inverting input of D2. At this time, since the output of D2 is in a logic low state, Q1 is not turned on; the collector of Q1 is pulled high due to the existence of R9, that is, the control signal Control is in a logic high state.
[0048] Similarly, R5 and R6 divide the voltage to obtain a level slightly higher than 1.225V, which is connected to the non-inverting input of D3. At this time, since the output of D3 is in a logic low state, Q2 is also not conducting; the collector of Q2 is also pulled high due to the existence of R9, that is, the control signal Control is also in a logic high state.
[0049] At this time, in the state latch circuit, the second input terminal of D5 is in a logic high Logic High state because R11 pulls up, and the control signal Control connected to the first input terminal of D5 is also in a logic high Logic High state, so the output of D5 is in a logic low Logic Low state; the output terminal of D5 is connected to the second input terminal of D4, and the first input terminal of D4 is in a logic high Logic High state due to the pull-up of resistor R10, so the output of D4 is in a logic high Logic High state, and D7 is turned on; since the drain output of D7 is low, the gate of D6 is pulled down to turn on D6, and at this time the drain of D6 is connected to the power supply output VCC_OUT to output the normal working voltage.
[0050] See also Figure 4 As shown, when the system is operating in an overvoltage state, the voltage at the non-inverting input terminal of D3 is greater than the reference voltage Vref at the inverting input terminal. At this time, the output of D3 is in a logic high Logic High state, Q2 is turned on and the collector of Q2 is pulled to ground, so the control signal Control is in a logic low Logic Low state.
[0051] At this time in the state latch circuit, since the output of D5 is in the logic high Logic High state and the output of D4 is in the logic low Logic Low state, D7 is not conducting. At the same time, the gate of D6 is kept at a high level due to the pull-up of R14, so D6 is not conducting. Therefore, the power supply output VCC_OUT connected to the drain of D6 has no output, cutting off the power supply to the subsequent power system, which plays a protective role.
[0052] See also Figure 5As shown, even if the power supply is restored to normal at this time, since the voltage at the positive input terminal of D3 is greater than the reference voltage Vref at the negative input terminal, the output of D3 will be in a logic low Logic Low state, Q2 is not conducting, and therefore the control signal Control is in a logic low Logic Low state. In the state latch circuit, the output of D5 will be in a logic high Logic High state at this time, and the output of D4 will still remain in a logic low Logic Low state. This state is latched, and D7 and D6 will remain in a non-conducting state.
[0053] It should be noted that when an abnormality occurs and causes overvoltage in the power supply of the power-consuming part, the circuit power supply will remain disconnected by controlling D6 and D7 to be non-conductive and the state latch circuit formed by D4 and D5 to latch the logic state. The power supply to the circuit will remain disconnected. The power supply can only be officially restored after the maintenance personnel have checked the abnormality and manually controlled K1 to release the latched state.
[0054] See also Figure 6 As shown, after abnormal overvoltage, K1 is controlled to release the latched state. Specifically, the second end of K1 is grounded. When K1 is manually pressed, the first input end of D4 will be in a logic low Logic Low state, and the second input end of D4 will be in the previous state, that is, in a logic low Logic Low state, so the output of D4 will be in a logic high Logic High state; and at this time, both input ends of D5 are in a logic high Logic High state, so the output of D5 will be in a logic low Logic Low state; after K1 is released, the state connected to the input end of D4 will return to a logic high Logic High state again, and the output of D4 will remain in a logic high Logic High state, and at this time D7 and D6 will also be turned on, so that the drain of D6 connected to the power supply output VCC_OUT will also officially resume power supply.
[0055] See also Figure 7 As shown, when the system is running in an undervoltage state, the voltage at the inverting input terminal of D2 is less than the reference voltage Vref at the non-inverting input terminal. At this time, the output of D2 is in a logic high Logic High state, Q1 is turned on and the collector of Q1 is pulled to ground, so the control signal Control is in a logic low Logic Low state.
[0056] At this time, in the state latch circuit, since the output of D5 is in the logic high Logic High state and the output of D4 is in the logic low Logic Low state, the input of D5, which was previously in the logic high Logic High state, also becomes the logic low Logic Low state, so D7 is not conducting. At the same time, the gate of D6 is kept at a high level due to the pull-up of R14, so D6 is not conducting. Therefore, the power supply output VCC_OUT connected to the drain of D6 has no output, and the power supply of the subsequent power system is cut off, which plays a protective role.
[0057] See also Figure 8 As shown, even if the power supply is restored to normal, since the voltage at the inverting input of D2 is greater than the reference voltage Vref at the non-inverting input,
[0058] The output of D2 will be in a logic low Logic Low state, Q1 is not conducting, so the control signal Control is in a logic low Logic Low state. In the state latch circuit, the output of D5 will be in a logic high Logic High state at this time, and the output of D4 will still remain in a logic low Logic Low state. This state is latched, and D7 and D6 will always be in a non-conducting state.
[0059] It should be noted that when an abnormality occurs and causes undervoltage in the power supply of the power-consuming part, the circuit power supply will remain disconnected by controlling D6 and D7 to be non-conductive and the state latch circuit formed by D4 and D5 to latch the logic state. The power supply to the circuit will remain disconnected. The power supply can only be officially restored after the maintenance personnel have checked the abnormality and manually controlled K1 to release the latched state.
[0060] See also Fig. 9 As shown, after abnormal undervoltage, K1 is controlled to release the latched state. Specifically, the second end of K1 is grounded. When K1 is manually pressed, the first input end of D4 will be in a logic low Logic Low state, and the second input end of D4 will be in the previous state, that is, in a logic low Logic Low state, so the output of D4 will be in a logic high Logic High state; and at this time, both input ends of D5 are in a logic high Logic High state, so the output of D5 will be in a logic low Logic Low state; after K1 is released, the state connected to the input end of D4 will return to a logic high Logic High state again, and the output of D4 will remain in a logic high Logic High state, and at this time D7 and D6 will also be turned on, so that the drain of D6 connected to the power supply output VCC_OUT will also officially resume power supply.
[0061] To sum up, the overvoltage and undervoltage power supply protection circuit provided by the present invention can promptly and effectively disconnect the power supply circuit when an abnormal power supply occurs in the electronic power equipment or system, so as to protect the electronic power equipment from being damaged and can latch the power supply disconnection state under abnormal conditions. The power supply circuit of the electronic power equipment or system will be restored only after the maintenance personnel completes the maintenance and manually releases the latch, thereby avoiding losses caused by power supply again under abnormal conditions of the electronic power equipment or system.
[0062] Example 2
[0063] This embodiment provides an electrical power supply based on the technical solution provided in Embodiment 1. The electrical power supply includes the overvoltage and undervoltage power supply protection circuit with latching function as described in Embodiment 1.
[0064] The above are only preferred embodiments of the present invention and are not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. An overvoltage and undervoltage power supply protection circuit with latching function, characterized in that: The overvoltage and undervoltage power supply protection circuit comprises a voltage comparison circuit, a state latch circuit and a switch circuit; The voltage comparison circuit includes an undervoltage judgment circuit, an undervoltage comparator D2, an overvoltage judgment circuit, an overvoltage comparator D3, a transistor Q1 and a transistor Q2, the inverting input end of the D2 is connected to the undervoltage judgment circuit, the non-phase input end of the D2 is connected to the reference voltage, the non-phase input end of the D3 is connected to the overvoltage judgment circuit, the inverting input end of the D3 is connected to the reference voltage, the input ends of the undervoltage judgment circuit and the overvoltage judgment circuit are both connected to the power supply output, the output end of the D2 is connected to the base of Q1 via a resistor R7, the output end of the D3 is connected to the base of Q2 via a resistor R8, the collector of the Q1 is pulled up to the power supply input via a resistor R9, the emitters of the Q1 and Q2 are connected to ground, and the collectors of the Q1 and Q2 are connected as a control signal output end; The input end of the state latch circuit is connected to the control signal output end, the output end of the state latch circuit is connected to the input end of the switch circuit, and the output end of the switch circuit is connected to the power supply output.
2. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 1, characterized in that: The reference voltage is provided by a reference voltage circuit, and the reference voltage circuit includes a precision bandgap reference voltage source D1; The positive terminal of D1 is connected to a voltage comparison circuit via a resistor R2 to provide a reference voltage, and is connected to a power supply output via a resistor R1, and the negative terminal of D1 is grounded.
3. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 1, characterized in that: The undervoltage judgment circuit includes a resistor R3 and a resistor R4, a first end of R3 is connected to the power supply output, a second end of R3 is connected to the first end of R4 and then connected to the inverting input end of D2, and a second end of R4 is grounded; The overvoltage determination circuit includes a resistor R5 and a resistor R6, wherein a first end of R5 is connected to a power supply output, a second end of R5 is connected to a first end of R6 and then to a non-inverting input end of D3, and a second end of R6 is grounded.
4. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 1, characterized in that: The state latch circuit includes a switch control circuit, a NAND gate circuit D4 and a NAND gate circuit D5; The switch control circuit includes a switch K1, a first end of K1 is connected to a first input end of D4 and is pulled up to a power supply input through a resistor R10, a second end of K1 is grounded, a second input end of D4 is connected to an output end of D5, an output end of D4 is connected to a switch circuit through a resistor R12 and is pulled up to a power supply input through a resistor R11, a first input end of D5 is connected to a control signal output end, a second input end of D5 is connected to an output end of D4, and an output end of D5 is pulled up to a power supply input through a resistor R13.
5. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 4, characterized in that: The K1 is a push button switch or a dip switch.
6. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 4, characterized in that: The switch circuit includes a MOS tube D7 and a MOS tube D6; The gate of D7 is connected to R12, the source of D7 is grounded, the drain of D7 is connected to the gate of D6 via resistor R15 and is pulled up to the power supply input through resistor R14, the source of D6 is connected to the power supply input, and the drain of D6 is connected to the power supply output.
7. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 6, characterized in that: The D7 is an NMOS tube, and the D6 is a PMOS tube.
8. The overvoltage and undervoltage power supply protection circuit with latching function as claimed in claim 6, characterized in that: The switch circuit further includes a capacitor C1, a first end of C1 is connected to the gate of D6, and a second end of C1 is connected to a power supply input.
9. The overvoltage and undervoltage power supply protection circuit with latching function according to any one of claims 1 to 8, characterized in that: The overvoltage and undervoltage power supply protection circuit is composed of discrete components.
10. An electrical power supply, characterized in that: It comprises the overvoltage and undervoltage power supply protection circuit with latching function as claimed in any one of claims 1 to 9.