Input current compensation circuit, operational amplifier, chip and input current compensation method

Abstract

The invention discloses an input current compensation circuit, an operational amplifier, a chip and an input current compensation method, and the input current compensation circuit comprises a current copying circuit and two compensation circuits. The current copying circuit is used for accessing a power supply voltage and a bias signal and generating a first current and a second current according to the bias signal and the power supply voltage; the compensating circuit is used for mirroring the first current so as to output a mirrored current of the first current to a first input end of the operational amplifier; the other compensation circuit is used for mirroring the second current so as to output the mirrored current of the second current to the second input end of the operational amplifier. According to the operational amplifier, the input current of the operational amplifier is sampled through the input current compensation circuit, and the compensation current input to the operational amplifier is generated, so that the input current of the operational amplifier is reduced or even eliminated, the input impedance of the operational amplifier is reduced, and the application range of the operational amplifier is widened.

Description

Technical Field

[0001] The present invention belongs to the technical field of integrated circuits, and in particular relates to an input current compensation circuit, an operational amplifier, a chip and an input current compensation method. Background Art

[0002] An operational amplifier is a circuit that amplifies input signals. An ideal operational amplifier has a "virtual open" characteristic, that is, it has extremely high input impedance and an input current that is approximately zero, so that the operational amplifier will not draw current from the input signal source to avoid affecting the input signal. At the same time, an ideal operational amplifier also has a "virtual short" characteristic, that is, in a closed-loop state with feedback access, the operational amplifier has infinite gain, so that the voltage difference between the positive input terminal and the negative input terminal of the operational amplifier is zero.

[0003] However, in practical applications, the input impedance and gain of the operational amplifier cannot be infinite. The input stage of the operational amplifier directly affects the input impedance and gain of the operational amplifier. The input stage of the operational amplifier will draw current from the input signal source, affecting the input signal, which will cause the "virtual short" or "virtual open" characteristics of the operational amplifier to be less than ideal, affecting the performance and application range of the operational amplifier. Summary of the invention

[0004] The technical problem to be solved by the present invention is to provide an input current compensation circuit, an operational amplifier, a chip and an input current compensation method, aiming to solve the problem that the input signal will affect the operation of the operational amplifier.

[0005] To solve the above technical problems, the present invention is implemented as follows: an input current compensation circuit of an operational amplifier, the operational amplifier is used to access a power supply voltage and a bias signal, the operational amplifier is also used to receive and amplify an input signal, and the input current compensation circuit includes: a current replication circuit and two compensation circuits; The current replication circuit is used to access the power supply voltage and the bias signal, and generate a first current and a second current according to the bias signal and the power supply voltage; One compensation circuit is used to mirror the first current to output a mirror current of the first current to the first input terminal of the operational amplifier; the other compensation circuit is used to mirror the second current to output a mirror current of the second current to the second input terminal of the operational amplifier.

[0006] Further, the current replication circuit includes a first bias tube, a first triode and a second triode; The first bias transistor is used to access the power supply voltage and the bias signal, and output a first bias current to the emitter of the first transistor and the emitter of the second transistor according to the bias signal and the power supply voltage; The base of the first transistor and the base of the second transistor are respectively used to generate the first current and the second current according to the first bias current, and the collector of the first transistor and the collector of the second transistor are grounded.

[0007] Further, the two compensation circuits each include a third triode, a fourth triode, a fifth triode and a sixth triode; In any one of the compensation circuits, the base of the third triode is electrically connected to the collector, the base of the fourth triode is electrically connected to the base of the third triode, the base of the fifth triode is electrically connected to the emitter of the fourth triode, the base of the fifth triode is electrically connected to the collector, the emitter of the fifth triode is grounded, the base of the sixth triode is electrically connected to the base of the fifth triode, the collector of the sixth triode is electrically connected to the emitter of the third triode, and the emitter of the sixth triode is grounded; In one compensation circuit, the base of the third transistor is electrically connected to the base of the first transistor, and the collector of the fourth transistor is used to be electrically connected to the first input terminal of the operational amplifier; in another compensation circuit, the base of the third transistor is electrically connected to the base of the second transistor, and the collector of the fourth transistor is used to be electrically connected to the second input terminal of the operational amplifier.

[0008] Furthermore, the third triode, the fourth triode, the fifth triode and the sixth triode have the same size.

[0009] Further, the operational amplifier includes a second bias tube and an input stage; the second bias tube is used to connect the power supply voltage and the bias signal, and output a second bias current to the input stage according to the connected power supply voltage and the bias signal, so that the input stage is in an amplification state, and the input stage is used to receive and amplify the input current; The first bias tube and the second bias tube have the same size.

[0010] Further, the input stage includes a first input triode and a second input triode; The second bias transistor is used to access the power supply voltage and the bias signal, and output the second bias current to the emitter of the first input transistor and the emitter of the second input transistor according to the accessed power supply voltage and the bias signal, the base of the first input transistor and the base of the second input transistor are used to receive the input current, and the collector of the first input transistor and the collector of the second input transistor are used to output the amplified input current; The first input transistor, the second input transistor, the first transistor, and the second transistor have the same size.

[0011] The present invention also discloses an operational amplifier, which comprises the input current compensation circuit as described above.

[0012] The present invention also discloses a chip, wherein the chip comprises the operational amplifier as described above.

[0013] The present invention also discloses an input current compensation method, which is based on the input current compensation circuit of the operational amplifier as described above; The operational amplifier is connected to a power supply voltage and a bias signal, and the operational amplifier also receives and amplifies an input signal; the input current compensation circuit includes: a current replication circuit and two compensation circuits; The input current compensation method comprises: The current replication circuit is connected to the power supply voltage and the bias signal, and generates a first current and a second current according to the bias signal and the power supply voltage; One compensation circuit mirrors the first current to output a mirror current of the first current to the first input terminal of the operational amplifier; the other compensation circuit mirrors the second current to output a mirror current of the second current to the second input terminal of the operational amplifier.

[0014] Compared with the prior art, the input current compensation circuit of an operational amplifier, the operational amplifier and the chip in the present invention have the following beneficial effects: In the present invention, the same power supply voltage and bias signal are connected to the operational amplifier through the current replication circuit, so that the current replication circuit and the compensation circuit can sample the input current of the operational amplifier and generate a first current input to the first input terminal of the operational amplifier and a second current input to the second input terminal, thereby compensating the first input terminal and the second input terminal of the operational amplifier to reduce or even eliminate the input current of the operational amplifier, eliminate the offset voltage generated by the input current of the operational amplifier, reduce the input impedance of the operational amplifier, and expand the application range of the operational amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 is a circuit block diagram of a BJT operational amplifier in the related art; Figure 2 It is a circuit block diagram of a BJT operational amplifier in the related art when there is a front-stage input resistor; Figure 3 is a schematic block diagram of an input current compensation circuit applied to a BJT operational amplifier in an embodiment of the present invention; Figure 4 1 is a circuit diagram of an input current compensation circuit applied to a PNP-type BJT five-transistor operational amplifier according to an embodiment of the present invention; Figure 5 is a circuit diagram of a PNP-type BJT five-tube operational amplifier in an embodiment of the present invention; Figure 6 is a circuit diagram of an input current compensation circuit in an embodiment of the present invention; Figure 7 is a circuit diagram of a first compensation circuit in an embodiment of the present invention; Figure 8 It is a circuit diagram of the application of the input current compensation circuit in the NPN type BJT five-transistor operational amplifier in the embodiment of the present invention.

[0016] In the accompanying drawings, each figure mark represents: 10, input current compensation circuit; 11, current replication circuit; 12, first compensation circuit; 13, second compensation circuit; 20, PNP type BJT five-tube operational amplifier; 30, NPN type BJT five-tube operational amplifier. DETAILED DESCRIPTION

[0017] In order to make the purpose, technical solutions and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments.

[0018] In the description of the present disclosure, it should be understood that the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, a feature defined as "first" or "second" may explicitly or implicitly include one or more of the feature. In the description of the present disclosure, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.

[0019] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0020] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details, and the specific embodiments described herein are only used to explain the present invention and are not intended to limit the present invention. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0021] Example: See also Figures 3 to 8 In a first aspect, the present embodiment discloses an input current compensation circuit 10 of an operational amplifier, wherein the operational amplifier is used to access a power supply voltage and a bias signal, and the operational amplifier is also used to receive and amplify an input signal, and the input current compensation circuit 10 includes: a current replication circuit 11 and two compensation circuits; The current replication circuit 11 is used to access the power supply voltage and the bias signal, and generate the first current and the second current according to the bias signal and the power supply voltage; A compensation circuit is used to mirror the first current to output the mirror current of the first current to the first input terminal of the operational amplifier; another compensation circuit is used to mirror the second current to output the mirror current of the second current to the second input terminal of the operational amplifier.

[0022] In this embodiment, the current replication circuit 11 is connected to the same power supply voltage and bias signal as the operational amplifier, so that the current replication circuit 11 and the compensation circuit can sample the input current of the input stage of the operational amplifier, and generate a first current input to the first input terminal of the operational amplifier and a second current input to the second input terminal, thereby compensating the first input terminal and the second input terminal of the operational amplifier, so as to reduce or even eliminate the input current of the operational amplifier, eliminate the offset voltage of the operational amplifier caused by the input current, reduce the input impedance of the operational amplifier, and expand the application range of the operational amplifier.

[0023] In related technologies, MOS tubes (field effect transistors) or BJTs (bipolar junction transistors) are usually used as input stage amplifiers of operational amplifiers. MOS tubes have the advantages of high input impedance, low input current, easy integration, high frequency and low noise potential, and are widely used in current integrated circuits. However, MOS tubes still have disadvantages such as poor process consistency, large offset voltage, small transconductance gain, and limited turn-on voltage.

[0024] Compared with MOS tubes, BJTs do not have threshold turn-on problems, have better linearity in the entire signal range, and can provide higher gain. BJTs have better layout matching characteristics and mature and stable processes.

[0025] like Figure 1 As shown, Figure 1 This is a circuit block diagram of a BJT operational amplifier. Due to the characteristics of the BJT itself, when the BJT is used as the input stage of the operational amplifier, the input current amplified by the BJT is the base current. Therefore, the operational amplifier with the BJT as the input stage will extract the input current from the input signal source of the previous stage as the base current of the BJT, which brings an additional burden to the input signal source and is difficult to be used in application scenarios where the previous stage has no driving capability.

[0026] like Figure 2 As shown, Figure 2 This is a circuit block diagram of a BJT operational amplifier with input resistance at the front stage. In practical applications, due to feedback needs, operation needs or routing reasons, the front stage of the operational amplifier usually has input resistance or parasitic resistance, such as Figure 2 As shown, the front-stage input resistance R1 and R2 are not necessarily equal, especially when the operational amplifier is used to construct adders, subtractors and other applications, R1 and R2 differ greatly. In these application scenarios, the input circuit of the operational amplifier is not only limited by the front-stage driving capability, but also causes serious offset at the input end of the operational amplifier, which greatly limits the application of operational amplifiers with BJT as the input stage in chips.

[0027] Therefore, this embodiment provides an input current compensation circuit, which can reduce or even eliminate the input current of the operational amplifier, eliminate the offset voltage generated by the input current of the operational amplifier, reduce the input impedance of the operational amplifier, and expand the application range of the BJT operational amplifier. Figure 3 Shown is a schematic block diagram of an input current compensation circuit applied to a BJT operational amplifier.

[0028] like Figure 4 As shown, the application of the input current compensation circuit in a PNP type BJT five-tube operational amplifier is taken as an example.

[0029] like Figure 5 As shown, the PNP type BJT five-tube operational amplifier includes a second bias tube M5, an input stage and a load, the input stage includes a first input transistor M1 and a second input transistor M2, and the load includes a first load transistor M3 and a second load transistor M4; like Figure 5As shown, the gate of the second bias transistor M5 is electrically connected to the bias signal source Bias, and the second bias transistor M5 is used to access the power supply voltage and the bias signal, and output the second bias current to the emitter of the first input transistor M1 and the emitter of the second input transistor M2 according to the accessed power supply voltage and the bias signal, so that the first input transistor M1 and the second input transistor M2 are in an amplified state. The base of the first input transistor M1 and the base of the second input transistor M2 are used to receive the input current. In the amplified state of the first input transistor M1 and the second input transistor M2, the collector of the first input transistor M1 and the collector of the second input transistor M2 are used to output the amplified input current.

[0030] Since the first input transistor M1 and the second input transistor M2 are both PNP-type BJTs in this embodiment, the current direction of the base input of the first input transistor M1 and the second input transistor M2 is negative, that is, the current direction on the base of the first input transistor M1 and the second input transistor M2 is outflow, wherein Figure 5 As shown, in this embodiment, the first input terminal of the operational amplifier is the negative phase input terminal INN, and the second input terminal of the operational amplifier is the positive phase input terminal INP.

[0031] The first load transistor M3 and the second load transistor M4 form a current mirror, and the first load transistor M3 and the second load transistor M4 are used to convert the difference of the amplified input current into a single-ended output.

[0032] like Figure 6 As shown, the input current compensation circuit 10 includes: a current replication circuit 11 and two compensation circuits. Specifically, in this embodiment, the two compensation circuits are a first compensation circuit 12 and a second compensation circuit 13; The current replication circuit 11 is used to access the power supply voltage and the bias signal, and generate the first current and the second current according to the bias signal and the power supply voltage; The first compensation circuit 12 is used to mirror the first current to output the mirror current of the first current to the first input terminal of the operational amplifier; the second compensation circuit 13 is used to mirror the second current to output the mirror current of the second current to the second input terminal of the operational amplifier.

[0033] Further, the current replication circuit 11 includes a first bias transistor M6, a first transistor M7 and a second transistor M8; The first bias transistor M6 is used to access the power supply voltage and the bias signal, and output a first bias current to the emitter of the first transistor M7 and the emitter of the second transistor M8 according to the bias signal and the power supply voltage; The base of the first transistor M7 and the base of the second transistor M8 are respectively used to generate a first current and a second current according to the first bias current, and the collector of the first transistor M7 and the collector of the second transistor M8 are grounded.

[0034] In this embodiment, the gate of the first bias tube M6 is electrically connected to the gate of the second bias tube M5, and the first bias tube M6 is electrically connected to the bias signal source Bias. The first bias tube M6 outputs a first bias current to the emitter of the first triode M7 and the emitter of the second triode M8, so that the first triode M7 and the second triode M8 are in an amplification state, and the base of the first triode M7 and the base of the second triode M8 both generate base currents, that is, the base of the first triode M7 and the base of the second triode M8 generate a first current and a second current, respectively.

[0035] It can be understood that the current direction of the base input of the first transistor M7 and the second transistor M8 is negative, and the direction of the first current on the base of the first transistor M7 and the second current on the base of the second transistor M8 is outflow. The compensation circuit copies the first current and the second current by mirroring, so that the mirror current of the first current flows into the first input transistor M1, and the mirror current of the second current flows into the second input transistor M2, thereby reducing or even eliminating the input current of the base of the first input transistor M1 and the second input transistor M2.

[0036] Since the gates of the first bias tube M6 and the second bias tube M5 are connected and connected to the same bias signal and power supply voltage, when the current flowing through the second bias tube M5 of the PNP-type BJT five-tube operational amplifier changes, the current flowing through the first bias tube M6 will follow the change of the second bias tube M5, so that the first current generated on the base of the first transistor M7 is associated with the base current of the first input transistor M1, and the second current generated on the base of the second transistor M8 is associated with the base current of the second input transistor M2.

[0037] Preferably, if the sizes of the first transistor M7, the first input transistor M1, the second transistor M8, and the second input transistor M2 are set to be the same and a matching design is made during layout design, it can further ensure that the first current generated at the base of the first transistor M7 is equal to the base current of the first input transistor M1, and the second current generated at the base of the second transistor M8 is equal to the base current of the second input transistor M2.

[0038] In this way, the current replication circuit 11 realizes the replication of the PNP-type BJT five-tube operational amplifier, and creates a circuit environment similar to the PNP-type BJT five-tube operational amplifier.

[0039] Furthermore, if Figure 6 As shown, the first compensation circuit 12 and the second compensation circuit 13 are symmetrical circuits.

[0040] Wherein, the first compensation circuit 12 includes a third transistor M9, a fourth transistor M10, a fifth transistor M12 and a sixth transistor M11; The base of the third triode M9 is electrically connected to the base of the first triode M7, the base of the third triode M7 is electrically connected to the collector, the base of the fourth triode M10 is electrically connected to the base of the third triode M9, the collector of the fourth triode M10 is used to be electrically connected to the first input terminal INN of the operational amplifier, the base of the fifth triode M12 is electrically connected to the emitter of the fourth triode M10, the base of the fifth triode M12 is electrically connected to the collector, the emitter of the fifth triode M12 is grounded, the base of the sixth triode M11 is electrically connected to the base of the fifth triode M12, the collector of the sixth triode M11 is electrically connected to the emitter of the third triode M9, and the emitter of the sixth triode M11 is grounded.

[0041] The second compensation circuit 13 includes a third transistor M13, a fourth transistor M14, a fifth transistor M16 and a sixth transistor M15; The base of the third triode M13 is electrically connected to the base of the second triode M8, the base and collector of the third triode M13 are electrically connected, the base of the fourth triode M14 is electrically connected to the base of the third triode M13, the collector of the fourth triode M14 is used to be electrically connected to the second input terminal INP of the operational amplifier, the base of the fifth triode M16 is electrically connected to the emitter of the fourth triode M15, the base and collector of the fifth triode M16 are electrically connected, the emitter of the fifth triode M16 is grounded, the base of the sixth triode M15 is electrically connected to the base of the fifth triode M16, the collector of the sixth triode M15 is electrically connected to the emitter of the third triode M13, and the emitter of the sixth triode M15 is grounded.

[0042] Preferably, the third triode M9, the fourth triode M10, the fifth triode M12 and the sixth triode M11 have the same size, and the third triode M13, the fourth triode M14, the fifth triode M16 and the sixth triode M15 have the same size.

[0043] As an example, Figure 4 and 7 As shown, taking the first compensation circuit 12 as an example, the third transistor M9 replicates the first current Ib_M7 of the base of the first transistor M7, and the fourth transistor M10 replicates the current flowing through the third transistor M9. Therefore, the current I_M10 flowing through the fourth transistor M10 is equal to the first current Ib_M7 of the base of the first transistor M7, and I_M10= Ib_M7.

[0044] As mentioned above, it is preferred to set the first transistor M7, the first input transistor M1, the second transistor M8, and the second input transistor M2 to have the same size and make a matching design during layout design, so that the first current generated on the base of the first transistor M7 is equal to the base current of the first input transistor M1, that is, Ib_M7=Ib_M1, therefore, I_M10= Ib_M7=Ib_M1.

[0045] Since the collector of the fourth transistor M10 is electrically connected to the first input terminal INN of the operational amplifier, that is, the collector of the fourth transistor M10 is electrically connected to the base of the first input transistor M1, the fourth transistor M10 provides a base current for the base of the first input transistor M1. Since I_M10=Ib_M1, in this preferred embodiment, the fourth transistor M10 provides a base current for the base of the first input transistor M1, thereby eliminating the input current generated by the first input transistor M1 at the negative input terminal of the operational amplifier, thereby realizing the input current compensation of the operational amplifier.

[0046] The second compensation circuit 13 and the first compensation circuit 12 are symmetrical circuits. The second compensation circuit 13 and the first compensation circuit 12 have the same working principle. The fourth transistor M14 provides a base current for the base of the second input transistor M2, thereby eliminating the input current generated by the second input transistor M2 at the non-inverting input terminal of the operational amplifier, thereby realizing input current compensation of the operational amplifier.

[0047] Furthermore, in addition to realizing input current compensation of the operational amplifier, the compensation circuit can also stabilize the base voltage of the third transistor to a fixed voltage value by setting the input common-mode level of the operational amplifier to the fixed voltage value, or by adjusting the circuit structure to adjust the base voltage V1 of the third transistor M9 to be equal to the input common-mode level of the operational amplifier, thereby further realizing full compensation of the input current of the operational amplifier.

[0048] Specifically, since the working principle of the first compensation circuit 12 and the second compensation circuit 13 is the same, the working principle of the compensation circuit to achieve complete compensation of the input current of the operational amplifier is briefly described by taking the first compensation circuit 12 as an example: After the circuit is powered on, the currents flowing through the transistors in the compensation circuit in real time may be inconsistent. The compensation circuit in the present invention can also adjust the VBE of the third transistor M9, and finally stabilize the VBE of the third transistor M9 at a fixed value.

[0049] If the currents flowing through the transistors are inconsistent, the process of the compensation circuit adjusting the VBE of the third transistor M9 is as follows: The third transistor M9 inputs a base current, the base voltage of the third transistor M9 is V1, and VBE of the third transistor M9 makes the emitter voltage V2 of the third transistor M9 = V1 - VBE9.

[0050] The fourth triode M10 copies the current of the third triode M9. If, under the current of the third triode M9, the emitter voltage V3 of the fourth triode M10 makes the current generated by the fifth triode M12 greater than the current of the third triode M9, the emitter voltage V3 of the fourth triode M10 will decrease, so that the VBE of the fourth triode M10 increases, then the current copied by the fourth triode M10 is greater than the current of the third triode M9, the current of the fifth triode M12 is equal to the current of the fourth triode M10, the current copied by the sixth triode M11 from the fifth triode M12 is greater than the current of the third triode M9, and the emitter voltage V2 of the third triode M9 will decrease to increase the current of the third triode M9 to meet the current demand of the sixth triode M11; If the current input to the third transistor M9 is a constant value, the base voltage V1 of the third transistor M9 will decrease synchronously, and then the base voltage of the fourth transistor M10 will decrease, VBE10 of the fourth transistor will decrease, the currents of the fourth transistor M10 and the fifth transistor M12 will decrease, and the current of the sixth transistor M11 will decrease. Finally, the base voltage V1 of the third transistor M9 will be stabilized at a fixed value that satisfies the equality of the two currents, and this fixed value corresponds to a fixed base current of the first transistor M7.

[0051] Therefore, in the compensation circuit, if the currents flowing through the transistors are inconsistent, the VBE of the third transistor M9 will be adjusted, and finally the base voltage of the third transistor M9 will be stabilized at a fixed voltage value. When the input common-mode level of the operational amplifier is set to the fixed voltage value, or the base voltage V1 of the third transistor M9 is adjusted to be equal to the input common-mode level of the operational amplifier by adjusting the circuit structure, the emitter current, base voltage, and base current of the first transistor M7 will be equal to those of the first input transistor M1, and the base current of the first input transistor M1 will be equal to the base current of the first transistor M7 and will be fully compensated by the fourth transistor M10 through the negative phase input terminal INN.

[0052] If the currents flowing through the transistors are consistent, the working process of the compensation circuit is: the fifth transistor M12 replicates the current I_M10 of the fourth transistor M10, and the current I_M12 flowing through the fifth transistor M12=I_M10. The base of the sixth transistor M11 is connected to the base of the fifth transistor M12, and the sixth transistor M11 replicates the current of the fifth transistor M12, and the current I_M11=I_M12=I_M10 flowing through the sixth transistor M11, therefore, I_M11=I_M12=I_M10=I_M9. And I_M7=I_M9, when the base current (first current) of the first transistor M7 is constant, the current I_M11 flowing through the sixth transistor M11 and the current I_M9 flowing through the third transistor are constant, then VBE9, VBE10, VBE11, VBE12, and VCE11 are constant, then the sum VBE9+VCE11 of VBE9 of the third transistor M9 and VCE11 of the sixth transistor M11 is constant, the base voltage of the first transistor M7 is equal to VBE9+VCE11, and the base voltage of the first transistor M7 is constant, that is, the base current of the first transistor M7 has a corresponding base voltage, and the size is VCE11+VBE9. Setting the input common-mode level of the operational amplifier to VCE11+VBE9 can ensure that the base current of the first transistor M7 is equal to the base current of the first input transistor M1; or, adjusting the value of VCE11+VBE9 so that the adjusted VCE11+VBE9 is equal to the input common-mode level can also ensure that the base current of the first transistor M7 is equal to the base current of the first input transistor M1, thereby completing the input current compensation of the operational amplifier.

[0053] In another embodiment, if Figure 8 The figure shows the application circuit diagram of the input current compensation circuit 10 in the NPN type BJT five-transistor operational amplifier.

[0054] In this embodiment, the circuit structure of the input current compensation circuit applied to the NPN type BJT five-tube operational amplifier is the same as the circuit structure applied to the PNP type BJT five-tube operational amplifier, and also has the same working principle. The only difference is that the input current direction of the positive phase input terminal and the negative phase input terminal in the NPN type BJT five-tube operational amplifier 30 is positive, and the input current direction of the positive phase input terminal and the negative phase input terminal in the PNP type BJT five-tube operational amplifier 20 is negative.

[0055] It should be known that the input current compensation circuit in the present invention is not limited to being applied only to PNP or NPN BJT five-tube operational amplifiers, and the input current compensation circuit can also be applied to cascode structure, single-ended or double-ended output, multi-stage BJT operational amplifiers. The input current compensation circuit is also not limited to being applied to BJT operational amplifiers, but can also be applied to other operational amplifiers and related circuit applications that are affected by input current.

[0056] It should also be known that, in the present embodiment, the first transistor M7, the first input transistor M1, the second transistor M8, and the second input transistor M2 have the same size, the third transistor M9, the fourth transistor M10, the fifth transistor M12, and the sixth transistor M11 have the same size, and the third transistor M13, the fourth transistor M14, the fifth transistor M16, and the sixth transistor M15 have the same size. The sizes of the above-mentioned transistors are only a preferred embodiment, and the size and model of each transistor can be appropriately adjusted in other embodiments.

[0057] A second aspect of the present embodiment discloses an operational amplifier, which includes the input current compensation circuit as described above.

[0058] A third aspect of the present embodiment discloses a chip, which includes the operational amplifier as described above.

[0059] A fourth aspect of the present embodiment discloses an input current compensation method, the input current compensation method is based on the input current compensation circuit of the operational amplifier as described above; The operational amplifier is connected to the power supply voltage and the bias signal, and the operational amplifier also receives and amplifies the input signal; the input current compensation circuit includes: a current replication circuit and two compensation circuits; Input current compensation methods include: The current replication circuit is connected to the power supply voltage and the bias signal, and generates the first current and the second current according to the bias signal and the power supply voltage; A compensation circuit mirrors the first current to output a mirror current of the first current to the first input terminal of the operational amplifier; another compensation circuit mirrors the second current to output a mirror current of the second current to the second input terminal of the operational amplifier.

[0060] The input current compensation method provided in the fourth part of this embodiment is based on the input current compensation circuit of the operational amplifier in the first part of this embodiment. The specific steps of the input current compensation method are described in the first part of this embodiment. The method corresponds to other parts of this embodiment and can produce similar technical effects. The input current compensation method in this embodiment constructs a circuit environment that is the same as the input signal generation environment through a current replication circuit to obtain a first current and a second current for compensation. The output direction of the first current and the second current is controlled by the compensation circuit so that the first current and the second current are respectively input to the first input terminal of the operational amplifier and the second input terminal of the operational amplifier, thereby eliminating the input current in the operational amplifier. The implementation scheme is simple and can be applied to a variety of operational amplifiers and related circuits, broadening the application range of operational amplifiers.

[0061] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. An input current compensation circuit of an operational amplifier, wherein the operational amplifier is used to access a power supply voltage and a bias signal, and the operational amplifier is also used to receive and amplify an input signal, characterized in that: The input current compensation circuit comprises: a current replication circuit and two compensation circuits; The current replication circuit is used to access the power supply voltage and the bias signal, and generate a first current and a second current according to the bias signal and the power supply voltage; One compensation circuit is used to mirror the first current to output a mirror current of the first current to the first input terminal of the operational amplifier; the other compensation circuit is used to mirror the second current to output a mirror current of the second current to the second input terminal of the operational amplifier.

2. The circuit according to claim 1, characterized in that The current replication circuit includes a first bias tube, a first triode and a second triode; The first bias transistor is used to access the power supply voltage and the bias signal, and output a first bias current to the emitter of the first transistor and the emitter of the second transistor according to the bias signal and the power supply voltage; The base of the first transistor and the base of the second transistor are respectively used to generate the first current and the second current according to the first bias current, and the collector of the first transistor and the collector of the second transistor are grounded.

3. The circuit according to claim 2, characterized in that The two compensation circuits each include a third triode, a fourth triode, a fifth triode and a sixth triode; In any one of the compensation circuits, the base of the third triode is electrically connected to the collector, the base of the fourth triode is electrically connected to the base of the third triode, the base of the fifth triode is electrically connected to the emitter of the fourth triode, the base of the fifth triode is electrically connected to the collector, the emitter of the fifth triode is grounded, the base of the sixth triode is electrically connected to the base of the fifth triode, the collector of the sixth triode is electrically connected to the emitter of the third triode, and the emitter of the sixth triode is grounded; In one compensation circuit, the base of the third transistor is electrically connected to the base of the first transistor, and the collector of the fourth transistor is used to be electrically connected to the first input terminal of the operational amplifier; in another compensation circuit, the base of the third transistor is electrically connected to the base of the second transistor, and the collector of the fourth transistor is used to be electrically connected to the second input terminal of the operational amplifier.

4. The circuit according to claim 3, characterized in that The third transistor, the fourth transistor, the fifth transistor and the sixth transistor have the same size.

5. The circuit according to claim 2, characterized in that The operational amplifier includes a second bias tube and an input stage; the second bias tube is used to connect the power supply voltage and the bias signal, and output a second bias current to the input stage according to the connected power supply voltage and the bias signal, so that the input stage is in an amplification state, and the input stage is used to receive and amplify the input current; The first bias tube and the second bias tube have the same size.

6. The circuit according to claim 5, characterized in that The input stage includes a first input triode and a second input triode; The second bias transistor is used to access the power supply voltage and the bias signal, and output the second bias current to the emitter of the first input transistor and the emitter of the second input transistor according to the accessed power supply voltage and the bias signal, the base of the first input transistor and the base of the second input transistor are used to receive the input current, and the collector of the first input transistor and the collector of the second input transistor are used to output the amplified input current; The first input transistor, the second input transistor, the first transistor, and the second transistor have the same size.

7. An operational amplifier, characterized in that: The operational amplifier comprises the input current compensation circuit as claimed in any one of claims 1 to 6.

8. A chip, characterized in that: The chip includes the operational amplifier as claimed in claim 7.

9. An input current compensation method, characterized in that: The method is based on the input current compensation circuit of the operational amplifier according to any one of claims 1 to 6; The operational amplifier is connected to a power supply voltage and a bias signal, and the operational amplifier also receives and amplifies an input signal; The input current compensation circuit comprises: a current replication circuit and two compensation circuits; The input current compensation method comprises: The current replication circuit is connected to the power supply voltage and the bias signal, and generates a first current and a second current according to the bias signal and the power supply voltage; One compensation circuit mirrors the first current to output a mirror current of the first current to the first input terminal of the operational amplifier; the other compensation circuit mirrors the second current to output a mirror current of the second current to the second input terminal of the operational amplifier.

Images