Variable resistance type active gate driver, driving method and medium

Abstract

The invention relates to the technical field of power electronics, and provides a variable resistance type active gate driver, a driving method and a medium, the variable resistance type active gate driver comprises a control unit, an isolation gate driving module, a gate driving resistance network, a current change rate monitoring module and a target MOSFET circuit; one end of the isolated gate driving module is connected with the control unit, and the other end is connected with the gate driving resistance network; one end of the current change rate monitoring module is connected with the target MOSFET circuit, and the other end of the current change rate monitoring module is connected with the control unit; the gate driving resistance network is connected with the target MOSFET circuit; and the current change rate monitoring module monitors the drain-source current change rate of the target MOSFET circuit, feeds back the drain-source current change rate to the control unit, sends a control signal according to the drain-source current change rate, and adjusts the resistance value provided by the gate driving resistance network at the gate of the target MOSFET circuit. According to the invention, overshoot and oscillation of source and drain voltage and current of the MOSFET are reduced, and the flexibility and dynamic adjustment capability of an active gate driving technology are improved.

Description

Technical Field

[0001] The present invention relates to the field of power electronics technology, and more specifically, to a variable resistance active gate driver, a driving method and a medium. Background Art

[0002] In modern electronic devices and power systems, power devices are increasingly used and important, and their design trends are moving towards high power density, high operating voltage and current. However, this trend brings with it a series of challenges, especially the drain-source overshoot voltage and overshoot current problems faced by power devices during operation. These overshoot phenomena mainly occur during the switching operation of the device, which is likely to cause transient voltage and current peaks to exceed the device's limit specifications, thereby damaging the device itself and threatening the safety of the entire system.

[0003] Traditionally, methods to solve the overshoot problem of power devices usually focus on circuit design, such as increasing the drive resistance and optimizing the circuit layout to reduce the inductive and capacitive effects when the device is switched. However, the improvement effects of these methods are not satisfactory, especially when faced with complex and diverse application scenarios, they are quite limited. Active gate drive technology has been proposed as an innovative solution, which controls the switching waveform by dynamically adjusting the gate drive parameters. However, the current active gate drive technology is insufficient in applicability and flexibility, and it is difficult to fully meet the diverse application requirements. Summary of the invention

[0004] The present invention provides a variable resistance active gate driver, a driving method and a medium to overcome the defects of low flexibility and low dynamic adjustment capability in the existing active gate driving technology.

[0005] In order to solve the above technical problems, the technical solution of the present invention is as follows: In a first aspect, the present invention provides a variable resistance active gate driver, comprising: a control unit, an isolation gate drive module, a gate drive resistor network, a current change rate monitoring module and a target MOSFET circuit.

[0006] One end of the isolation gate driving module is connected to the control unit, and the other end is connected to the gate driving resistor network.

[0007] One end of the current change rate monitoring module is connected to the target MOSFET circuit, and the other end is connected to the control unit.

[0008] The gate drive resistor network is connected to the target MOSFET circuit.

[0009] The current change rate monitoring module monitors the drain-source current change rate of the target MOSFET circuit and feeds back to the control unit. The control unit sends a control signal through the isolation gate drive module according to the drain-source current change rate to adjust the resistance value provided by the gate drive resistor network at the gate of the target MOSFET circuit.

[0010] As a preferred technical solution, the target MOSFET circuit includes a MOSFET tube DUT and a parasitic inductance LP.

[0011] The gate of the MOSFET tube DUT is connected to the output end of the gate drive resistor network, the drain is connected to the external power circuit, the source is connected to one end of the parasitic inductance LP, and the other end of the parasitic inductance LP is connected to the external power circuit.

[0012] As a preferred technical solution, the current change rate monitoring module includes an amplifier U4, the output end of the amplifier U4 is connected to the control unit, the positive input end is connected to the driver source of the MOSFET tube DUT, and the negative input end is connected to one end of the parasitic inductance LP connected to the external power circuit.

[0013] As a preferred technical solution, the isolation gate driving module includes an isolation driver U1 and an isolation driver U2.

[0014] The input end of the isolation driver U1 is connected to the control unit, and the output end is connected to the gate drive resistor network.

[0015] The input end of the isolation driver U2 is connected to the control unit, and the output end is connected to the gate drive resistor network.

[0016] As a preferred technical solution, the gate drive resistor network includes transistor Q1, transistor Q2, transistor Q3, transistor Q4, transistor Q5, transistor Q6, transistor Q7, transistor Q8, resistor R1, resistor R2, resistor R3, resistor R4, resistor R5, resistor R6, resistor R7, resistor R8, and a positive power supply VDD and a negative power supply VSS.

[0017] The output terminal of the isolation driver U1 is connected to the gates of the transistor Q1 , the transistor Q3 , the transistor Q5 , and the transistor Q7 , respectively.

[0018] The output terminal of the isolation driver U2 is connected to the gates of the transistor Q2 , the transistor Q4 , the transistor Q6 , and the transistor Q8 , respectively.

[0019] One end of the resistor R1 is connected to the source of the transistor Q1, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R3 is connected to the source of the transistor Q3, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R5 is connected to the source of the transistor Q5, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R7 is connected to the source of the transistor Q7, and the other end is connected to the gate of the MOSFET tube DUT.

[0020] One end of the resistor R2 is connected to the drain of the transistor Q2, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R4 is connected to the drain of the transistor Q4, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R6 is connected to the drain of the transistor Q6, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R8 is connected to the drain of the transistor Q8, and the other end is connected to the gate of the MOSFET tube DUT.

[0021] The positive output terminal of the positive power supply VDD is connected to the drains of the transistors Q1, Q3, Q5 and Q7, and the negative output terminal is connected to the driver source of the MOSFET tube DUT, the positive input terminal of the amplifier U4 and the positive output terminal of the negative power supply VSS. The negative output terminal of the negative power supply VSS is connected to the drains of the transistors Q2, Q4, Q6 and Q8.

[0022] As a preferred technical solution, the resistor R1, the resistor R2, the resistor R3, the resistor R4, the resistor R5, the resistor R6, the resistor R7 and the resistor R8 are precision resistors with different resistance values.

[0023] In a second aspect, the present invention further provides a variable resistance active gate driving method, which is applied to a variable resistance active gate driver in any of the above solutions, comprising: The operating status of the target MOSFET circuit is monitored through the current change rate monitoring module.

[0024] During the opening process of the target MOSFET circuit, the control unit controls the low resistance combination in the gate drive resistor network to conduct through the isolated gate drive module. The current change rate monitoring module continuously monitors the drain-source current change rate of the target MOSFET. When it is detected that the drain-source current change rate reaches the set threshold, the control unit controls the high resistance combination in the gate drive resistor network to conduct through the isolated gate drive module. When the drain-source current tends to be stable, the control unit controls the low resistance combination in the gate drive resistor network to conduct again through the isolated gate drive module.

[0025] During the shutdown process of the target MOSFET circuit, the control unit controls the low-resistance combination of resistors in the gate drive resistor network to be turned on through the isolated gate drive module, and the current change rate monitoring module continuously monitors the drain-source current change rate of the target MOSFET. When the drain-source current change rate reaches a predetermined threshold, the control unit controls the high-resistance combination of resistors in the gate drive resistor network to be turned on through the isolated gate drive module.

[0026] As a preferred technical solution, the control unit controls the conduction of the resistance of the low resistance combination in the gate drive resistor network through the isolation gate drive module, including: The control unit sends a control signal through the isolated gate drive module to turn on a plurality of parallel low-resistance resistor combinations in the gate drive resistor network, and disconnect a high-resistance resistor combination, thereby providing a low equivalent resistance value at the gate of the target MOSFET circuit.

[0027] As a preferred technical solution, the control unit controls the resistance conduction of the high resistance combination in the gate drive resistor network through the isolation gate drive module, including: The control unit sends a control signal through the isolated gate drive module to turn on a plurality of parallel high-resistance resistor combinations in the gate drive resistor network and disconnect the low-resistance resistor combination, thereby providing a high equivalent resistance value at the gate of the target MOSFET circuit.

[0028] In a third aspect, the present invention further proposes a computer-readable storage medium having a program stored thereon, wherein the program is executed by a processor to perform the operations performed by the variable resistance active gate drive method as described in any scheme in the second aspect.

[0029] Compared with the prior art, the beneficial effects of the technical solution of the present invention include: the present invention can effectively monitor and adjust the drain-source current change rate of the target MOSFET circuit through the coordinated work of the control unit, the isolated gate drive module, the gate drive resistor network and the current change rate monitoring module, dynamically control the gate resistance value, overcome the deficiencies of the existing active gate drive technology in terms of flexibility and dynamic adjustment capability, and improve flexibility. At the same time, the present invention significantly reduces the overshoot and oscillation of the source-drain voltage and current of the MOSFET through the optimized gate drive resistor network and dynamic feedback control, and improves the reliability and stability of the system. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figure 1 A schematic diagram of the circuit structure of a variable resistance active gate driver provided in an embodiment of the present application.

[0031] Figure 2 A schematic flow chart of a variable resistance active gate driving method provided in an embodiment of the present application.

[0032] Figure 3 The waveform diagram of the switching process of the variable resistance active gate driving method provided in the embodiment of the present application, wherein 1-control unit, 2-isolation gate driving module, 3-gate driving resistor network, 4-current change rate monitoring module, 5-target MOSFET circuit. DETAILED DESCRIPTION

[0033] Exemplary embodiments will be described in detail herein, examples of which are shown in the accompanying drawings. When the following description refers to the drawings, unless otherwise indicated, the same numbers in different drawings represent the same or similar elements. The methods described in the following exemplary embodiments do not represent all methods consistent with the present application. Instead, they are only examples of devices and methods consistent with some aspects of the present application as detailed in the attached claims.

[0034] The terms used in this application are for the purpose of describing specific embodiments only and are not intended to limit this application. The singular forms of "a", "said" and "the" used in this application and the appended claims are also intended to include plural forms unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used herein refers to and includes any or all possible combinations of one or more associated listed items.

[0035] It should be understood that the words "first", "second" and similar words used in the specification and claims of this application do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "one" or "an" do not indicate a quantitative limitation, but rather indicate the presence of at least one. Unless otherwise indicated, words such as "front", "rear", "lower" and / or "upper" are used for ease of description only and are not limited to a position or a spatial orientation. Words such as "include" or "comprises" and similar words mean that the elements or objects appearing before "include" or "comprises" include the elements or objects listed after "include" or "comprises" and their equivalents, and do not exclude other elements or objects. Words such as "connected" or "connected" and similar words are not limited to physical or mechanical connections, and may include electrical connections, whether direct or indirect.

[0036] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which the present disclosure belongs. The terms used herein in the specification of the present disclosure are only for the purpose of describing specific embodiments and are not intended to limit the present disclosure.

[0037] The embodiments of the present application are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the features of the following embodiments can be combined with each other.

[0038] The technical solution of the present invention is further described below in conjunction with the accompanying drawings and embodiments.

[0039] Example 1 See also Figure 1 , the embodiment of the present application proposes a variable resistance active gate driver, comprising: a control unit 1, an isolated gate driving module 2, a gate driving resistor network 3, a current change rate monitoring module 4 and a target MOSFET circuit 5. One end of the isolated gate driving module 2 is connected to the control unit 1, and the other end is connected to the gate driving resistor network 3. One end of the current change rate monitoring module 4 is connected to the target MOSFET circuit 5, and the other end is connected to the control unit 1. The gate driving resistor network 3 is connected to the target MOSFET circuit 5. The current change rate monitoring module 4 monitors the drain-source current change rate of the target MOSFET circuit 5 and feeds back to the control unit 1. The control unit 1 sends a control signal through the isolated gate driving module 2 according to the drain-source current change rate, thereby adjusting the resistance value provided by the gate driving resistor network 3 at the gate of the target MOSFET circuit 5.

[0040] In the specific implementation process, the current change rate monitoring module 4 monitors the change of the drain-source current of the target MOSFET circuit 5 in real time, and feeds back the change rate to the control unit 1. According to the feedback signal, the control unit 1 adjusts the conduction of the gate drive resistor network 3 through the isolated gate drive module 2 to achieve dynamic adjustment of the gate resistance, thereby controlling the gate current and further controlling the change rate of the drain-source current. This process is particularly effective in the Miller platform stage (when the drain-source voltage drops rapidly) to prevent current overshoot and oscillation.

[0041] It can be understood that, through the coordinated work of the control unit 1, the isolation gate drive module 2, the gate drive resistor network 3 and the current change rate monitoring module 4, the drain-source current change rate of the target MOSFET circuit 5 can be effectively monitored and adjusted, and the gate resistance value can be dynamically controlled, thereby overcoming the deficiencies of the existing active gate drive technology in terms of flexibility and dynamic adjustment capability. At the same time, the present invention significantly reduces the overshoot and oscillation of the source-drain voltage and current of the MOSFET through the optimized gate drive resistor network 3 and dynamic feedback control, thereby improving the reliability and stability of the system.

[0042] Example 2 See also Figure 1 This embodiment makes improvements based on the variable resistance active gate driver proposed in Embodiment 1.

[0043] In this embodiment, the target MOSFET circuit 5 includes a MOSFET tube DUT and a parasitic inductance LP. The gate of the MOSFET tube DUT is connected to the output end of the gate drive resistor network 3, the drain is connected to the external power circuit, the source is connected to one end of the parasitic inductance LP, and the other end of the parasitic inductance LP is connected to the external power circuit. The parasitic inductance LP represents the sum of the drain-source parasitic inductance of the target MOSFET tube DUT and the circuit parasitic inductance, and does not exist in the actual application circuit.

[0044] In the specific implementation process, the MOSFET tube DUT and the parasitic inductance LP form a part of the MOSFET switching path. The presence of parasitic inductance may cause drain-source current overshoot during the switching process. The current change is monitored by the current change rate monitoring module 4 and fed back to the control unit 1, and the control unit 1 mitigates the current spike by adjusting the resistance of the gate drive resistor network 3.

[0045] It can be understood that by simulating the actual working environment of MOSFET through parasitic inductance LP, the current change rate can be accurately controlled, the overshoot suppression effect can be optimized, and the influence of reverse electromotive force during shutdown can be reduced, thereby improving reliability.

[0046] In this embodiment, the current change rate monitoring module 4 includes an amplifier U4, the pin 1 output end of the amplifier U4 is connected to the pin 1 input end of the control unit 1, the pin 2 positive input end is connected to the driver source of the MOSFET tube DUT, and the pin 1 negative input end is connected to one end of the parasitic inductance LP connected to the external power circuit.

[0047] In the specific implementation process, the current change rate between the driver source of the MOSFET tube DUT and the parasitic inductance LP is collected in real time through the amplifier U4, and the signal is amplified and transmitted to the control unit 1. The control unit 1 dynamically adjusts the conduction state of the gate drive resistor network 3 based on the real-time signal of the current change rate to achieve precise control.

[0048] It is understandable that by monitoring the real-time and high-precision drain-source current change rate signal, it is beneficial to respond to the gate resistance adjustment demand more quickly and improve the response speed and control effect of the driver.

[0049] In this embodiment, the isolation gate drive module 2 includes isolation drivers U1 and U2. The input end of the isolation driver U1, pin 5, is connected to the output end of the control unit 1, pin 3, and the output ends of pins 1-4 are connected to some transistors of the gate drive resistor network 3. The input end of the isolation driver U2, pin 5, is connected to the output end of the control unit 1, pin 2, and output ends 1-4 are connected to other transistors of the gate drive resistor network 3.

[0050] In the specific implementation process, the control unit 1 is isolated from the gate drive resistor network 3 to prevent the control signal from directly affecting the stability of the resistor network. The isolation effect of U1 and U2 further reduces the impact of high voltage transients on the control unit 1.

[0051] It can be understood that the isolated drive module improves the electrical isolation and anti-interference capability of the system, protects the control unit 1, and enables the drive to operate stably in high-voltage applications.

[0052] In this embodiment, the gate drive resistor network 3 includes a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q4, a transistor Q5, a transistor Q6, a transistor Q7, a transistor Q8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, and a positive power supply VDD and a negative power supply VSS.

[0053] The output terminals of the isolation driver U1, pins 1 to 4 are connected to the gates of transistors Q1, Q3, Q5 and Q7, respectively. The output terminals of the isolation driver U2, pins 1 to 4 are connected to the gates of transistors Q2, Q4, Q6 and Q8, respectively.

[0054] In a specific implementation, the output end of the isolation driver U1 is connected to the gates of transistors Q1, Q3, Q5 and Q7 respectively, so as to control the on and off states of these transistors. The output end of the isolation driver U2 is connected to the gates of transistors Q2, Q4, Q6 and Q8 respectively, so as to independently control the on and off states of these transistors.

[0055] Each transistor Q1 to Q8 is connected to a resistor in parallel, providing different equivalent resistances in different combinations of on-states: One end of the resistor R1 is connected to the source of the transistor Q1, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R3 is connected to the source of the transistor Q3, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R5 is connected to the source of the transistor Q5, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R7 is connected to the source of the transistor Q7, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R2 is connected to the drain of the transistor Q2, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R4 is connected to the drain of the transistor Q4, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R6 is connected to the drain of the transistor Q6, and the other end is connected to the gate of the MOSFET tube DUT. One end of the resistor R8 is connected to the drain of the transistor Q8, and the other end is connected to the gate of the MOSFET tube DUT.

[0056] The positive output terminal of the positive power supply VDD is connected to the drains of transistors Q1, Q3, Q5 and Q7, and the negative output terminal is connected to the driver source of the MOSFET tube DUT, the positive input terminal of the amplifier U4 and the positive output terminal of the negative power supply VSS. The negative output terminal of the negative power supply VSS is connected to the drains of transistors Q2, Q4, Q6 and Q8. In the specific implementation process, by controlling the output signals of the isolation driver U1 and the isolation driver U2, the conduction control of the transistors Q1 to Q8 can be realized, and different resistance combinations can be selected so that the equivalent resistance value at the gate of the MOSFET changes dynamically during the turn-on and turn-off processes. For example, during the turn-on process, a small gate equivalent resistance value can be provided by turning on a low resistance combination (for example, Q1, Q3, Q5, Q7 and their corresponding resistors R1, R3, R5, R7) to speed up the charging speed of the gate current. During the turn-off process, the gate resistance can be increased by turning on a high resistance combination (for example, Q2, Q4, Q6, Q8 and their corresponding resistors R2, R4, R6, R8), slowing down the turn-off speed, and controlling the rate of decrease of the drain-source current, thereby effectively suppressing the overshoot phenomenon.

[0057] It is understandable that the gate drive resistor network 3 can achieve precise control of the gate current by dynamically combining different resistors in different working states of the MOSFET. This structure provides appropriate equivalent resistances during the opening and closing processes to reduce the overshoot of the drain-source current and voltage, extend the service life of the MOSFET, and improve the stability and reliability of the circuit. In addition, the control of transistors Q1 to Q8 through the isolation driver helps to maintain the isolation of the control signal in a high-voltage environment and prevent the control unit 1 from being interfered by high voltage.

[0058] In this embodiment, the resistors R1 to R8 are precision resistors with different resistance values.

[0059] Example 3 See also Figure 2 This embodiment provides a variable resistance type active gate driving method, which is applied to the variable resistance type active gate driver described in any of the above embodiments, including: The operating state of the target MOSFET circuit 5 is monitored by the current change rate monitoring module 4 .

[0060] During the turn-on process of the target MOSFET circuit 5, the control unit 1 controls the low resistance combination in the gate drive resistor network 3 to turn on through the isolated gate drive module 2. The current change rate monitoring module 4 continuously monitors the change rate of the MOSFET drain-source current. When the change rate reaches the set threshold, the control unit 1 switches to the high resistance combination to turn on through the isolated gate drive module 2. When the drain-source current tends to be stable, the control unit 1 switches to the low resistance combination to turn on again.

[0061] During the shutdown process of the target MOSFET circuit 5, the control unit 1 turns on the low resistance combination in the gate drive resistor network 3 through the isolated gate drive module 2, and the current change rate monitoring module 4 continuously monitors the drain-source current change rate of the MOSFET. When the drain-source current change rate reaches a predetermined threshold, the control unit 1 switches to the high resistance combination through the isolated gate drive module 2 again to achieve dynamic gate current control.

[0062] In this embodiment, the control unit 1 controls the resistance of the low resistance combination in the gate drive resistor network 3 to be turned on through the isolation gate drive module 2, including: the control unit 1 sends a control signal through the isolation gate drive module 2 to turn on multiple parallel low resistance resistance combinations in the gate drive resistor network 3, and at the same time disconnect the high resistance resistance combination, so that a low equivalent resistance value is provided at the gate of the target MOSFET circuit 5.

[0063] In this embodiment, the control unit 1 controls the resistance of the high resistance combination in the gate drive resistor network 3 to be turned on through the isolation gate drive module 2, including: the control unit 1 sends a control signal through the isolation gate drive module 2 to turn on multiple parallel high resistance resistor combinations in the gate drive resistor network 3, and at the same time disconnect the low resistance resistor combination, so as to provide a high equivalent resistance value at the gate of the target MOSFET circuit 5.

[0064] As an example, during the Miller plateau phase of the MOSFET turn-on process, the gate current begins to feed the gate-drain capacitance Charging, drain-source voltage begins to decrease. At this time, due to the junction capacitance of the MOSFET anti-parallel diode Due to the reverse recovery and parasitic inductance, the drain-source current will produce spikes and oscillations, and the overshoot current can be approximated as:

[0065] The rate of change of drain-source voltage can be approximated as:

[0066] in, is the gate current of the MOSFET. Therefore, the above analysis shows that the drain-source overshoot current of the MOSFET can be controlled by controlling the gate current in the Miller platform stage. In combination with the variable resistor active gate driver proposed in Examples 1 and 2, the following method can be used to effectively reduce the drain-source overshoot current during the MOSFET turn-on process: The current change rate monitoring module 4 monitors the drain-source current change rate of the target MOSFET circuit 5 to determine the on state of the MOSFET.

[0067] The control unit 1 first controls the low resistance combination to be turned on through the isolated gate driving module 2 to provide a larger gate current, speed up the injection speed of the MOSFET gate charge, and thus speed up the turn-on speed of the MOSFET.

[0068] As the turn-on process proceeds, when the drain-source current change rate reaches the set threshold, it indicates that the turn-on process enters the Miller platform stage. At this time, the control unit 1 switches to a high resistance combination to reduce the gate current and the peak value of the overshoot current.

[0069] When the drain-source current tends to be stable and the turn-on process is nearly completed, the control unit 1 switches back to the low resistance combination to conduct to ensure that the turn-on process is successfully completed.

[0070] After the Miller platform stage during the MOSFET turn-off process, the drain-source voltage reaches the bus voltage. At the same time, the drain-source current begins to decrease. However, due to the parasitic inductance in the MOSFET device and the circuit, a reverse electromotive force is generated across the MOSFET drain-source to prevent the current from decreasing. This reverse electromotive force causes the MOSFET drain-source voltage to exceed the bus voltage, forming an overshoot voltage. The overshoot voltage can be approximated as:

[0071] The drain-source current change rate can be approximated as:

[0072] in is the transconductance of the MOSFET, is the input resistance of MOSFET. The above analysis shows that the drain-source overshoot voltage of MOSFET can be controlled by controlling the gate current after the Miller platform stage. In combination with the variable resistance active gate driver proposed in Examples 1 and 2, the following method can be applied to effectively reduce the drain-source overshoot voltage during the MOSFET shutdown process: The current change rate monitoring module 4 is also used to monitor the drain-source current change rate in real time and determine whether the MOSFET is in the off state.

[0073] The control unit 1 first controls the low resistance combination to be turned on through the isolation gate driving module 2 to quickly reduce the gate charge and speed up the shutdown speed.

[0074] When the drain-source current change rate reaches a set threshold, the control unit 1 switches to a high resistance combination to conduct, so as to slow down the current drop rate and suppress the reverse electromotive force caused by parasitic inductance, thereby effectively controlling the overshoot of the drain-source voltage.

[0075] like Figure 3 As shown, Figure 3 This is a waveform diagram of the switching process of the variable resistance active gate driving method provided in an embodiment of the present application.

[0076] During the opening process ( t 1 arrive t 6 ): t 1 arrive t 3 : At the initial stage of turn-on, the gate drive resistor network 3 is in a low resistance state to accelerate the gate charge injection of the MOSFET and quickly reduce the drain-source voltage.

[0077] t 3 arrive t 5 : When the rate of change of the drain-source current reaches the set threshold, the control unit 1 switches to a high resistance combination for conduction to reduce the gate current, reduce the current overshoot during turn-on, and control the turn-on loss area.

[0078] t 5 arrive t 6 : As the drain-source current becomes stable, the control unit 1 switches to a low resistance combination again to ensure that the turn-on process is completed.

[0079] During the shutdown process ( t 7 arrive t 13 ): t 7 arrive t 10 : At the beginning of shutdown, the low resistance combination is turned on to accelerate the release of gate charge.

[0080] t 10 arrive t 12 : When the rate of change of the drain-source current reaches a threshold value, the control unit 1 switches to a high resistance combination to limit the rate of decrease of the drain-source current and reduce the drain-source voltage overshoot caused by parasitic inductance.

[0081] t 12 arrive t 13 : Control unit 1 maintains a high resistance state until the shutdown process is completed to reduce the shutdown loss area.

[0082] It can be understood that by dynamically adjusting the resistor combination in the gate drive resistor network 3, the drain-source current and drain-source voltage overshoot phenomenon of the MOSFET during the turn-on and turn-off process can be effectively suppressed. Compared with the traditional fixed resistance driving method, this method can reduce the impact of overshoot on the device without affecting the switching speed, improve the reliability and life of the MOSFET and the entire circuit system, and is suitable for power electronic applications with high switching characteristics requirements.

[0083] Example 4 An embodiment of the present application also provides a computer-readable storage medium having a computer program stored thereon, which implements the above variable resistance active gate driving method when executed by a processor.

[0084] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present application. In this specification, the schematic representations of the above terms are not necessarily directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or N embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine the different embodiments or examples described in this specification and the features of the different embodiments or examples, without contradiction.

[0085] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Therefore, a feature defined as "first" or "second" may explicitly or implicitly include at least one of the features. In the description of this application, "N" means at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0086] Any process or method description in a flowchart or otherwise described herein may be understood to represent a module, fragment or portion of code comprising one or more executable instructions for implementing the steps of a custom logical function or process, and the scope of the preferred embodiments of the present application includes alternative implementations in which functions may not be performed in the order shown or discussed, including performing functions in a substantially simultaneous manner or in reverse order depending on the functions involved, which should be understood by technicians in the technical field to which the embodiments of the present application belong.

[0087] It should be understood that the various parts of the present application can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiment, the N steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array, a field programmable gate array, etc.

[0088] A person skilled in the art may understand that all or part of the steps in the above-mentioned embodiment method may be completed by instructing related hardware through a program, and the program may be stored in a computer-readable storage medium, which, when executed, includes one or a combination of the steps of the method embodiment.

[0089] Obviously, the above embodiments of the present invention are merely examples for clearly illustrating the present invention, and are not intended to limit the embodiments of the present invention. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the embodiments here. Any modifications, equivalent substitutions and improvements made within the spirit and principles of the present invention should be included in the protection scope of the claims of the present invention.

Claims

1. A variable resistor active gate driver, characterized in that: include: A control unit (1), an isolated gate drive module (2), a gate drive resistor network (3), a current change rate monitoring module (4) and a target MOSFET circuit (5); One end of the isolation gate drive module (2) is connected to the control unit (1), and the other end is connected to the gate drive resistor network (3); One end of the current change rate monitoring module (4) is connected to the target MOSFET circuit (5), and the other end is connected to the control unit (1); The gate drive resistor network (3) is connected to the target MOSFET circuit (5); The current change rate monitoring module (4) monitors the drain-source current change rate of the target MOSFET circuit (5) and feeds back to the control unit (1); the control unit (1) sends a control signal through the isolation gate drive module (2) according to the drain-source current change rate to adjust the resistance value provided by the gate drive resistor network (3) at the gate of the target MOSFET circuit (5).

2. The variable resistor active gate driver according to claim 1, characterized in that: The target MOSFET circuit (5) comprises a MOSFET tube DUT and a parasitic inductance LP; The gate of the MOSFET tube DUT is connected to the output end of the gate drive resistor network (3), the drain is connected to the external power circuit, the source is connected to one end of the parasitic inductance LP, and the other end of the parasitic inductance LP is connected to the external power circuit.

3. The variable resistor type active gate driver according to claim 2, characterized in that: The current change rate monitoring module (4) comprises an amplifier U4, the output end of the amplifier U4 is connected to the control unit (1), the positive input end is connected to the driver source of the MOSFET tube DUT, and the negative input end is connected to one end of the parasitic inductance LP connected to the external power circuit.

4. The variable resistor type active gate driver according to claim 3, characterized in that: The isolation gate driving module (2) comprises an isolation driver U1 and an isolation driver U2; The input end of the isolation driver U1 is connected to the control unit (1), and the output end is connected to the gate drive resistor network (3); The input end of the isolation driver U2 is connected to the control unit (1), and the output end is connected to the gate drive resistor network (3).

5. The variable resistor active gate driver according to claim 4, characterized in that: The gate drive resistor network (3) comprises a transistor Q1, a transistor Q2, a transistor Q3, a transistor Q4, a transistor Q5, a transistor Q6, a transistor Q7, a transistor Q8, a resistor R1, a resistor R2, a resistor R3, a resistor R4, a resistor R5, a resistor R6, a resistor R7, a resistor R8, and a positive power supply VDD and a negative power supply VSS; The output end of the isolation driver U1 is connected to the gates of the transistor Q1, the transistor Q3, the transistor Q5 and the transistor Q7 respectively; The output end of the isolation driver U2 is connected to the gates of the transistor Q2, the transistor Q4, the transistor Q6 and the transistor Q8 respectively; One end of the resistor R1 is connected to the source of the transistor Q1, and the other end is connected to the gate of the MOSFET tube DUT; one end of the resistor R3 is connected to the source of the transistor Q3, and the other end is connected to the gate of the MOSFET tube DUT; one end of the resistor R5 is connected to the source of the transistor Q5, and the other end is connected to the gate of the MOSFET tube DUT; one end of the resistor R7 is connected to the source of the transistor Q7, and the other end is connected to the gate of the MOSFET tube DUT; One end of the resistor R2 is connected to the drain of the transistor Q2, and the other end is connected to the gate of the MOSFET tube DUT; one end of the resistor R4 is connected to the drain of the transistor Q4, and the other end is connected to the gate of the MOSFET tube DUT; one end of the resistor R6 is connected to the drain of the transistor Q6, and the other end is connected to the gate of the MOSFET tube DUT; one end of the resistor R8 is connected to the drain of the transistor Q8, and the other end is connected to the gate of the MOSFET tube DUT; The positive output end of the positive power supply VDD is connected to the drains of the transistors Q1, Q3, Q5 and Q7, and the negative output end is connected to the driver source of the MOSFET tube DUT, the positive input end of the amplifier U4 and the positive output end of the negative power supply VSS; the negative output end of the negative power supply VSS is connected to the drains of the transistors Q2, Q4, Q6 and Q8.

6. The variable resistor active gate driver according to claim 5, characterized in that: The resistor R1 , the resistor R2 , the resistor R3 , the resistor R4 , the resistor R5 , the resistor R6 , the resistor R7 and the resistor R8 are precision resistors with different resistance values.

7. A variable resistance active gate driving method, characterized in that: include: Monitoring the operating state of the target MOSFET circuit (5) through a current change rate monitoring module (4); During the turn-on process of the target MOSFET circuit (5), the control unit (1) controls the low resistance combination of the gate drive resistor network (3) to be turned on through the isolated gate drive module (2); the current change rate monitoring module (4) continuously monitors the drain-source current change rate of the target MOSFET, and when it is detected that the drain-source current change rate reaches a set threshold, the control unit (1) controls the high resistance combination of the gate drive resistor network (3) to be turned on through the isolated gate drive module (2); when the drain-source current tends to be stable, the control unit (1) controls the low resistance combination of the gate drive resistor network (3) to be turned on again through the isolated gate drive module (2); During the shutdown process of the target MOSFET circuit (5), the control unit (1) controls the low-resistance combination of resistors in the gate drive resistor network (3) to be turned on through the isolated gate drive module (2), and the current change rate monitoring module (4) continuously monitors the drain-source current change rate of the target MOSFET. When the drain-source current change rate reaches a predetermined threshold, the control unit (1) controls the high-resistance combination of resistors in the gate drive resistor network (3) to be turned on through the isolated gate drive module (2).

8. The variable resistance active gate driving method according to claim 7, characterized in that: The control unit (1) controls the conduction of the resistance of the low resistance combination in the gate drive resistance network (3) through the isolated gate drive module (2), including: The control unit (1) sends a control signal through the isolated gate drive module (2) to turn on a plurality of parallel low-resistance resistor combinations in the gate drive resistor network (3) and disconnect a high-resistance resistor combination, thereby providing a low equivalent resistance value at the gate of the target MOSFET circuit (5).

9. The variable resistance active gate driving method according to claim 7, characterized in that: The control unit (1) controls the conduction of the high resistance combination in the gate drive resistor network (3) through the isolated gate drive module (2), including: The control unit (1) sends a control signal through the isolated gate drive module (2) to turn on a plurality of parallel high-resistance resistor combinations in the gate drive resistor network (3) and disconnect a low-resistance resistor combination, thereby providing a high equivalent resistance value at the gate of the target MOSFET circuit (5).

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a program, and the program is used by a processor to execute the operations performed by the variable resistance active gate driving method according to any one of claims 7 to 9.

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