Adaptive time division multiplexing transmission method and device, and electronic equipment
By realizing time-division multiplexing format data transmission on the I2S controller, the problem that existing chips cannot be compatible with the multi-channel TDM format is solved, and the compatibility and cost-effectiveness of multi-channel data transmission are achieved.
Patent Information
- Application Number
- CN202411980018.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Priority Date
- 2024-10-16
- Filing Date
- 2024-12-31
- Publication Date
- 2025-03-11
AI Technical Summary
Existing chips are not compatible with the multi-channel TDM format to realize data transmission, and cannot adapt to the external demand for multi-channel data transmission, resulting in an increase in data transmission cost.
By realizing data transmission based on the time division multiplexing format on the original I2S controller, the time division multiplexing transmission parameters of the receiving device that supports time division multiplexing are obtained, the clock signal adapted to the I2S format is generated, and the receiving device is controlled to perform data transmission, so that the data amount between the sending device and the receiving device is matched.
It realizes data transmission compatible with I2S format and TDM format, adapts to external needs for multi-channel audio, and ensures the data transmission function of the original I2S format, avoiding the problem of out-of-order data.
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Figure CN119603377A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of data processing, and in particular to a method and device for adaptive time division multiplexing transmission, and electronic equipment. Background Art
[0002] Currently, many chips on the market support dual-channel I2S format for data transmission (internal integrated circuit audio bus format), but are not compatible with multi-channel TDM format for data transmission (Time Division Multiplexing). However, with the development of market demand, more and more application scenarios require chips to support multi-channel data transmission, so existing chips cannot adapt to external needs for multi-channel data transmission. If multi-channel data transmission is to be achieved, it can only be achieved by replacing chips that are compatible with multiple channels, resulting in increased data transmission costs. Summary of the invention
[0003] The present invention provides a method and device for adaptive time division multiplexing transmission, and electronic equipment, which can realize data transmission based on a time division multiplexing format on an original I2S controller to meet external requirements for multi-channel audio.
[0004] In one aspect of the present invention, a method for adaptive time division multiplexing transmission is provided, which is applied to a sending device supporting I2S. The method includes: obtaining time division multiplexing transmission parameters of a receiving device supporting time division multiplexing; generating a first set of clock signals according to the time division multiplexing transmission parameters; and controlling the receiving device to perform data transmission based on the first set of clock signals, so that the first data amount that the sending device can send in the same time frame is equal to the second data amount that the receiving device can receive.
[0005] In another aspect of the present invention, a method for adaptive time division multiplexing transmission is provided, which is applied to a receiving device supporting I2S. The method comprises: receiving a third frame clock signal generated according to a time division multiplexing transmission parameter of a sending device supporting time division multiplexing and a fourth frame clock signal of the sending device; and transmitting data in response to a driving instruction of the sending device based on the third frame clock signal and the fourth frame clock signal, so that the third data amount that the receiving device can receive in the same time frame is equal to the fourth data amount that the sending device can send.
[0006] In another aspect of the present invention, a device for adaptive time division multiplexing transmission is provided, which includes an I2S controller configured to execute the above-mentioned method for adaptive time division multiplexing transmission.
[0007] In another aspect of the present invention, an electronic device is provided, which includes a memory configured to store an executable program and a processor configured to execute the computer program to perform the above-mentioned adaptive time division multiplexing transmission method.
[0008] According to the technical solution of the present invention, during the data transmission process, if the sending device sends and receives data based on the I2S format, and the receiving device sends and receives data based on the TDM format, the sending device obtains the TDM transmission parameters of the receiving device to generate a first group of clock signals adapted to the I2S format according to the TDM transmission parameters, and the sending device controls the receiving device to perform data transmission based on the first group of clock signals, so that the first data volume sent by the sending device based on the I2S format can match the second data volume received by the receiving device based on the TDM format, thereby avoiding the problem of data disorder caused by different device transmission protocols. If the sending device sends and receives data in accordance with the standard TDM format, and the receiving device sends and receives data in accordance with the I2S format, the receiving device cannot determine the start and end of the data frame sent by the sending device, so it is necessary to detect the frame clock signals of the sending device and the receiving device respectively to determine the start and end of the data frame, thereby ensuring synchronous data transmission. The present invention can be compatible with the I2S format and the TDM format to realize data transmission, and while meeting the external demand for multi-channel audio, it guarantees the data transmission function of the original I2S format. BRIEF DESCRIPTION OF THE DRAWINGS
[0009] Figure 1 A flowchart of a method for adaptive time division multiplexing transmission according to an embodiment of the present invention; Figure 2 A flowchart of another method for adaptive time division multiplexing transmission according to an embodiment of the present invention; Figure 3 A flowchart of a method for adaptive time division multiplexing transmission of a sending device according to an embodiment of the present invention; Figure 4 A schematic diagram of the connection between a transmitting device and a receiving device (including a frequency divider) according to an embodiment of the present invention; Figure 5 A schematic diagram of the connection between a transmitting device and a receiving device (excluding a frequency divider) according to an embodiment of the present invention; Figure 6 A schematic diagram of a cycle of a TDM format and an I2S format according to an embodiment of the present invention; Figure 7 A flowchart of a method for adaptive time division multiplexing transmission of a receiving device according to an embodiment of the present invention; Figure 8 A schematic diagram of connection between another transmitting device and a receiving device (including a frequency divider) according to an embodiment of the present invention; Fig. 9A schematic diagram of connection between another transmitting device and a receiving device (excluding a frequency divider) according to an embodiment of the present invention; Fig.10 Schematic diagram of the structure of an electronic device according to an embodiment of the present invention. DETAILED DESCRIPTION
[0010] In order to explain the technical content, achieved objectives and effects of the present invention in detail, the following is an explanation in conjunction with the implementation modes and the accompanying drawings.
[0011] In the existing technology, many chips support the dual-channel I2S format for data transmission (internal integrated circuit audio bus format), but are not compatible with the multi-channel TDM format for data transmission (Time Division Multiplexing). However, with the development of market demand, more and more application scenarios require chips to support multi-channel data transmission, so existing chips cannot adapt to external needs for multi-channel data transmission. If multi-channel data transmission is to be achieved, it can only be achieved by replacing chips that are compatible with multiple channels, resulting in increased data transmission costs.
[0012] In order to solve at least the above technical problems, the present disclosure provides a method for adaptive time division multiplexing transmission. According to the present disclosure, during the data transmission process, if the sending device sends and receives data based on the I2S format, and the receiving device sends and receives data based on the TDM format, the sending device obtains the TDM transmission parameters of the receiving device, and generates a first group of clock signals adapted to the I2S format based on the TDM transmission parameters. The sending device controls the receiving device to perform data transmission based on the first group of clock signals, so that the first data volume sent by the sending device based on the I2S format can match the second data volume received by the receiving device based on the TDM format, avoiding the problem of data disorder caused by different device transmission protocols. In this way, according to the embodiments of the present disclosure, it is possible to realize data transmission in a compatible manner with the I2S format and the TDM format, and while meeting the external demand for multi-channel audio, the data transmission function of the original I2S format is guaranteed.
[0013] Hereinafter, the technical solution according to the present disclosure will be described with reference to specific embodiments and in conjunction with the accompanying drawings.
[0014] Figure 1 1 is a flow chart showing a method 100 for adaptive time division multiplexing transmission according to an embodiment of the present disclosure. Figure 1 The method 100 is applied to a sending device supporting I2S, and includes the following steps 102 to 106.
[0015] In step 102, a time division multiplexing (TDM) transmission parameter of a receiving device supporting time division multiplexing (TDM) is obtained.
[0016] In some embodiments, the time division multiplexing transmission parameters include a first channel number, a bit width, and a sampling frequency corresponding to a receiving device.
[0017] In step 104, a first set of clock signals is generated according to the time division multiplexing transmission parameters.
[0018] In some embodiments, the first group of clock signals includes a first frame clock signal and a first bit clock signal. In some embodiments, generating the first group of clock signals according to the time division multiplexing transmission parameters includes: generating a first bit clock signal according to the first number of channels, the bit width and the sampling frequency; generating a first frame clock signal according to the first bit clock signal, the bit width and the second number of channels of the transmitting device. In this way, the amount of transmission data in the TDM format is converted into the amount of data in the I2S format under one channel, so as to generate a first frame clock signal and a first bit clock signal for serial transmission based on the conversion standard. By transmitting data to the first frame clock signal and the first bit clock signal, it is ensured that the first amount of data transmitted in the I2S format can match the second amount of data transmitted in the TDM format within the same time frame.
[0019] In some embodiments, generating the first bit clock signal according to the first number of channels, the bit width and the sampling frequency includes generating the first bit clock signal by the following formula: the first bit clock signal = the first number of channels × the bit width × the sampling frequency.
[0020] In some embodiments, generating a first frame clock signal based on the first bit clock signal, the bit width, and the second channel number of the sending device includes generating the first frame clock signal by the following formula: the first frame clock signal = the first bit clock signal / (the bit width × the second channel number).
[0021] In this way, in order to ensure the synchronization of data transmission between the I2S format transmitting device and the TDM format receiving device, the I2S format bit clock signal is generated based on the number of channels, bit width and sampling frequency of time division multiplexing transmission. Since the frame clock signal × the number of channels in the I2S format × the bit width = the bit clock signal, the frame clock signal can be determined by the bit clock signal to ensure the accurate transmission of the data frame.
[0022] In step 106, the receiving device is controlled to perform data transmission based on the first set of clock signals, so that the first data amount that can be sent by the sending device in the same time frame is equal to the second data amount that can be received by the receiving device.
[0023] In some embodiments, controlling the receiving device to perform data transmission based on the first group of clock signals includes: generating a second frame clock signal homologous to the first frame clock signal according to the sampling frequency, so as to control the receiving device to perform data transmission through the second frame clock signal. In this way, since the clock sampling frequencies of the transmitting device and the receiving device are different, a homologous second frame clock signal in TDM format is generated based on the first frame clock signal in I2S format, so as to count the second frame clock signal in TDM format through the first frame clock signal in I2S format, thereby ensuring that the amount of data collected in TDM format in one cycle matches the amount of data collected in I2S format in a specific cycle.
[0024] In some embodiments, controlling the receiving device to perform data transmission through the second frame clock signal includes: sending the second frame clock signal generated based on a preset frequency divider to the receiving device through a frame clock pin to control the receiving device to perform data transmission. In this way, since some chips cannot directly implement frequency division to generate the second frame clock signal, the first frame clock signal can be divided by setting a frequency divider to ensure synchronization of data transmission.
[0025] In some embodiments, controlling the receiving device to perform data transmission through the second frame clock signal includes: sending the second frame clock signal to the receiving device through a data output pin, so that the receiving device receives the second data volume. In this way, since some chips can directly divide the frequency to generate the second frame clock signal, the specific second frame clock signal is sent to the receiving device through its data output pin to ensure synchronization of data transmission.
[0026] Figure 2 2 is a flow chart showing another method 200 for adaptive time division multiplexing transmission according to an embodiment of the present disclosure. Figure 2 The method 200 is applied to a receiving device supporting I2S, and includes the following steps 202 to 204.
[0027] In step 202, a third frame clock signal generated according to a time division multiplexing transmission parameter of a sending device supporting time division multiplexing and a fourth frame clock signal of the sending device are received.
[0028] In some embodiments, receiving a third frame clock signal generated according to a time division multiplexing transmission parameter of a sending device supporting time division multiplexing and a fourth frame clock signal of the sending device includes: receiving the fourth frame clock signal through a preset input and output pin, and receiving the third frame clock signal generated by the sending device through a frame clock pin that is homologous to and proportional to the fourth frame clock signal. In this way, the fourth frame clock signal and the third frame clock signal are received through different pins, respectively, to ensure synchronous reception of frame signals in TDM format and I2S format.
[0029] In step 204, data transmission is performed in response to the driving instruction of the sending device based on the third frame clock signal and the fourth frame clock signal, so that the third data amount that the receiving device can receive in the same time frame is equal to the fourth data amount that the sending device can send.
[0030] In some embodiments, data transmission based on the third frame clock signal and the fourth frame clock signal in response to the driving instruction of the sending device includes: detecting the level state of the third frame clock signal and the fourth frame clock signal in response to the driving instruction of the sending device; if the level states of the third frame clock signal and the fourth frame clock signal are both in the driving state, driving the DMA controller to perform data transmission with the sending device. In this way, only when the frame clock signal in the TDM format and the frame clock signal in the I2S format are both in the driving state, the start of the data frame sent by the current sending device can be determined, and then the DMA controller is driven to complete the data transmission with the sending device, thereby ensuring the accuracy of data transmission.
[0031] Figure 3 FIG. 3 is a flow chart showing a method 300 for adaptive time division multiplexing transmission of a transmitting device according to an embodiment of the present invention. Figure 3 The method 300 is applied to a sending device supporting I2S, the sending device performs data transmission based on the I2S format, and the receiving device performs data transmission based on the TDM format. In this embodiment, the sending device is an I2S controller, and the receiving device is an audio digital signal processor. The method 300 includes the following steps 302 to 308.
[0032] In step 302, the I2S controller obtains the first channel number, bit width and sampling frequency of the audio digital signal processor in the TDM mode.
[0033] In some embodiments, the first channel number of the audio digital signal processor in the TDM mode is 8, the bit width is 32 bits, and the sampling frequency is 48 KHz.
[0034] In step 304 , the I2S controller generates a first bit clock signal according to the first channel number, bit width and sampling frequency of the audio digital signal processor in the TDM mode.
[0035] In some embodiments, the first bit clock signal BCLK=the first channel number×bit width×sampling frequency=8×32 bits×48 KHz=12288 Kbit.
[0036] In step 306, the I2S controller generates a first frame clock signal according to the first bit clock signal, the bit width of the audio digital signal processor in the TDM mode, and the second channel number of the I2S controller.
[0037] In some embodiments, since the I2S controller performs data transmission based on the I2S format, the number of second channels of the I2S controller is 2, and the first frame clock signal LRCK=first bit clock signal / (bit width×second number of channels)=12288Kbit / (32bit×2)=192Kbit.
[0038] In step 308, the I2S controller inputs the first frame clock signal and the sampling frequency of the audio digital signal processor in TDM mode into the divider through the frame clock pin, and the divider generates a second frame clock signal identical to the first frame clock signal and sends it to the audio digital signal processor.
[0039] In some embodiments, the above step 308 can be replaced by: the I2S controller generates a second frame clock signal that is identical to the first frame clock signal according to the sampling frequency of the audio digital signal processor in TDM mode, and sends the second frame clock signal to the audio digital signal processor through the data output pin.
[0040] Figure 4 2 is a schematic diagram showing the connection between a transmitting device and a receiving device (including a frequency divider) according to an embodiment of the present invention. Figure 4, the frame clock pin TDM_LRCK (192K) of the I2S controller is connected to the input end of the frequency divider, the output end of the frequency divider is connected to the frame clock pin TDM_WS (48K) of the audio digital signal processor, and the output end of the frequency divider is also connected to the input and output pin IO (check frame start) of the I2S controller. Therefore, the I2S controller inputs the first frame clock signal 192K and the sampling frequency 48K of the audio digital signal processor into the frequency divider through the frame clock pin TDM_LRCK (192K), generates the second frame clock signal 48K which is the same source as the first frame clock signal 192K through the frequency divider, and the frequency divider sends the second frame clock signal 48K to the frame clock pin TDM_WS (48K) of the audio digital signal processor. At the same time, the I2S controller detects the frame start signal in the second frame clock signal 48K through the input and output pin IO (check frame start).
[0041] Figure 5 2 is a schematic diagram showing a connection between a transmitting device and a receiving device (excluding a frequency divider) according to an embodiment of the present invention. Figure 5 , the frame clock pin TDM_LRCK (192K) of the I2S controller is set to zero, and the data output pin TDM1_SDO3 (48K) of the I2S controller is connected to the frame clock pin TDM_WS (48K) of the audio digital signal processor. Thus, the I2S controller sends the second frame clock signal 48K to the frame clock pin TDM_WS (48K) of the audio digital signal processor through the data output pin TDM1_SDO3 (48K).
[0042] like Figure 6 As shown, one sampling period of the audio digital signal processor in the TDM format includes four sampling periods of the I2S controller in the I2S format. Therefore, the first frame clock signal 192K is down-converted to obtain the second frame clock signal 48K.
[0043] Figure 7 4 is a flow chart showing a method 400 for adaptive time division multiplexing transmission of a receiving device according to an embodiment of the present invention. Figure 7 The method 400 is applied to a receiving device supporting I2S, the receiving device performs data transmission based on the I2S format, and the sending device performs data transmission based on the TDM format. In this embodiment, the receiving device is an I2S controller, and the sending device is an audio digital signal processor. The method 400 includes the following steps 402 to 406.
[0044] In step 402, the I2S controller receives a third bit clock signal and a third frame clock signal generated by the audio digital signal processor in TDM mode through a frame clock pin, and receives a fourth frame clock signal of the audio digital signal processor through an input / output pin.
[0045] In some embodiments, the third channel number of the audio digital signal processor in the TDM mode is 32, the bit width is 16 bits, and the sampling frequency is 48 KHz, and the fourth frame clock signal of the audio digital signal processor in the TDM mode is 48 K. The audio digital signal processor generates the third bit clock signal and the third frame clock signal in the same manner as steps S304 to S306 above, so the third bit clock signal BCLK=24576 Kbit, and the third frame clock signal LRCK=768 Kbit.
[0046] In step 404, the I2S controller responds to the driving instruction of the audio digital signal processor to detect whether the level states of the third frame clock signal and the fourth frame clock signal are both in the rising edge state.
[0047] In step 406, if yes, the I2S controller drives the DMA controller to perform data transmission with the audio digital signal processor via the SDO pin and the SDI pin.
[0048] Figure 8 1 is a schematic diagram showing the connection between another transmitting device and a receiving device (including a frequency divider) according to an embodiment of the present invention. If the audio digital signal processor cannot generate a third frame clock signal having the same source as the fourth frame clock signal, the audio digital signal processor generates the third frame clock signal through the frequency divider, and the I2S controller receives the third frame clock signal generated by the frequency divider through the frame clock pin. Figure 8 The frame clock pin TDM_WS (48K) of the audio digital signal processor is connected to the input end of the divider and the input and output pin IO (check frame start) of the I2S controller respectively, and the output end of the divider is connected to the frame clock pin TDM_LRCK (768K) of the I2S controller.
[0049] Fig. 9 1 is a schematic diagram showing the connection between another transmitting device and a receiving device (excluding a frequency divider) according to an embodiment of the present invention. If the audio digital signal processor can generate a third frame clock signal having the same source as the fourth frame clock signal, the I2S controller receives the third frame clock signal through the frame clock pin. Fig. 9, the frame clock pin TDM_WS (48K) of the audio digital signal processor is connected to the input and output pin IO (check frame start) of the I2S controller, and the data output pin IO (768K) of the audio digital signal processor is connected to the frame clock pin TDM_LRCK (768K) of the I2S controller.
[0050] According to another aspect of the present invention, a device for adaptive time division multiplexing transmission is provided, wherein the device comprises an I2S controller, and the I2S controller is configured to execute each step of the method for adaptive time division multiplexing transmission described above.
[0051] According to yet another aspect of the present invention, Fig.10 FIG. 5 is a schematic diagram showing the structure of an electronic device 500 according to an embodiment of the present invention. Fig.10 The electronic device 500 includes a memory 502 and a processor 504. The memory 502 is configured to store an executable program, and the processor 504 is configured to implement the various steps of the adaptive time division multiplexing transmission method described above when executing the program.
[0052] In summary, the method and device for adaptive time division multiplexing transmission and the electronic device provided by the present invention, during the data transmission process, if the device that sends and receives data based on the I2S format is a sending device, and the device that sends and receives data based on the TDM format is a receiving device, then the sending device obtains the TDM transmission parameters of the receiving device, and generates the first bit clock signal and the first frame clock signal adapted to the I2S format according to the TDM transmission parameters, and at the same time generates the second frame clock signal homologous to the first frame clock signal according to the sampling frequency of the TDM mode, thereby controlling the receiving device to perform data transmission, so that the first data amount sent by the sending device based on the I2S format can match the second data amount received by the receiving device based on the TDM format. If the device that sends and receives data based on the I2S format is a receiving device, then the receiving device needs to obtain the fourth frame clock signal of the sending device in the TDM mode while obtaining the third frame clock signal adapted to the I2S format generated by the sending device, so that the third data amount received by the receiving device based on the I2S format can match the fourth data amount sent by the sending device based on the TDM format. When responding to the driving instruction of the sending device, the receiving device needs to detect whether the third frame clock signal and the fourth frame clock signal are in the rising edge state at the same time, so as to determine the start data frame sent by the sending device, and avoid the problem of data disorder caused by different transmission protocols between the sending device and the receiving device. The present invention can be compatible with the I2S format and the TDM format to realize data transmission, and while meeting the external demand for multi-channel audio, it guarantees the data transmission function of the original I2S format.
[0053] The above descriptions are merely embodiments of the present invention and are not intended to limit the patent scope of the present invention. Any equivalent transformations made using the contents of the present invention's specification and drawings, or directly or indirectly applied in related technical fields, are also included in the patent protection scope of the present invention.
Claims
1. A method for adaptive time division multiplexing transmission, characterized in that: Applied to a sending device supporting I2S, the method comprises: Obtaining time division multiplexing transmission parameters of a receiving device supporting time division multiplexing; generating a first set of clock signals according to the time division multiplexing transmission parameters; The receiving device is controlled to perform data transmission based on the first group of clock signals, so that a first data amount that can be sent by the sending device in the same time frame is equal to a second data amount that can be received by the receiving device.
2. The method according to claim 1, characterized in that The time division multiplexing transmission parameters include the first channel number, bit width and sampling frequency, the first group of clock signals includes a first frame clock signal and a first bit clock signal, Wherein generating a first group of clock signals according to the time division multiplexing transmission parameters comprises: Generate a first bit clock signal according to the first number of channels, the bit width and the sampling frequency; A first frame clock signal is generated according to the first bit clock signal, the bit width, and the number of second channels of the sending device.
3. The method according to claim 2, characterized in that Controlling the receiving device to perform data transmission based on the first group of clock signals includes: A second frame clock signal having the same source as the first frame clock signal is generated according to the sampling frequency, so as to control the receiving device to perform data transmission through the second frame clock signal.
4. The method according to claim 3, characterized in that Controlling the receiving device to perform data transmission by using the second frame clock signal includes: The second frame clock signal generated based on a preset frequency divider is sent to the receiving device through a frame clock pin to control the receiving device to perform data transmission.
5. The method according to claim 3, characterized in that: Controlling the receiving device to perform data transmission by using the second frame clock signal includes: The second frame clock signal is sent to the receiving device through a data output pin, so that the receiving device receives the second data volume.
6. The method according to claim 2, characterized in that Generating a first bit clock signal according to the first number of channels, the bit width, and the sampling frequency includes generating the first bit clock signal by the following formula: The first clock signal=the first channel number×the bit width×the sampling frequency; Generating a first frame clock signal according to the first bit clock signal, the bit width, and the second channel number of the sending device includes generating the first frame clock signal by the following formula: The first frame clock signal=the first bit clock signal / (the bit width×the second number of channels).
7. A method for adaptive time division multiplexing transmission, characterized in that: Applied to a receiving device supporting I2S, the method comprises: receiving a third frame clock signal generated according to a time division multiplexing transmission parameter of a sending device supporting time division multiplexing and a fourth frame clock signal of the sending device; and Data transmission is performed in response to the driving instruction of the sending device based on the third frame clock signal and the fourth frame clock signal, so that the third data amount that the receiving device can receive in the same time frame is equal to the fourth data amount that the sending device can send.
8. The method according to claim 7, characterized in that Receiving a third frame clock signal generated according to a time division multiplexing transmission parameter of a sending device supporting time division multiplexing and a fourth frame clock signal of the sending device includes: The fourth frame clock signal is received through a preset input / output pin, and the third frame clock signal which is homologous to and proportional to the fourth frame clock signal is received through a frame clock pin.
9. The method according to claim 8, characterized in that Responding to the driving instruction of the sending device to perform data transmission based on the third frame clock signal and the fourth frame clock signal includes: In response to a driving instruction of the sending device, detecting level states of the third frame clock signal and the fourth frame clock signal; If the level states of the third frame clock signal and the fourth frame clock signal are both in the driving state, the DMA controller is driven to perform data transmission with the sending device.
10. An adaptive time division multiplexing transmission device, characterized in that: include: The I2S controller is configured to execute the method according to any one of claims 1 to 6 or the method according to any one of claims 7 to 9.
11. An electronic device, characterized in that: include: a memory configured to store an executable program; as well as A processor configured to execute the program to perform the method according to any one of claims 1 to 6, or the method according to any one of claims 7 to 9.