Pixel structure, working method and image sensor

By forming a charging capacitor in the pixel structure of the CMOS image sensor and using the voltage control of the metal material layer to charge under no light conditions, the problems of CTE test complexity and time of the CMOS image sensor are solved, and a more efficient test process is achieved.

CN119604055AActive Publication Date: 2025-03-11NEXCHIP SEMICON CO LTD
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Patent Information

Application Number
CN202510112494.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-01-24
Publication Date
2025-03-11
Estimated Expiration
2045-01-24

AI Technical Summary

Technical Problem

Existing CMOS image sensors require light source control equipment in charge transfer efficiency (CTE) testing, which increases the test complexity and time.

Method used

A pixel structure is designed, including providing grooves, insulating film layers and metal material layers in the photodiode to form a charging capacitor, which can be charged under no light conditions by controlling the voltage of the metal material layer.

Benefits of technology

It realizes charging the photodiode under no light conditions, simplifies the CTE testing process, reduces the test complexity and time, and improves the test efficiency.

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Abstract

The invention provides a pixel structure, a working method and an image sensor, the pixel structure comprises a photodiode arranged in a substrate, a groove is arranged in the photodiode, an insulating film layer is arranged on the inner wall of the groove, a metal material layer is arranged in the groove on the inner side of the insulating film layer, and the metal material layer is arranged in the groove on the inner side of the insulating film layer. The metal material layer, the insulating film layer and the photodiode form a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer. By forming the charging capacitor structure, the pixel structure can fully charge the photodiode with electrons under the condition of no illumination so as to carry out CTE test, and the CTE test does not need to be carried out in a special test stage by using complex and expensive photoelectric test equipment, so that the CTE test can be carried out in a WAT test stage and a CP test stage; therefore, the test complexity is reduced, the test efficiency is improved, and convenience can be provided for the characteristic test of other transistors except the photodiode of the pixel structure.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor integration technology, and in particular to a pixel structure and a working method, and an image sensor. Background Art

[0002] A solid-state image sensor is a semiconductor device that converts optical images into electronic signals. It is divided into two types: image sensors based on charge coupled devices (CCD) and CMOS image sensors (CIS). The working processes of CCD and CIS are roughly the same. They both convert light signals into photogenerated charges through photosensitive devices, collect and process the photogenerated charges into voltage or current signals, and finally output the photoelectric signals in the form of digital signals. Among them, the pixel structure of CMOS image sensors is composed of photodiodes and MOS tubes.

[0003] CMOS image sensors can be divided into three types according to the different pixel structures: passive pixel structure CMOS image sensor (Passive Pixel Sensor, PPS), active pixel structure CMOS image sensor (Active Pixel Sensor, APS), digital pixel structure CMOS image sensor (Digital Pixel Sensor, DPS). The active 4T pixel structure using correlated double sampling operation has extremely low noise, so it has become the commonly used pixel structure in current CMOS image sensors. Figure 1As shown, the active 4T pixel structure consists of a photodiode and four N-type transistors (transfer transistor TG, selection transistor Select, reset transistor Reset and source follower SF). The charge storage area PD of the photodiode is the area for generating photoelectric sensing and storing photogenerated electrons. It is surrounded by P-type doping (i.e., P-well PW) and has no external electrodes, and its potential is in a floating state. The structural characteristics of the charge storage area PD determine the key parameter indicators such as full well capacity FWC and quantum efficiency in the CIS evaluation system. In the charge transfer efficiency (CTE) test, the charge storage area PD of the photodiode needs to be exposed first. After the charge storage area PD of the photodiode is full of electrons, the transfer transistor TG is turned on to transfer the electrons in the charge storage area PD of the photodiode to the floating diffusion point FD for reading, and finally the ratio of the electrons entering the floating diffusion point FD to the electrons collected by the charge storage area PD of the photodiode is calculated. In the CTE test, a light source control device is required to provide light energy to the charge storage area PD of the photodiode, and the CTE test can only be performed in the CP phase, which increases the test complexity and test time. Summary of the invention

[0004] The object of the present invention is to provide a pixel structure and working method, and an image sensor, which can reduce test complexity and improve test efficiency.

[0005] In order to solve the above technical problems, the present invention provides a pixel structure, including a photodiode arranged in a substrate, a groove arranged in the photodiode, an insulating film layer arranged on the inner wall of the groove, a metal material layer arranged in the groove inside the insulating film layer, the metal material layer, the insulating film layer and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer.

[0006] Optionally, a well region and a floating diffusion point are provided in the substrate, and the floating diffusion point and the photodiode are arranged at intervals, wherein the doping type of the well region is p-type, and the doping type of the photodiode and the photodiode are both n-type; A gate structure is provided on the substrate between the floating diffusion point and the photodiode; A reset transistor, a selection transistor and a source follower are arranged on the substrate. The floating diffusion point serves as the source of the reset transistor. The floating diffusion point is connected to the gate of the source follower through a metal wire. The source of the source follower is connected to the drain of the selection transistor. The drain of the source follower and the drain of the reset transistor are both connected to a first power supply.

[0007] Furthermore, the photodiode includes a clamping layer and a charge storage area, the charge storage area contact is arranged below the clamping layer, the charge storage area, the insulating film layer and the metal material layer constitute the charging capacitor, and the gate structure, the floating diffusion point and the charge storage area together constitute the transfer transistor.

[0008] Furthermore, the bottom of the groove is located in the charge storage area.

[0009] Furthermore, the thickness of the insulating film layer is greater than the thickness of the gate oxide layer of the transfer transistor.

[0010] Optionally, the insulating film layer is an oxide layer, and the metal material layer includes a metal film layer, a metal compound layer and a metal filling layer in sequence from the outside to the inside; Wherein, the material of the metal film layer is metal titanium, the material of the metal compound layer is titanium nitride, and the material of the metal filling layer is metal tungsten.

[0011] In another aspect, the present invention provides a method for operating a pixel structure, using the pixel structure, comprising the following steps: A frame period of the pixel structure operation is divided into a reset phase, a charge generation phase and a charge transfer phase; Execute the reset phase; Performing a charge generation phase and charging the photodiode by controlling the voltage of the metal material layer; The charge transfer phase is performed.

[0012] Optionally, the charge generation stage is performed as follows: The metal material layer is connected to a positive voltage, the selection transistor and the transmission transistor are both turned off, and the reset transistor is turned on. At this time, electrons accumulate on the plates of the charging capacitor and quickly reach saturation; The metal material layer is grounded, the selection transistor and the transfer transistor are both turned off, and the reset transistor is turned on. At this time, the charge on the capacitor plate of the charging capacitor on the insulating film layer close to the charge storage area is released and retained in the charge storage area.

[0013] Optionally, the charge generation stage is performed as follows: The metal material layer is connected to a negative voltage, the selection transistor and the transfer transistor are both turned off, and the reset transistor is turned on. At this time, electrons are transferred from the metal material layer and accumulated in the charge storage area.

[0014] On the other hand, the present invention also provides an image sensor, including the pixel structure described above, wherein the pixel structure includes a photodiode arranged in a substrate, a groove is arranged in the photodiode, an insulating film layer is arranged on the inner wall of the groove, a metal material layer is arranged in the groove inside the insulating film layer, the metal material layer, the insulating film layer and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer.

[0015] Compared with the prior art, the present invention has the following unexpected technical effects: The present invention provides a pixel structure and working method, and an image sensor, wherein the pixel structure includes a photodiode arranged in a substrate, a groove is arranged in the photodiode, an insulating film layer is arranged on the inner wall of the groove, a metal material layer is arranged in the groove inside the insulating film layer, and the metal material layer, the insulating film layer and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer. The present invention forms a charging capacitor structure so that the pixel structure can fill the photodiode with electrons under no light conditions to perform a CTE test, and the CTE test does not need to use complex and expensive photoelectric testing equipment in a special test phase, so that it can be performed in the WAT test phase and the CP test phase, thereby reducing the test complexity and improving the test efficiency, and can also provide convenience for the characteristic test of other transistors of the pixel structure other than the photodiode. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of the structure of an active 4T pixel structure.

[0017] Figure 2 A timing diagram of an active 4T pixel structure.

[0018] Figure 3 A schematic structural diagram of a pixel structure provided in one embodiment of the present invention.

[0019] Figure 4 A timing diagram of a pixel structure provided in accordance with an embodiment of the present invention.

[0020] Description of reference numerals: Figure 3 middle: 100 - substrate; 101 - well region; 102 - shallow trench isolation structure; 103 - charge storage region; 104 - clamping layer; 105 - floating diffusion point; 110 - insulating film layer; 120 - metal material layer; 201 - gate oxide layer; 202 - polysilicon gate; 203 - side wall. DETAILED DESCRIPTION

[0021] A pixel structure and working method and an image sensor of the present invention will be further described in detail below. The present invention will be described in more detail below with reference to the accompanying drawings, in which preferred embodiments of the present invention are shown. It should be understood that those skilled in the art can modify the present invention described herein and still achieve the beneficial effects of the present invention. Therefore, the following description should be understood as being widely known to those skilled in the art and not as a limitation of the present invention.

[0022] For the sake of clarity, not all features of the actual embodiments are described. In the following description, well-known functions and structures are not described in detail because they would clutter the invention with unnecessary detail. It should be recognized that in the development of any actual embodiment, a large number of implementation details must be made to achieve the developer's specific goals, such as changing from one embodiment to another according to the limitations of the relevant system or the relevant business. In addition, it should be recognized that such development work may be complex and time-consuming, but it is just a routine task for those skilled in the art.

[0023] In order to make the purpose and features of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are further described below in conjunction with the accompanying drawings. It should be noted that the accompanying drawings are all in a very simplified form and use inaccurate ratios, which are only used to conveniently and clearly assist in explaining the purpose of the embodiments of the present invention.

[0024] CMOS image sensors can be divided into front-side illumination (FSI) pixel structure and back-side illumination (BSI) pixel structure according to the light-sensing method of the pixel structure. Figure 1-Figure 2 As shown, the timing of the conventional BSI pixel structure is divided into a reset phase, an exposure phase, and a charge transfer phase. In the reset phase, the selection transistor Select is turned off, the reset transistor Reset and the transfer transistor TG are turned on, and the power supply Vdd pulls up the potentials of the floating diffusion point FD and the charge storage area PD of the photodiode, and the charge storage area PD of the photodiode and the P well PW are in a reverse biased fully depleted state. In the exposure phase, the selection transistor Select and the transfer transistor TG are turned off, and the reset transistor Reset is turned on. At this time, the charge storage area PD of the photodiode increases the illumination. Under illumination, electron-hole pairs will be generated in the depletion region of the charge storage area PD of the photodiode and the P well PW, where the electrons will move to the center of the charge storage area PD of the photodiode under the action of the electric field. As the electrons accumulate, the potential of the charge storage area PD of the photodiode will gradually decrease, and eventually reach a full well state.

[0025] In the first region of the charge transfer stage (i.e. after the reset transistor Reset is turned off and before the transfer transistor TG is turned on), the source follower SF is in a saturated state, and the output voltage at this time is Vout1. In the second region of the charge transfer stage, the selection transistor Select and the transfer transistor TG are both turned on, the reset transistor Reset is turned off, and a low-resistance conductive channel appears between the floating diffusion point FD and the charge storage area PD of the photodiode. The charge storage area PD of the photodiode is full of electrons and is at a low potential, and the floating diffusion point FD is at a high potential. Under the action of the electric field force, all the electrons in the charge storage area PD of the photodiode will be transferred to the floating diffusion point FD, and the potential of the floating diffusion point FD will be lowered. As the potential of the floating diffusion point FD decreases, the gate potential of the source follower SF will also decrease synchronously, thereby changing the conduction state of the source follower SF. The output voltage at this time is Vout2.

[0026] The above BSI pixel structure requires a light source control device to provide light energy to the charge storage area PD of the photodiode during the CTE test, and the CTE test can only be performed in the CP phase, which increases the test complexity and test time.

[0027] In order to solve the above problems, Figure 3 As shown, this embodiment provides an image sensor, which includes a pixel structure. The pixel structure includes a photodiode arranged in a substrate 100, a groove is arranged in the photodiode, an insulating film layer 110 is arranged on the inner wall of the groove, a metal material layer 120 is arranged in the groove inside the insulating film layer 110, and the metal material layer 120, the insulating film layer 110 and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer 120.

[0028] This embodiment forms a charging capacitor structure so that the pixel structure can fill the photodiode with electrons under no-light conditions to perform a CTE test, and the CTE test does not need to be performed in a special test phase (i.e., the CP test phase) using complex and expensive photoelectric testing equipment, so that it can be performed in the WAT test phase as well as the CP test phase, thereby reducing the test complexity, improving the test efficiency, and facilitating the characteristic testing of other transistors of the pixel structure other than the photodiode.

[0029] In this embodiment, the pixel structure may be an active pixel structure such as a 4T active pixel structure, a 6T active pixel structure, etc.

[0030] The following is a detailed description of the pixel structure as a 4T active pixel structure.

[0031] The pixel structure includes a substrate 100, which is a p-type silicon substrate 100. The substrate 100 includes a pixel unit region, and a shallow trench isolation structure 102 is arranged around the pixel unit region. A well region 101 is formed in the substrate 100, and the doping type of the well region 101 is p-type. The well region 101 extends from a side surface (e.g., the front side) of the substrate 100 into the substrate 100, and the shallow trench isolation structure 102 is located in the well region 101. The ion doping concentration of the well region 101 is greater than the ion doping concentration of the substrate 100.

[0032] A photodiode is disposed in the substrate 100 . The photodiode extends from the front surface of the substrate 100 into the substrate 100 , and the depth of the photodiode is greater than the depth of the well region 101 .

[0033] The photodiode includes a clamping layer 104 and a charge storage region 103, wherein the charge storage region 103 is disposed in contact with and below the clamping layer 104, and the front side of the substrate 100 exposes the clamping layer 104. The doping type of the clamping layer 104 is p-type, and the ion doping concentration of the clamping layer 104 is greater than the ion doping concentration of the well region 101, and the doping type of the charge storage region 103 is n-type.

[0034] The substrate 100 is also provided with a floating diffusion point 105, the floating diffusion point 105 and the photodiode are arranged in the well region 101 at intervals, the floating diffusion point 105 extends from the surface of the substrate 100 into the substrate 100, and the depth of the well region 101 is greater than the depth of the floating diffusion point 105. The doping type of the floating diffusion point 105 is n-type.

[0035] A gate structure is disposed on the substrate 100 between the floating diffusion point 105 and the photodiode, and the gate structure covers a portion of the floating diffusion point 105 and the photodiode, and the gate structure, the floating diffusion point 105 and the charge storage area 103 together constitute a transfer transistor. The floating diffusion point 105 serves as a drain of the transfer transistor, and the charge storage area 103 serves as a source of the transfer transistor.

[0036] The gate structure includes a gate oxide layer 201, a polysilicon gate 202 and a sidewall 203. The gate oxide layer 201 is arranged on the front side of the substrate 100, the polysilicon gate 202 is located on the gate oxide layer 201, and the sidewall 203 is located on the outside of the polysilicon gate 202 and is arranged on the side walls of the gate oxide layer 201 and the polysilicon gate 202.

[0037] A reset transistor Reset, a selection transistor Select and a source follower SF are arranged on the substrate 100. The floating diffusion point 105 serves as the source of the reset transistor Reset. The floating diffusion point 105 is connected to the gate of the source follower SF through a metal wire. The source of the source follower SF is connected to the drain of the selection transistor Select. The drain of the source follower SF and the drain of the reset transistor Reset are both connected to the first power supply Vdd. The source of the selection transistor Select outputs the output voltage.

[0038] A groove is provided in the photodiode, and the groove is adjacent to the gate structure of the transfer transistor, and a gap can be provided between the projection of the gate structure of the transfer transistor on the front of the substrate 100 and the opening of the groove (i.e., there is a gap between the opening of the groove and the sidewall 203 of the gate structure close to the groove side), or adjacent and without spacing (i.e., the opening of the groove and the sidewall 203 of the gate structure close to the groove side are adjacent to each other). The opening size of the groove can be adjusted according to the size requirements of the actual preparation of the metal material layer.

[0039] The opening of the groove is located on the front side of the substrate 100, and the bottom of the groove is located in the charge storage area 103, that is, the depth of the groove is greater than the depth of the clamping layer 104, and less than the total depth of the clamping layer 104 and the charge storage area 103. In this embodiment, the depth of the groove is the same as the height of the shallow trench isolation structure 102, so that the charging capacitor first forms an insulating material in the photodiode by forming the shallow trench isolation structure 102, and then digs and fills the shallow trench isolation structure 102 in a plug-forming manner to form the insulating film layer 110 and the metal material layer 120 of the charging capacitor.

[0040] An insulating film layer 110 is provided on the inner wall of the groove. The insulating film layer 110 may be an oxide layer. The thickness of the insulating film layer 110 is greater than the thickness of the gate oxide layer 201 of the transfer transistor to avoid leakage between the metal material layer 120 of the charging capacitor and the charge storage area 103 of the photodiode.

[0041] A metal material layer 120 is disposed in the groove inside the insulating film layer 110. The metal material layer 120 includes a metal film layer, a metal compound layer and a metal filling layer from the outside to the inside. The material of the metal film layer is, for example, titanium metal, the material of the metal compound layer is, for example, titanium nitride, and the material of the metal filling layer is, for example, tungsten metal. The charge storage area 103, the insulating film layer 110 and the metal material layer 120 constitute the charging capacitor.

[0042] The metal material layer 120 is connected to a second power source Vp, and the second power source Vp may be +Vdd or -Vdd.

[0043] like Figure 4 As shown, the working method of the pixel structure of this embodiment is as follows: Step S1: dividing a frame period of the pixel structure into a reset phase, a charge generation phase and a charge transfer phase; Step S2: Execute reset phase A; Step S3: executing the charge generation phase B, and charging the photodiode by controlling the voltage of the metal material layer 120; Step S4: Execute the charge transfer phase C.

[0044] Step S2 specifically includes: in the reset phase A, the metal material layer 120 is grounded, the select transistor Select is turned off, and the reset transistor Reset and the transfer transistor are turned on. At this time, the first power supply Vdd pulls up the potential of the charge storage area 103 of the photodiode and the floating diffusion point 105, and the charge storage area 103 of the photodiode and the well area 101 are in a reverse biased fully depleted state to achieve the reset of the photodiode and the floating diffusion point 105.

[0045] Step S3 specifically includes: In one embodiment, in the charge generation stage B, the metal material layer 120 is connected to the voltage Vdd, the selection transistor Select and the transfer transistor are both turned off, and the reset transistor Reset is turned on. At this time, on the basis of the reverse biased fully depleted state between the charge storage area 103 of the photodiode and the well area 101, the voltage Vdd is additionally increased, so that the potential of the charge storage area 103 of the photodiode is further pulled up, which will significantly increase the reverse bias leakage between the charge storage area 103 of the photodiode and the well area 101, and even cause avalanche breakdown. At the same time, since a capacitor is formed between the metal material layer 120 and the charge storage area 103 of the photodiode, the electrons in the reverse bias leakage between the charge storage area 103 of the photodiode and the well area 101 accumulate on the plate of the charging capacitor and quickly reach saturation. After the metal material layer 120 switches from voltage Vdd to ground, the charge on the capacitor plate of the charging capacitor on the side of the insulating film layer 110 close to the charge storage area 103 is released into the charge storage area 103. At this time, the charge storage area 103 has a negative potential, and the charge storage area 103 and the well area 101 are still in a reverse bias state. At this time, the electrons will remain in the charge storage area 103.

[0046] In another embodiment, in the charge generation phase B, the metal material layer 120 is connected to the voltage -Vdd, the selection transistor Select and the transfer transistor are both turned off, and the reset transistor Reset is turned on. At this time, since a capacitor is formed between the metal material layer 120 and the charge storage area 103 of the photodiode, when the negative potential of the metal material layer 120 is large enough, FN tunneling occurs between the metal material layer 120 and the charge storage area 103 of the photodiode, and electrons are transferred from the metal material layer 120 and accumulated in the charge storage area 103.

[0047] In step S4, the charge transfer stage C includes a first stage I and a second stage II. The first stage I is when the metal material layer 120 is grounded, the reset transistor Reset is disconnected and before the transfer transistor is turned on; the second stage II is when the metal material layer 120 is grounded, the reset transistor Reset is disconnected, and the selection transistor Select and the transfer transistor are both turned on.

[0048] In the first phase I, the source follower SF is in a saturation state, and the output voltage is the output voltage Vout1.

[0049] In the second stage II, a low-resistance conductive channel appears between the charge storage area 103 of the photodiode and the floating diffusion point 105, the charge storage area 103 is filled with electrons, and the charge storage area 103 is at a low potential, and the floating diffusion point 105 is at a high potential. Under the action of the electric field force, all the electrons in the charge storage area 103 will be transferred to the floating diffusion point 105, and the potential of the floating diffusion point 105 will be lowered. As the potential of the floating diffusion point 105 decreases, the gate potential of the source follower SF will also decrease synchronously, thereby changing the conduction state of the source follower SF, and the output voltage outputs the voltage Vout2 at this time.

[0050] This embodiment provides a pixel structure in which, during a CTE test, the charge storage area 103 of the photodiode is filled with electrons by the charging capacitor and read out, and the electrons in the charge storage area 103 are transferred to the floating diffusion point 105 for reading, and finally the ratio of the number of electrons entering the floating diffusion point 105 to the number of electrons collected in the charge storage area 103 is calculated to evaluate the performance of the transfer transistor.

[0051] In summary, the present invention provides a pixel structure and working method, and an image sensor, wherein the pixel structure includes a photodiode disposed in a substrate, wherein a groove is disposed in the photodiode, an insulating film layer is disposed on the inner wall of the groove, and a metal material layer is disposed in the groove inside the insulating film layer, wherein the metal material layer, the insulating film layer, and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer. The present invention forms a charging capacitor structure so that the pixel structure can fill the photodiode with electrons under no light conditions to perform a CTE test, and the CTE test does not need to be performed in a special test phase using complex and expensive photoelectric test equipment, so that it can be performed in the WAT test phase and the CP test phase, thereby reducing the test complexity, improving the test efficiency, and facilitating the characteristic test of other transistors of the pixel structure other than the photodiode.

[0052] In addition, it should be noted that, unless otherwise specified or indicated, the terms "first" and "second" in the specification are only used to distinguish the various components, elements, steps, etc. in the specification, and are not used to indicate the logical relationship or sequential relationship between the various components, elements, steps, etc.

[0053] It is to be understood that, although the present invention has been disclosed as a preferred embodiment, the above embodiment is not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, the technical content disclosed above can be used to make many possible changes and modifications to the technical solution of the present invention, or modified into equivalent embodiments of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A pixel structure, characterized in that: It includes a photodiode arranged in a substrate, a groove is arranged in the photodiode, an insulating film layer is arranged on the inner wall of the groove, a metal material layer is arranged in the groove inside the insulating film layer, the metal material layer, the insulating film layer and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer.

2. The pixel structure according to claim 1, characterized in that: A well region and a floating diffusion point are arranged in the substrate, and the floating diffusion point and the photodiode are arranged at intervals, wherein the doping type of the well region is p-type, and the doping type of the photodiode and the photodiode are both n-type; A gate structure is provided on the substrate between the floating diffusion point and the photodiode; A reset transistor, a selection transistor and a source follower are arranged on the substrate. The floating diffusion point serves as the source of the reset transistor. The floating diffusion point is connected to the gate of the source follower through a metal wire. The source of the source follower is connected to the drain of the selection transistor. The drain of the source follower and the drain of the reset transistor are both connected to a first power supply.

3. The pixel structure according to claim 2, characterized in that: The photodiode includes a clamping layer and a charge storage area, wherein the charge storage area contact is arranged below the clamping layer, the charge storage area, the insulating film layer and the metal material layer constitute the charging capacitor, and the gate structure, the floating diffusion point and the charge storage area together constitute the transfer transistor.

4. The pixel structure according to claim 3, characterized in that: The bottom of the groove is located in the charge storage area.

5. The pixel structure according to claim 3, characterized in that: The thickness of the insulating film layer is greater than the thickness of the gate oxide layer of the transfer transistor.

6. The pixel structure according to claim 1, wherein: The insulating film layer is an oxide layer, and the metal material layer includes a metal film layer, a metal compound layer and a metal filling layer in order from the outside to the inside; Wherein, the material of the metal film layer is metal titanium, the material of the metal compound layer is titanium nitride, and the material of the metal filling layer is metal tungsten.

7. A method for operating a pixel structure, using the pixel structure as claimed in any one of claims 1 to 6, characterized in that: The following steps are involved: A frame period of the pixel structure operation is divided into a reset phase, a charge generation phase and a charge transfer phase; Execute the reset phase; Performing a charge generation phase and charging the photodiode by controlling the voltage of the metal material layer; The charge transfer phase is performed.

8. The operating method of the pixel structure according to claim 7, characterized in that: The charge generation phase is performed as follows: The metal material layer is connected to a positive voltage, the selection transistor and the transmission transistor are both turned off, and the reset transistor is turned on. At this time, electrons accumulate on the plates of the charging capacitor and quickly reach saturation; The metal material layer is grounded, the selection transistor and the transfer transistor are both turned off, and the reset transistor is turned on. At this time, the charge on the capacitor plate of the charging capacitor on the insulating film layer close to the charge storage area is released and retained in the charge storage area.

9. The operating method of the pixel structure according to claim 7, characterized in that: The charge generation phase is performed as follows: The metal material layer is connected to a negative voltage, the selection transistor and the transfer transistor are both turned off, and the reset transistor is turned on. At this time, electrons are transferred from the metal material layer and accumulated in the charge storage area.

10. An image sensor, characterized in that: It comprises a pixel structure as described in any one of claims 1 to 6, wherein the pixel structure comprises a photodiode arranged in a substrate, a groove is arranged in the photodiode, an insulating film layer is arranged on the inner wall of the groove, a metal material layer is arranged in the groove inside the insulating film layer, the metal material layer, the insulating film layer and the photodiode constitute a charging capacitor, and the photodiode can be charged by controlling the voltage of the metal material layer.

Citation Information

Patent Citations

  • Three-dimensional MOS transistor, solid-state imaging device, method of manufacturing the same and electronic apparatus

    CN102170529A

  • Image pickup element, drive method, and electronic apparatus

    CN107079116A

  • Solid-state imaging device and electronic device

    CN108475691A

  • Solid-state imaging device and electronic instrument

    CN112997478A

  • Low-noise large-full-well TDI-CMOS image sensor reading circuit

    CN117319824A