Film coating carrier for horizontal half battery silicon wafer
By designing a coating vehicle for horizontal half-cell silicon wafers, the existing equipment has solved the problems of low production capacity and uneven coating when producing half-cell silicon wafers, and achieved the effects of high productivity and coating uniformity.
Patent Information
- Application Number
- CN202411829452.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-12
- Publication Date
- 2025-03-14
AI Technical Summary
The existing coating equipment used for whole-piece battery silicon wafers has low production capacity and uneven coating when producing half-piece silicon wafers, making it difficult to meet the needs of new half-piece battery technology.
A horizontal half-piece battery silicon wafer coating vehicle was designed. By setting up a right side plate, a left side plate, a side plate connecting rod, an upper cover plate and a lower cover plate, a coating cavity is formed to provide a stable coating reaction space, and through the grid plate and rack structure, the uniform distribution of the reaction gas and the uniformity of the coating are ensured.
The production capacity of the equipment is increased (capacity greater than 15,000 pieces/hour), and the uniformity of the coating thickness is ensured through sealing structure and airflow homogenization technology, and the consumption of reaction gas is reduced.
Smart Images
Figure CN119615124A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of cell film coating, and in particular to a film coating carrier for a horizontal half-cell silicon wafer. Background Art
[0002] In the field of solar photovoltaic power generation, half-cell technology is an effective way to reduce module packaging losses and increase module power. Compared with traditional full-cell modules, half-cell modules have three advantages: Improve packaging efficiency. The packaging loss of half-cell is relatively low, generally 0.1% to 0.3%, while that of conventional components is generally >1%. Therefore, half-cell components can increase CTM by more than 1%. By taking advantage of the low current characteristics, the packaging efficiency of components is effectively improved, and the power transmission loss after the client installs the system is significantly reduced. Experimental data show that the annual power generation can be increased by about 2% to 3%; Reduce shading losses. The low current characteristics of half-cell modules can significantly reduce the risk of hot spot problems, increase the service life of modules, better avoid the harm of shadows to modules, and are more suitable for use on roofs; Reduce heat generation and temperature rise losses. Current flowing through the component weld will cause Joule heating. The current of the 1 / 2 diced component is 1 / 2 of that of the normal component, which reduces Joule heating. The absolute value of the component power temperature coefficient can be reduced to below 0.4% / C, which is 1℃-2℃ lower than conventional components. Experimental data shows that the power generation can be increased by about 1%.
[0003] As power station investors face increasing pressure to achieve grid parity, the demand for higher costs per kilowatt-hour is growing. Under the premise of efficient cost reduction, half-chip technology is undoubtedly the best solution that can effectively increase output power without adding too much extra cost. As a result, "half-chip" technology has been widely used.
[0004] However, the equipment currently on the market for battery silicon wafer coating (atomic layer deposition) is mainly used for the production of whole-piece battery silicon wafers. Some manufacturers have modified the existing whole-piece battery silicon wafer coating equipment to produce half-piece battery silicon wafers. However, due to the limitations of the existing equipment structure and technology, the production capacity of half-piece battery wafers after the modified equipment is low (the current conventional equipment capacity is about 10,000 pieces / hour) and there are problems such as uneven coating.
[0005] Therefore, we need to provide a new technical solution to meet the new technology of half-cut cell, which can effectively improve the equipment production capacity (capacity greater than 15,000 pieces / hour) and ensure uniform coating thickness. To this end, we proposed a horizontal coating carrier for half-cut cell silicon wafers. Summary of the invention
[0006] The purpose of the present invention is to provide a horizontal half-cell silicon wafer coating carrier to solve the problems raised in the above-mentioned background technology.
[0007] To achieve the above-mentioned purpose, the present invention provides the following technical solutions: a horizontal half-cell silicon wafer coating carrier, comprising a right side plate, the end face side wall of the right side plate is fixedly connected to a side plate connecting rod, the other end of the side plate connecting rod is fixedly connected to a left side plate, the bottom of the left side plate is fixedly connected to a lower cover plate, the other side top of the lower cover plate is fixedly connected to the bottom of the right side plate, the top of the right side plate is fixedly connected to an upper cover plate, the other end bottom of the upper cover plate is fixedly connected to the top of the left side plate, by arranging the right side plate, the left side plate, the side plate connecting rod, the upper cover plate and After the lower cover plate, the right side plate, the left side plate, the side plate connecting rod, the upper cover plate and the lower cover plate are assembled, a coating cavity is formed, which provides a coating reaction space for the silicon wafers to be coated and prevents the reaction gas from overflowing. The side plate connecting rod is connected to the left side plate and the right side plate, thereby improving the stability of the left side plate, the right side plate, the upper cover plate and the lower cover plate during operation. By arranging the upper cover plate and the lower cover plate, the interior of the reaction cavity can be sealed to prevent the reaction gas from escaping, and the reaction gas can flow through the gaps between the silicon wafers, thereby improving the uniformity of the coating and reducing the consumption of the reaction gas.
[0008] Preferably, a grid plate is fixedly connected to the side wall of the left plate, and the other end of the grid plate is fixedly connected to the side wall of the right plate. The grid plate is composed of a plurality of thin metal sheets spliced together, and there is a certain gap between every two adjacent thin metal sheets. By setting the grid plate, the grid plate is used to evenly flow the reaction gas in the cavity, so that the reaction gas is evenly distributed to ensure uniform coating thickness. Since the grid plate is assembled from a plurality of thin metal sheets, a certain gap is left between each thin metal sheet for airflow to pass through and evenly flow the airflow, thereby improving the uniformity of coating on the half-cell silicon wafer.
[0009] Preferably, a bottom rack is fixedly connected to the inner wall of the bottom side of the left panel, and the other end of the bottom rack is fixedly connected to the inner wall of the bottom side of the right panel. A middle rack is fixedly connected to the inner wall of the top side of the left panel, and the other end of the middle rack is fixedly connected to the inner wall of the top side of the right panel.
[0010] Preferably, the right side plate, the left side plate, the upper cover plate and the lower cover plate form a reaction chamber, and the interior of the reaction chamber is evenly provided with sixteen rows of half-cell silicon wafers, with certain gaps left between adjacent half-cell silicon wafers. By evenly laying the half-cell silicon wafers inside the reaction chamber, stability can be achieved during the coating process of the half-cell silicon wafers.
[0011] Preferably, the gap size a of the thin metal sheet and the gap b of the half-cell silicon wafer are between one and three times the gap b of the half-cell silicon wafer, that is, b is smaller than a, and a is smaller than b.
[0012] Preferably, the teeth of the intermediate rack have a certain angle c, and the angle c is within 5 0 -20 0 By setting the teeth of the middle rack to a certain angle c, since the silicon wafer and the rack will not be in surface contact but in line contact, the contact surface between the silicon wafer and the middle rack can be effectively reduced, avoiding spots of missed plating on the silicon wafer surface caused by obstruction of the contact surface.
[0013] Preferably, a certain gap d is left between the upper cover plate and the lower cover plate, and the gap d is between 5 mm and 10 mm. By setting the gap d between the upper cover plate and the lower cover plate, the gap d can make the process gas entering from the grid plate flow quickly from the front end to the rear end. The gap between the silicon wafers is small, the airflow resistance is large, and the airflow velocity is slow, ensuring that the silicon wafer at the rear end has a sufficient concentration of reaction gas, so that the coating thickness of the silicon wafer at the rear end is uniform.
[0014] Preferably, the middle rack also leaves an angle e along the insertion direction of the half-cell silicon wafer, and the angle e is 5 0 -20 0 By setting an angle e on the middle rack along the insertion direction of the half-cell silicon wafer, it is convenient to provide guidance for the insertion of the silicon wafer and improve the stability of the silicon wafer insertion automation.
[0015] The present invention provides a horizontal half-cell silicon wafer coating carrier. The horizontal half-cell silicon wafer coating carrier has the following beneficial effects: The horizontal half-cell silicon wafer coating carrier is provided with a right side plate, a left side plate, a side plate connecting rod, an upper cover plate and a lower cover plate. After the right side plate, the left side plate, the side plate connecting rod, the upper cover plate and the lower cover plate are assembled, a coating cavity is formed, which provides a coating reaction space for the silicon wafer to be coated and prevents the reaction gas from overflowing. The side plate connecting rod is connected with the left side plate and the right side plate, thereby improving the stability of the left side plate, the right side plate, the upper cover plate and the lower cover plate when working; The horizontal half-cell silicon wafer coating carrier can seal the reaction chamber by arranging an upper cover plate and a lower cover plate to prevent the escape of reaction gas, so that the reaction gas flows through the gaps between the silicon wafers, thereby improving the uniformity of the coating and reducing the consumption of reaction gas. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] Figure 1 It is an exploded view of the overall structure of the present invention; Figure 2 It is a schematic diagram of the structure of the grid plate in the present invention; Figure 3 It is a partial enlarged view of the gap b between silicon wafers with a gap size a between the grid plates in the present invention; Figure 4 for Figure 3A partial enlarged view of the tooth angle c of the internal middle rack; Figure 5 It is a partial enlarged view of the gap d between the upper cover plate and the lower cover plate in the present invention; Figure 6 for Figure 5 A partial enlarged view of the silicon wafer insertion angle e.
[0017] In the figure: 1, right side plate; 2, left side plate; 3, side plate connecting rod; 4, grid plate; 5, middle rack; 6, bottom rack; 7, upper cover plate; 8, lower cover plate. DETAILED DESCRIPTION
[0018] In order to have a clearer understanding of the technical features, purposes and effects of the present invention, specific embodiments of the present invention are now described with reference to the accompanying drawings.
[0019] A preferred embodiment of a horizontal half-cell silicon wafer coating carrier provided by the present invention is as follows: Figures 1 to 6 As shown: a horizontal half-cell silicon wafer coating carrier, including a right side plate 1, the end face side wall of the right side plate 1 is fixedly connected with a side plate connecting rod 3, the other end of the side plate connecting rod 3 is fixedly connected with a left side plate 2, the bottom of the left side plate 2 is fixedly connected with a lower cover plate 8, the other top of the lower cover plate 8 is fixedly connected to the bottom of the right side plate 1, the top of the right side plate 1 is fixedly connected with an upper cover plate 7, the other bottom of the upper cover plate 7 is fixedly connected to the top of the left side plate 2, by arranging the right side plate 1, the left side plate 2, the side plate connecting rod 3, the upper cover plate 7 and the lower cover plate 8, the right side plate 1, the left side plate 2 After the side plate connecting rod 3, the upper cover plate 7 and the lower cover plate 8 are assembled, a coating cavity is formed, which provides a coating reaction space for the silicon wafers that need to be coated and prevents the reaction gas from overflowing. The side plate connecting rod 3 is connected to the left plate 2 and the right plate 1, so as to improve the stability of the left plate 2, the right plate 1, the upper cover plate 7 and the lower cover plate 8 during operation. By setting the upper cover plate 7 and the lower cover plate 8, the interior of the reaction chamber can be sealed to prevent the escape of the reaction gas, so that the reaction gas can flow through the gaps between the silicon wafers, thereby improving the uniformity of the coating and reducing the consumption of the reaction gas.
[0020] Furthermore, a grid plate 4 is fixedly connected to the side wall of the left plate 2, and the other end of the grid plate 4 is fixedly connected to the side wall of the right plate 1. The grid plate 4 is composed of a plurality of thin metal sheets spliced together, and there is a certain gap between every two adjacent thin metal sheets. By setting the grid plate 4, the grid plate 4 is used to evenly flow the reaction gas in the cavity, so that the reaction gas is evenly distributed to ensure uniform coating thickness. Since the grid plate 4 is assembled from a plurality of thin metal sheets, a certain gap is left between each thin metal sheet for airflow to pass through and evenly flow the airflow, thereby improving the uniformity of coating on the half-cell silicon wafer.
[0021] Furthermore, a bottom rack 6 is fixedly connected to the inner wall of the bottom side of the left side panel 2, and the other end of the bottom rack 6 is fixedly connected to the inner wall of the bottom side of the right side panel 1; a middle rack 5 is fixedly connected to the inner wall of the top side of the left side panel 2, and the other end of the middle rack 5 is fixedly connected to the inner wall of the top side of the right side panel 1.
[0022] Furthermore, the right side plate 1, the left side plate 2, the upper cover plate 7 and the lower cover plate 8 form a reaction chamber, and the interior of the reaction chamber is evenly provided with sixteen rows of half-cell silicon wafers, with certain gaps left between adjacent half-cell silicon wafers. By evenly laying the half-cell silicon wafers in the interior of the reaction chamber, it is convenient to achieve stability during the coating process of the half-cell silicon wafers.
[0023] Furthermore, the gap size a of the thin metal sheet and the gap b of the half-cell silicon wafer are between one and three times the gap b of the half-cell silicon wafer, that is, b is less than a, and a is less than 3b.
[0024] Furthermore, the teeth of the intermediate rack 5 have a certain angle c, and the angle c is 5 0 -20 0 By setting the teeth of the middle rack to a certain angle c, since the silicon wafer and the rack will not be in surface contact but in line contact, the contact surface between the silicon wafer and the middle rack can be effectively reduced, avoiding spots of missed plating on the silicon wafer surface caused by obstruction of the contact surface.
[0025] Furthermore, a certain gap d is left between the upper cover plate 7 and the lower cover plate 8, and the gap d is between 5 mm and 10 mm. By setting the gap d between the upper cover plate 7 and the lower cover plate 8, the gap d can make the process gas entering from the grid plate flow quickly from the front end to the rear end. The gap between the silicon wafers is small, the airflow resistance is large, and the airflow velocity is slow, ensuring that the silicon wafer at the rear end has a sufficient concentration of reaction gas, so that the coating thickness of the silicon wafer at the rear end is uniform.
[0026] In addition, the middle rack 5 also has an angle e along the insertion direction of the half-cell silicon wafer. 0 -20 0 By setting an angle e on the middle rack 5 along the insertion direction of the half-cell silicon wafer, it is convenient to provide guidance for the insertion of the silicon wafer and improve the stability of the silicon wafer insertion automation.
[0027] Working principle: when it is necessary to coat half a cell silicon wafer, the operator evenly lays sixteen rows of half a cell silicon wafer inside the reaction chamber to coat half a cell silicon wafer. By setting the right side plate 1, the left side plate 2, the side plate connecting rod 3, the upper cover plate 7 and the lower cover plate 8, the right side plate 1, the left side plate 2, the side plate connecting rod 3, the upper cover plate 7 and the lower cover plate 8 are assembled to form a coating cavity, which provides a coating reaction space for the silicon wafer to be coated and prevents the reaction gas from overflowing. The side plate connecting rod 3 is connected to the left side plate 2 and the right side plate 1, thereby improving the stability of the left side plate 2, the right side plate 1, the upper cover plate 7 and the lower cover plate 8 during operation. By setting the upper cover plate 7 and the lower cover plate 8, the interior of the reaction chamber can be sealed to prevent the escape of the reaction gas, so that the reaction gas flows through the gaps between the silicon wafers, the uniformity of the coating is improved, and the consumption of the reaction gas is reduced. By setting the grid plate 4, the grid plate 4 is used to evenly flow the reaction gas in the cavity, so that the reaction gas is evenly distributed, and the thickness of the coating is uniform. Since the grid plate 4 is assembled from a plurality of thin metal sheets, a certain gap is left between each thin metal sheet for airflow to pass through and evenly flow the airflow, thereby improving the uniformity of coating on the half-cell silicon wafer. The teeth of the middle rack 5 have a certain angle c, and the angle c is 5 0 -20 0 By setting the teeth of the middle rack to a certain angle c, since the silicon wafer and the rack will not be in surface contact but in line contact, the contact surface between the silicon wafer and the middle rack can be effectively reduced to avoid spots of missed plating on the surface of the silicon wafer due to the obstruction of the contact surface. A certain gap d is left between the upper cover plate 7 and the lower cover plate 8, and the gap d is between 5mm and 10mm. By setting the gap d between the upper cover plate 7 and the lower cover plate 8, the gap d can make the process gas entering from the grid plate flow quickly from the front end to the rear end. The gap between the silicon wafers is small, the airflow resistance is large, and the airflow velocity is slow, ensuring that the silicon wafer at the rear end has a sufficient concentration of reaction gas, so that the coating thickness of the silicon wafer at the rear end is uniform. The middle rack 5 also leaves an angle e along the insertion direction of the half-cell silicon wafer, and the angle e is 5 0 -20 0 By setting an angle e on the middle rack 5 along the insertion direction of the half-cell silicon wafer, it is convenient to provide guidance for the insertion of the silicon wafer and improve the stability of the silicon wafer insertion automation.
[0028] The above description is only an illustrative specific implementation mode of the present invention and is not intended to limit the scope of the present invention. Any equivalent changes and modifications made by any technician in the field without departing from the concept and principle of the present invention should fall within the scope of protection of the present invention. It should also be noted that the various components of the present invention are not limited to the above-mentioned overall application. The various technical features described in the specification of the present invention can be selected one by one or multiple ones can be selected and used in combination according to actual needs. Therefore, the present invention should naturally cover other combinations and specific applications related to this case.
[0029] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device.
[0030] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.
Claims
1. A horizontal half-cell silicon wafer coating carrier, comprising a right side plate (1), characterized in that: The end face side wall of the right side panel (1) is fixedly connected to a side panel connecting rod (3), the other end of the side panel connecting rod (3) is fixedly connected to the left side panel (2), the bottom of the left side panel (2) is fixedly connected to a lower cover plate (8), the other side top of the lower cover plate (8) is fixedly connected to the bottom of the right side panel (1), the top of the right side panel (1) is fixedly connected to an upper cover plate (7), and the other end bottom of the upper cover plate (7) is fixedly connected to the top of the left side panel (2).
2. A horizontal half-cell silicon wafer coating carrier according to claim 1, characterized in that: A grid plate (4) is fixedly connected to the side wall of the left side plate (2), and the other end of the grid plate (4) is fixedly connected to the side wall of the right side plate (1). The grid plate (4) is formed by splicing a plurality of thin metal sheets, with a certain gap between every two adjacent thin metal sheets.
3. The horizontal half-cell silicon wafer coating carrier according to claim 1, characterized in that: A bottom rack (6) is fixedly connected to the inner wall of the bottom side of the left side plate (2), and the other end of the bottom rack (6) is fixedly connected to the inner wall of the bottom side of the right side plate (1). A middle rack (5) is fixedly connected to the inner wall of the top side of the left side plate (2), and the other end of the middle rack (5) is fixedly connected to the inner wall of the top side of the right side plate (1).
4. The horizontal half-cell silicon wafer coating carrier according to claim 1, characterized in that: The right side plate (1), the left side plate (2), the upper cover plate (7) and the lower cover plate (8) form a reaction chamber, and sixteen rows of half-cell silicon wafers are evenly arranged inside the reaction chamber, with a certain gap left between adjacent half-cell silicon wafers.
5. The horizontal half-cell silicon wafer coating carrier according to claim 2, characterized in that: The gap size a of the thin metal sheet and the gap b of the half-cell silicon wafer are between one and three times the gap b of the half-cell silicon wafer, that is, b is smaller than a, and a is smaller than 3b.
6. The horizontal half-cell silicon wafer coating carrier according to claim 3, characterized in that: The teeth of the intermediate rack (5) have a certain angle c, and the angle c is 5 0 -20 0 between.
7. The horizontal half-cell silicon wafer coating carrier according to claim 1, characterized in that: A certain gap d is left between the upper cover plate (7) and the lower cover plate (8), and the gap d is between 5 mm and 10 mm.
8. The horizontal half-cell silicon wafer coating carrier according to claim 3, characterized in that: The middle rack (5) also leaves an angle e along the insertion direction of the half-cell silicon wafer, and the angle e is 5 0 -20 0 between.