Data processing method and device integrating AES (Advanced Encryption Standard) encryption and decryption and scrambling functions and medium

Abstract

The invention provides a data processing method and device integrating AES (Advanced Encryption Standard) encryption and decryption and scrambling functions and a medium, and belongs to the technical field of data storage. The method comprises the steps of generating a round key of each round based on an input key according to a key expansion rule of an AES algorithm; using the key K as a seed to generate a scrambling code sequence, and performing scrambling operation on the round key of each round and the corresponding scrambling code sequence to obtain a scrambled round key; performing XOR operation on the plaintext data block and the scrambled initial round key to obtain an initial state; performing main round encryption and final round encryption to obtain a ciphertext; obtaining a scrambled round key and a scrambling code sequence according to an AES (Advanced Encryption Standard) algorithm and a scrambling code sequence generation method by using a key which is the same as the encryption process; performing XOR operation on the ciphertext and the scrambled round key to obtain an initial state; and performing main round decryption and final round decryption to obtain a plaintext. According to the method, the complexity of the key space is effectively increased, and the anti-attack capability of the data is improved.

Description

Technical Field

[0001] The present invention relates to a data processing method, device and medium integrating AES encryption and decryption and scrambling functions, and belongs to the technical field of data storage. Background Art

[0002] With the rapid development of information technology, data security and storage reliability have become core issues in the field of contemporary technology. Especially in the field of data storage, NAND flash memory, as a high-density, low-cost storage medium, has been widely used in various electronic devices such as smartphones, tablets, solid-state drives (SSDs), etc. However, the application of NAND flash memory technology is not without challenges.

[0003] On the one hand, NAND flash memory is very sensitive to consecutive "0" or "1" bits in the stored data. Due to the physical characteristics of the storage cell, long strings of identical bits may cause programming and reading errors, which seriously reduce the reliability and service life of the memory. To overcome this challenge, the industry needs to seek effective data scrambling technology to disrupt the bit distribution of the data and reduce the frequency of consecutive identical bits.

[0004] On the other hand, how to prevent sensitive information from being accessed or stolen without authorization during data transmission and storage is another urgent problem to be solved. Traditionally, encryption technology is widely used to protect the confidentiality of data. However, for application scenarios that require both encryption and scrambling processing, traditional methods often adopt a processing flow of encryption first and then scrambling. Although this method can meet the requirements of data security and storage reliability to a certain extent, its processing efficiency is low and requires two independent processing steps, which increases the time and complexity of data processing. In addition, this method also requires additional computing resources and storage space to support encryption and scrambling operations, thereby increasing system costs.

[0005] In view of the above technical challenges and problems, a method that can realize data encryption and scrambling functions in the same process is urgently needed. This method not only needs to improve data processing efficiency and reduce resource consumption, but also needs to ensure the reversibility and security of data to meet the data storage and transmission needs in different application scenarios. Summary of the invention

[0006] The present invention aims to provide a data processing method, device and medium integrating AES encryption and decryption and scrambling functions, aiming to overcome the deficiencies of the prior art and provide a more efficient, secure and reliable data processing solution.

[0007] In order to achieve the above object, the present invention is implemented through the following technical solutions: A data processing method integrating AES encryption and decryption and scrambling functions comprises the following steps: Based on the input key, according to the key expansion rule of the AES algorithm, the round key of each round is generated; using the key K as a seed, a scrambling sequence is generated, and the round key of each round is scrambled with the corresponding scrambling sequence to obtain the scrambled round key; Perform XOR operation on the plaintext data block and the scrambled initial round key to obtain the initial state; Perform main round encryption and final round encryption to obtain ciphertext; Use the same key as the encryption process, according to the AES algorithm and the scrambling sequence generation method, to obtain the scrambled round key and scrambling sequence; XOR the ciphertext with the scrambled round key to get the initial state; Perform main round decryption and final round decryption to obtain the plaintext.

[0008] Preferably, the main round encryption includes: byte substitution, row shift, column confusion, encryption bit-level scrambling and round key addition; The final round of encryption includes: byte substitution, row shift, encryption bit level scrambling and round key addition.

[0009] Preferably, the encryption bit-level scrambling is specifically performed in the following manner: an initial state is subjected to a bit-wise XOR operation with a scrambling sequence to implement a bit-level scrambling operation. Preferably, the main round decryption includes: decryption bit-level scrambling, round key addition, reverse column confusion, reverse row shift, and reverse byte substitution; The final round of decryption includes: decryption bit-level scrambling, round key addition, reverse shift and reverse byte substitution.

[0010] Preferably, the specific method of decrypting the bit-level scrambling is as follows: performing a bit-wise XOR operation on the initial state and the scrambling sequence to eliminate the influence of the scrambling.

[0011] Preferably, the scrambling code sequence generation method includes: a linear feedback shift register, a nonlinear feedback shift register and a pseudo-random number generator.

[0012] Preferably, the scrambling operation modes of the round key and the scrambling sequence include: XOR operation, bit permutation, bit flipping and byte-level scrambling, wherein the byte-level scrambling is to disturb the byte order or content in State.

[0013] Preferably, the improvement of the round key scrambling method includes scrambling the round key using modular addition operation or modular multiplication operation.

[0014] The advantages of the present invention are that by introducing a scrambling operation in the AES encryption process, the present invention effectively increases the complexity of the key space. This method of integrating encryption and scrambling makes it more difficult to crack data during transmission and storage, thereby greatly improving the data's ability to resist attacks. Even if an attacker attempts to obtain data through brute force or other means, he will face greater difficulties due to the expansion of the key space.

[0015] The present invention provides a variety of scrambling sequence generation methods and scrambling operation modes, such as using NLFSR to generate scrambling sequences, using cryptographically secure PRNG to generate scrambling sequences, performing bit permutation or bit flipping operations to perform scrambling, etc. These different methods and operation modes can be selected according to different security and performance requirements, so that the method of the present invention has high flexibility and scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are used to provide further understanding of the present invention and constitute a part of the specification. They are used to explain the present invention together with the embodiments of the present invention and do not constitute a limitation of the present invention.

[0017] Figure 1 This is a schematic diagram of the main structure of Example 1 of the present invention.

[0018] Figure 2 Generate schematic diagram for scrambling sequence. DETAILED DESCRIPTION

[0019] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0020] Example 1 like Figure 1-Figure 2 As shown, a data processing method integrating AES encryption and decryption and scrambling functions includes: an encryption and scrambling process, a decryption and descrambling process, and specifically includes the following steps: S1: Based on the input key, according to the key expansion rule of the AES algorithm, the round key of each round is generated; using the key K as a seed, a scrambling sequence is generated, and the round key of each round is scrambled with the corresponding scrambling sequence to obtain the scrambled round key; S2: XOR the plaintext data block with the scrambled initial round key to obtain the initial state; S3: Perform main round encryption and final round encryption to obtain ciphertext; S4: Using the same key as the encryption process, according to the AES algorithm and the scrambling sequence generation method, obtain the scrambled round key and scrambling sequence; S5: XOR the ciphertext with the scrambled round key to obtain the initial state; S6: Perform main round decryption and final round decryption to obtain plaintext.

[0021] As a refinement of the above embodiment, the main round encryption includes: byte substitution, row shift, column confusion, encryption bit level scrambling and round key addition; The final round of encryption includes performing byte substitution, row shifting, encryption bit-level scrambling, and round key addition.

[0022] As a refinement of the above embodiment, the encryption bit-level scrambling is specifically performed as follows: an initial state is subjected to a bit-wise XOR operation with a scrambling sequence to implement a bit-level scrambling operation.

[0023] As a refinement of the above embodiment, the main round decryption includes: decryption bit-level scrambling, round key addition, reverse column confusion, reverse row shifting, and reverse byte substitution; The final round of decryption includes performing decryption bit-level scrambling, round key addition, reverse shifting, and reverse byte substitution.

[0024] As a refinement of the above embodiment, the specific method of decrypting the bit-level scrambling code is as follows: the initial state is subjected to a bitwise XOR operation with the scrambling code sequence to eliminate the influence of the scrambling code.

[0025] As a refinement of the above embodiment, the scrambling code sequence generation method includes: a linear feedback shift register, a nonlinear feedback shift register and a pseudo-random number generator.

[0026] As a refinement of the above embodiment, the scrambling operation modes of the round key and the scrambling sequence include: XOR operation, bit replacement, bit flipping and byte-level scrambling, wherein the byte-level scrambling is to disturb the byte order or content in State.

[0027] As a refinement of the above embodiment, the improvement of the round key scrambling method includes using modular addition operation or modular multiplication operation to scramble the round key.

[0028] The technical solution of this embodiment has the following beneficial effects: Enhanced data security: By introducing scrambling sequences, the complexity of the key space is increased and the ability to resist attacks is improved.

[0029] Improve data reliability: The output data has a uniform distribution of 0 and 1 bits, which meets the storage medium's requirements for data bit distribution and reduces the probability of storage errors.

[0030] Flexibility and scalability: Provides a variety of scrambling sequence generation methods and scrambling operation modes to meet different security and performance requirements.

[0031] Strong compatibility: The method can be applied to different AES versions and other encryption algorithms and has a wide range of applications.

[0032] Example 2 A data processing method integrating AES encryption and decryption and scrambling functions, specifically comprising the following steps: 1. Encryption and scrambling process (1) Key expansion and scrambling sequence generation: Based on the input key K, the round key of each round is generated according to the key expansion rules of the AES algorithm. .

[0033] Use the key K as a seed to initialize a linear feedback shift register (LFSR) or other pseudo-random sequence generator to generate a scrambled sequence .

[0034] The round key of each round The corresponding scrambling sequence Perform XOR operation to obtain the scrambled round key : ; (2) Initial round key addition: The plaintext data block P is combined with the scrambled initial round key Perform an XOR operation to get the initial state State. The specific formula is as follows: in, Indicates the initial state after bit-level scrambling, represents the initial state, represents the scrambling sequence, Represents the exclusive-or operation.

[0035] (3) Main wheel encryption: For rounds 1 to Nr-1, do the following: Byte substitution: Use the AES standard S-box to perform nonlinear substitution on each byte in the State to enhance the obfuscation of the data.

[0036] Row shift: According to the AES standard, the second, third, and fourth rows of State are shifted left by 1, 2, and 3 bytes respectively to further break up the data.

[0037] Column confusion: Use a fixed polynomial matrix to linearly mix each column of State to enhance the diffusion of data.

[0038] Bit-level scrambling: State and scrambling sequence Perform bit-wise XOR operation to achieve bit-level scrambling operation.

[0039] Round key plus: add State and scrambled round key Perform XOR operation to combine the effects of encryption and scrambling; (4) Final round of encryption: Do the following (similar to the main round encryption, but omitting the column obfuscation step): Byte substitution, row shift, bit-level scrambling, round key addition, (5) Output ciphertext: Output the result of the final round of encryption as the encrypted and scrambled data. 2. Decryption and descrambling process (1) Key expansion and scrambling sequence generation: Use the same key K as the encryption process, according to the AES algorithm and scrambling sequence generation method to obtain the scrambled round key and scrambling sequence .

[0040] (2) Initial round key addition: Combine the ciphertext and the scrambled round key Perform XOR operation to obtain the initial state State; (3) Main wheel decryption: For rounds Nr-1 to 1, do the following: Bit-level scrambling: State and scrambling sequence Perform bitwise XOR operation to eliminate the influence of scrambling code; Round key plus: add State and scrambled round key Perform an XOR operation; Inverse column confusion: Use the inverse polynomial matrix to linearly mix each column of State to restore the data.

[0041] Reverse shift: Shift the second, third, and fourth rows of State right by 1, 2, and 3 bytes respectively.

[0042] Reverse byte substitution: Use the AES inverse S-box to replace each byte in the State and restore the original byte.

[0043] (4) Final round of decryption: Do the following (similar to the main round decryption, but omitting the reverse column obfuscation step): bit-level scrambling, round key addition, reverse shift, reverse byte substitution; (5) Output plaintext: The result of the final round of decryption is output as the decrypted and restored original data.

[0044] Need to explain: In order to expand the protection scope of the present invention, the following possible variations and improvements should also be covered by patent protection: Improvement of scrambling sequence generation method: Use NLFSR to generate scrambling sequence, increase the nonlinearity of the sequence, and improve security; A cryptographically secure PRNG, such as AES itself, is used as the PRNG to generate the scrambling sequence based on the key K.

[0045] Variations of scrambling operation: In addition to XOR operation, bit permutation, bit flipping and other operations can be used for scrambling; Scrambling is performed at the byte level, which perturbs the byte order or content in the State.

[0046] Improvement of round key scrambling method: Use modular addition operation (such as modulo 256 addition) to scramble the round key: W'[i]= (W[i]+ S[i]) mod 256; When using modular multiplication for scrambling, the reversibility of the multiplication must be ensured.

[0047] Applicable to different AES versions: The extended method is applicable to AES-192 and AES-256 to meet higher security requirements.

[0048] Combination of scrambling sequence and data: Dynamically generate scrambling sequence according to data content to increase randomness; The generation of the scrambling code sequence is associated with the position of the data bits, which increases the complexity of the scrambling code.

[0049] The embodiment of the present disclosure provides a data processing device integrating AES encryption and decryption and scrambling functions, including a processor and a memory. Optionally, the device may also include a communication interface and a bus. The processor, the communication interface, and the memory may communicate with each other through the bus. The communication interface may be used for information transmission. The processor may call the logic instructions in the memory to execute the data processing method integrating AES encryption and decryption and scrambling functions of the above embodiment.

[0050] In addition, the logic instructions in the above-mentioned memory can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product.

[0051] The memory, as a computer-readable storage medium, can be used to store software programs and computer executable programs, such as program instructions / modules corresponding to the method in the embodiment of the present disclosure. The processor 304 executes the functional application and data processing by running the program instructions / modules stored in the memory, that is, the data processing method integrating the AES encryption and decryption and scrambling functions in the above embodiment is implemented.

[0052] The memory may include a program storage area and a data storage area, wherein the program storage area may store an operating system and an application required for at least one function; the data storage area may store data created according to the use of the terminal device, etc. In addition, the memory may include a high-speed random access memory and may also include a non-volatile memory.

[0053] An embodiment of the present disclosure provides a computer-readable storage medium storing computer-executable instructions, wherein the computer-executable instructions are configured to execute the data processing method integrating the AES encryption / decryption and scrambling functions.

[0054] The computer-readable storage medium mentioned above may be a transient computer-readable storage medium or a non-transitory computer-readable storage medium.

[0055] The technical solution of the embodiment of the present disclosure can be embodied in the form of a software product, which is stored in a storage medium and includes one or more instructions for enabling a computer device (which may be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in the embodiment of the present disclosure. The aforementioned storage medium may be a non-transient storage medium, including: a USB flash drive, a mobile hard disk, a read-only memory (ROM, Read-Only Memory), a random access memory (RAM, Random Access Memory), a disk or an optical disk, and other media that can store program codes, or a transient storage medium.

[0056] Finally, it should be noted that the above is only a preferred embodiment of the present invention and is not intended to limit the present invention. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art can still modify the technical solutions described in the aforementioned embodiments or replace some of the technical features therein by equivalents. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A data processing method integrating AES encryption and decryption and scrambling functions, characterized in that: The following steps are involved: Based on the input key, the round key for each round is generated according to the key expansion rule of the AES algorithm; Use the key K as a seed to generate a scrambling sequence, perform a scrambling operation on the round key of each round and the corresponding scrambling sequence to obtain the scrambled round key; Perform XOR operation on the plaintext data block and the scrambled initial round key to obtain the initial state; Perform main round encryption and final round encryption to obtain ciphertext; Use the same key as the encryption process, according to the AES algorithm and the scrambling sequence generation method, to obtain the scrambled round key and scrambling sequence; XOR the ciphertext with the scrambled round key to get the initial state; Perform main round decryption and final round decryption to obtain the plaintext.

2. The data processing method integrating AES encryption and decryption and scrambling functions according to claim 1 is characterized in that: The main round encryption includes: byte substitution, row shift, column confusion, encryption bit-level scrambling and round key addition; The final round of encryption includes: byte substitution, row shift, encryption bit level scrambling and round key addition.

3. The data processing method integrating AES encryption and decryption and scrambling functions according to claim 2 is characterized in that: The specific method of encryption bit-level scrambling is as follows: the initial state is bit-wise XORed with the scrambling sequence to implement the bit-level scrambling operation.

4. The data processing method integrating AES encryption and decryption and scrambling functions according to claim 1, characterized in that: The main round decryption includes: decryption bit-level scrambling, round key addition, reverse column confusion, reverse row shifting and reverse byte substitution; The final round of decryption includes: decryption bit-level scrambling, round key addition, reverse shift and reverse byte substitution.

5. The data processing method integrating AES encryption and decryption and scrambling functions according to claim 4 is characterized in that: The specific method of decrypting the bit-level scrambling is as follows: performing a bit-wise XOR operation on the initial state and the scrambling sequence to eliminate the influence of the scrambling.

6. The data processing method integrating AES encryption and decryption and scrambling functions according to claim 1, characterized in that: The scrambling code sequence generation method includes: a linear feedback shift register, a nonlinear feedback shift register and a pseudo-random number generator.

7. The data processing method integrating AES encryption / decryption and scrambling functions according to claim 1, characterized in that: The scrambling operation modes of the round key and the scrambling sequence include: XOR operation, bit permutation, bit flipping and byte-level scrambling, wherein the byte-level scrambling is to disturb the byte order or content in the State.

8. The data processing method integrating AES encryption / decryption and scrambling functions according to claim 1, characterized in that: Improvements to the round key scrambling method include using modular addition or modular multiplication to scramble the round key.

9. A data processing device integrating AES encryption and decryption and scrambling functions, comprising a processor and a memory storing program instructions, characterized in that: The processor is configured to execute the data processing method integrating AES encryption, decryption and scrambling functions as described in any one of claims 1 to 4 when running the program instructions.

10. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the program is executed by a processor, a data processing method integrating AES encryption, decryption and scrambling functions as described in any one of claims 1 to 4 is implemented.

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