Low-cost driving circuit of high-driving-voltage magnetic latching relay

By designing a low-cost driving circuit using an H-bridge circuit composed of four transistors and several resistors, the problems of high-speed driving complexity and cost of high-speed magnetic holding relays in the prior art are solved, and efficient and low-cost driving effect is achieved.

CN119626837APending Publication Date: 2025-03-14CHENGDU HENGTONG OPTIC COMM CO LTD
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Patent Information

Application Number
CN202411563974.0
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2024-11-05
Publication Date
2025-03-14

AI Technical Summary

Technical Problem

In the prior art, the use of motor drive chips and double-knife double-throw relays as magnetic relays has problems of high complexity, high cost and low efficiency, and is especially unable to meet the needs of high-drive voltage relays.

Method used

A low-cost driving circuit with a high-drive voltage magnetic relay is designed, using an H-bridge circuit composed of four transistors and several resistors, and adapts to any model of high-drive voltage relay by adjusting the switching device.

Benefits of technology

The effective driving of high-drive voltage magnetic holding relay is realized, reducing cost and complexity, improving the efficiency of the whole machine, and adapting to different models of relays through simple control signals and flexible circuit design.

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Abstract

The invention relates to a low-cost driving circuit of a high-driving-voltage magnetic latching relay, which comprises a first triode Q1, a second triode Q2, a third triode Q3, a fourth triode Q4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a relay coil 100, and the four triodes Q1, Q2, Q3 and Q4 can control the positive and negative alternation of the voltages at the two ends of the coil of the magnetic latching relay. According to the low-cost driving circuit of the high-driving-voltage magnetic latching relay, used devices are simple, maintenance is convenient, cost is extremely low, and stability and reliability are achieved; the high-voltage magnetic latching relay circuit has the advantages of simple structure, few required control signals, simple control and high circuit flexibility, can be adapted to any type of high-driving voltage relay by adjusting a switching device, and can effectively and reliably drive the high-voltage magnetic latching relay circuit.
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Description

Technical Field

[0001] The present invention relates to the technical fields of power electronics communication engineering, photovoltaic power generation and electric vehicle charging piles, and in particular to a low-cost driving circuit for a high-driving voltage magnetic latching relay. Background Art

[0002] Driving a magnetic latching relay requires alternating positive and negative voltages to control the relay's closing and disconnection. However, the common single-switch control drive coil cannot achieve alternating positive and negative voltages. Currently, most motor drive chips and double-pole double-throw relays are used on the market as drivers for magnetic latching relays. The steps are as follows: 1. Double-pole double-throw relay as a driver Figure 3 As shown, it can be seen that this solution requires the use of a double-pole double-throw relay plus its driving circuit. The MOS tube is used to cut off the power supply of the driving coil after the state change of the magnetic latching relay is completed to reduce power consumption. This circuit can use a larger voltage to drive a high-power magnetic latching relay, but the coil of the double-pole double-throw relay is still in a power-consuming state after the drive is completed, which is not conducive to improving the efficiency of the whole machine. If control is required, additional switching devices are required. The entire control circuit is complex and costly.

[0003] 2. Use driver chip as driver Figure 4 As shown in the figure, it can be seen that it is simple to use a driver chip as a driving circuit. The voltage can be controlled to alternate between positive and negative through the two signals ENA and ENB, thereby controlling the switching state of the magnetic latching relay. After the relay state is switched, stopping the drive can cut off the voltage on the relay drive coil and reduce power consumption. However, the driving voltage of the driver chips currently on the market is relatively small. It cannot meet the needs of high driving voltage relays. Summary of the invention

[0004] To this end, the technical problem to be solved by the present invention is to overcome the problem that the prior art uses motor driver chips and double-pole double-throw relays as drivers of magnetic latching relays, both of which have certain defects and require technical improvements and upgrades.

[0005] In order to solve the above technical problems, the present invention provides a low-cost driving circuit of a high-driving voltage magnetic latching relay, comprising: a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a relay coil; the base of the first transistor Q3 is connected to a first driving signal, the base of the fourth transistor Q4 is connected to a second driving signal, the first transistor Q1 and the third transistor Q3 are connected in series between the positive and negative electrodes of a power supply, the second transistor Q2 and the fourth transistor Q4 are connected in series between the positive and negative electrodes of the power supply, and the branch of the first transistor Q1 and the third transistor Q3 connected in series and the branch of the second transistor Q2 and the fourth transistor Q4 connected in series In parallel, the connection point of the path between the relay coil and the first triode Q1 and the third triode Q3 is A1, the connection point of the path between the relay coil and the second triode Q2 and the fourth triode Q4 is A2, the first resistor R1 and the second resistor R2 are connected in series, and the two ends of the series branch of the first resistor R1 and the second resistor R2 are respectively connected to the positive electrode of the power supply and between the second triode Q2 and the fourth triode Q4, the third resistor R3 and the fourth resistor R4 are connected in series, and the two ends of the series branch of the third resistor R3 and the fourth resistor R4 are respectively connected to the positive electrode of the power supply and between the first triode Q1 and the third triode Q3, the two ends of the fifth resistor R5 are respectively connected to the base of the third triode Q3 and the negative electrode of the power supply, and the two ends of the sixth resistor R6 are respectively connected to the base of the fourth triode Q4 and the negative electrode of the power supply.

[0006] In one embodiment of the present invention, the positive electrode of the power supply is connected to the emitter of the first transistor Q1 and the emitter of the second transistor Q2.

[0007] In one embodiment of the present invention, the collector of the first transistor Q1 is connected to the collector of the third transistor Q3.

[0008] In one embodiment of the present invention, the collector of the second transistor Q2 is connected to the collector of the fourth transistor Q4.

[0009] In one embodiment of the present invention, the base of the first transistor Q1 is connected between the first resistor R1 and the second resistor R2.

[0010] In one embodiment of the present invention, the base of the second transistor Q2 is connected between the third resistor R3 and the fourth resistor R4.

[0011] In one embodiment of the present invention, the emitter of the third transistor Q3 and the emitter of the fourth transistor Q4 are both connected to the negative electrode of the power supply.

[0012] In one embodiment of the present invention, the first drive signal is connected to a first drive circuit, the first drive circuit is used to send an enable signal, and the first drive circuit includes a seventh resistor R7, a first optocoupler isolator U1, an eighth resistor R8, a ninth resistor R9, an eleventh resistor R11, a twelfth resistor R12 and a sixth transistor Q6.

[0013] In one embodiment of the present invention, the second drive signal is connected to a second drive circuit, the second drive circuit is used to send an enable signal, and the second drive circuit includes a fourteenth resistor R14, a second optocoupler isolator U2, a fifteenth resistor R15, a sixteenth resistor R16, an eighteenth resistor R18, a nineteenth resistor R19 and a fifth transistor Q5.

[0014] In one embodiment of the present invention, an interlocking circuit is provided between the first driving signal and the second driving signal, and the interlocking circuit includes a tenth resistor R10, a thirteenth resistor R13, an eighth transistor Q8, a seventeenth resistor R10, a twentieth resistor R13 and a seventh transistor Q7.

[0015] The above technical solution of the present invention has the following beneficial effects compared with the prior art: The low-cost driving circuit of the high-driving voltage magnetic latching relay described in the present invention uses simple devices, is easy to maintain, has extremely low cost and is stable and reliable; requires few control signals, is simple to control, has high circuit flexibility, can be adapted to any type of high-driving voltage relay by adjusting the switching devices, and can effectively and reliably drive the circuit of the high-voltage magnetic latching relay. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to make the content of the present invention more clearly understood, the present invention is further described in detail below according to specific embodiments of the present invention in conjunction with the accompanying drawings, wherein Figure 1 A circuit diagram of Embodiment 1 of a low-cost driving circuit for a high-driving-voltage magnetic latching relay in a preferred embodiment of the present invention; Figure 2 A circuit diagram of Embodiment 2 of a low-cost driving circuit for a high-driving-voltage magnetic latching relay in a preferred embodiment of the present invention; Figure 3 A circuit diagram of a double-pole double-throw relay as a driver in a preferred embodiment of the present invention; Figure 4 This is a circuit diagram of using a driver chip as a driver in a preferred embodiment of the present invention.

[0017] Explanation of the reference numerals in the specification: first transistor Q1, second transistor Q2, third transistor Q3, fourth transistor Q4, first resistor R1, second resistor R2, third resistor R3, fourth resistor R4, fifth resistor R5, sixth resistor R6, relay coil 100, first drive signal 200, second drive signal 300. DETAILED DESCRIPTION

[0018] The present invention is further described below in conjunction with the accompanying drawings and specific embodiments so that those skilled in the art can better understand the present invention and implement it, but the embodiments are not intended to limit the present invention. Example

[0019] Reference Figure 1 As shown, the low-cost driving circuit of the high-driving voltage magnetic latching relay of the present invention comprises: a first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a relay coil 100; the base of the first transistor Q3 is connected to a first driving signal 200, the base of the fourth transistor Q4 is connected to a second driving signal 300, the first transistor Q1 and the third transistor Q3 are connected in series between the positive and negative electrodes of a power supply, the second transistor Q2 and the fourth transistor Q4 are connected in series between the positive and negative electrodes of the power supply, the branch of the first transistor Q1 and the third transistor Q3 connected in series is connected in parallel with the branch of the second transistor Q2 and the fourth transistor Q4 connected in series, and the The connection point of the passage between the relay coil 100 and the first transistor Q1 and the third transistor Q3 is A1, the connection point of the passage between the relay coil 100 and the second transistor Q2 and the fourth transistor Q4 is A2, the first resistor R1 and the second resistor R2 are connected in series, and the two ends of the series branch of the first resistor R1 and the second resistor R2 are respectively connected to the positive electrode of the power supply and between the second transistor Q2 and the fourth transistor Q4, the third resistor R3 and the fourth resistor R4 are connected in series, and the two ends of the series branch of the third resistor R3 and the fourth resistor R4 are respectively connected to the positive electrode of the power supply and between the first transistor Q1 and the third transistor Q3, the two ends of the fifth resistor R5 are respectively connected to the base of the third transistor Q3 and the negative electrode of the power supply, and the two ends of the sixth resistor R6 are respectively connected to the base of the fourth transistor Q4 and the negative electrode of the power supply. A bidirectional breakdown diode D3 is connected between A1 and A2.

[0020] In the above circuit, the positive electrode of the power supply is connected to the emitter of the first transistor Q1 and the emitter of the second transistor Q2. The emitter of the third transistor Q3 and the emitter of the fourth transistor Q4 are both connected to the negative electrode of the power supply.

[0021] In the above circuit, the collector of the first transistor Q1 is connected to the collector of the third transistor Q3, and the collector of the second transistor Q2 is connected to the collector of the fourth transistor Q4.

[0022] In the above circuit, the base of the first transistor Q1 is connected between the first resistor R1 and the second resistor R2. The base of the second transistor Q2 is connected between the third resistor R3 and the fourth resistor R4.

[0023] In the above circuit, the resistance values ​​of the first resistor R1 and the third resistor R3 are both 2KΩ. The resistance values ​​of the second resistor R2 and the fourth resistor R4 are both 8.2KΩ. The resistance values ​​of the fifth resistor R5 and the sixth resistor R6 are both 10KΩ.

[0024] The low-cost driving circuit of the high-driving-voltage magnetic latching relay of the present invention: When the first drive signal 200 is enabled, the third transistor Q3 is turned on, and at the same time, the third resistor R3 and the fourth resistor R4 generate voltage division due to the conduction of the third transistor Q3, so that the base voltage of the second transistor Q2 is lower than the emitter voltage. The second transistor Q2 is turned on, and the current path formed at this time is: VOS+→second transistor Q2→A2→relay coil 100→A1→third transistor Q3→VOS-, and one drive of the relay is completed.

[0025] The principle is the same as above when the second driving signal 300 is enabled. At this time, the current path formed is: VOS+→first transistor Q1→A1→relay coil 100→A2→fourth transistor Q4→VOS-.

[0026] It can be seen that the voltage directions at both ends of the relay coil 100 are exchanged. After the relay completes the switching action, as long as the microcontroller stops driving EN1 and EN2, the relay coil can be powered off, and no other devices in the circuit will generate power consumption. The purpose of improving the efficiency of the whole machine is achieved.

[0027] The low-cost driving circuit of the high-driving-voltage magnetic latching relay only needs four transistors to control the alternation of the positive and negative voltages at both ends of the magnetic latching relay. Example

[0028] Reference Figure 2As shown, based on the first embodiment, the first drive signal is connected to the first drive circuit, the first drive circuit is used to send an enable signal, the first drive circuit includes a seventh resistor R7, a first optocoupler isolator U1, an eighth resistor R8, a ninth resistor R9, an eleventh resistor R11, a twelfth resistor R12 and a sixth transistor Q6, the first end of the seventh resistor R7 is connected to a 3.3V power supply, and the second end of the seventh resistor R7 is connected to pin 1 of the first optocoupler isolator U1, the first end of the eleventh resistor R11 is connected to EN, and The second end of the eleventh resistor R11 is connected to the base of the sixth transistor Q6, the two ends of the twelfth resistor R12 are respectively connected to the base of the sixth transistor Q6 and GND, the collector of the sixth transistor Q6 is connected to pin 2 of the first optocoupler isolator U1, the pin 4 of the first optocoupler isolator U1 is connected to the eighth resistor R8, the other end of the eighth resistor R8 is connected to the positive electrode, the pin 3 of the first optocoupler isolator U1 is connected to the first end of the ninth resistor R9, and the second end of the ninth resistor R9 is connected to the base of the third transistor Q3.

[0029] The second drive signal is connected to a second drive circuit, the second drive circuit is used to send an enable signal, the second drive circuit includes a fourteenth resistor R14, a second optocoupler isolator U2, a fifteenth resistor R15, a sixteenth resistor R16, an eighteenth resistor R18, a nineteenth resistor R19 and a fifth transistor Q5, the first end of the fourteenth resistor R14 is connected to a 3.3V power supply, and the second end of the fourteenth resistor R14 is connected to pin 1 of the first optocoupler isolator U2, the first end of the eighteenth resistor R18 is connected to EN, and the eighteenth resistor R19 is connected to the pin 1 of the first optocoupler isolator U2, and the first end of the eighteenth resistor R18 is connected to EN ... The second end of the resistor R18 is connected to the base of the fifth transistor Q5, the two ends of the nineteenth resistor R19 are respectively connected to GND and the base of the fifth transistor Q5, the collector of the fifth transistor Q5 is connected to the pin 2 of the second optocoupler isolator U2, the first end of the fifteenth resistor R15 is connected to the positive electrode, and the second end of the fifteenth resistor R15 is connected to the pin 4 of the second optocoupler isolator U2, the first end of the sixteenth resistor R16 is connected to the pin 3 of the second optocoupler isolator U2, and the second end of the sixteenth resistor R16 is connected to the base of the fourth transistor Q4.

[0030] An interlocking circuit is provided between the first driving signal and the second driving signal, the interlocking circuit comprising a tenth resistor R10, a thirteenth resistor R13, an eighth transistor Q8, a seventeenth resistor R17, a twentieth resistor R20 and a seventh transistor Q7, the ninth resistor R9 is connected in series with the tenth resistor R10 and then connected to the base of the third transistor Q3, the sixteenth resistor R16 is connected in series with the seventeenth resistor R17 and then connected to the base of the fourth transistor Q4, the first end of the thirteenth resistor R13 is connected to the branch electrode of the ninth resistor R9 and the tenth resistor R10 in series, The first end of the twentieth resistor R20 intersects with the branch connected in series with the sixteenth resistor R16 and the seventeenth resistor R17, and the second end of the twentieth resistor R20 is connected to the base of the eighth transistor Q8, the collector of the seventh transistor Q7 is connected to the base of the fourth transistor Q4, and the emitter of the seventh transistor Q7 and the emitter of the eighth transistor Q8 are both connected to the negative electrode, and the collector of the eighth transistor Q8 is connected to the base of the third transistor Q3. A first diode D1 is connected between the collector and emitter of the first transistor Q1, a second diode D2 is connected between the collector and emitter of the second transistor Q2, a third diode D3 is connected between the collector and emitter of the third transistor Q3, and a fourth diode D4 is connected between the collector and emitter of the fourth transistor Q4.

[0031] The H-bridge upper tube of this circuit uses a PNP transistor, which solves the problem of high-end driving difficulty of the NPN transistor. At the same time, two resistor dividers are used as the driver of the PNP transistor, which reduces the number of drive signals. The drive signal of the entire circuit only uses a high-level signal, without switching high and low levels, which simplifies the control logic of the driver. The circuit and MCU also achieve strong and weak electrical isolation to ensure safety.

[0032] The circuit also adds an interlock circuit to increase the stability of the circuit. When EN1 sends a high level, Q7 will be turned on, forcibly pulling down the base level of Q4, reducing the possibility of the upper and lower tubes of the H bridge being directly connected due to interference signals or the uncertainty of the drive level when the microcontroller pin is reset, thereby damaging the circuit. Similarly, when EN2 sends a high level, Q8 will be turned on, forcibly pulling down the base level of Q3, which plays a protective role. If the two drive signals send high levels at the same time, Q3 and Q4 will be pulled down at the same time to protect the circuit safety.

[0033] The circuit uses simple devices, is easy to maintain, low in cost, stable and reliable; requires few control signals and has a simple control program. The circuit is highly flexible and can be adapted to any type of high-drive voltage relays and other electrical appliances by adjusting the switch devices.

[0034] Obviously, the above embodiments are merely examples for clear explanation and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived from these are still within the protection scope of the invention.

Claims

1. A low-cost drive circuit for a high-drive-voltage magnetic latching relay, characterized in that: include: A first transistor Q1, a second transistor Q2, a third transistor Q3, a fourth transistor Q4, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a fifth resistor R5, a sixth resistor R6 and a relay coil; The base of the first transistor Q3 is connected to the first driving signal, the base of the fourth transistor Q4 is connected to the second driving signal, the first transistor Q1 and the third transistor Q3 are connected in series between the positive and negative electrodes of the power supply, the second transistor Q2 and the fourth transistor Q4 are connected in series between the positive and negative electrodes of the power supply, the branch of the first transistor Q1 and the third transistor Q3 in series is connected in parallel with the branch of the second transistor Q2 and the fourth transistor Q4 in series, the connection point of the passage between the relay coil and the first transistor Q1 and the third transistor Q3 is A1, the relay coil and the second transistor Q2 and the fourth transistor Q4 are connected in series. The path connection point between them is A2, the first resistor R1 and the second resistor R2 are connected in series, and the two ends of the series branch of the first resistor R1 and the second resistor R2 are respectively connected to the positive electrode of the power supply and between the second transistor Q2 and the fourth transistor Q4, the third resistor R3 and the fourth resistor R4 are connected in series, and the two ends of the series branch of the third resistor R3 and the fourth resistor R4 are respectively connected to the positive electrode of the power supply and between the first transistor Q1 and the third transistor Q3, the two ends of the fifth resistor R5 are respectively connected to the base of the third transistor Q3 and the negative electrode of the power supply, and the two ends of the sixth resistor R6 are respectively connected to the base of the fourth transistor Q4 and the negative electrode of the power supply.

2. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The positive electrode of the power supply is connected to the emitter of the first transistor Q1 and the emitter of the second transistor Q2.

3. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The collector of the first transistor Q1 is connected to the collector of the third transistor Q3.

4. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The collector of the second transistor Q2 is connected to the collector of the fourth transistor Q4.

5. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The base of the first transistor Q1 is connected between the first resistor R1 and the second resistor R2.

6. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The base of the second transistor Q2 is connected between the third resistor R3 and the fourth resistor R4.

7. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The emitter of the third transistor Q3 and the emitter of the fourth transistor Q4 are both connected to the negative electrode of the power supply.

8. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 1, characterized in that: The first drive signal is connected to a first drive circuit, the first drive circuit is used to send an enable signal, and the first drive circuit includes a seventh resistor R7, a first optocoupler isolator U1, an eighth resistor R8, a ninth resistor R9, an eleventh resistor R11, a twelfth resistor R12 and a sixth transistor Q6.

9. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 8, characterized in that: The second driving signal is connected to a second driving circuit, the second driving circuit is used to send an enable signal, and the second driving circuit includes a fourteenth resistor R14, a second optocoupler isolator U2, a fifteenth resistor R15, a sixteenth resistor R16, an eighteenth resistor R18, a nineteenth resistor R19 and a fifth transistor Q5.

10. The low-cost driving circuit of the high-driving-voltage magnetic latching relay according to claim 9, characterized in that: An interlocking circuit is provided between the first driving signal and the second driving signal, and the interlocking circuit includes a tenth resistor R10, a thirteenth resistor R13, an eighth transistor Q8, a seventeenth resistor R10, a twentieth resistor R13 and a seventh transistor Q7.