Cascade fault detection method and device based on deterministic network load distribution

Abstract

The invention relates to an electric cascade fault detection method and device based on deterministic network load distribution, and the method comprises the steps: determining a load distribution attack objective function of a power system under a deterministic network condition according to a predicted current value of a line before a load distribution attack and an actual load current of the line; determining a cascade fault expression according to the tripping number of all the sub-lines, the current value of each sub-line before tripping and the load change after local power failure; determining a candidate attack expression according to the current disturbance conditions of all the sub-lines and the target function; judging whether the load distribution attack of the power system under the current deterministic network condition meets a candidate attack expression or not; if yes, judging whether the load distribution attack meets a cascade fault expression or not; and if yes, determining that a cascade fault occurs and sending out an early warning. According to the method, cascade faults and attack behaviors which are potentially caused by uneven load distribution are quickly and accurately identified and responded by monitoring the load distribution condition and the current change in real time.

Description

Technical Field

[0001] The present specification relates to the field of power system fault detection technology, and in particular to a method and device for detecting electric cascade faults based on deterministic network load distribution. Background Art

[0002] The stability of power systems is essential to the functioning of modern society. As the size and complexity of power grids increase, the risk of cascading system failures also increases, which can quickly expand to large-scale power outages, causing significant impacts on socio-economic activities and public safety. Therefore, it is particularly important to develop efficient and reliable fault detection methods.

[0003] In power systems, deterministic networks refer to network architectures that ensure the timing and reliability of data communications, which is particularly important for real-time systems. Such networks are designed to ensure that data is transmitted accurately and within strict time constraints. Deterministic networks are implemented through strict time synchronization and data transmission mechanisms of the network to ensure that data exchange between all devices is synchronized, avoiding untimely or erroneous system responses due to data delays or loss.

[0004] However, existing technologies do not consider whether the power system is in a deterministic network state. In a non-deterministic network state, power system fault detection faces many challenges, such as data transmission delays, information loss and inaccuracy, time synchronization difficulties, reduced response speed, and increased safety hazards. These factors may lead to reduced fault detection efficiency and impaired accuracy, which in turn affects the stable operation and safety of the power system. Summary of the invention

[0005] In order to solve the problem that in the prior art, power system fault detection has data transmission delay and increased safety hazards in a non-deterministic network state, the embodiments of this specification provide an electric cascade fault detection method and device based on deterministic network load distribution.

[0006] The embodiments of the present specification provide an electric cascade fault detection method based on deterministic network load distribution, the method comprising: determining the objective function of the load distribution attack of the power system under deterministic network conditions according to the predicted current value of the line before the load distribution attack and the actual load current of the line; determining the cascade fault expression according to the number of tripping of all sub-lines, the current value of each sub-line before tripping and the load change after the local power outage; determining the candidate attack expression according to the current disturbance of all sub-lines and the objective function; judging whether the load distribution attack of the power system under the current deterministic network conditions satisfies the candidate attack expression; if so, judging whether the load distribution attack satisfies the cascade fault expression; if so, determining that a cascade fault occurs and issuing an early warning.

[0007] According to one aspect of an embodiment of this specification, determining the objective function of the load distribution attack of the power system under deterministic network conditions according to the predicted current value of the line before the load distribution attack and the actual load current of the line includes: determining the objective function by the following formula: Among them, F l represents the calculated value of the objective function of bus l, represents the predicted current value of line i before the line is attacked, D i Indicates the actual load current on line i, PT l,i represents the current transmission distribution coefficient matrix of bus 1, and N represents the number of sub-lines connected to bus 1.

[0008] According to one aspect of an embodiment of this specification, determining a cascading fault expression of a power system includes: determining a first fault calculation formula according to the number of sub-lines tripped and whether each sub-line tripped: Where w1 represents the number of sub-lines tripped on bus l, Indicates whether the ith sub-line in bus 1 is tripped; according to the current value of each sub-line before tripping, the second fault calculation formula is determined: Among them, w2 represents the absolute current of the bus at the moment of tripping, represents the current value of the ith sub-line in bus l before tripping; according to the number of islands and the calculated value of island load, the third fault calculation formula is determined: in, represents the total load size of island j formed on bus l, represents the load size generated in the island j formed on the bus l, w3 represents the calculated value of the island load, and m represents the number of islands; according to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula, the cascade fault expression is determined.

[0009] According to one aspect of an embodiment of this specification, according to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula, determining the cascade fault expression includes: Ω min ≤ξ*w1+ψ*w2+ζ*w3≤Ω max ; Among them, ξ, ψ, ζ represent different weight coefficients, Ω min ,Ω max are the lower and upper limits of the cascade fault calculation value. w1 represents the first fault calculation formula, w2 represents the second fault calculation formula, and w3 represents the third fault calculation formula.

[0010] According to one aspect of an embodiment of this specification, according to the current disturbance conditions of all sub-lines and the objective function, determining the candidate attack expression includes:

[0011] Candidate attack expressions are determined as follows:

[0012] in, represents the disturbance current value of sub-line i in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, represents the current value of the ith sub-line in bus l before tripping, T fix Represents the disturbance current comparison value, Γ min ,Γ max Indicates the lower and upper bound values ​​for candidate attack selection.

[0013] According to one aspect of the embodiments of this specification, the objective function has corresponding constraints: Among them, ΔQ i It represents the load change value on sub-line i in a short period of time, and α represents the constant coefficient.

[0014] According to one aspect of an embodiment of this specification, after the current load distribution attack satisfies the candidate attack expression, a first warning is issued.

[0015] The embodiments of the present specification also provide an electrical cascade fault detection device based on deterministic network load distribution, the device comprising: an objective function determination unit, used to determine the objective function of the load distribution attack of the power system under deterministic network conditions according to the predicted current value of the line before the load distribution attack and the actual load current of the line; a cascade fault expression determination unit, used to determine the cascade fault expression according to the number of tripping of all sub-lines, the current value of each sub-line before tripping and the load change after the local power outage; a candidate attack expression determination unit, used to determine the candidate attack expression according to the current disturbance of all sub-lines and the objective function; a first judgment unit, used to judge whether the load distribution attack of the power system under the current deterministic network conditions satisfies the candidate attack expression; a second judgment unit, used to judge whether the load distribution attack satisfies the cascade fault expression if so; and an early warning unit, used to determine the occurrence of a cascade fault and issue an early warning if so.

[0016] The embodiments of the present specification also provide a computer-readable storage medium, wherein the computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the electrical cascade fault detection method based on deterministic network load distribution is implemented.

[0017] This manual monitors load distribution and current changes in real time, quickly and accurately identifies and responds to potential faults and attack behaviors, and accurately identifies and predicts cascading faults caused by uneven load distribution. It takes into account the predictability of data transmission and the certainty of system input, reducing detection errors caused by randomness. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] In order to more clearly illustrate the embodiments of this specification or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this specification. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0019] Figure 1 It is a flow chart of an electric cascade fault detection method based on deterministic network load distribution according to an embodiment of this specification;

[0020] Figure 2 The figure is a flow chart of a method for determining a cascading fault expression of a power system according to an embodiment of the present specification;

[0021] Figure 3 It is a structural schematic diagram of an electrical cascade fault detection device based on deterministic network load distribution according to an embodiment of this specification;

[0022] Figure 4 It is a schematic diagram of the specific structure of the electrical cascade fault detection device based on deterministic network load distribution according to the embodiment of this specification;

[0023] Figure 5 Shown is a schematic diagram of a computer device provided in an embodiment of this specification.

[0024] Description of the accompanying symbols:

[0025] 301. Target function determination unit;

[0026] 302. Cascading fault expression determination unit;

[0027] 303. Candidate attack expression determination unit;

[0028] 3031, current disturbance statistics module;

[0029] 3032, calculation module;

[0030] 304, first judging unit;

[0031] 305, second judging unit;

[0032] 306. Early warning unit;

[0033] 502. Computer equipment;

[0034] 504, processor;

[0035] 506. Memory;

[0036] 508, driving mechanism;

[0037] 510, input / output module;

[0038] 512. Input devices;

[0039] 514. Output device;

[0040] 516. Presentation equipment;

[0041] 518. Graphical user interface;

[0042] 520, network interface;

[0043] 522, communication link;

[0044] 524. Communication bus. DETAILED DESCRIPTION

[0045] In order to enable those skilled in the art to better understand the technical solutions in this specification, the technical solutions in the embodiments of this specification will be clearly and completely described below in conjunction with the drawings in the embodiments of this specification. Obviously, the described embodiments are only part of the embodiments of this specification, not all of the embodiments. Based on the embodiments in this specification, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this specification.

[0046] It should be noted that the terms "first", "second", etc. in the description and claims of this specification and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchanged where appropriate, so that the embodiments of this specification described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any variations thereof are intended to cover non-exclusive inclusions, for example, a process, method, device, product or equipment that includes a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or equipment.

[0047] This specification provides method operation steps as described in the embodiments or flow charts, but more or fewer operation steps may be included based on routine or non-creative work. The order of steps listed in the embodiments is only one way of executing the order of many steps and does not represent the only execution order. When the system or device product is executed in practice, it can be executed in the order of the method shown in the embodiments or the drawings or in parallel.

[0048] It should be noted that the electrical cascade fault detection method and device based on deterministic network load distribution in this specification can be used in the field of power system fault detection technology, and can also be used in other fields. This specification does not limit the application field of the electrical cascade fault detection method and device based on deterministic network load distribution.

[0049] This scheme builds an attack model of load distribution in the power system under a deterministic network, as well as a model of cascading failures of the power system that may be caused by the attack, and constructs a discriminant to determine in real time whether the power system is subjected to a load distribution attack when operating in a deterministic network, and further determine whether it will cause cascading failures to the power system, thereby ensuring the information security of the power system.

[0050] Figure 1 The flowchart of the method for detecting cascade faults of an electric circuit based on deterministic network load distribution according to an embodiment of the present specification is shown, which specifically includes the following steps:

[0051] Step 101, determining the objective function of the load distribution attack of the power system under deterministic network conditions according to the predicted current value of the line before the load distribution attack and the actual load current of the line.

[0052] In the embodiments of this specification, under deterministic network conditions, data transmission in the power system is predictable. The input of the power system includes but is not limited to known and determined parameters such as power generation, load demand, and equipment performance. In other words, the input data of the power system does not involve randomness.

[0053] In this step, the load distribution attack refers to the scenario in which the sub-line may be attacked during the process of the bus in the power system distributing load to the sub-line. Among them, the sub-line is attacked including but not limited to: unstable power supply or power outage attack, etc. In the embodiment of this specification, the load distribution calculation of the power system is manipulated to cause the power supply of the bus or sub-line in the power system to be unstable or attacked by a power outage. The load distribution attack means that the power distribution data at a future moment is affected by changing the load forecast of the power system in the short term, thereby causing a cascading failure in the power system.

[0054] In the embodiment of this specification, the objective function is determined by the following formula:

[0055] Among them, Fl represents the calculated value of the objective function of bus l, represents the predicted current value of line i before the line is attacked, D i Indicates the actual load current on line i, PT l,i represents the current transmission distribution coefficient matrix of bus l, and N represents the number of sub-lines connected to bus l. From the formula structure of the objective function, it can be seen that the objective function represents the change of the load current of the line in the bus. If the power system is attacked during the load distribution process, the load current on the line will change. Furthermore, the greater the load current change, the greater the value of the objective function; the more lines that are attacked, the greater the value of the objective function.

[0056] In the embodiment of this specification, the objective function also has corresponding constraints, and the constraint formula is:

[0057] Among them, ΔQ i Represents the load change value on sub-line i in a short period of time, and α represents a constant coefficient. Among them, formula a) in the constraint formula represents the net load on bus l, and the constraint of formula a) belongs to the attack attribute of the load distribution attack. Among them, the net load refers to the difference between the actual electric energy consumed by the power system in a certain period of time and the electric energy provided by the power plant in the period of time. During the operation of the power system, the net load should remain unchanged to avoid frequency problems. In this specification, formula a) in the constraint formula is used to ensure that the power system will not have frequency problems due to the attack it has suffered, and the function of formula b) in the constraint formula is the intensity and scope of influence of the load distribution attack, which is used to limit the load deviation.

[0058] Step 102, determining a cascading fault expression according to the tripping number of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage.

[0059] In the embodiments of this specification, a cascading failure means that when a certain line (or a certain node) in the power system is attacked, the attacked line may affect other areas or other nodes in the power system, causing a larger range of failures. The attacks suffered by a certain line include but are not limited to: causing the line or node to trip, local power outages in the power system to form islands, etc. Therefore, it is necessary to count the tripping conditions of all sub-lines in the bus and the load changes after the local power outage in the power system in this step. Specifically, the number of trips of all sub-lines in the power system, the current value of each sub-line before tripping, and the load changes of the power system after the local power outage are obtained. Further based on the above factors, the cascading failure expression of the power system is determined.

[0060] In the embodiments of this specification, the cascading fault expression is related to the current changes and load changes of each sub-line in the power system. Therefore, the embodiments of this specification can monitor the load distribution of the bus in the power system and the current changes of each sub-line in real time through the cascading fault expression, and quickly and accurately identify and respond to potential faults and attacks.

[0061] In this step, the cascading failure expression of the power system is detailed in Figure 2 Description, this step is not described here. The embodiment of this specification quickly and accurately identifies and responds to potential faults and attack behaviors by real-time monitoring of load distribution and current changes.

[0062] Step 103, determine the candidate attack expression according to the current disturbance of all sub-lines and the objective function. In this step, the candidate attack expression is related to the current disturbance of each sub-line in the bus. If the sub-line is attacked more severely, the current disturbance value on the sub-line is larger; if the sub-line is attacked less severely, the current disturbance value on the sub-line is also smaller. The current disturbance on the sub-line can be used to characterize whether the sub-line is attacked by load distribution, and can also characterize the degree of load distribution attack on the sub-line.

[0063] Step 104, determine whether the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression. In this step, the candidate attack expression constructed in step 103 can be used to determine whether the load distribution attack of the power system under the current deterministic network condition becomes a candidate attack, thereby realizing attack detection. Therefore, this step determines whether the power system is subjected to a load distribution attack when operating under a deterministic network through the candidate attack expression.

[0064] Step 105: If yes, determine whether the load distribution attack satisfies the cascading failure expression.

[0065] In this step, if the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression, it means that the power system is subject to the load distribution candidate attack when operating under the deterministic network.

[0066] Therefore, it is necessary to further determine whether the load distribution candidate attack brings cascading failures to the power system in order to determine the type of candidate attack or the cause of the candidate attack.

[0067] By constructing an objective function for load distribution attacks under deterministic network conditions, we can accurately identify and predict cascading failures caused by uneven load distribution. We consider the predictability of data transmission and the determinism of system input to reduce detection errors caused by randomness.

[0068] Step 106: If yes, determine that a cascading failure has occurred and issue an early warning. In this specification, the failure impact of a cascading failure is large and the safety risk is high. Therefore, when it is determined that a cascading failure has occurred, it is necessary to issue an early warning to help power system managers take timely countermeasures, ensure the information security of the power system, reduce the risk of power outages caused by cascading failures, and improve the overall stability of the power system.

[0069] This manual can effectively prevent large-scale cascading failures in the power system and ensure the continuity and stability of the power system operation by timely detecting and handling load distribution anomalies.

[0070] Operations in a deterministic network environment enhance the predictability and reliability of data transmission and reduce security issues caused by data errors or delays.

[0071] Figure 2 The flowchart of a method for determining a cascading fault expression of a power system according to an embodiment of the present specification is shown, which specifically includes the following steps:

[0072] Step 201, according to the number of sub-lines tripped and whether each sub-line has tripped, determine the first fault calculation formula. The first fault calculation formula is expressed as follows:

[0073] Where w1 represents the number of sub-lines tripped on bus l, Indicates whether the ith sub-line in bus l is tripped. When tripped, The value is 1, otherwise the value is 0.

[0074] For example, bus 1 corresponds to 10 sub-lines, of which the 1st, 3rd and 4th sub-lines of the 10 sub-lines are tripped, and the remaining 7 sub-lines are normal. Then, through the first fault calculation formula, it can be calculated that the number of trips of bus 1 is 3.

[0075] Step 202, determine the second fault calculation formula according to the current value of each sub-line before tripping. The second fault calculation formula is expressed as follows:

[0076] Among them, w2 represents the absolute current of the bus at the moment of tripping, It represents the current value of the ith sub-line in bus l before tripping, which can be obtained through monitoring measurement. Indicates whether the ith sub-line in bus l is tripped, and N represents the total number of sub-lines. According to the above, when a trip occurs, The value is 1, otherwise the value is 0.

[0077] For example, bus 1 corresponds to 10 sub-lines, among which the 1st, 3rd and 4th sub-lines of the 10 sub-lines trip, and the current values ​​of the 10 sub-lines before tripping are collected. Then, through the second fault calculation formula, it can be calculated that the absolute current of bus 1 at the moment of tripping is the sum of the products of the current values ​​of the 7 normal sub-lines and their current values ​​before tripping.

[0078] Step 203, determine the third fault calculation formula according to the number of isolated islands and the calculated value of the isolated island load. The third fault calculation formula is expressed as follows:

[0079] Wherein, w3 represents the calculated value of the island load, and m represents the number of islands. represents the total load size of the island j formed on the bus l, which represents the load of the sub-line corresponding to the island assigned to the preset, It indicates the load size generated in the island j formed on the bus l. It indicates the load generated inside the island by other means after the island is formed. Such load is not obtained from the power grid but generated inside the island.

[0080] In this step, when a partial power outage occurs in the power system, multiple nodes or multiple sub-lines are prone to form islands. Generally, islands are more likely to cause large-scale cascading failures. Therefore, it is necessary to construct a third fault calculation formula to determine the load change of the formed island.

[0081] Step 204: Determine a cascading fault expression according to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula. Specifically, the cascading fault expression is as follows:

[0082] Ω min ≤ξ*w1+ψ*w2+ζ*w3≤Ω max ; Wherein, ξ, ψ, ζ represent weight coefficients corresponding to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula respectively, Ω min ,Ω max are the upper and lower limits of the preset cascade fault calculation value. w1 represents the first fault calculation formula, w2 represents the second fault calculation formula, and w3 represents the third fault calculation formula.

[0083] In the embodiment of this specification, according to the current disturbance conditions of all sub-lines and the objective function, determining the candidate attack expressions includes:

[0084] Candidate attack expressions are determined as follows:

[0085] in, represents the disturbance current value of sub-line a in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, represents the current value of the ith sub-line in bus l before tripping, T fix Indicates the disturbance current comparison value, which is a preset value. The disturbance current comparison value is related to the scale of the power system. Generally, the larger the scale of the power system, the larger the disturbance current comparison value. Γ min ,Γ max They respectively represent the upper and lower limits of candidate attack selection.

[0086] In the embodiment of this specification, the current load distribution attack in the power system is calculated. If the disturbance current value of line a is calculated according to formula (1) in the candidate attack expression, the disturbance current value is substituted into formula (2) in the candidate attack expression to determine whether the ratio of the disturbance current value to the disturbance current comparison value exceeds the upper limit value or the lower limit value selected by the candidate attack. If the ratio of the disturbance current value to the disturbance current comparison value exceeds the upper limit value or the lower limit value selected by the candidate attack, it means that the power system has already experienced abnormal working conditions of some sub-lines under the current load distribution attack, and the attack suffered by the line belongs to the candidate attack, and an early warning needs to be issued.

[0087] In some other embodiments of this specification, after the current load distribution attack satisfies the candidate attack expression, a first warning is issued to the management end of the power system. Further, it is determined whether a cascading failure occurs in the current load distribution attack according to the cascading failure expression. If the cascading failure expression is satisfied, it is determined that a cascading failure occurs, and a second warning is issued to the power system management end; otherwise, no cascading failure occurs. In the embodiments of this specification, the first warning can be understood as a warning with a lower risk level, and the urgency of the first warning is not as high as the second warning. Corresponding to the large impact range and high risk of cascading failures, the second warning is a warning with a higher risk level. Therefore, in this specification, when the load distribution attack satisfies the candidate attack expression, the first warning with a lower risk level can be controlled to be issued to the power system management end; when the current load distribution satisfies the cascading failure expression, the second warning with a higher risk level is controlled to be issued to the power system management end, so that the power system management end can take countermeasures according to the different warning types or warning levels.

[0088] The present invention monitors whether the power system is subject to load distribution attacks in real time and predicts potential cascading failures, thereby issuing early warnings. This helps power system managers take timely countermeasures, ensure the information security of the power system, reduce the risk of power outages caused by cascading failures, and improve the overall stability of the power system.

[0089] Figure 3 This is a schematic diagram of the structure of an electrical cascade fault detection device based on deterministic network load distribution according to an embodiment of this specification. In this figure, the basic structure of the electrical cascade fault detection device based on deterministic network load distribution is described. The functional units and modules therein can be implemented in software, or general chips or specific chips can be used to implement electrical cascade fault detection based on deterministic network load distribution. The device specifically includes:

[0090] The objective function determination unit 301 is used to determine the objective function of the load distribution attack of the power system under deterministic network conditions according to the predicted current value of the line before the load distribution attack and the actual load current of the line;

[0091] A cascading fault expression determination unit 302, used to determine a cascading fault expression according to the number of trips of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage;

[0092] A candidate attack expression determination unit 303 is used to determine a candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function;

[0093] A first judgment unit 304 is used to judge whether the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression;

[0094] The second judging unit 305 is used to judge whether the load distribution attack satisfies the cascading failure expression;

[0095] The early warning unit 306 is used to determine that a cascading failure has occurred and issue an early warning.

[0096] This manual can quickly and accurately identify and respond to potential faults and attacks by monitoring load distribution and current changes in real time. By constructing a load distribution attack under deterministic network conditions, cascading faults caused by uneven load distribution can be accurately identified and predicted. The predictability of data transmission and the determinism of system input are taken into account to reduce detection errors caused by randomness.

[0097] As an example of this specification, please refer to Figure 4 The figure shows a specific structural diagram of the electrical cascade fault detection device based on deterministic network load distribution in this embodiment.

[0098] As an embodiment of this invention, the candidate attack expression determination unit 303 further includes:

[0099] A current disturbance statistics module 3031 is used to determine the current disturbance conditions of all sub-lines;

[0100] The calculation module 3032 is used to calculate the disturbance current value and the disturbance current comparison value.

[0101] like Figure 5 The diagram shows a schematic diagram of a computer device provided by an embodiment of the present specification. The electrical cascade fault detection method based on deterministic network load distribution described in the present application can be applied to the computer device. The computer device 502 may include one or more processors 504, such as one or more central processing units (CPUs), each of which may implement one or more hardware threads. The computer device 502 may also include any memory 506, which is used to store any kind of information such as code, settings, data, etc. Non-limitingly, for example, the memory 506 may include any one or more combinations of the following: any type of RAM, any type of ROM, flash memory device, hard disk, optical disk, etc. More generally, any memory may use any technology to store information. Further, any memory may provide volatile or non-volatile retention of information. Further, any memory may represent a fixed or removable component of the computer device 502. In one case, when the processor 504 executes an associated instruction stored in any memory or combination of memories, the computer device 502 may perform any operation of the associated instruction. The computer device 502 also includes one or more drive mechanisms 508 for interacting with any storage, such as a hard disk drive mechanism, an optical disk drive mechanism, etc.

[0102] The computer device 502 may also include an input / output module 510 (I / O) for receiving various inputs (via input devices 512) and for providing various outputs (via output devices 514). A specific output mechanism may include a presentation device 516 and an associated graphical user interface (GUI) 518. In other embodiments, the input / output module 510 (I / O), the input device 512, and the output device 514 may not be included, and the computer device 502 may be used as a computer device in a network. The computer device 502 may also include one or more network interfaces 520 for exchanging data with other devices via one or more communication links 522. One or more communication buses 524 couple the components described above together.

[0103] The communication link 522 may be implemented in any manner, for example, through a local area network, a wide area network (e.g., the Internet), a point-to-point connection, etc., or any combination thereof. The communication link 522 may include any combination of hardwired links, wireless links, routers, gateway functions, name servers, etc., governed by any protocol or combination of protocols.

[0104] Corresponds to Figure 1 to Figure 2The method in the embodiment of the present specification also provides a computer-readable storage medium, on which a computer program is stored, and when the computer program is executed by a processor, the steps of the above method are executed.

[0105] The embodiment of the present specification also provides a computer-readable instruction, wherein when the processor executes the instruction, the program therein causes the processor to execute the following Figure 1 to Figure 2 The method shown.

[0106] It should be understood that in the various embodiments of this specification, the size of the serial numbers of the above-mentioned processes does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of this specification.

[0107] It should also be understood that in the embodiments of this specification, the term "and / or" is only a description of the association relationship of the associated objects, indicating that three relationships can exist. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this specification generally indicates that the associated objects before and after are in an "or" relationship.

[0108] Those of ordinary skill in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed in this specification can be implemented in electronic hardware, computer software, or a combination of the two. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description according to function. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of this specification.

[0109] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0110] In the several embodiments provided in this specification, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the mutual coupling or direct coupling or communication connection shown or discussed can be an indirect coupling or communication connection through some interfaces, devices or units, or it can be an electrical, mechanical or other form of connection.

[0111] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the embodiments of this specification.

[0112] In addition, each functional unit in each embodiment of this specification may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above integrated unit may be implemented in the form of hardware or in the form of software functional units.

[0113] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of this specification is essentially or the part that contributes to the prior art, or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of this specification. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk and other media that can store program codes.

[0114] Specific embodiments are used in this specification to illustrate the principles and implementation methods of this specification. The description of the above embodiments is only used to help understand the methods and core ideas of this specification. At the same time, for those skilled in the art, according to the ideas of this specification, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on this specification.

Claims

1. A method for detecting electrical cascade faults based on deterministic network load distribution, characterized in that: The method comprises: According to the predicted current value of the line before the load distribution attack and the actual load current of the line, the objective function of the load distribution attack of the power system under the deterministic network condition is determined; Determine the cascading fault expression based on the tripping number of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power outage; Determine a candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function; Determining whether the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression; If so, determining whether the load distribution attack satisfies a cascading failure expression; If so, a cascading failure is determined to have occurred and an early warning is issued.

2. The method according to claim 1, characterized in that According to the predicted current value of the line before the load distribution attack and the actual load current of the line, the objective function of the load distribution attack of the power system under deterministic network conditions is determined as follows: The objective function is determined by the following formula: Among them, F l represents the calculated value of the objective function of bus l, represents the predicted current value of line i before the line is attacked, D i Indicates the actual load current on line i, PT l,i represents the current transmission distribution coefficient matrix of bus 1, and N represents the number of sub-lines connected to bus 1.

3. The method according to claim 1, characterized in that Determining the cascading failure expression includes: According to the number of sub-lines tripping and whether each sub-line trips, the first fault calculation formula is determined: Where w1 represents the number of sub-lines tripped on bus l, Indicates whether the ith sub-line in bus l is tripped; N represents the total number of sub-lines; According to the current value of each sub-line before tripping, the second fault calculation formula is determined: Where, w2 represents the absolute current of the bus at the moment of tripping, f l i It represents the current value of the ith sub-line in bus l before tripping; According to the number of islands and the calculated value of island load, the third fault calculation formula is determined: in, represents the total load size of island j formed on bus l, represents the load size generated in the island j formed on bus l, w3 represents the calculated value of the island load, and m represents the number of islands; A cascading fault expression is determined according to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula.

4. The method according to claim 3, characterized in that According to the first fault calculation formula, the second fault calculation formula and the third fault calculation formula, determining the cascading fault expression includes: Ω min ≤ξ*w1+ψ*w2+ζ*w3≤Ω max ; Among them, ξ, ψ, ζ represent different weight coefficients, Ω min ,Ω max are the lower and upper limits of the cascade fault calculation value; w1 represents the first fault calculation formula, w2 represents the second fault calculation formula, and w3 represents the third fault calculation formula.

5. The method according to claim 3, characterized in that: According to the current disturbance conditions of all sub-lines and the objective function, candidate attack expressions are determined to include: Candidate attack expressions are determined as follows: Among them, PF l a represents the disturbance current value of sub-line i in bus l, which is used to characterize the impact of load distribution attack. l represents the objective function of bus I, β,κ represent different weight coefficients, ln represents the natural function, e represents the error calculation deviation constant term, and f l i represents the current value of the ith sub-line in bus l before tripping, T fix Represents the disturbance current comparison value, Γ min ,Γ max Indicates the lower and upper bound values ​​for candidate attack selection.

6. The method according to claim 3, characterized in that The objective function has corresponding constraints as follows: Among them, a and b represent two constraints, ΔQ i It represents the load change value on sub-line i in a short period of time, and α represents the constant coefficient.

7. The method according to claim 1, characterized in that After the current load distribution attack satisfies the candidate attack expression, a first warning is issued.

8. An electrical cascade fault detection device based on deterministic network load distribution, characterized in that: The device comprises: An objective function determination unit, used for determining an objective function of a load distribution attack of a power system under a deterministic network condition according to a predicted current value of the line before the load distribution attack and an actual load current of the line; A cascading fault expression determination unit, used to determine the cascading fault expression according to the tripping number of all sub-lines, the current value of each sub-line before tripping, and the load change after the local power failure; A candidate attack expression determination unit, used to determine a candidate attack expression according to the current disturbance conditions of all sub-lines and the objective function; A first judgment unit, used to judge whether the load distribution attack of the power system under the current deterministic network condition satisfies the candidate attack expression; A second judging unit, configured to judge whether the load distribution attack satisfies a cascading failure expression; The early warning unit is used to determine if a cascading failure occurs and issue an early warning.

9. A computer device comprising a memory, a processor and a computer program stored in the memory and executable on the processor, characterized in that: When the processor executes the computer program, the method according to any one of claims 1 to 7 is implemented.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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