Data processing method and device, electronic equipment and computer readable medium

Abstract

The invention discloses a data processing method and device, electronic equipment and a computer readable medium, and belongs to the technical field of integrated circuits, and the data processing method comprises the steps that a user code is acquired, and the user code comprises at least one target tag; identifying each target label in the user code; a logic code segment corresponding to each target label is determined based on a database, the database comprises a plurality of first labels and a reference code segment corresponding to each first label, and the reference code segment is an underlying primitive corresponding to a hardware unit in the programmable logic device of the target model; updating each target label in the user code into a corresponding logic code segment, and taking the updated user code as a target code; and generating a configuration bit stream file based on the target code, wherein the configuration bit stream file is matched with the target model of the programmable logic device. The same user code can be compatible with programmable logic devices of various models, the complexity of user design is reduced, and the working efficiency of a user is greatly improved.

Description

Technical Field

[0001] The present application relates to the field of integrated circuit technology, and more specifically, to a data processing method, device, electronic device and computer-readable medium. Background Art

[0002] With the continuous development of Field-Programmable Gate Array (FPGA) chips, the products of various FPGA manufacturers are increasingly widely used. The configuration of FPGA is also crucial. Users design logic code and input it into the Electronic Design Automation (EDA) software. After a series of operations in the EDA software, a configuration bitstream file is generated, which is used to configure the FPGA. Various underlying primitives are called in the logic code design. The underlying primitives of various manufacturers are not universal, and the underlying primitives of different series of devices from the same manufacturer are also different. Due to various factors such as supply and cost, the terminal product needs to be compatible not only with the products of various FPGA manufacturers in the design stage, but also with the products of different series of the same FPGA manufacturer, which brings difficulties to the compatible design of logic code. The existing method of solving the compatibility problem through macro definition has a high complexity in logic code design and needs to be improved. Summary of the invention

[0003] The present application proposes a data processing method, device, electronic device and computer-readable medium to improve the above-mentioned defects.

[0004] In a first aspect, the present application provides a data processing method for electronic design automation software, the method comprising: obtaining a user code, the user code comprising at least one target tag, the target tag being used to represent a configuration method of a corresponding hardware unit in a programmable logic device; identifying each of the target tags in the user code; determining a logic code segment corresponding to each of the target tags based on a database, the database comprising a plurality of first tags and a reference code segment corresponding to each of the first tags, the reference code segment being a bottom-level primitive corresponding to a hardware unit in a programmable logic device of a target model, the logic code segment comprising a reference code segment corresponding to a first tag in the database that matches the target tag; updating each of the target tags in the user code to a corresponding logic code segment, using the updated user code as the target code; generating a configuration bitstream file based on the target code, the configuration bitstream file matching the target model of the programmable logic device.

[0005] Optionally, for a possible implementation, determining the logical code segment corresponding to each of the target tags based on the database includes: taking the first tag in the database that is the same as each of the target tags as the first alternative tag; and taking the reference code segment corresponding to each of the first alternative tags as the logical code segment corresponding to the target tag.

[0006] Optionally, for a possible implementation, before determining the logical code segment corresponding to each of the target tags based on the database, it also includes: determining multiple first tags based on the primitives corresponding to the hardware units of the programmable logic device of the target model, the first tags being used to characterize the configuration method of the hardware units of the programmable logic device of the target model; determining that the hardware unit corresponding to the first tag is a first hardware unit; setting the underlying primitive corresponding to the first hardware unit based on the first tag to obtain a new underlying primitive as a reference code segment corresponding to the first tag; determining a database based on each of the first tags and the corresponding reference code segment, and storing the database in the storage module of the electronic design automation software.

[0007] Optionally, for a possible implementation, the database also includes multiple second tags and a preset code segment corresponding to each of the second tags, the first tag is different from the second tag, the logic code segment also includes a preset code segment corresponding to the second tag in the database that matches the target tag, and the determination of the logic code segment corresponding to each of the target tags based on the database includes: taking the second tag in the database that is the same as each of the target tags as the second alternative tag; taking the preset code segment corresponding to each of the second alternative tags as the logic code segment corresponding to the target tag, and the preset code segment is a general code corresponding to the hardware unit in the programmable logic device of the target model.

[0008] Optionally, for a possible implementation, before determining the logic code segment corresponding to each of the target tags based on the database, it also includes: determining multiple second tags based on the hardware unit of the programmable logic device of the target model, the second tag is used to characterize the configuration method of the hardware unit of the programmable logic device of the target model; determining that the hardware unit corresponding to the second tag is a second hardware unit; setting the universal code corresponding to the second hardware unit based on the second tag to obtain a new universal code as the preset code segment corresponding to the second tag; determining a database based on each of the second tags and the corresponding preset code segment, and storing the database in the storage module of the electronic design automation software.

[0009] Optionally, for a possible implementation, after generating the configuration bitstream file based on the target code, the method further includes: storing each logic code segment and the corresponding target tag in a storage module of the electronic design automation software.

[0010] Optionally, for a possible implementation, before obtaining the user code, it also includes: in the process of designing the user code according to requirements, using the first label in the database to represent the underlying language corresponding to the hardware unit of the programmable logic device.

[0011] In a second aspect, the present application also provides a data processing device, which is applied to electronic design automation software, wherein the electronic design automation software corresponds to the model of a programmable logic device, and the device includes: an acquisition unit, which is used to acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate the configuration mode of the corresponding hardware unit in the programmable logic device; an identification unit, which is used to identify each of the target tags in the user code; a determination unit, which is used to determine the logic code segment corresponding to each of the target tags based on a database, wherein the database includes multiple first tags and a reference code segment corresponding to each of the first tags, wherein the reference code segment is a low-level primitive corresponding to the hardware unit in the programmable logic device of the target model, and the logic code segment includes a reference code segment corresponding to the first tag in the database that matches the target tag; a replacement unit, which is used to update each of the target tags in the user code to the corresponding logic code segment, and the updated user code is used as the target code; a generation unit, which is used to generate a configuration bitstream file based on the target code, and the configuration bitstream file matches the target model of the programmable logic device.

[0012] In a third aspect, the present application also provides an electronic device, comprising: one or more processors; a memory; one or more applications, wherein the one or more applications are stored in the memory, the one or more applications are configured to be executed by the one or more processors, and the one or more applications are configured to execute the above method.

[0013] In a fourth aspect, the present application further provides a computer-readable storage medium, wherein the computer-readable storage medium stores a program code executable by a processor, and when the program code is executed by the processor, the processor executes the above method.

[0014] The electronic design automation software of the present application can realize automatic identification of target tags, and determine the logical code segment corresponding to each target tag based on the database, update each target tag in the user code to the corresponding logical code segment, obtain the target code, and then generate a configuration bitstream file based on the target code. That is, on the user side, when the user designs the user code, there is no need to consider the model of the programmable logic device. The user code is input into the electronic design automation software, and a configuration bitstream file matching the target model is automatically generated. The present application can not only realize that the same user code is compatible with multiple models of programmable logic devices, but also reduce the complexity of user design and greatly improve the user's work efficiency.

[0015] Other features and advantages of the present application will be described in the following description, and partly become apparent from the description, or be understood by practicing the present application. The purpose and other advantages of the present application can be realized and obtained by the structures specifically pointed out in the written description, claims, and drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0017] Figure 1 A flow chart of a method for data processing provided by an embodiment of the present application is shown;

[0018] Figure 2 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0019] Figure 3 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0020] Figure 4 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0021] Figure 5 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0022] Figure 6 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0023] Figure 7 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0024] Figure 8 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0025] Fig. 9 A method flow chart of a data processing method provided by another embodiment of the present application is shown;

[0026] Fig.10 A structural block diagram of a data processing device provided in an embodiment of the present application is shown;

[0027] Fig.11 A structural block diagram of an electronic device provided in an embodiment of the present application is shown;

[0028] Fig.12 A structural block diagram of a computer-readable storage medium provided in an embodiment of the present application is shown. DETAILED DESCRIPTION

[0029] In order to make those skilled in the art better understand the present application scheme, the technical scheme in the present application embodiment will be clearly and completely described below in conjunction with the drawings in the present application embodiment. Obviously, the described embodiment is only a part of the present application embodiment, rather than all the embodiments. The components of the present application embodiment usually described and shown in the drawings here can be arranged and designed in various different configurations. Therefore, the following detailed description of the embodiments of the present application provided in the drawings is not intended to limit the scope of the present application for protection, but merely represents the selected embodiment of the present application. Based on the embodiments of the present application, all other embodiments obtained by those skilled in the art without making creative work belong to the scope of protection of the present application.

[0030] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in subsequent drawings. At the same time, in the description of this application, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0031] With the continuous development of FPGA chips, the products of various FPGA manufacturers are increasingly widely used. The configuration of FPGA is also crucial. The user designs the logic code and inputs it into the EDA software. After a series of operations in the EDA software, the configuration bitstream file is generated, and the configuration bitstream file is used to configure the FPGA. Various low-level primitives are called in the logic code design. The low-level primitives of each manufacturer are not universal, and the low-level primitives of different series of devices from the same manufacturer are also different. Due to various factors such as supply and cost, the terminal product needs to be compatible not only with the products of various FPGA manufacturers during the design stage, but also with different series of products of the same FPGA manufacturer, which brings difficulties to the compatible design of logic code.

[0032] The existing method of solving compatibility issues through macro definitions is that users add macro definitions to the logic code and list and define the underlying primitives of each manufacturer; when the manufacturer's primitives are used, the corresponding primitives are called by referencing the macro name; when the integrated software processes the macro name, the macro name is mapped to the underlying primitive. This method requires listing the underlying primitives of various manufacturers in the macro definition, which increases the complexity of the design and reduces the readability of the code.

[0033] Therefore, in the embodiments of the present application, a data processing method, device, electronic device and computer-readable medium are provided to solve or partially solve the above-mentioned problems.

[0034] See also Figure 1 , which shows a method flow chart of a data processing method provided in an embodiment of the present application, the method is applied to electronic design automation software, that is, the data processing method provided in an embodiment of the present application can be implemented based on electronic design automation software. Specifically, it includes steps S110 to S150.

[0035] Step S110: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0036] It should be noted that the user code is a logic code designed by the user, and the electronic design automation software may obtain the user code by the user actively inputting the user code, or may obtain the user code from data pre-stored in the storage module.

[0037] The programmable logic device is a so-called logic device that allows users to configure and program according to specific needs. Users can customize logic functions according to design requirements. Programmable logic devices can be FPGAs, complex programmable logic devices (Comp lex Programmab le Logic Device, CPLD) and programmable array logic (Programmab leArray Logic, PAL) and the like.

[0038] The user code includes at least one target tag, which is used to characterize the configuration mode of the corresponding hardware unit in the programmable logic device. Different target tags may correspond to the configuration modes of different hardware units, or may represent different configuration modes of the same hardware unit.

[0039] In an implementation scenario, a user inputs a user code into electronic design automation software, and the electronic design automation software may generate a corresponding configuration bitstream file based on the acquired user code, where the configuration bitstream file is used to configure PFGA.

[0040] Step S120: Identify each of the target tags in the user code.

[0041] After obtaining the user code, it is necessary to identify the target tag in the user code.

[0042] Specifically, taking the FPGA design process as an example, each target tag in the user code can be identified in the synthesis stage. More specifically, the target tag can be identified after parsing the user code, or before performing logic optimization.

[0043] It should be noted that the target tag can be identified by special characters. When designing the user code, the user adds special characters to the target tag to facilitate later identification.

[0044] Step S130: Determine the logic code segment corresponding to each of the target tags based on a database, wherein the database includes multiple first tags and a reference code segment corresponding to each of the first tags, wherein the reference code segment is a low-level primitive corresponding to a hardware unit in a programmable logic device of a target model, and the logic code segment includes a reference code segment corresponding to a first tag in the database that matches the target tag.

[0045] It should be noted that different models of programmable logic devices correspond to different electronic design automation software, that is, a target model of programmable logic device is selected, and its corresponding electronic design automation software is also determined. The configuration bitstream file generated by the electronic design automation software is used to configure the target model of programmable logic device.

[0046] The database is pre-stored in a storage module of the electronic design automation software and corresponds to a target model of the programmable logic device. The database includes multiple first tags and corresponding reference code segments, and the reference code segments correspond to the target model of the programmable logic device. The first tag is a configuration method of a corresponding hardware unit in the target model programmable logic device.

[0047] In hardware description languages, primitives usually refer to basic modules predefined in the language. They provide the function of directly interacting with the underlying hardware. Primitives are provided by manufacturers. When configuring primitives, some parameters in the primitives need to be set, so the primitives need to be configured.

[0048] Exemplarily, the first label is an IO identifier for differential-to-single-ended conversion, and the reference code segment corresponding to the first label is a bottom primitive for differential-to-single-ended configuration of differential input pins.

[0049] A reference code segment can be obtained based on the underlying primitives provided by the manufacturer and the first tag setting, and a database can be further obtained. The user can replace the underlying primitives corresponding to a specific module with the target tag based on the database.

[0050] When a target tag is identified, the reference code segment corresponding to the first tag matching the target tag in the database may be used as the logic code segment corresponding to the target tag. For details, please refer to the subsequent embodiments.

[0051] Step S140: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0052] Each target tag in the user code is replaced with a corresponding logic code segment, and the updated user code is used as the target code, which is used to generate a configuration bit stream file.

[0053] Step S150: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0054] A configuration bitstream file is generated based on the target code, and the configuration bitstream file is used to configure the target model programmable logic device, that is, the same user code is compatible with the configuration of different models of programmable logic devices.

[0055] In one embodiment, when the user designs the user code, the underlying primitives of the specific module are replaced with the target tag. The underlying primitives of the specific module corresponding to different types of programmable logic devices are different. Therefore, replacing the underlying primitives of the specific module with the target tag can reduce the complexity of the user design and improve the readability of the user code. The specific module can be determined according to the underlying primitives provided by the manufacturer, and the target tag corresponds to the specific module and is used to indicate the configuration method of the hardware unit.

[0056] Exemplarily, the target tag is a differential-to-single-ended IO identifier, and the underlying primitive of the specific module is a code module corresponding to the differential-to-single-ended IO identifier.

[0057] When the user code design is completed, the user code is input into the electronic design automation software. After the electronic design automation software obtains the user code, it identifies the target tag in the user code, determines the logical code segment corresponding to each target tag based on the database, updates each target tag in the user code to the corresponding logical code segment, and the updated user code is the target code. A configuration bitstream file is generated based on the target code.

[0058] In an exemplary case, the market requires that the user code designed by the user be compatible with two models of FPGA. In this case, the user designs a user code, replaces the underlying primitives of a specific module with a target label, inputs the user code into the electronic design automation software corresponding to the first model FPGA, and obtains a configuration bitstream file that matches the first model FPGA. The user code is input into the electronic design automation software corresponding to the second model FPGA, and obtains a configuration bitstream file that matches the second model FPGA. This not only solves the compatibility problem of different models, but also reduces the user's design complexity.

[0059] The electronic design automation software of the present application can realize automatic identification of target tags, and determine the logical code segment corresponding to each target tag based on the database, update each target tag in the user code to the corresponding logical code segment, obtain the target code, and then generate a configuration bitstream file based on the target code. That is, on the user side, when the user designs the user code, there is no need to consider the model of the programmable logic device. The user code is input into the electronic design automation software, and a configuration bitstream file matching the target model is automatically generated. The present application can not only realize that the same user code is compatible with multiple models of programmable logic devices, but also reduce the complexity of user design and greatly improve the user's work efficiency.

[0060] See also Figure 2 , which shows a method flow chart of a data processing method provided by an embodiment of the present application, the method is applied to electronic design automation software, and specifically includes steps S210 to S260.

[0061] Step S210: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0062] Step S220: Identify each of the target tags in the user code.

[0063] Among them, step S210 and step S220 have been introduced in detail in the above embodiments and will not be repeated here.

[0064] Step S230: taking the first tag in the database that is the same as each of the target tags as the first candidate tag.

[0065] It should be noted that the database is pre-stored in the storage module of the electronic design automation software, and the database includes multiple first tags and reference code segments corresponding to each of the first tags. The reference code segments are the underlying primitives corresponding to the hardware units in the programmable logic device of the target model, and the logic code segments include the reference code segments corresponding to the first tags in the database that match the target tags.

[0066] The manufacturer of the programmable logic device will provide some underlying primitives, wherein the reference code segment is the code segment after configuring the underlying primitive based on the first tag. The first tag in the database that is the same as each target tag can be used as the first candidate tag, and the first candidate tag is used to determine the logic code segment.

[0067] Step S240: taking the reference code segment corresponding to each of the first candidate tags as the logical code segment corresponding to the target tag.

[0068] The reference code segment corresponding to each first candidate label is used as the logical code segment corresponding to the target label.

[0069] Step S250: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0070] Step S260: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0071] Among them, step S250 and step S260 have been introduced in detail in the above embodiments and will not be repeated here.

[0072] See also Figure 3 , which shows a method flow chart of a data processing method provided in an embodiment of the present application. The method is applied to electronic design automation software and specifically includes steps S310 to S3100.

[0073] Step S310: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0074] Step S320: Identify each of the target tags in the user code.

[0075] Among them, step S310 and step S320 have been introduced in detail in the above embodiments and will not be repeated here.

[0076] Step S330: determining a plurality of first tags based on primitives corresponding to the hardware units of the target model of the programmable logic device, wherein the first tags are used to characterize the configuration mode of the hardware units of the target model of the programmable logic device.

[0077] Specifically, a plurality of first tags are determined according to primitives provided by a manufacturer of a target model of programmable logic device, and the first tags are used to characterize the configuration mode of the hardware unit of the target model of programmable logic device.

[0078] Specifically, the logic unit corresponding to the primitive provided by the manufacturer is a specific module, and the first label is determined based on the configuration mode of the specific module.

[0079] Exemplarily, the manufacturer of the target model programmable logic device provides the underlying primitives of 7 hardware units. Since the underlying primitives corresponding to each hardware unit can have multiple configuration modes for implementing different configuration modes, no less than 7 first tags can be determined.

[0080] Step S340: Determine that the hardware unit corresponding to the first tag is the first hardware unit.

[0081] The first tag is used to characterize the configuration mode of the hardware unit of the programmable logic device of the target model. One target tag corresponds to one hardware unit, and the hardware unit corresponding to the first tag is used as the first hardware unit.

[0082] Step S350: setting the underlying primitive corresponding to the first hardware unit based on the first tag to obtain a new underlying primitive as a reference code segment corresponding to the first tag;

[0083] Since there are multiple configuration modes for each first hardware unit, it is necessary to set the underlying primitive corresponding to the first hardware unit based on the first label to obtain a new underlying primitive as a reference code segment corresponding to the first label.

[0084] Step S360: determining a database based on each of the first tags and the corresponding reference code segments, and storing the database in a storage module of the electronic design automation software.

[0085] After obtaining the first tag and the corresponding reference code segment, a database may be determined based on each first tag and the corresponding reference code segment, and the database may be stored in a storage module of the electronic design automation software to facilitate use of the database in subsequent steps.

[0086] Step S370: taking the first tag in the database that is the same as each of the target tags as the first candidate tag.

[0087] Step S380: taking the reference code segment corresponding to each of the first candidate tags as the logical code segment corresponding to the target tag.

[0088] Step S390: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0089] Step S3100: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0090] Among them, step S370 and step S3100 have been introduced in detail in the above embodiments and will not be repeated here.

[0091] The present application determines multiple first labels through the underlying primitives provided by the manufacturer, determines the reference code segments based on the underlying primitives and the first labels, and then establishes a database. When the user writes the user code, the user can replace the primitives of the corresponding hardware unit with the first label based on the established database, without considering the differences in primitives caused by different models of programmable logic devices, which greatly reduces the difficulty of user code design and improves the design efficiency.

[0092] See also Figure 4 , which shows a method flow chart of a data processing method provided in an embodiment of the present application, the method is applied to electronic design automation software, and specifically includes steps S410 to S460.

[0093] Step S410: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0094] Step S420: Identify each of the target tags in the user code.

[0095] Step S430: taking the second tag in the database that is the same as each of the target tags as the second candidate tag.

[0096] It should be noted that the database also includes multiple second tags and a preset code segment corresponding to each of the second tags, the first tag is different from the second tag, and the logic code segment also includes a preset code segment corresponding to the second tag in the database that matches the target tag. The second tag in the database that is the same as each target tag is used as the second candidate tag to facilitate the subsequent determination of the logic code segment corresponding to the target tag.

[0097] Step S440: taking the preset code segment corresponding to each of the second candidate tags as the logic code segment corresponding to the target tag, wherein the preset code segment is the general code corresponding to the hardware unit in the programmable logic device of the target model.

[0098] It should be noted that the general code is a pre-designed code, specifically a code obtained through general resources of programmable logic devices and open source codes.

[0099] The preset code corresponding to the second candidate tag is used as the logic code segment corresponding to the target tag, and the preset code segment is a general code determined based on the second candidate tag, which is used to represent the general code corresponding to the hardware unit in the programmable logic device of the target model. The general code may include primitives or may not include primitives.

[0100] In an exemplary embodiment, if the hardware unit corresponding to the second candidate tag does not have a primitive, the preset code corresponding to the second candidate tag can be obtained through the universal resources of the programmable logic device.

[0101] In an exemplary embodiment, the hardware unit corresponding to the second candidate tag partially includes primitives and partially does not include primitives, and the preset code corresponding to the second candidate tag can be obtained through the general resources of the programmable logic device and the primitives of the logic unit.

[0102] Step S450: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0103] Step S460: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0104] Among them, step S450 and step S460 have been introduced in detail in the above embodiments and will not be repeated here.

[0105] See also Figure 5 , which shows a method flow chart of a data processing method provided in an embodiment of the present application. The method is applied to electronic design automation software and specifically includes steps S510 to S5100.

[0106] Step S510: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0107] Step S520: Identify each of the target tags in the user code.

[0108] Among them, step S510 and step S520 have been introduced in detail in the above embodiments and will not be repeated here.

[0109] Step S530: determining a plurality of second tags based on the hardware units of the target model of the programmable logic device, wherein the second tags are used to characterize the configuration mode of the hardware units of the target model of the programmable logic device.

[0110] A plurality of second tags are determined according to the hardware units of the target model programmable logic device, where the second tags are different from the first tags and are used to characterize the configuration mode of the hardware units of the target model programmable logic device.

[0111] Exemplarily, six second tags are determined according to the target model programmable logic device. Since each hardware unit can correspond to multiple configuration modes, the six second tags correspond to no more than six hardware units.

[0112] Step S540: Determine that the hardware unit corresponding to the second tag is a second hardware unit.

[0113] Since the second tag is used to characterize the configuration method of the hardware unit of the target model programmable logic device, it can be known that the second tag has a corresponding relationship with the hardware unit, and the hardware unit corresponding to the second tag can be determined by the second tag as the second hardware unit.

[0114] Step S550: setting the universal code corresponding to the second hardware unit based on the second tag to obtain a new universal code as a preset code segment corresponding to the second tag.

[0115] It should be noted that the universal code is the configuration code corresponding to the hardware unit, which can be obtained based on the open source code. The present application pre-stores the universal code corresponding to the second hardware unit in the database. Different configuration methods correspond to different universal codes. Therefore, it is necessary to determine the configuration method of the second hardware unit based on the second tag, that is, to set the universal code corresponding to the second hardware unit through the second tag to obtain a new universal code as the preset code segment corresponding to the second tag.

[0116] Step S560: determining a database based on each of the second tags and the corresponding preset code segments, and storing the database in a storage module of the electronic design automation software.

[0117] After obtaining the second tag and the corresponding preset code segment, a database can be determined based on each second tag and the corresponding preset code segment, and the database can be stored in the storage module of the electronic design automation software to facilitate the use of the database in subsequent steps.

[0118] Step S570: taking the second tag in the database that is the same as each of the target tags as the second candidate tag.

[0119] Step S580: taking the preset code segment corresponding to each of the second candidate tags as the logic code segment corresponding to the target tag, wherein the preset code segment is the general code corresponding to the hardware unit in the programmable logic device of the target model.

[0120] Step S590: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0121] Step S5100: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0122] Among them, step S570 and step S5100 have been introduced in detail in the above embodiments and will not be repeated here.

[0123] See also Figure 6 , which shows a method flow chart of a data processing method provided in an embodiment of the present application. The method is applied to electronic design automation software and specifically includes steps S610 to S660.

[0124] Step S610: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0125] Step S620: Identify each of the target tags in the user code.

[0126] Step S630: Determine the logic code segment corresponding to each of the target tags based on a database, wherein the database includes multiple first tags and reference code segments corresponding to each of the first tags, the reference code segments are low-level primitives corresponding to hardware units in a programmable logic device of the target model, and the logic code segments include reference code segments corresponding to the first tags in the database that match the target tags.

[0127] Step S640: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0128] Step S650: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0129] Among them, step S610 and step S650 have been introduced in detail in the above embodiments and will not be repeated here.

[0130] Step S660: storing each logic code segment and the corresponding target tag in the storage module of the electronic design automation software.

[0131] Each logical code segment and the corresponding target label are stored in a storage module. The logical code segment and the corresponding target label can be printed out later. The user can check whether the replacement of the target label is correct based on the printed logical code segment and target label, or can check the logical code segment and the corresponding target label stored in the storage module to determine whether the replacement of the target label is correct.

[0132] See also Figure 7 , which shows a method flow chart of a data processing method provided in an embodiment of the present application. The method is applied to electronic design automation software and specifically includes steps S710 to S760.

[0133] Step S710: In the process of designing user code according to requirements, the first label in the database is used to represent the underlying language corresponding to the hardware unit of the programmable logic device.

[0134] In the prior art, when designing user code, the user needs to consider that the user code is compatible with programmable logic devices of different models, and needs to list the underlying primitives corresponding to all the models that need to be compatible through macro definitions when designing the user code. For example, the underlying primitives are listed in the register transfer level code (RTL) code: the underlying primitives of manufacturer A, the underlying primitives of manufacturer B, the underlying primitives of manufacturer C, etc. The designed RTL code is input into the electronic design automation software, and the macro definitions are identified through compilation, and the underlying primitives matching the target model are selected to generate a configuration bitstream file. This method has high design difficulty and large workload on the user side.

[0135] The present application establishes a database in advance, and in the process of designing user code, the underlying primitives corresponding to the hardware units of the programmable logic device are represented by the first label based on the database. When designing the user end, it is not necessary to consider different primitives corresponding to different models, which reduces the design difficulty of the user end and improves the user experience.

[0136] Step S720: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0137] Step S730: Identify each of the target tags in the user code.

[0138] Step S740: Determine the logic code segment corresponding to each of the target tags based on a database, wherein the database includes multiple first tags and a reference code segment corresponding to each of the first tags, wherein the reference code segment is a low-level primitive corresponding to a hardware unit in a programmable logic device of a target model, and the logic code segment includes a reference code segment corresponding to a first tag in the database that matches the target tag.

[0139] Step S750: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code.

[0140] Step S760: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0141] Among them, step S720 and step S760 have been introduced in detail in the above embodiments and will not be repeated here.

[0142] See also Figure 8 , which shows a method flow chart of a data processing method provided in an embodiment of the present application. The method is applied to electronic design automation software and specifically includes steps S810 to S880.

[0143] Step S810: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration method of a corresponding hardware unit in a programmable logic device.

[0144] Step S820: Identify each of the target tags in the user code.

[0145] Among them, step S810 and step S820 have been introduced in detail in the above embodiments and will not be repeated here.

[0146] Step S830: Determine whether the target tag is the same as the first tag in the database.

[0147] It should be noted that primitives are basic logic units provided by manufacturers.

[0148] Take FPGA as an example. In FPGA, the underlying primitives refer to the most basic building blocks or components designed inside the FPGA. These primitives are the basic logic units provided by the FPGA manufacturer.

[0149] Primitives specifically include logical primitives, arithmetic primitives, memory primitives and other primitives.

[0150] Exemplarily, the logic primitives include: a lookup table (LUT) and a trigger. The lookup table is a basic logic unit of a programmable logic device, which is used to implement combinational logic and output predefined results according to different combinations of inputs.

[0151] Exemplarily, the memory primitives include random access memory, which is a primitive for implementing data storage in a programmable logic device, and is typically used to store data, a First In, First Out (FIFO) queue, and the like.

[0152] The underlying primitives are optimized by the manufacturer for the architecture of programmable logic devices. Therefore, using primitives can achieve better performance and resource utilization efficiency than using general-purpose resources. For this reason, primitives are used as much as possible instead of general-purpose resources.

[0153] In order to distinguish whether the underlying primitives or universal resources of the programmable logic device are used, it is necessary to determine whether the target tag is the same as the first tag in the database. If they are the same, the reference code segment corresponding to the first tag, i.e., the underlying primitives of the programmable logic device, can be called. If they are different, the universal resources of the programmable logic device need to be called.

[0154] Step S840: If the target tag is the same as the first tag in the database, the first tag in the database that is the same as the target tag is used as the first candidate tag.

[0155] If the target tag is the same as the first tag in the database, the first tag in the database that is the same as the target tag is used as the first candidate tag.

[0156] Step S850: taking the reference code segment corresponding to each of the first candidate tags as the logic code segment corresponding to the target tag, wherein the reference code segment is the bottom primitive corresponding to the hardware unit in the programmable logic device of the target model.

[0157] Among them, step S850 has been introduced in detail in the above embodiment and will not be repeated here.

[0158] Step S860: If the target tag is different from the first tag in the database, the target tag different from the first tag is used as the second alternative tag, and the preset code segment corresponding to each of the second alternative tags is used as the logic code segment corresponding to the target tag, and the preset code segment is the general code corresponding to the hardware unit in the programmable logic device of the target model.

[0159] If the target tag is different from the first tag in the database, it means that the configuration of the hardware unit corresponding to the target tag cannot be completed by calling the underlying primitives. It is necessary to use a target tag different from the first tag as the second alternative tag, and use the preset code segment corresponding to each second alternative tag as the logic code segment corresponding to the target tag. The preset code segment is the general code corresponding to the hardware unit in the programmable logic device of the target model.

[0160] Step S870: updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code;

[0161] Step S880: Generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

[0162] Among them, step S870 and step S880 have been introduced in detail in the above embodiments and will not be repeated here.

[0163] The present application determines whether the target tag is the same as the first tag in the database. If they are the same, the reference code segment corresponding to the first tag, i.e., the underlying primitive of the programmable logic device, is called. If they are different, the general resources of the programmable logic device are called. This can improve the resource utilization efficiency of the electronic design automation software.

[0164] This application obtains electronic design automation software by optimizing comprehensive software tools without adding additional costs, thereby reducing the code complexity in the design, increasing the readability of the code, and simplifying the design; reducing the complexity of the compatibility design and increasing the portability of the logic design.

[0165] See also Fig. 9 , which shows a method flow chart of a data processing method provided in an embodiment of the present application. The method is applied to electronic design automation software and specifically includes steps S910 to S960.

[0166] Step S910: When implementing a specific function, the user selects a corresponding wildcard from the database and adds it to the RTL code.

[0167] Among them, wildcard is the target label and RTL is the user code.

[0168] Step S920: When the wildcard of RTL is identified during compilation, the processing flow is entered.

[0169] It should be noted that EDA software is electronic design automation software, and the electronic design automation software of the present application can recognize wildcards of RTL.

[0170] Step S930: Determine whether the wildcard matches the underlying primitive of the device successfully.

[0171] The EDA software matches the underlying primitives of the device according to the wildcard. If the match is successful, the process jumps to S940; if the match fails, the process jumps to S950.

[0172] Step S940: If the match is successful, configure the underlying primitives according to the specific functions of the RTL.

[0173] That is, the corresponding underlying primitives need to be configured according to the specific functions of the RTL.

[0174] Step S950: If the matching fails, the specific functions of the RTL are implemented using FPGA general resources.

[0175] That is, the configuration is completed through the general resources of the FPGA.

[0176] Step S960: After EDA implements the user RTL code, it prints in the log whether the function is a bottom-level hardware unit or a general logic.

[0177] To provide corresponding logs for users to check.

[0178] See also Fig.10, which shows a structural block diagram of a test device 600 provided in an embodiment of the present application, wherein the test device 600 includes: an acquisition unit 610, an identification unit 620, a determination unit 630, a replacement unit 640 and a generation unit 650.

[0179] The acquisition unit 610 is used to acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration mode of a corresponding hardware unit in a programmable logic device.

[0180] Furthermore, the acquisition unit 610 may also be used to represent the underlying language corresponding to the hardware unit of the programmable logic device using the first label in the database during the process of designing the user code according to the requirements.

[0181] The identification unit 620 is used to identify each of the target tags in the user code.

[0182] A determination unit 630 is used to determine a logic code segment corresponding to each of the target tags based on a database, wherein the database includes multiple first tags and a reference code segment corresponding to each of the first tags, the reference code segment is a low-level primitive corresponding to a hardware unit in a programmable logic device of a target model, and the logic code segment includes a reference code segment corresponding to a first tag in the database that matches the target tag.

[0183] Furthermore, the determination unit 630 can also be used to use the first label in the database that is the same as each of the target labels as the first alternative label; and use the reference code segment corresponding to each of the first alternative labels as the logic code segment corresponding to the target label, and the reference code segment is the underlying primitive corresponding to the hardware unit in the programmable logic device of the target model.

[0184] Furthermore, the determination unit 630 can also be used to determine multiple first labels based on the primitives corresponding to the primitives corresponding to the hardware units of the target model of the programmable logic device, wherein the first labels are used to characterize the configuration method of the hardware units of the target model of the programmable logic device; determine that the hardware unit corresponding to the first label is a first hardware unit; based on the first label, set the underlying primitive corresponding to the first hardware unit to obtain a new underlying primitive as a reference code segment corresponding to the first label; determine a database based on each of the first labels and the corresponding reference code segment, and store the database in the storage module of the electronic design automation software.

[0185] Furthermore, the determination unit 630 can also be used to use a second label in the database that is identical to each of the target labels as a second alternative label; and use a preset code segment corresponding to each of the second alternative labels as a logic code segment corresponding to the target label, wherein the preset code segment is a general code corresponding to a hardware unit in a programmable logic device of the target model.

[0186] Furthermore, the determination unit 630 can also be used to determine multiple second tags based on the hardware unit of the target model of the programmable logic device, and the second tag is used to characterize the configuration method of the hardware unit of the target model of the programmable logic device; determine that the hardware unit corresponding to the second tag is a second hardware unit; set the universal code corresponding to the second hardware unit based on the second tag to obtain a new universal code as a preset code segment corresponding to the second tag; determine a database based on each second tag and the corresponding preset code segment, and store the database in the storage module of the electronic design automation software.

[0187] The replacement unit 640 is used to update each of the target tags in the user code to the corresponding logic code segment, and the updated user code is used as the target code.

[0188] The generating unit 650 is configured to generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches a target model of the programmable logic device.

[0189] Furthermore, the generating unit 650 may also be configured to store each logic code segment and the corresponding target tag in a storage module of the electronic design automation software.

[0190] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the above-described devices and modules can refer to the corresponding processes in the aforementioned method embodiments, and will not be repeated here.

[0191] In several embodiments provided in the present application, the coupling between modules may be electrical, mechanical or other forms of coupling.

[0192] In addition, each functional module in each embodiment of the present application can be integrated into a processing module, or each module can exist physically separately, or two or more modules can be integrated into one module. The above integrated modules can be implemented in the form of hardware or software functional modules.

[0193] Please refer to Fig.11 , Fig.11The structural block diagram of an electronic device 700 provided in an embodiment of the present application is shown. The electronic device 700 may be a vehicle system, which may be arranged in a vehicle. The electronic device 700 in the present application may include one or more of the following components: a processor 711, a memory 712, and one or more application programs, wherein the processor 711 is electrically connected to the memory 712, and the one or more program configurations are used to execute the methods described in the various embodiments of the aforementioned test method.

[0194] The processor 711 may include one or more processing cores. The processor 711 uses various interfaces and lines to connect various parts of the entire electronic device 700, and executes various functions and processes data of the electronic device 700 by running or executing instructions, programs, code sets or instruction sets stored in the memory 712, and calling data stored in the memory 712. Optionally, the processor 711 can be implemented in at least one hardware form of digital signal processing (DSP), field programmable gate array (FPGA), and programmable logic array (PLA). The processor 711 can integrate one or a combination of a central processing unit (CPU), a graphics processor (GPU), and a modem. Among them, the CPU mainly processes the operating system, user interface, and computer programs; the GPU is responsible for rendering and drawing display content; and the modem is used to process wireless communications. It can be understood that the above-mentioned modem may not be integrated into the processor 711, but may be implemented separately through a communication chip. Specifically, the method described in the above embodiments may be executed by one or more processors 711 .

[0195] For some embodiments, the memory 712 may include a random access memory (RAM) or a read-only memory (ROM). The memory 712 may be used to store instructions, programs, codes, code sets, or instruction sets. The memory 712 may include a program storage area and a data storage area, wherein the program storage area may store instructions for implementing an operating system, instructions for implementing at least one function, instructions for implementing the following various method embodiments, etc. The data storage area may also store data created by the electronic device 700 during use, etc.

[0196] Please refer to Fig.12, which shows a structural block diagram of a computer-readable medium provided in an embodiment of the present application. The computer-readable medium 800 stores program codes, which can be called by a processor to execute the method described in the above method embodiment.

[0197] The computer readable medium 800 can be an electronic memory such as a flash memory, an EEPROM (electrically erasable programmable read-only memory), an EPROM, a hard disk, or a ROM. Optionally, the computer readable medium 800 includes a non-transitory computer-readable storage medium. The computer readable medium 800 has storage space for program code 810 that performs any method step in the above method. These program codes can be read from or written to one or more computer program products. The program code 810 can be compressed, for example, in an appropriate form.

[0198] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present application, rather than to limit it. Although the present application has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present application.

Claims

1. A data processing method, characterized in that: Applied to electronic design automation software, the method comprises: Acquire a user code, wherein the user code includes at least one target tag, and the target tag is used to indicate a configuration mode of a corresponding hardware unit in a programmable logic device; identifying each of the target tags in the user code; Determine a logic code segment corresponding to each of the target tags based on a database, wherein the database includes a plurality of first tags and a reference code segment corresponding to each of the first tags, wherein the reference code segment is a bottom-level primitive corresponding to a hardware unit in a programmable logic device of a target model, and the logic code segment includes a reference code segment corresponding to a first tag in the database that matches the target tag; Updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code; A configuration bitstream file is generated based on the target code, where the configuration bitstream file matches a target model of the programmable logic device.

2. The data processing method according to claim 1, characterized in that: The determining, based on a database, a logical code segment corresponding to each of the target tags comprises: Taking the first tag in the database that is the same as each of the target tags as the first candidate tag; The reference code segment corresponding to each of the first candidate tags is used as the logical code segment corresponding to the target tag.

3. The data processing method according to claim 2, characterized in that: Before determining the logical code segment corresponding to each target tag based on the database, the method further includes: Determine a plurality of first tags based on primitives corresponding to the hardware units of the target model of the programmable logic device, wherein the first tags are used to characterize a configuration mode of the hardware units of the target model of the programmable logic device; Determining that the hardware unit corresponding to the first tag is a first hardware unit; Setting the underlying primitive corresponding to the first hardware unit based on the first label to obtain a new underlying primitive as a reference code segment corresponding to the first label; A database is determined based on each of the first tags and the corresponding reference code segment, and the database is stored in a storage module of the electronic design automation software.

4. The data processing method according to claim 1, characterized in that: The database further includes a plurality of second tags and a preset code segment corresponding to each of the second tags, the first tag is different from the second tag, the logic code segment further includes a preset code segment corresponding to the second tag in the database that matches the target tag, and determining the logic code segment corresponding to each of the target tags based on the database includes: Using a second tag in the database that is identical to each of the target tags as a second candidate tag; The preset code segment corresponding to each of the second candidate tags is used as the logic code segment corresponding to the target tag, and the preset code segment is the general code corresponding to the hardware unit in the programmable logic device of the target model.

5. The data processing method according to claim 4, characterized in that: Before determining the logical code segment corresponding to each target tag based on the database, the method further includes: Determine a plurality of second tags based on the hardware unit of the target model of the programmable logic device, wherein the second tags are used to characterize the configuration mode of the hardware unit of the target model of the programmable logic device; Determining that the hardware unit corresponding to the second tag is a second hardware unit; The universal code corresponding to the second hardware unit is set based on the second tag to obtain a new universal code as a preset code segment corresponding to the second tag; A database is determined based on each of the second tags and the corresponding preset code segments, and the database is stored in a storage module of the electronic design automation software.

6. The data processing method according to claim 1, characterized in that: After generating a configuration bitstream file based on the target code, the method further includes: Each logic code segment and the corresponding target tag are stored in a storage module of the electronic design automation software.

7. The method according to claim 1, characterized in that Before obtaining the user code, the method further includes: In the process of designing user code according to requirements, the first label in the database is used to represent the underlying language corresponding to the hardware unit of the programmable logic device.

8. A data processing device, characterized in that: Applied to electronic design automation software, the electronic design automation software corresponds to the model of a programmable logic device, the device comprises: An acquisition unit, used for acquiring a user code, wherein the user code includes at least one target tag, and the target tag is used for indicating a configuration mode of a corresponding hardware unit in a programmable logic device; an identification unit, configured to identify each of the target tags in the user code; a determining unit, configured to determine a logic code segment corresponding to each of the target tags based on a database, wherein the database includes a plurality of first tags and a reference code segment corresponding to each of the first tags, wherein the reference code segment is a bottom-level primitive corresponding to a hardware unit in a programmable logic device of a target model, and the logic code segment includes a reference code segment corresponding to a first tag in the database that matches the target tag; A replacement unit, used for updating each of the target tags in the user code to the corresponding logic code segment, and using the updated user code as the target code; A generating unit is used to generate a configuration bitstream file based on the target code, wherein the configuration bitstream file matches the target model of the programmable logic device.

9. An electronic device, characterized in that: include: one or more processors; Memory; One or more applications, wherein the one or more applications are stored in the memory, the one or more applications are configured to be executed by the one or more processors, and the one or more applications are configured to execute the method according to any one of claims 1-7.

10. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores program codes, which can be called by a processor to execute the method according to any one of claims 1 to 7.

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