Method for manufacturing semiconductor device, and semiconductor device

Abstract

The embodiment of the invention relates to a semiconductor device manufacturing method and a semiconductor device. In a method of manufacturing a semiconductor device according to one embodiment, the semiconductor device is disposed in a region surrounded by a first dicing line extending in a first direction on a semiconductor wafer and a second dicing line orthogonal to the first direction. The semiconductor device includes a cell region in which a semiconductor element is provided in a semiconductor substrate, and a terminal region in which a metal wiring electrically connected to the semiconductor element is provided on the semiconductor substrate. In the manufacturing method, a barrier film is formed around a metal wiring in a terminal region, a protective film covering the metal wiring and terminating at a side surface of the barrier film is formed, and a semiconductor wafer is cut along a first cut line and a second cut line.

Description

[0001] Related Applications

[0002] This application claims the priority of Japanese Patent Application No. 2023-150438 (filing date: September 15, 2023) as a basic application. The present application incorporates the entire contents of the basic application by reference. Technical Field

[0003] Embodiments of the present invention relate to a method for manufacturing a semiconductor device and a semiconductor device. Background Art

[0004] As an example of a semiconductor device, there is known a vertically structured semiconductor device having a cell region and a terminal region. A power semiconductor element such as an IGBT (Insulated Gate Bipolar Transistor) or a MOSFET (Metal Oxide Semiconductor Field Effect Transistor) is provided in the cell region.

[0005] On the other hand, a metal wiring electrically connected to the power semiconductor element is provided in the end region. The metal wiring is covered by a protective film. In the development process, which is one of the manufacturing processes of the protective film, the end of the protective film is sometimes formed into a cone shape on the cutting line. In this case, in order to ensure the coverage of the metal wiring, the cutting line width needs to be designed with leeway. In addition, it is difficult to ensure the uniformity of the end shape of the protective film within the wafer, so it is easy to produce deviations in the cutting line width. Summary of the invention

[0006] In a method for manufacturing a semiconductor device according to an embodiment, the semiconductor device is arranged in a region surrounded by a first cutting line and a second cutting line, the first cutting line extending along a first direction on a semiconductor wafer, the second cutting line being orthogonal to the first direction, the semiconductor device comprising a unit region in which a semiconductor element is provided in a semiconductor substrate, and an end region in which a metal wiring electrically connected to the semiconductor element is provided on the semiconductor substrate. In the manufacturing method, a barrier film is formed around the metal wiring in the end region, a protective film is formed that covers the metal wiring and terminates on the side of the barrier film, and the semiconductor wafer is cut along the first cutting line and the second cutting line.

[0007] According to the present embodiment, it is possible to provide a method for manufacturing a semiconductor device and a semiconductor device that can ensure coverage of metal wiring, narrow the scribe line width, and improve variation in the scribe line width. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 It is a top view of the semiconductor device according to the first embodiment.

[0009] Figure 2 It is along Figure 1 A cross-sectional view along the cutting line AA is shown.

[0010] Figure 3 It is along Figure 1 A cross-sectional view along the cutting line BB is shown.

[0011] Figure 4 It is a cross-sectional view showing the film forming process of the oxide film.

[0012] Figure 5 It is a cross-sectional view showing a photolithography process.

[0013] Figure 6 It is a cross-sectional view showing the etching process.

[0014] Figure 7 It is a cross-sectional view showing the process of removing the photoresist.

[0015] Figure 8 It is a cross-sectional view showing the film forming process of the protective film.

[0016] Fig. 9 It is a cross-sectional view of an end region of a semiconductor device according to a comparative example.

[0017] Fig.10 It is a cross-sectional view of an end region of a semiconductor device according to a comparative example.

[0018] Fig.11 It is a top view of the semiconductor device according to the second embodiment. DETAILED DESCRIPTION

[0019] Hereinafter, embodiments of the present invention will be described with reference to the drawings. These embodiments do not limit the present invention.

[0020] (First Embodiment)

[0021] Figure 1 It is a top view of the semiconductor device 1 according to the first embodiment. Figure 1The semiconductor device 1 shown is a state before being cut from the semiconductor wafer 10. In the following description, the X-axis, Y-axis and Z-axis shown in each figure are sometimes used to describe the configuration and structure of each part of the semiconductor device. The X-axis, Y-axis and Z-axis are orthogonal to each other, and represent the X-direction, Y-direction and Z-direction respectively. In addition, sometimes the Z-direction is described as the top and the opposite direction thereof is described as the bottom. In this embodiment, the X-direction and the Y-direction are respectively equivalent to the first direction and the second direction, indicating the in-plane direction parallel to the front (or back) of the semiconductor device 1. The Z-direction is equivalent to the third direction, indicating the out-of-plane direction orthogonal to the front (or back) of the semiconductor device 1.

[0022] In addition, p, p + The expression refers to the p-type impurity concentration in terms of p, p + The order of is increasing. Then, n - 、n、n + The expression refers to the n-type impurity concentration in terms of n - 、n、n + The order is ascending.

[0023] The impurity concentration can be measured, for example, by SIMS (Secondary Ion Mass Spectrometry). In addition, the relative level of the impurity concentration can also be determined, for example, based on the level of the carrier concentration obtained by SCM (Scanning Capacitance Microscopy). In addition, the depth and distance of the semiconductor region can be obtained, for example, by SIMS.

[0024] like Figure 1 As shown, in the semiconductor wafer 10, a plurality of semiconductor devices 1 are arranged in a matrix along the X direction and the Y direction. A first cutting line L1 extending along the X direction is provided between the semiconductor devices 1 facing each other in the Y direction. In addition, a second cutting line L2 extending along the Y direction is provided between the semiconductor devices 1 facing each other in the X direction. That is, on the semiconductor wafer 10, the semiconductor devices 1 are arranged in an area surrounded by the first cutting line L1 and the second cutting line L2. In addition, in the present embodiment, the widths of the first cutting line L1 and the second cutting line L2 are the same, but they may also be different.

[0025] Each semiconductor device 1 includes a cell region 1a and a terminal region 1b provided around the cell region 1a. Figure 2 The configuration of the cell region 1 a will be described.

[0026] Figure 2 It is along Figure 1 The cross-sectional view of the cutting line AA is shown in FIG. Figure 2 As shown in FIG. 1 , the cell region 1a includes a first electrode 11, a second electrode 12, and a semiconductor substrate 13. Here, the case where the semiconductor element provided in the cell region 1a is an IGBT is described. However, the configuration of the cell region 1a is not limited to Figure 2 For example, the semiconductor element provided in the cell region 1a may be a MOSFET.

[0027] The first electrode 11 is provided on the back surface of the semiconductor substrate 13. The first electrode 11 can be formed using metal such as aluminum, for example. The first electrode 11 functions as a collector electrode.

[0028] The second electrode 12 faces the first electrode 11 in the Z direction via the semiconductor substrate 13. The second electrode 12 can be formed using a metal such as aluminum, for example. The second electrode 12 functions as an emitter electrode.

[0029] The semiconductor substrate 13 has p + Collector layer 131, n + Buffer layer 132, n - Base layer 133, p base layer 134, n + Emitter region 135 , gate electrode 136 , and gate insulating film 137 .

[0030] p + The collector layer 131 is disposed on the first electrode 11. + The buffer layer 132 is disposed on the p + On the collector layer 131. + The buffer layer 132 is provided with n - Base layer 133 .

[0031] In n - A p base layer 134 is provided on the base layer 133. + The emitter region 135 is in contact with the p base layer 134. + The emitter region 135 is in contact with the second electrode 12. When the voltage between the gate electrode 136 and the second electrode 12 (emitter electrode) becomes equal to or higher than the threshold voltage, an n-channel is formed in the p-base layer 134. Thus, a voltage from p to n is generated in the cell region 1a. + The collector layer 131 extends through the n channel to the n + Current path in emitter region 135 .

[0032] The gate electrode 136 is connected to the p base layer 134 and the n + The emitter region 135 is opposite. The gate electrode 136 can be formed using polysilicon, for example. In addition, the gate insulating film 137 is, for example, a silicon oxide (SiO2) film. Figure 3The configuration of the terminal region 1b will be described.

[0033] Figure 3 It is along Figure 1 The cross-sectional view is shown along the cutting line BB. Figure 3 As shown, the terminal region 1 b has a semiconductor substrate 13 , a metal wiring 14 , a protection film 15 , and a barrier film 16 .

[0034] The structure of the semiconductor substrate 13 is the same as that of the cell region 1a, so detailed description is omitted. However, no n + Emitter region 135 , gate electrode 136 , and gate insulating film 137 .

[0035] The metal wiring 14 is provided on the upper surface of the semiconductor substrate 13. The metal wiring 14 is electrically connected to the second electrode 12 of the cell region 1a, for example. The material of the metal wiring 14 is, for example, aluminum (Al), an alloy of aluminum and copper (AlCu), or an alloy of aluminum and silicon (AlSi).

[0036] The protective film 15 covers the metal wiring 14. The protective film 15 is a resin film such as a polyimide film. When the protective film 15 is formed, when the protective film 15 spreads from the end region 1b to the dicing line of the semiconductor wafer 10, the dicing line width W is deviated. Therefore, in this embodiment, in order to prevent the extension of the protective film 15, the barrier film 16 is provided at the outermost peripheral portion of the end region 1b. Thus, the distance between the barrier films 16 facing each other in the X direction and the Y direction becomes the dicing line width W.

[0037] The barrier film 16 may be a conductive film made of aluminum or copper, or an insulating film made of silicon oxide (SiO2) or silicon nitride (SiN). In order to more reliably prevent the extension of the protective film 15, the height h of the barrier film 16 is preferably greater than the thickness t of the metal wiring 14.

[0038] Here, refer to Figures 4 to 8 A method for manufacturing the semiconductor device 1 of the present embodiment will be described. Here, a method for manufacturing the termination region 1b of the semiconductor device 1 will be described. The cell region 1a can be formed by a commonly used manufacturing method before forming the termination region 1b, so a detailed description thereof will be omitted.

[0039] First, if Figure 4 As shown, an oxide film 160 is formed to cover the upper surface of the semiconductor substrate 13 and the front surface of the metal wiring 14. The oxide film 160 is formed by, for example, CVD (Chemical Vapor Deposition). Alternatively, a nitride film or a conductive film may be formed instead of the oxide film 160.

[0040] Then, if Figure 5 As shown, a pattern of a photoresist 170 is formed on the oxide film 160 by photolithography. In the present embodiment, the photoresist 170 is applied to a portion of the oxide film 160 that remains as the barrier film 16.

[0041] Then, if Figure 6 As shown, the oxide film 160 is etched using the photoresist 170 as a mask. The oxide film 160 is etched by, for example, RIE (Reactive Ion Etching).

[0042] Then, if Figure 7 As shown in FIG. 1 , the photoresist 170 is removed. Thus, a barrier film 16 is formed around the metal wiring 14. In addition, the barrier film 16 can also be formed by performing multiple Figures 4 to 7 The oxide film 160 is deposited and formed by the steps shown.

[0043] Finally, if Figure 8 As shown, a protective film 15 is formed in a manner that covers the metal wiring 14 and terminates on the side of the barrier film 16 that is opposite to the metal wiring 14. The protective film 15 can be formed by a commonly used manufacturing process such as an exposure process and a development process. Thus, the end region 1b is completed. Thereafter, the semiconductor wafer 10 is cut into a grid shape along the first cutting line L1 and the second cutting line L2 using a blade. Thus, a plurality of semiconductor devices 1 (semiconductor chips) are singulated from the semiconductor wafer 10.

[0044] Here, refer to Fig. 9 as well as Fig.10 A comparative example to be compared with the present embodiment will be described.

[0045] Fig. 9 as well as Fig.10 FIG. 1 is a cross-sectional view of the terminal region 1b of a semiconductor device according to a comparative example. Fig. 9 as well as Fig.10 In the present invention, the same components as those of the semiconductor device 1 are denoted by the same reference numerals, and redundant description is omitted.

[0046] In the semiconductor device of this comparative example, the terminal region 1b is not provided with Fig. 9 as well as Fig.10 As shown in the barrier film 16. Therefore, the end of the protective film 15 becomes a cone shape. For example, Fig. 9 In the embodiment, since the taper angle of the end of the protection film 15 is small, the protection film 15 easily spreads from the end region 1b to the second cut line L2. Therefore, in order to ensure the coverage of the metal wiring 14, the cut line width W1 needs to be designed to be slightly wider.

[0047] also, Fig.10The tapered shape of the end of the protective film 15 shown is similar to Fig. 9 The tapered shape of the end of the protective film 15 shown is different. As a result, Fig.10 The cutting line width W2 shown becomes larger than Fig. 9 The cut line width W1 shown is long. Thus, when the uniformity of the shape of the end portion of the protective film 15 is impaired, the cut line width is likely to vary.

[0048] In contrast, in the present embodiment, as described above, the barrier film 16 is formed before the protective film 15. Therefore, the end of the protective film 15 is in contact with the side of the barrier film 16, and the movement to the second cutting line L2 is prevented. As a result, the cutting line width W can be fixed to the distance between the barrier films 16. That is, the size of the cutting line width W can be controlled by the distance between the barrier films 16. Therefore, the cutting line width W can be narrowed and the deviation of the cutting line width can be improved.

[0049] (Second Embodiment)

[0050] Fig.11 It is a top view of the semiconductor device according to the second embodiment. Fig.11 The semiconductor device 2 shown is a state before being cut from a semiconductor wafer 20. Fig.11 In the present invention, the same components as those of the semiconductor device 1 according to the first embodiment are denoted by the same reference numerals.

[0051] The semiconductor device 2 of this embodiment includes a cell region 2a and a terminal region 2b. The configuration of the cell region 2a is the same as that of the cell region 1a of the first embodiment, and thus description thereof is omitted.

[0052] In addition, the terminal region 2b has the same structure as the terminal region 1b of the first embodiment. Furthermore, the terminal region 2b can be formed by the same process as the method for manufacturing the terminal region 1b described in the first embodiment. However, in this embodiment, the planar shape of the barrier film 16 formed on the semiconductor wafer 20 is different from that of the semiconductor device 1 of the first embodiment.

[0053] In the semiconductor device 1 of the first embodiment, as Figure 1 As shown, the barrier film 16 not only extends along the outer periphery of the terminal region 1b, but also extends to the intersection region R of the first cutting line L1 and the second cutting line L2. Therefore, in the intersection region R, the portion provided with the barrier film 16 becomes a convex portion, and the portion not provided with the barrier film 16 becomes a concave portion. Therefore, when the blade cuts the semiconductor wafer 10 along the first cutting line L1 and the second cutting line L2, cutting of the concave and convex portions occurs.

[0054] In contrast, in the semiconductor device 2 of the present embodiment, Fig.11As shown, the barrier film 16 ends at the end region 1b and does not extend to the intersection region R. That is, the barrier film 16 is not provided in the intersection region R. Therefore, there is no convex portion or concave portion in the intersection region R. Thus, when the blade cuts the semiconductor wafer 20 along the first cutting line L1 and the second cutting line L2, in the intersection region R, the flat portion is cut.

[0055] According to the present embodiment described above, similarly to the first embodiment, in the end region 2b, the barrier film 16 is formed before the protective film 15. Therefore, the end of the protective film 15 is in contact with the side of the barrier film 16, and the movement toward the second cutting line L2 is prevented. Thus, the cutting line width W can be fixed to the distance between the barrier films 16. Therefore, the cutting line width W can be narrowed and the variation of the cutting line width can be improved.

[0056] In addition, in the present embodiment, the cutting of the intersection region R is flat cutting. Therefore, the semiconductor wafer 20 can be smoothly cut also by the first embodiment.

[0057] In the first and second embodiments, the barrier film 16 remains as a component of the semiconductor devices 1 and 2 , but may be removed before or after the dicing step because the removal of the barrier film 16 does not affect the electrical characteristics of the semiconductor devices 1 and 2 .

[0058] Several embodiments of the present invention have been described, but these embodiments are presented as examples and are not intended to limit the scope of the invention. These embodiments can be implemented in various other ways, and various omissions, substitutions and changes can be made without departing from the scope of the subject matter of the invention. These embodiments and their variations are also included in the invention described in the claims and their equivalents as well as the contents included in the scope and subject matter of the invention.

[0059] Description of Reference Numerals

[0060] 1, 2: Semiconductor devices

[0061] 1a, 2a: unit area

[0062] 1b, 2b: End zone

[0063] 10, 20: Semiconductor wafers

[0064] 13: Semiconductor substrate

[0065] 14: Metal wiring

[0066] 15: Protective film

[0067] 16: Barrier film

[0068] L1: First cutting line

[0069] L2: Second cutting line.

Claims

1. A method for manufacturing a semiconductor device, wherein the semiconductor device is arranged in an area surrounded by a first cutting line and a second cutting line, wherein the first cutting line extends along a first direction on a semiconductor wafer, and the second cutting line is orthogonal to the first direction, wherein the semiconductor device comprises a unit area in which a semiconductor element is provided in a semiconductor substrate, and an end area in which a metal wiring electrically connected to the semiconductor element is provided on the semiconductor substrate, forming a barrier film around the metal wiring in the terminal region, forming a protective film covering the metal wiring and terminating at the side of the barrier film, The semiconductor wafer is cut along the first cutting lines and the second cutting lines.

2. The method for manufacturing a semiconductor device according to claim 1, wherein: The barrier film is an oxide film, a nitride film, or a conductive film.

3. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The height of the barrier film is greater than the thickness of the metal wiring.

4. The method for manufacturing a semiconductor device according to claim 2, wherein: The metal wiring and the upper surface of the semiconductor substrate are covered by the oxide film, the nitride film or the conductive film, In the oxide film, the nitride film or the conductive film, a photoresist is applied to a portion remaining as the barrier film. Using the photoresist as a mask, etching the oxide film, the nitride film or the conductive film, The photoresist is removed.

5. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The barrier film extends to a crossing region of the first cutting line and the second cutting line.

6. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The barrier film is terminated in the end region and does not extend to the intersection region R of the first cutting line and the second cutting line.

7. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The protective film is a polyimide film.

8. The method for manufacturing a semiconductor device according to claim 1 or 2, wherein: The semiconductor element is an IGBT or a MOSFET.

9. A semiconductor device, wherein: have: a unit region in which a semiconductor element is disposed; and a terminal region, surrounding the unit region, The terminal region has: Metal wiring, electrically connected to the semiconductor element; A protective film covering the metal wiring; as well as The barrier film has a side surface that is in contact with the end of the protective film.

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