Semiconductor wafer bonding apparatus and bonding method

Abstract

The invention provides a semiconductor wafer bonding apparatus and a bonding method. Degradation of semiconductor wafers during bonding of the semiconductor wafers in a semiconductor manufacturing process is prevented through a simple structure. A bonding device (34) for semiconductor wafers (W1, W2) for bonding the semiconductor wafers (W1, W2) facing each other on a pair of stages (36, 38) disposed facing each other in a vacuum environment without using a center push rod, the pair of stages (36, 38) being provided with protruding members (74, 76) for reducing the contact area with the semiconductor wafers (W1, W2), the semiconductor wafers (W1, W2) are supported by the protruding members (74, 76).

Description

Technical Field

[0001] The present invention relates to a semiconductor wafer bonding apparatus and a bonding method for bonding semiconductor wafers to each other in, for example, a semiconductor manufacturing process. Background Art

[0002] Hybrid bonding, which is a part of the conventional semiconductor manufacturing process, includes, for example, a plasma treatment step, a cleaning step, a drying step, and a bonding step.

[0003] In the plasma treatment process, atmospheric pressure plasma or vacuum plasma is applied to the semiconductor wafer to activate the surface of the semiconductor wafer. In the cleaning process, for example, the semiconductor wafer is rotated around the central axis while a cleaning liquid (pure water or a chemical solution) is dripped to clean the surface of the semiconductor wafer. In the drying process, the semiconductor wafer is rotated around the central axis at high speed while centrifugal force is used to scatter water droplets on the surface of the semiconductor wafer. In the bonding process, the upper and lower semiconductor wafers that have undergone the plasma treatment process and the drying process are placed opposite to each other and bonded by a bonding device.

[0004] Here, in a conventional bonding apparatus, semiconductor wafers are placed on planar tables arranged to face each other, and a center pusher (rod) is used to press the center of one of a pair of semiconductor wafers facing each other, thereby bonding the semiconductor wafers to each other (see Patent Document 1).

[0005] Prior art literature Patent Literature Patent Document 1: Japanese Patent No. 7148197

[0006] Problems to be solved by the invention

[0007] However, in the process of pressing the semiconductor wafer with the rod, stress is concentrated on the semiconductor wafer, and the semiconductor wafer bends, resulting in a technical problem of deterioration of the quality of the semiconductor wafer. In particular, SiC wafers are hard and brittle, so in the process of SiC wafer bending, fatal quality degradation may occur.

[0008] In addition, SiC wafer refers to a compound semiconductor material composed of silicon (Si) and carbon (C). Summary of the invention

[0009] Therefore, in view of the above problems, an object of the present invention is to provide a semiconductor wafer bonding apparatus and bonding method which can prevent degradation of semiconductor wafers when bonding semiconductor wafers in a semiconductor manufacturing process with a simple structure.

[0010] Technical solutions to solve problems

[0011] The first technical solution is a semiconductor wafer bonding device, which is used to bond semiconductor wafers facing each other on a pair of relatively arranged workbenches in a vacuum environment without using a center push rod, wherein a contact area reducing portion is provided on a pair of the workbenches, and the contact area reducing portion is used to reduce the contact area with the semiconductor wafer, and the semiconductor wafer is supported by the contact area reducing portion.

[0012] In this case, the contact area reducing portion is preferably composed of a plurality of protruding members.

[0013] In this case, the front end portion of the protruding member is preferably formed with a curved surface for reducing a contact area between the front end portion of the protruding member and the semiconductor wafer.

[0014] In this case, it is preferred that at least one of the pair of workbenches has a sealing component for maintaining a vacuum environment when the semiconductor wafers are joined, and when the pair of workbenches approach each other, the sealing components contact each other to adjust the separation distance between the semiconductor wafers.

[0015] The second technical solution is a semiconductor wafer bonding method, which is used to bond semiconductor wafers that are opposite to each other on a pair of relatively arranged workbenches in a vacuum environment without using a center push rod, wherein a contact area reducing portion is provided on a pair of the workbenches, and the contact area reducing portion is used to reduce the contact surface with the semiconductor wafer, and the semiconductor wafers are bonded to each other by supporting the semiconductor wafer using the contact area reducing portion.

[0016] In this case, it is preferable to use a plurality of protruding members as the contact area reducing portion.

[0017] In this case, it is preferable that a tip end portion of the protruding member that contacts the semiconductor wafer is formed in a curved shape.

[0018] In this case, it is preferred that at least one of the pair of workbenches has a sealing component for maintaining a vacuum environment when the semiconductor wafers are joined, and when the pair of workbenches approach each other, the sealing components contact each other to adjust the separation distance between the semiconductor wafers.

[0019] Effects of the Invention

[0020] According to the present invention, it is possible to prevent degradation of semiconductor wafers when bonding semiconductor wafers together in a semiconductor manufacturing process with a simple structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 This is a process diagram of a semiconductor manufacturing process according to the first embodiment of the present invention. Figure 2 This is an example of a plasma chamber used in the first embodiment of the present invention. Figure 3 This is an example of a cleaning machine in the first embodiment of the present invention. Figure 4 It is a diagram showing a cleaning process, an argon gas supply process, and a drying process in the semiconductor manufacturing process according to the first embodiment of the present invention. Figure 5 This is a flow of a semiconductor manufacturing process according to the first embodiment of the present invention. Figure 6 This is a process flow of an improved semiconductor manufacturing process according to the first embodiment of the present invention. Figure 7 It is a structural diagram showing a transfer process and a pre-bonding process in a semiconductor wafer bonding apparatus according to a second embodiment of the present invention. Figure 8 It is a structural diagram showing a pre-bonding process in the semiconductor wafer bonding apparatus according to the first embodiment of the present invention. Fig. 9 It is a structural diagram showing the structure of a worktable of a semiconductor wafer bonding apparatus according to a second embodiment of the present invention.

[0022] Description of symbols 10 Plasma Chamber 12 Gate valve 14 Chamber 16 Workbench 18. Cleaning Machine 20 Rotating table 22 Rotating motor 24 Cleaning nozzle 26 Swing motor 28 Washing water 30 Argon 32 Oscillating nozzle 34 Semiconductor wafer bonding device 36 First workbench 38 Second workbench 40 First Horizontal Plane 42 Second Horizontal Plane 44 Supporting platform 46 Drive unit 48 Sealing parts 50 Vacuum control device 52 throttle hole 54 Tubular parts 56 Switching valve 58 Vacuum control unit 60 Vacuum Control Chamber 62 Pump unit 64 Gas Unit 66 Pressure gauge 68 Separation valve 70 Temperature adjustment mechanism 72 Contact area reduction portion 74 first protruding member 76 second protruding member SP Micro Space (Micro Space) W1 Semiconductor Wafer W2 Semiconductor Wafer DETAILED DESCRIPTION

[0023] A method for removing static electricity from a semiconductor wafer according to a first embodiment of the present invention, which is applied to a semiconductor manufacturing process, will be described. For example, an embodiment in which the method is applied to a semiconductor manufacturing process using hybrid bonding will be described.

[0024] [Semiconductor manufacturing process]

[0025] First, the semiconductor manufacturing process is described. Figure 1 and Figure 5 As shown, the semiconductor manufacturing process, for example, includes a particle removal step P100, a plasma treatment step P200, an atmosphere opening step P300, a cleaning step P400, a drying step P500, an alignment step P600, a bonding step P700, an inspection step P800 and an annealing step P900 for semiconductor wafers W1 and W2.

[0026] In the particle removing step P100 , particles attached to the semiconductor wafers W1 and W2 are physically or chemically removed.

[0027] In the plasma processing step P200 , the surfaces of the semiconductor wafers W1 and W2 are activated by vacuum plasma processing, atmospheric pressure plasma processing, or the like.

[0028] Vacuum plasma treatment can be implemented using known devices. As the mode of vacuum plasma treatment, high frequency induction mode, capacitive coupling type electrode mode, corona discharge electrode-plasma jet mode, parallel plate mode, remote plasma mode, ICP type high density plasma mode, etc. can be listed. As the gas used in vacuum plasma treatment, oxygen, nitrogen, rare gas (argon etc.), hydrogen, ammonia etc. can be listed, preferably rare gas or nitrogen. Gas can be used alone 1 kind, and also can be mixed and used more than 2 kinds. For example, it can be argon 100 volume %, can be hydrogen / nitrogen is 70 / 30 (volume ratio) mixed gas, can also be hydrogen / nitrogen / argon is 35 / 15 / 50 (volume ratio) mixed gas.

[0029] As the atmosphere for vacuum plasma treatment, an atmosphere in which the volume percentage of a rare gas or nitrogen is 50 volume % or more is preferred, an atmosphere in which the volume percentage of a rare gas or nitrogen is 70 volume % or more is more preferred, an atmosphere in which the volume percentage of a rare gas or nitrogen is 90 volume % or more is further preferred, and an atmosphere in which the volume percentage of a rare gas or nitrogen is 100 volume % or more is particularly preferred. If the volume percentage of the rare gas or nitrogen is equal to or greater than the lower limit of the range, the surface of the treatment object can be sufficiently roughened.

[0030] The gas flow rate, vacuum degree, and treatment time in the vacuum plasma treatment are appropriately selected according to the composition of the inorganic layer to be surface-treated and the structure of the vacuum plasma treatment apparatus.

[0031] Atmospheric pressure plasma treatment can also be implemented using a known device. In atmospheric pressure plasma treatment, discharge is performed under an inert gas (argon, nitrogen, helium, etc.) at a pressure of 0.8 to 1.2 atmospheres, thereby generating a glow discharge. A trace amount of active gas (oxygen, hydrogen, carbon dioxide, ethylene, tetrafluoroethylene, etc.) is mixed in the inert gas. As the gas, from the viewpoint of being able to fully roughen the surface of the treatment object, a gas in which hydrogen is mixed in nitrogen is preferably used.

[0032] exist Figure 2 . The gate valve 12 of the plasma chamber 10 is opened, and the semiconductor wafers W1 and W2 are transported to the interior of the chamber 14 by a robot and placed on the workbench 16, and then the gate valve 12 is closed to seal the interior of the chamber 14. Thereafter, the interior of the chamber 14 is evacuated. Plasma treatment is performed on the semiconductor wafers W1 and W2, so that the surfaces of the semiconductor wafers W1 and W2 are activated.

[0033] Here, it is preferable that after the plasma processing step P200, an atmosphere opening step P300 of placing the semiconductor wafers W1 and W2 in an atmospheric environment is further included.

[0034] In the atmosphere opening process P300, the gate valve 12 of the plasma chamber 10 can be opened to expose the interior of the chamber 10 to the atmosphere, or an atmosphere opening chamber (not shown) open to the atmosphere can be provided separately from the plasma chamber 10, and the semiconductor wafers W1 and W2 can be transported to the atmosphere opening chamber and placed in an atmospheric environment.

[0035] In the atmosphere release step P300 , the argon gas 30 is supplied to the semiconductor wafers W1 and W2 . The argon gas 30 is preferably supplied by blowing from the center of the plane of the semiconductor wafers W1 and W2 toward the radially outer side (outer peripheral side) using a predetermined swing nozzle 32 .

[0036] The reason for supplying argon gas 30 to semiconductor wafers W1 and W2 in the atmosphere opening step P300 is that, for example, if nitrogen gas (N2) is purged when the atmosphere is opened as in the past, static electricity is added to the surface of semiconductor wafers W1 and W2 due to friction between semiconductor wafers W1 and W2 and the purge gas, and particles are lifted up due to pressure changes during purging, and particles are attracted by static electricity, and particles are easily attached to the surface of semiconductor wafers W1 and W2. In order to prevent this, in this embodiment, argon gas 30 is blown to semiconductor wafers W1 and W2 instead of nitrogen gas (N2), so that the amount of static electricity on the surface of semiconductor wafers W1 and W2 can be reduced. As a result, particles attached to the surface of semiconductor wafers W1 and W2 can be reduced.

[0037] Alternatively, the interior of the chamber 14 may be filled with the argon gas 30 to form an argon atmosphere, so that the semiconductor wafers W1 and W2 placed in the argon atmosphere are not statically charged.

[0038] In the cleaning process P400, Figure 4 As shown, for example, semiconductor wafers W1 and W2 after plasma treatment are placed on a turntable 20 and rotated at a predetermined speed while cleaning water 28 is dripped onto the surfaces of the semiconductor wafers W1 and W2. As the cleaning water 28, for example, pure water or a chemical solution can be used.

[0039] Here, when supplying the cleaning water 28 to the semiconductor wafers W1 and W2, it is preferred to drip the cleaning water 28 onto the center of the plane of the rotating semiconductor wafers W1 and W2, and guide the cleaning water 28 radially outward by the centrifugal force of the rotating semiconductor wafers W1 and W2. In this way, the entire surface of the semiconductor wafers W1 and W2 can be cleaned, and uneven cleaning of the cleaning water 28 can be prevented.

[0040] exist Figure 3The cleaning machine 18 is shown in FIG. The cleaning machine 18 is used in the cleaning process P400. The cleaning machine 18 includes: a rotating table 20; a rotating motor 22 for rotating the rotating table 20; and a cleaning nozzle 24 for supplying cleaning water 28 to the semiconductor wafers W1 and W2 (see FIG. Figure 4 ). The cleaning nozzle 24 sprays cleaning water 28 and is configured to be able to swing by the drive of the swing motor 26. As a result, the semiconductor wafers W1 and W2 are placed on the rotating table and are driven by the rotating motor 22 to rotate while the cleaning water 28 can be dripped from the cleaning nozzle 24 toward the center of the plane of the semiconductor wafers W1 and W2. As a result, the semiconductor wafers W1 and W2 are cleaned, and OH groups (hydroxyl groups) are attached to the surfaces of the semiconductor wafers W1 and W2.

[0041] Here, it is preferable to provide a drying step P500 after the cleaning step P400.

[0042] In the drying step P500, for example, the cleaning machine 18 is used directly. Specifically, the rotating table 20 is rotated at a speed higher than that in the cleaning step, and the argon gas 30 is blown toward the semiconductor wafers W1 and W2 from the cleaning nozzle 24 or other gas supply nozzles (not shown). In this case, Figure 4 As shown, when the argon gas 30 is supplied from the center of the plane of the rotating semiconductor wafers W1 and W2 toward the radially outer side (peripheral side), the argon gas 30 is subjected to the centrifugal force of the rotating semiconductor wafers W1 and W2, and pushes the cleaning water 28 to spread. In other words, while the argon gas 30 is stirred by the centrifugal force of the rotating semiconductor wafers W1 and W2, the cleaning water 28 attached to the surface of the semiconductor wafers W1 and W2 is peeled off from the surface of the semiconductor wafers W1 and W2. As a result, the argon gas 30 can be brought into contact with the entire surface of the semiconductor wafers W1 and W2, and uneven contact of the argon gas 30 can be prevented.

[0043] Another reason for supplying argon gas 30 to semiconductor wafers W1 and W2 in the drying process P500 is that, when the cleaned semiconductor wafers W1 and W2 are rotated at high speed and dried, static electricity is added to the surfaces of semiconductor wafers W1 and W2 due to friction between the semiconductor wafers W1 and W2 and the air. Therefore, by exposing argon gas 30 to the surfaces of semiconductor wafers W1 and W2 in the drying process P500, the amount of static electricity on the surfaces of semiconductor wafers W1 and W2 can be reduced. As a result, particles attached to the surfaces of semiconductor wafers W1 and W2 can be reduced.

[0044] As described above, by supplying the argon gas 30 to the semiconductor wafers W1 and W2 in the drying step P500 , the cleaning water 28 can be removed from the surfaces of the semiconductor wafers W1 and W2 to dry them, and the amount of static electricity charged to the surfaces of the semiconductor wafers W1 and W2 can be reduced.

[0045] In addition, in the atmosphere opening step P300, a mixed gas in which a small amount of hydrogen and oxygen are appropriately mixed in the argon gas 30 may be supplied to the semiconductor wafers W1 and W2. For example, a mixed gas in which about 3 volume % of hydrogen is mixed in the argon gas may be blown to the surface of the semiconductor wafers W1 and W2 to remove static electricity and particles, and then oxygen may be blown to the surface of the semiconductor wafers W1 and W2 to attach OH groups (hydroxyl groups) to the surface of the semiconductor wafers W1 and W2.

[0046] Here, in a structure where the semiconductor wafers W1 and W2 can rotate, it is preferred that the mixed gas and oxygen are supplied from the center of the plane of the rotating semiconductor wafers W1 and W2 toward the radially outer side through an oscillating nozzle, etc. Thus, the mixed gas and oxygen are stirred by the centrifugal force acting on the rotating semiconductor wafers W1 and W2, so that the mixed gas and oxygen can be uniformly exposed to the entire surface of the semiconductor wafers W1 and W2.

[0047] As a result, if Figure 5 and Figure 6 As shown, the cleaning step P400 and the drying step P500 can be omitted, thereby improving the productivity in the semiconductor manufacturing process. In addition, after the annealing step P900, microbubbles can be prevented from being generated on the semiconductor wafers W1 and W2. Moreover, by attaching OH groups (hydroxyl groups) to the surfaces of the semiconductor wafers W1 and W2 activated by plasma treatment, melt bonding can be performed, and a dry process can be realized.

[0048] In the alignment step P600 , two semiconductor wafers W1 and W2 facing each other are positioned.

[0049] In the bonding process P700, the two semiconductor wafers W1 and W2 that have undergone the alignment process P600 are bonded to each other. At this time, in order to bond the semiconductor wafers W1 and W2 with fewer particles, the size of the bubbles generated between the semiconductor wafers W1 and W2 is extremely small, which can avoid the poor quality of the semiconductor wafers W1 and W2, and also prevent the yield of the semiconductor manufacturing process from decreasing.

[0050] In the inspection step P800 , shape observation, defect inspection, and the like are performed on the bonded semiconductor wafers W1 and W2 .

[0051] In the annealing step P900 , the surfaces of the semiconductor wafers W1 and W2 are heated and then cooled to change the surface of the material. For example, there are methods such as heating using a furnace or lamp and laser annealing.

[0052] As described above, according to the first embodiment, the amount of static electricity on the semiconductor wafers W1 and W2 can be reduced in the semiconductor manufacturing process, thereby reducing particles attracted by static electricity and adhering to the surfaces of the semiconductor wafers W1 and W2.

[0053] Furthermore, while removing the cleaning water 28 adhering to the surfaces of the semiconductor wafers W1 and W2 , the cleaning water 28 can be modified to have a property that makes it difficult for the semiconductor wafers W1 and W2 to be charged with static electricity.

[0054] In addition, the semiconductor wafers W1 and W2 can be melt-bonded to each other, and the generation of microbubbles (air bubbles) can be prevented. As a result, defects of the semiconductor wafers W1 and W2 can be prevented.

[0055] Next, the semiconductor wafer bonding device involved in the second embodiment of the present invention is described. The semiconductor wafer bonding device is an alignment device that can be used in the bonding step P700 in the semiconductor manufacturing process of the first embodiment. In addition, it is not limited to being used as a bonding device for the semiconductor manufacturing process of the first embodiment, and can also be used as a general semiconductor wafer bonding device.

[0056] like Figure 7 As shown, a semiconductor wafer bonding device 34 (hereinafter referred to as "bonding device 34") includes a first workbench 36 located at the top and a second workbench 38 located at the bottom. The first workbench 36 and the second workbench 38 are arranged opposite to each other. In addition, the top and the bottom are examples of directions for explaining the present embodiment and are not limited. For example, the top and the bottom can also be replaced by the left direction and the right direction.

[0057] Here, for convenience of description, the semiconductor wafer held by the first stage 36 is referred to as a semiconductor wafer W1 , and the semiconductor wafer held by the second stage 38 is referred to as a semiconductor wafer W2 .

[0058] The first workbench 36 has a first horizontal surface 40 that supports the semiconductor wafer W1. A suction mechanism (not shown) is connected to the first workbench 36, and the semiconductor wafer W1 can be held by a predetermined suction force. Similarly, the second workbench 38 has a second horizontal surface 42 that supports the semiconductor wafer W2. A suction mechanism (not shown) is connected to the second workbench 38, and the semiconductor wafer W2 can be held by a predetermined suction force. In particular, when the micro space SP described later is made into a vacuum state, each semiconductor wafer W1, W2 is also held by each workbench 36, 38.

[0059] It is preferable that the first stage 36 and the second stage 38 include a temperature adjustment mechanism (not shown) for controlling the temperature to a predetermined temperature. The temperature adjustment mechanism is, for example, a heater.

[0060] The first workbench 36 may also be composed of, for example, a vacuum chuck or an electrostatic chuck (ESC chuck). In the case of using a vacuum chuck, it is preferred that a process that does not require wiring alignment of an SOI wafer or the like is not required. The so-called SOI wafer refers to a wafer that realizes high integration of semiconductor devices, low power consumption, high speed, and high reliability by forming an oxide film layer with high electrical insulation inside the wafer. As required, a diffusion layer of arsenic (As) or antimony (Sb) may also be formed on the active layer.

[0061] When the first worktable 36 is formed by a vacuum chuck, it is preferred to make the bonding gap (micro distance) infinitely narrow, which is a pressure difference that can hold the semiconductor wafer until the vacuum control pressure becomes the same pressure. In addition, it is preferred to provide an edge guide (peripheral guide) or the like for preventing the semiconductor wafer W1 held by the upper first worktable 36 from falling or for avoiding interference even if the semiconductor wafer W1 falls.

[0062] The second worktable 38 is supported by the support table 44. In addition, the second worktable 38 is connected to a driving device 46 that can be driven in the up-down direction. Therefore, the second worktable 38 can be moved in the up-down direction while maintaining a horizontal state by driving the driving device 46. The driving device 46 can use a hydraulic cylinder or a pneumatic cylinder in addition to a ball screw mechanism, and the second worktable 38 can be moved in the up-down direction in units of 1 micrometer by linear motion in the up-down direction.

[0063] The second stage 38 , similarly to the first stage 36 , may be constituted by, for example, a vacuum chuck or an electrostatic chuck (ESC chuck).

[0064] In addition, the first workbench 36 is similarly connected to a driving device (not shown) and can be configured to be movable in units of 1 micrometer in the vertical direction. In addition, in a structure in which the second workbench 38 is equipped with a driving device 46, the first workbench 36 can also be a structure that is fixed by a supporting member (not shown) so as not to move in the vertical direction.

[0065] The support surface of the first workbench 36 supporting the semiconductor wafer W1 is constituted by, for example, a first horizontal surface 40. Similarly, the support surface of the second workbench 38 supporting the semiconductor wafer W2 is constituted by, for example, a second horizontal surface 42. Fig. 9 As shown, a protruding member 74 may be detachably provided on the first horizontal surface 40 supporting the semiconductor wafer W1 of the first workbench 36, and the semiconductor wafer W1 is supported at the front end of the protruding member 74. Similarly, a protruding member 76 may be detachably provided on the second horizontal surface 42 supporting the semiconductor wafer W2 of the second workbench 38, and the semiconductor wafer W2 is supported at the front end of the protruding member 76.

[0066] The first workbench 36 is provided with a load cell (not shown) capable of measuring the bonding pressure when the semiconductor wafers W1 and W2 are bonded to each other. Thus, the bonding pressure between the semiconductor wafers W1 and W2 can be measured in grams, and the bonding pressure of the semiconductor wafers can be controlled in grams by controlling the driving device 46 based on the measurement result of the load cell.

[0067] A sealing member 48 is attached to one or both of the first table 36 and the second table 38. The sealing member 48 is preferably disposed at the edge of the first table 36 or the edge of the second table 38. The sealing member 48 is made of rubber, for example, and is also called an airtight member. Figure 7 Although the structure in which the sealing member 48 is provided only on the second workbench 38 is shown, this is an example. Fig. 9 As shown, sealing members 48 may be provided at positions facing and in contact with both the first stage 36 and the second stage 38 .

[0068] Here, the first workbench 36 and the second workbench 38 are arranged relative to each other in a manner that their horizontal planes are parallel, and they can move in the up and down directions based on the drive of the driving device 46, so as to approach or separate from each other. When the first workbench 36 and the second workbench 38 approach each other, the first workbench 36 and the sealing component 48 are in contact soon. When the first workbench 36 and the sealing component 48 are in contact, the movement of the first workbench 36 and the second workbench 38 stops. At this time, the separation distance between the semiconductor wafer W1 supported by the first workbench 36 and the semiconductor wafer W2 supported by the second workbench 38 is set to a small distance for forming a small space (micro space) SP. In this sense, the sealing component 48 acts as a guiding component or a control component for forming a small distance or a small space.

[0069] The length of the small space SP in the horizontal direction is preferably set to be the same as the diameter of the semiconductor wafers W1 and W2, or to be set to a length obtained by adding a reserve dimension of about 10% to 20% of the diameter to the diameter of the semiconductor wafers W1 and W2.

[0070] In other words, the size of the sealing member 48 is set so that when the semiconductor wafers W1 and W2 are joined to each other by moving the first workbench 36 and the second workbench 38 in the up-down direction, the space formed by the semiconductor wafers W1 and W2 is established as a micro space SP. That is, by the size of the sealing member 48, for example, in the height direction, the micro space where the semiconductor wafers W1 and W2 are joined to each other is controlled to be a predetermined micro space SP (or micro volume). Alternatively, the size of the sealing member 48, for example, in the height direction, has the following function: controlling the separation distance between the semiconductor wafer W1 supported by the first workbench 36 and the semiconductor wafer W2 supported by the second workbench 38 to a desired minimum value.

[0071] Furthermore, the separation distance between the semiconductor wafer W1 supported by the first stage 36 and the semiconductor wafer W2 supported by the second stage 38 is preferably a small distance (micro distance) of 10 μm or more and 50 μm or less.

[0072] The micro space SP is connected to a vacuum control device 50 (in the embodiment of FIG. Figure 7 In detail, the volume of the vacuum control device 50 is set to be several thousand to tens of thousands of times larger than the volume of the micro space SP. A throttle hole 52 (in Figure 7 The inlet of the micro-space SP is connected to the outlet of the throttle hole 52 (omitted in the figure in the conveying position), and one end of the tubular member 54 is connected to the outlet of the throttle hole 52. The other end of the tubular member 54 is connected to the vacuum control device 50. The switching valve 56 (vacuum valve) is connected to the tubular member 54. By opening and closing the switching valve 56, the micro-space SP and the vacuum control device 50 are connected. At this time, since the volume of the vacuum control device 50 is thousands to tens of thousands times larger than the volume of the micro-space SP, the internal environment of the micro-space SP imitates the pressure environment of the internal space of the vacuum control device 50 and becomes a vacuum environment. In this way, the vacuum environment of the micro-space SP can be achieved simply by connecting the micro-space SP with a small volume to the vacuum control device 50 with a large volume.

[0073] In addition, the internal environment of the vacuum control device 50 is controlled to an optimal pressure. Therefore, water in the micro space SP does not freeze and bubbles similar to particles are not generated when the semiconductor wafers W1 and W2 are bonded to each other, and the scattering of hydroxyl groups (OH groups) that may cause quality degradation of the semiconductor wafers W1 and W2 can be prevented.

[0074] Here, the operation of bonding the semiconductor wafers W1 and W2 is described. The semiconductor wafers W1 and W2 are separated from each other by a small distance in the vacuum environment of the small space SP, and the driving device 46 is driven to move the second workbench 38 upward while maintaining a horizontal state. Soon, the semiconductor wafer W1 held on the first workbench 36 and the semiconductor wafer W2 held on the second workbench 38 are in contact with a predetermined pressure and bonded.

[0075] At this time, unlike the prior art, a center push rod (rod) is not used to press the semiconductor wafers W1 and W2. In the prior art, when the semiconductor wafers are joined together, the center push rod is used to press the central part of the semiconductor wafer on one side, so the semiconductor wafer bends, and strain caused by stress concentration is generated, resulting in degradation or breakage. Regarding this issue, in this embodiment, since the semiconductor wafers W1 and W2 are joined together without using a center push rod while maintaining a horizontal plane, it is possible to prevent the semiconductor wafers W1 and W2 from being degraded or broken when joined. This is particularly effective when the semiconductor wafers W1 and W2 are composed of hard and brittle SiC wafers.

[0076] The bonding pressure between the semiconductor wafers W1 and W2 is, for example, 15 kg at maximum. The bonding pressure can be measured by a load cell provided on the first worktable 36. In addition, by feedback controlling the drive device 46 based on the measurement result of the load cell, the movement of the second worktable 38 can be controlled in micrometers.

[0077] In bonding the semiconductor wafers W1 and W2 , bonding is performed from a state where the separation distance between the semiconductor wafers W1 and W2 is small. Therefore, positional deviation between the semiconductor wafers can be suppressed, and bonding accuracy can be improved.

[0078] In addition, a driving device may be provided on the first workbench 36 side to move the first workbench 36 downward to join the semiconductor wafers W1 and W2 to each other. Furthermore, a driving device 46 may be provided on both the first workbench 36 and the second workbench 38 to move both the first workbench 36 and the second workbench 38 in the vertical direction.

[0079] Next, the operation of the semiconductor wafer bonding apparatus and bonding method according to the second embodiment of the present invention will be described.

[0080] [Current situation and problems]

[0081] It is difficult to make a sufficient amount of hydroxyl groups (OH groups) exist at the interface of the semiconductor wafer during vacuum plasma processing. Although O radicals or H radicals generated during vacuum plasma processing can be generated, plasma electrons are attached to the surface of the semiconductor wafer at the same time, and the surface of the semiconductor wafer is activated by the action of plasma electrons, so it is impossible to make a sufficient amount of hydroxyl groups (OH groups) remain at the interface of the semiconductor wafer.

[0082] In order to activate the semiconductor wafer, vacuum plasma treatment is performed, but the process pressure for exciting the gas to plasma and activating the surface of the semiconductor wafer with ions is below 50Ps under vacuum. In this state, there is about 1 / 2000 of the gas compared to the atmospheric pressure, so the use of high-density plasma and remote plasma causes the hydroxyl group (OH group) to remain at the interface of the semiconductor wafer, and the hydroxyl group (OH group) required for bonding cannot be obtained.

[0083] If the hydrophilic bonding of SiO2 is considered, water is difficult to separate from SiO2 compared to Si, so there is a technical problem that the strength cannot be obtained due to the small number of hydroxyl groups (OH groups). If a large amount of water is added to solve this technical problem, water will remain at the interface of the semiconductor wafer and the hydroxyl groups (OH groups) will be excessive, which will become the cause of voids.

[0084] For example, in the process of melt bonding, after plasma activation of the semiconductor wafer, it is cleaned and hydroxyl groups (OH groups) are added, and the semiconductor wafers are bonded to each other while being pushed up by a center push rod to bend the semiconductor wafer. However, in the previous method, the semiconductor wafer itself is damaged due to deformation, which leads to the technical problem of damage to the semiconductor wafer.

[0085] In particular, all substrate materials used for semiconductor wafers are brittle materials, which are hard and brittle materials. Among them, SiC has a hardness second only to diamond and strong chemical resistance, so it is an extremely difficult material to physically process. Therefore, unlike ordinary silicon wafers (SI wafers), SiC wafers require a bonding process (gap removal bonding process) that does not use a center pusher.

[0086] In contrast, the wafer bonding apparatus and bonding method in the second embodiment performs bonding processing of the semiconductor wafers W1 and W2 by controlling the pressure of the semiconductor wafers W1 and W2 to allow hydroxyl groups (OH groups) required for bonding to remain under low vacuum in a tiny space (micro space) and in a vacuum environment.

[0087] Since the bonding process of the semiconductor wafers W1 and W2 is performed in the micro space SP, the micro space can be vacuum controlled at a high speed of about 1 second. By controlling the temperature of the first stage 36 and the second stage 38 to a predetermined temperature, an appropriate amount of hydroxyl (OH) can be left.

[0088] Thus, in the semiconductor wafer bonding process, by controlling the vacuum pressure, temperature, and time when bonding the semiconductor wafers W1 and W2 in the smallest space such as the micro space, the optimal bonding process of the semiconductor wafers W1 and W2 can be performed.

[0089] In particular, since the micro space SP becomes a vacuum environment in a short time of about 1 second, a sufficient amount of hydroxyl groups (OH groups) can be retained on the surfaces of the semiconductor wafers W1 and W2 , thereby improving the bonding strength between the semiconductor wafers W1 and W2 .

[0090] In addition, in the pre-bonding space before the bonding of the semiconductor wafers W1 and W2, the separation distance between the semiconductor wafers W1 and W2 is preferably greater than 10 μm and less than 50 μm, which is a micro distance (minimum distance), and the tilt and alignment of the semiconductor wafers W1 and W2 are adjusted by piezoelectric control, and the pressure control during bonding is performed.

[0091] Next, an embodiment of a semiconductor wafer bonding apparatus and bonding method according to a second embodiment of the present invention will be described. In the drawings of the embodiments, the same reference numerals are given to overlapping structures, and their descriptions are omitted as appropriate.

[0092] (Example 1)

[0093] like Figure 8 As shown, the first embodiment includes a vacuum control unit 58. The vacuum control unit 58 includes, for example, a vacuum control chamber 60; a pump unit 62 connected to the vacuum control chamber 60 via a pipe or the like; a gas unit 64 connected to the vacuum control chamber 60 via a pipe or the like; and a pressure gauge 66 such as a Pirani vacuum gauge for measuring the pressure in the vacuum control chamber 60.

[0094] A separation valve 68 is provided between the vacuum control chamber 60 and the pump unit 62, and between the vacuum control chamber 60 and the gas unit 64. In addition, the vacuum control chamber 60 is provided with a temperature adjustment mechanism 70 for controlling the temperature in the vacuum control chamber 60. The temperature adjustment mechanism 70 is, for example, a heater. According to the temperature adjustment mechanism 70, the gas adhering to the inner wall of the vacuum control chamber 60 can be degassed and the humidity can be controlled. By driving the pump unit 62, the micro space SP in communication with the vacuum control chamber 60 is evacuated to realize a vacuum environment.

[0095] According to the first embodiment, the bonding chamber side forming the small space of the bonding device 34 is a structure in which the pressure change rate is controlled by a throttle hole 52 such as a mass flow controller. The vacuum control chamber 60 is provided with, for example, a temperature control mechanism 70 and a gas unit 64 capable of supplying water vapor. Thus, the temperature, humidity, pressure and other environments inside the vacuum control chamber can be controlled.

[0096] Here, the reason for placing the vacuum control chamber 60 between the micro space SP of the bonding device 34 and the pump unit 62 is that if the micro space SP of the bonding device 34 is directly connected to the pump unit 62, the volume of the micro space SP is too small, so pressure control becomes difficult, and due to the rapid vacuum state that reaches the performance (ultimate vacuum) of the pump unit 62, the water and other liquids present in the micro space SP evaporate rapidly, and the temperature of the micro space SP decreases. As a result, vacuum freezing occurs on the semiconductor wafers W1 and W2 in the micro space SP. If vacuum freezing occurs, bubbles are generated in the same way as particles, which has a bad effect on the quality of the semiconductor wafers W1 and W2. In addition, due to the rapid vacuum state that reaches the performance (ultimate vacuum) of the pump unit 62, hydroxyl groups (OH groups) volatilize and have a bad effect on the quality of the semiconductor wafers W1 and W2.

[0097] The pressure at which vacuum freezing occurs depends on the nature of the substance and the temperature. Generally, very low pressures are required for vacuum freezing to occur effectively. In most cases, vacuum freezing occurs at high vacuum (10 -3 The freezing process is carried out under the condition of 1000 Pa (Pascal) or less. The pressure change when forming a vacuum affects the freezing result. In a vacuum, substances tend to become gaseous, and if the pressure decreases, they tend to evaporate. As a result, the temperature of the substance decreases, promoting freezing. The lower the pressure, the easier it is to freeze in a vacuum.

[0098] As described above, the vacuum control chamber 60 is interposed so that the interior of the vacuum control chamber 60 is connected to the micro space SP while the temperature, humidity and pressure are controlled to be optimal, and the temperature of the first workbench 36 and the second workbench 38 is controlled, thereby forming a vacuum environment in the micro space SP in a manner that does not cause freezing, thereby preventing degradation of the semiconductor wafers W1 and W2.

[0099] (Example 2)

[0100] like Fig. 9As shown, in the second embodiment, a first protruding member 74 as a contact area reducing portion 72 for reducing the contact area with the semiconductor wafer W1 is provided on the first workbench 36. In addition, a second protruding member 76 as a contact area reducing portion 72 for reducing the contact area with the semiconductor wafer W2 is provided on the second workbench 38. The first workbench 36 and the second workbench 38 have horizontal planes 40 and 42, respectively, and are configured so that the semiconductor wafers W1 and W2 are supported in surface contact on each horizontal plane 40 and 42, but in the second embodiment, it is a structure supported by a plurality of protruding members 74 and 76. Therefore, the total contact area between the semiconductor wafers W1 and W2 and each workbench 36 and 38 is reduced. As a result, the situation where particles (foreign matter) such as garbage and dust are sandwiched between the semiconductor wafers W1 and W2 and the protruding members 74 and 76 is reduced, and the stress concentration when the semiconductor wafers W1 and W2 are bonded to each other can be reduced, and the quality degradation of the product when the product is completed can be suppressed.

[0101] The front ends of the plurality of protruding parts 74 and 76 are preferably formed into a curved surface in order to reduce the contact area with the semiconductor wafers W1 and W2. By setting the front ends of the respective protruding parts 74 and 76 as curved surfaces, the amount of particles (foreign matter) such as garbage and dust adhering to the front ends of the protruding parts 74 and 76 can be reduced, and the contact area between the semiconductor wafers W1 and W2 and the protruding parts 74 and 76 can be further reduced. As a result, the amount of particles (foreign matter) such as garbage and dust between the semiconductor wafers W1 and W2 and the protruding parts 74 and 76 is significantly reduced, and the quality degradation of the product when the semiconductor wafers W1 and W2 are bonded to each other to complete the product can be further suppressed.

[0102] As described above, according to Example 2, the following technical problems can be fundamentally solved: since the previous workbench is planar, particles attached to the workbench or particles attached to the surface of the semiconductor wafer promote stress concentration when pressurized when the semiconductor wafers are joined together, thereby causing damage to the semiconductor wafer or generating bubbles on the semiconductor wafer and other technical problems.

[0103] In particular, in the structure in which the semiconductor wafers W1 and W2 are supported by a plurality of protruding parts 74 and 76, gaps are formed between adjacent protruding parts 74 and 76. When the micro space SP is vacuumed, the airflow passes through the gaps formed between the protruding parts 74 and 76 and flows toward the throttle hole 52. As a result, the semiconductor wafers W1 and W2 are firmly supported by the plurality of protruding parts 74 and 76 and can be reliably positioned. As a result, it is possible to achieve high-precision bonding processing between the semiconductor wafers W1 and W2.

[0104] In addition, the protruding parts 74 and 76 may be protrusions, columnar parts, or rod-shaped parts. The protruding parts 74 and 76 may be any parts or structures used to form convex and concave shapes on the horizontal surfaces 40 and 42 of the first workbench 36 and the second workbench 38. The protruding parts 74 and 76 are not limited to the structures that are freely installed on the horizontal surfaces 40 and 42, but may be fixed on the horizontal surfaces 40 and 42, or the surfaces of the horizontal surfaces 40 and 42 may be processed into protrusions or protrusions.

[0105] Furthermore, both the first stage 36 and the second stage 38 are provided with a sealing member 48 for maintaining a vacuum environment in the micro space SP when the semiconductor wafers W1 and W2 are bonded. The sealing member 48 is made of rubber, for example.

[0106] When the pair of workbenches 36 and 38 approach each other, the sealing members 48 contact each other, thereby adjusting the separation distance between the semiconductor wafers W1 and W2. In other words, the thickness dimension (height dimension) of the sealing member 48 is set to a dimension that can adjust the separation distance between the semiconductor wafers W1 and W2 to a desired small distance.

[0107] The present embodiment and examples are merely one form of the present invention, and the present invention is not limited thereto. The differences in the degree of design changes to the present embodiment and examples are naturally included within the scope of the technical concept of the present invention.

Claims

1. A semiconductor wafer bonding device for bonding semiconductor wafers facing each other on a pair of worktables arranged oppositely to each other in a vacuum environment without using a central push rod, wherein: A contact area reducing portion is provided on a pair of the work tables, and the contact area reducing portion is used to reduce a contact area with the semiconductor wafer. The semiconductor wafer is supported by the contact area reduction portion, At least one of the pair of worktables is provided with a sealing member for maintaining a vacuum environment during bonding of the semiconductor wafers. When the pair of stages approach each other, the sealing members come into contact with each other, thereby adjusting the separation distance between the semiconductor wafers.

2. The semiconductor wafer bonding apparatus according to claim 1, wherein: The contact area reducing portion is composed of a plurality of protruding members.

3. The semiconductor wafer bonding apparatus according to claim 2, wherein: The front end portion of the protruding member is formed by a curved surface, and the curved surface is used to reduce a contact area between the front end portion of the protruding member and the semiconductor wafer.

4. A method for bonding semiconductor wafers, for bonding semiconductor wafers facing each other on a pair of worktables arranged opposite to each other in a vacuum environment without using a central push rod, wherein: A contact area reducing portion is provided on the pair of work tables, the contact area reducing portion is used to reduce the contact surface with the semiconductor wafer, and the semiconductor wafers are bonded to each other by supporting the semiconductor wafers with the contact area reducing portion. At least one of the pair of worktables is provided with a sealing member for maintaining a vacuum environment during bonding of the semiconductor wafers. When the pair of stages approach each other, the sealing members come into contact with each other, thereby adjusting the separation distance between the semiconductor wafers.

5. The semiconductor wafer bonding method according to claim 4, wherein: The semiconductor wafer bonding method uses a plurality of protruding members as the contact area reducing portion.

6. The semiconductor wafer bonding method according to claim 5, wherein: A front end portion of the protruding member that contacts the semiconductor wafer is formed in a curved shape.

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