Method for seamlessly filling silicon oxide groove
By using PECVD chamber and radio frequency source for deposition-etching cycles during semiconductor chip manufacturing, seamless filling of small-sized silicon oxide trench is achieved, trench gap problem is solved, and filling quality and device performance are improved.
Patent Information
- Application Number
- CN202311210904.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2023-09-18
- Publication Date
- 2025-03-18
AI Technical Summary
During semiconductor chip manufacturing, silicon oxide trenches with high depth and small aspect ratios are prone to gaps, affecting the filling quality and device performance.
Using the same PECVD chamber, the silicon oxide trench etching, silicon nitride deposition and in-situ etching are used to perform silicon oxide trench etching, and seamless filling is achieved through deposition-etching cycles.
Seamless filling of 20-100 nanometer wide and 40-60 nanometer deep silicon oxide trench is achieved, which simplifies the process flow, reduces the preparation temperature and raw material costs, and improves the filling quality and device performance.
Smart Images
Figure CN119650508A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to a technology for seamlessly filling silicon oxide trenches with silicon nitride, and belongs to the field of semiconductor industry and semiconductor process. Background Art
[0002] The production process of semiconductor chips can be roughly divided into three steps: chip design, process manufacturing, and packaging and testing. Among them, process manufacturing plays the role of realizing the designed chip structure. As the feature size of transistors gradually decreases as predicted by Moore's Law, the complexity of chip process manufacturing is also increasing. For the current chip manufacturing process, the production of a chip will go through hundreds or thousands of processes. In the semiconductor manufacturing process, trench filling technology is a very common and important process. In processes such as thin film deposition, shallow trench isolation (STI), and copper interconnection, good trench filling quality is often an important factor in ensuring the smooth progress of subsequent processes, structural integrity, and device performance. In addition to impurity content, density, conductivity, etc., the criteria for judging the quality of trench filling include whether there are gaps in the trench filling, which is also a very important feature. For example, for shallow trench isolation, if there are gaps in the filled insulating material, the risk of leakage between the source and drain of adjacent devices will increase.
[0003] During the trench filling process with high aspect ratio and small feature size, gaps are often formed inside the trench. This is because as the film is deposited, the thickness of the tip of the trench top is greater than the thickness of the sidewall or bottom of the trench. The top is sealed in advance, which eventually causes the film to be unable to continue to deposit in the trench, resulting in gaps. Summary of the invention
[0004] The purpose of the present application is to provide a method for seamlessly filling a silicon oxide trench with a width of 20 to 100 nanometers and a depth of 40 to 60 nanometers. The preparation method can achieve seamless filling of the silicon oxide trench using silicon nitride.
[0005] The technical solution of this application is as follows:
[0006] A method for seamlessly filling a silicon oxide trench, characterized in that the steps of silicon oxide trench etching, silicon nitride deposition, and in-situ silicon nitride etching are completed using a same plasma enhanced chemical vapor deposition (PECVD) chamber using a radio frequency source, see Figure 1 , specifically including the following steps:
[0007] S1, growing silicon oxide on the surface of single crystal silicon;
[0008] S2, spin coating a photosensitive material on the surface of silicon oxide, and performing electron beam exposure according to the designed groove pattern; using the photosensitive material as a mask, forming a groove by RIE etching, wherein the size of the groove is 20 to 100 nanometers wide and 40 to 60 nanometers deep;
[0009] S3, using argon-diluted silane and nitrogen as reaction gases, a chemical reaction occurs under the excitation of radio frequency, and a 15-30 nanometer silicon nitride film is deposited on the surface of the groove;
[0010] S4, using carbon tetrafluoride as an etching gas, chemically reacting with the silicon nitride grown in step 3) under radio frequency excitation to form gaseous silicon tetrafluoride to achieve in-situ silicon nitride etching, with an etching thickness range of 10 to 20 nanometers. After the in-situ silicon nitride etching, the top of the groove presents a "V-shaped" opening;
[0011] S5 repeats steps S3 and S4 until the trench is completely filled.
[0012] Furthermore, in step 1), dry thermal oxidation is used to generate silicon oxide, and the thickness of the silicon oxide is greater than 60 nanometers.
[0013] Furthermore, in step 2), the gas used in the reactive ion etching (RIE) is SF6 or CHF3.
[0014] Furthermore, in step 3), argon-diluted (95%) silane and nitrogen are used to grow a silicon nitride film by PECVD, with a radio frequency power of 25-100W.
[0015] Furthermore, in step 4), the gas flow rate of carbon tetrafluoride used is 20-60 sccm, and the radio frequency power is 100-300W.
[0016] The present application uses the same PECVD chamber and utilizes a radio frequency source to perform in-situ deposition and etching of thin films, that is, silicon nitride is deposited and etched during the process of trench filling. The advantage of this process is that deposition and etching are performed simultaneously in situ, which can save time and cost, avoid the reduction of interface quality caused by the contact of the cavity with air, and is simple to operate. In addition, this process can solve the general shortcomings of PECVD step coverage ability and achieve seamless filling of small-sized trenches.
[0017] An embodiment of the present application also provides a chip, characterized in that the chip is obtained by processing through a chip manufacturing method, and the chip manufacturing method includes the aforementioned method of seamlessly filling silicon oxide grooves.
[0018] Advantages and positive effects of the present application: The present application provides a method for seamlessly filling a 20-100 nanometer wide and 40-60 nanometer deep silicon oxide trench using silicon nitride. The filling method has the advantages of being able to achieve seamless filling, simple process, low preparation temperature, and low raw material cost, and can be applied to semiconductor processes. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.
[0020] Figure 1 A schematic flow chart of a method for seamlessly filling a silicon oxide trench provided in an embodiment of the present application;
[0021] Figure 2 This is a schematic diagram of transmission electron microscopy (TEM) characterization of the groove after seamless filling using the first specific embodiment of the present application;
[0022] Figure 3 This is a schematic diagram of transmission electron microscopy (TEM) characterization of the groove after seamless filling using the second specific embodiment of the present application. DETAILED DESCRIPTION
[0023] The present application is further described below by way of examples. It should be noted that the purpose of publishing the examples is to help further understand the present application, but those skilled in the art can understand that various substitutions and modifications are possible without departing from the spirit of the present application and the appended claims. Therefore, the present application should not be limited to the contents disclosed in the examples, and the scope of protection claimed in the present application shall be subject to the scope defined in the claims.
[0024] The principle of plasma enhanced chemical vapor deposition (PECVD) adopted in this application is to pass gaseous reactants into the chamber, and under the excitation of radio frequency, the gaseous reactants become active plasma radicals, and chemical reactions occur on the surface of the sample to deposit thin films. Common combinations of PECVD reaction gases are silane (SiH4) + ammonia (NH3) + nitrogen (N2) and silane + nitrogen. The principle of reactive ion etching (RIE) is to pass etching gas (common ones are CF4, CHF3, SF6, NF3, BCl3, etc.), and produce fluorine ions, chloride ions, etc. under the excitation of radio frequency power supply, which react with the material on the surface of the sample to become gaseous products and are extracted, thereby achieving the etching effect. This application uses silicon nitride, and by adopting specific process parameters, it deposits and etches while in the process of trench filling to achieve seamless filling.
[0025] Embodiment 1
[0026] First, silicon oxide is grown on the surface of single crystal silicon; a photosensitive material (such as a photosensitive glue used in an etching process) is spin-coated on the silicon oxide surface, and electron beam exposure is performed according to the designed groove layout; the photosensitive material is used as a mask, and a groove is formed by RIE etching. The photosensitive material used can be RE650 electron beam photosensitive material, and SF6 is used as an etching gas. The etching power is 200W, and the size of the groove is a=70.2 nanometers wide and b=54.06 nanometers deep;
[0027] Then, through four cycles of deposition-etching, silicon nitride is used to achieve seamless filling of the silicon oxide trench.
[0028] The parameters for each round of silicon nitride deposition are:
[0029] Gas flow rate: Silane (5%): Nitrogen = 40: 100 sccm
[0030] Deposition power: 25W
[0031] Deposition pressure: 15Pa
[0032] Deposition temperature: 350°C
[0033] Deposition thickness: about 20nm
[0034] The parameters for each round of silicon nitride etching are:
[0035] Gas flow: SF6: 40sccm
[0036] Etching power: 150W
[0037] Etching pressure: 10Pa
[0038] Etching temperature: 350℃
[0039] Etching thickness: about 12nm
[0040] After each deposition-etching cycle, the surface deposition thickness is approximately c = 8.16nm, d = 9.05nm, e = 8.80nm, f = 21.8nm, and the top of the groove is a "V-shaped" opening, thereby preventing the generation of holes. Figure 2 As shown, the material filling effect is characterized by transmission electron microscopy (TEM), proving that the process achieves seamless filling. The filling method has the advantages of being able to achieve seamless filling, simple process, low preparation temperature, and low raw material cost.
[0041] Embodiment 2
[0042] First, silicon oxide is grown on the surface of single crystal silicon; a photosensitive material is spin-coated on the surface of silicon oxide, and electron beam exposure is performed according to the designed groove pattern; the photosensitive material is used as a mask, and grooves are formed by RIE etching. The photosensitive material used is RE650 electron beam photosensitive resin, and CHF3 is used as etching gas. The etching power is 200W, and the size of the groove is a = 60.9 nanometers wide and b = 52.3 nanometers deep;
[0043] Then, through 5 cycles of deposition-etching, silicon nitride is used to achieve seamless filling of the silicon oxide trench.
[0044] The parameters for each round of silicon nitride deposition are:
[0045] Gas flow rate: Silane (5%): Nitrogen = 40: 100 sccm
[0046] Deposition power: 50W
[0047] Deposition pressure: 25Pa
[0048] Deposition temperature: 300°C
[0049] Deposition thickness: about 20nm
[0050] The parameters for each round of silicon nitride etching are:
[0051] Gas flow rate: CHF3: 40sccm
[0052] Etching power: 150W
[0053] Etching pressure: 10Pa
[0054] Etching temperature: 300℃
[0055] Etching thickness: about 8nm
[0056] After each deposition-etching cycle, the surface deposition thickness is approximately c = 3.25 nm, d = 13.38 nm, e = 14.80 nm, f = 16.50 nm, g = 14.42 nm, and the top of the groove presents a "V-shaped" opening, such as Figure 3 As shown, the material filling effect was characterized by transmission electron microscopy (TEM), proving that the process achieved seamless filling.
[0057] Although the present application has been disclosed as above with preferred embodiments, it is not intended to limit the present application. Any technician familiar with the art can use the above disclosed methods and technical contents to make many possible changes and modifications to the technical solution of the present application without departing from the scope of the technical solution of the present application, or modify it into an equivalent embodiment of equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments based on the technical essence of the present application without departing from the content of the technical solution of the present application still falls within the scope of protection of the technical solution of the present application.
Claims
1. A method for seamlessly filling a silicon oxide trench, characterized in that: The same plasma enhanced chemical vapor deposition (PECVD) chamber is used to perform silicon oxide trench etching, silicon nitride deposition, and in-situ silicon nitride etching steps using a radio frequency source, specifically including the following steps: 1) Growing silicon oxide on the surface of single crystal silicon; 2) Spin-coating a photosensitive material on the surface of silicon oxide, and performing electron beam exposure according to the designed groove pattern; using the photosensitive material as a mask, etching through reactive ion etching (RIE) to form a groove, the size of the groove being 20 to 100 nanometers wide and 40 to 60 nanometers deep; 3) Using argon-diluted silane and nitrogen as reaction gases, a chemical reaction occurs under the excitation of radio frequency to deposit a 15-30 nanometer silicon nitride film on the surface of the groove; 4) using carbon tetrafluoride as an etching gas to chemically react with the silicon nitride grown in step 3) under radio frequency excitation to form gaseous silicon tetrafluoride to achieve in-situ silicon nitride etching, with an etching thickness ranging from 10 to 20 nanometers. After the in-situ silicon nitride etching, the top of the groove presents a V shape; 5) Repeat steps 3) and 4) until the trench is completely filled.
2. The method for seamlessly filling a silicon oxide trench according to claim 1, wherein: Step 1) Dry thermal oxidation is used to generate silicon oxide, and the thickness of the silicon oxide is greater than 60 nanometers.
3. The method for seamlessly filling a silicon oxide trench according to claim 1, characterized in that: Step 2) The gas used for RIE etching is SF6 or CHF3.
4. The method for seamlessly filling a silicon oxide trench according to claim 1, wherein: In step 3), the radio frequency power is 25 to 100 W.
5. The method for seamlessly filling a silicon oxide trench according to claim 1, wherein: Step 4) The gas flow rate of carbon tetrafluoride is 20-60 sccm.
6. The method for seamlessly filling a silicon oxide trench according to claim 1, wherein: In step 4), the radio frequency power is 100 to 300 W.
7. A chip, characterized in that: The chip is obtained by processing through a chip manufacturing method, and the chip manufacturing method includes the method for seamlessly filling silicon oxide grooves as described in any one of claims 1-6.