Interface circuit of inverter and inverter

Abstract

The invention relates to the technical field of inverters, in particular to an interface circuit of an inverter and the inverter. The interface circuit comprises a main control chip, a broken line detection unit, a voltage division unit and a signal amplification unit, the broken line detection unit is connected with the other end of a broken line switch unit, and the broken line detection unit is used for detecting the broken line state of the power grid dispatching equipment and pulling down the voltage of the input end of the signal amplification unit when the line is broken; the voltage division unit comprises a first voltage division module and a plurality of second voltage division modules with different resistance values, the plurality of second voltage division modules and the plurality of power regulation switch units are connected in series in a one-to-one correspondence manner and then are connected in parallel, a first parallel node is grounded, and a second parallel node is connected with one end of the first voltage division module and the input end of the signal amplification unit; the other end of the first voltage-dividing module is connected with an external power supply; and the main control chip is used for judging the voltage output by the signal amplification unit and controlling grid-connected power generation according to a judgment result. The system has the functions of power dispatching and disconnection detection of the power grid dispatching equipment at the same time.

Description

Technical Field

[0001] The present invention relates to the technical field of inverters, and in particular to an inverter interface circuit and an inverter. Background Art

[0002] With the rapid development of the power industry, the development of photovoltaic new energy is gradually becoming the mainstream of the market. As the core power generation equipment, the relevant technical quality requirements of inverters are also constantly improving. Countries are also constantly considering their requirements for inverter market access. Among them, the inverter access requirement standard AS / NZS 4777.2:2020 for the Australian market has been officially revised and released, requiring the inverter to add a grid-connected power dispatching interface, connected to DRED (Demand Response Enabling Device, grid dispatching equipment), and adjust and control the grid-connected power in real time. The control logic is set according to the mode specified in the standard content.

[0003] According to the standard requirements, it is necessary to add multiple external IO interfaces to the inverter, one of which is used to forcibly disconnect the power grid. The existing inverter has an additional IO interface, which meets the basic mandatory requirements, but cannot achieve power dispatching. Some inverters have added multiple IO interfaces, but cannot detect disconnection of the power grid dispatching equipment, and thus cannot disconnect the power grid when the power grid dispatching equipment is disconnected, which poses a safety hazard. Summary of the invention

[0004] The technical problem to be solved by the embodiments of the present invention is to provide an inverter interface circuit and an inverter to solve the problem in the prior art that the inverter cannot simultaneously have the functions of power dispatching and disconnection detection for power grid dispatching equipment.

[0005] The present invention discloses an interface circuit of an inverter, which is used for accessing an external power grid dispatching device. The power grid dispatching device comprises a disconnection identification resistor, a disconnection switch unit and a plurality of power regulating switch units. The disconnection identification resistor is connected in parallel with the disconnection switch unit. One end of the disconnection switch unit is grounded. The interface circuit of the inverter comprises a main control chip, a disconnection detection unit, a voltage dividing unit and a signal amplifying unit, wherein:

[0006] The disconnection detection unit is connected to the other end of the disconnection switch unit, and is used to detect the disconnection state of the power grid dispatching device and pull down the input voltage of the signal amplification unit when the line is disconnected;

[0007] The voltage dividing unit includes a first voltage dividing module and a plurality of second voltage dividing modules with different resistance values, wherein the plurality of second voltage dividing modules are connected in series with the plurality of power regulating switch units one by one and then connected in parallel, wherein the first parallel node is grounded, the second parallel node is connected to one end of the first voltage dividing module and the input end of the signal amplifying unit, and the other end of the first voltage dividing module is connected to an external power supply;

[0008] The analog input port of the main control chip is connected to the output end of the signal amplifying unit. The main control chip is used to judge the voltage output by the signal amplifying unit and control the grid-connected power generation or cut off the grid according to the judgment result.

[0009] Optionally, the line break detection unit includes a first switch tube, a second switch tube, a first voltage regulator tube, a second voltage regulator tube, a first pull-up module and a second pull-up module, the driving end of the first switch tube is connected to the negative electrode of the first voltage regulator tube, the first end of the first switch tube is connected to an external power supply, the second end of the first switch tube is connected to the positive electrode of the second voltage regulator tube and one end of the second pull-up module, the first end of the second switch tube is grounded, the second end of the second switch tube is connected to the input end of the signal amplification unit, the positive electrode of the first voltage regulator tube is connected to the negative electrode of the second voltage regulator tube and one end of the first pull-up module, the other end of the first pull-up module is connected to the external power supply, and the other end of the second pull-up module is connected to the driving end of the second switch tube.

[0010] Optionally, the line break detection unit also includes a first resistor and a second resistor, the first resistor is connected in series between the negative electrode of the first voltage regulator tube and the driving end of the first switching tube, and the second resistor is connected in series between the positive electrode of the first voltage regulator tube and the negative electrode of the second voltage regulator tube.

[0011] Optionally, the interface circuit of the inverter further includes a signal isolation unit, an input end of the signal isolation unit is connected to a connection node between the first voltage divider module and the second voltage divider module, and an output end of the signal isolation unit is connected to an input end of the signal amplification unit.

[0012] Optionally, the signal isolation unit includes a third resistor and an isolated linear optocoupler, the third resistor is connected in series between the connection node between the first voltage divider module and the second voltage divider module and the input end of the isolated linear optocoupler, and the output end of the isolated linear optocoupler is connected to the input end of the signal amplification unit.

[0013] Optionally, the signal amplification unit includes an operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor, the fourth resistor is connected in series between the positive pole of the output end of the isolated linear optocoupler and the non-phase input end of the operational amplifier, the fifth resistor is connected in series between the negative pole of the output end of the isolated linear optocoupler and the inverting input end of the operational amplifier, the sixth resistor is connected in series between the non-phase input end and the ground end of the operational amplifier, and the seventh resistor is connected in series between the output end and the inverting input end of the operational amplifier.

[0014] Optionally, the signal amplifying unit further includes a first capacitor and a second capacitor, the first capacitor is connected in parallel with the sixth resistor, and the second capacitor is connected in parallel with the seventh resistor.

[0015] Optionally, the first voltage-dividing module includes a first voltage-dividing resistor, the second voltage-dividing module includes a second voltage-dividing resistor, multiple second voltage-dividing resistors are connected in series and then in parallel with multiple power regulating switch units in a one-to-one correspondence, the first parallel node is grounded, the second parallel node is connected to one end of the first voltage-dividing resistor and the input end of the signal isolation unit, the other end of the first voltage-dividing resistor is connected to an external power supply, and the resistance values ​​of the multiple second voltage-dividing resistors are different.

[0016] Optionally, the first pull-up module includes a first pull-up resistor, one end of which is connected to an external power supply, and the other end is connected to one end of the disconnect switch unit, the positive electrode of the first voltage regulator tube, and the negative electrode of the second voltage regulator tube; the second pull-up module includes a second pull-up resistor, one end of which is connected to the positive electrode of the second voltage regulator tube and the second end of the first switch tube, and the other end is connected to the driving end of the second switch tube.

[0017] The present invention also discloses an inverter, comprising the interface circuit of the inverter as described above.

[0018] Compared with the prior art, the interface circuit of the inverter and the beneficial effect of the inverter provided by the embodiment of the present invention are: the interface circuit of the inverter is used to access the external power grid dispatching equipment, by setting the main control chip, the line break detection unit, the voltage dividing unit and the signal amplification unit, the voltage dividing unit includes a first voltage dividing module and a plurality of second voltage dividing modules with different resistance values, the plurality of second voltage dividing modules are connected in series with the plurality of power regulating switch units one by one and then connected in parallel, when a certain power regulating switch unit is operated and turned on, the corresponding second voltage dividing module in series is connected to the first voltage dividing module, and the voltage obtained by voltage division with the first voltage dividing module is After being amplified by the signal amplification unit, it is transmitted to the main control chip. The main control chip judges the voltage and controls the output of the corresponding grid-connected power generation power, and has a power scheduling function; and the line break detection unit is connected to the other end of the line break switch unit, which can detect the line break state of the external power grid scheduling equipment and lower the input voltage of the signal amplification unit when the line is broken. The voltage is amplified by the signal amplification unit and then transmitted to the main control chip. The main control chip controls the disconnection of the power grid based on the voltage input by the analog input port. Therefore, the present application can enable the inverter to have the functions of power scheduling and line break detection of the power grid scheduling equipment at the same time. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] The technical solution of the present invention will be further described in detail below with reference to the accompanying drawings and embodiments, in which:

[0020] Figure 1 is a structural block diagram of an interface circuit of an inverter provided by an embodiment of the present invention;

[0021] Figure 2 It is a circuit schematic diagram of an interface circuit of an inverter provided by an embodiment of the present invention.

[0022] The reference numerals in the figures are:

[0023] 100. Power grid dispatching equipment; 110. Line break identification resistor; 120. Line break switch unit; 130. Power regulation switch unit;

[0024] 200. Interface circuit of inverter;

[0025] 210 (U1), main control chip; 220, disconnection detection unit; 221, first pull-up module; 222, second pull-up module; 230, voltage divider unit; 231, first voltage divider module; 232, second voltage divider module; 240, signal amplification unit; 250, signal isolation unit;

[0026] Q1, first switch tube; Q2, second switch tube; ZD1, first voltage regulator tube; ZD2, second voltage regulator tube; R1, first pull-up resistor; R2, second pull-up resistor; R3, first resistor; R4, second resistor; R5, third resistor; U2, isolated linear optocoupler; U3, operational amplifier; R6, fourth resistor; R7, fifth resistor; R8, sixth resistor; R9, seventh resistor; C1, first capacitor; C2, second capacitor; R10, first voltage divider resistor. DETAILED DESCRIPTION

[0027] It should be noted that, in the absence of conflict, the embodiments and features in the embodiments of the present application can be combined with each other. Now, in conjunction with the accompanying drawings, the preferred embodiments of the present invention are described in detail.

[0028] The embodiment of the present invention provides an inverter interface circuit 200 for accessing an external power grid dispatching device 100, referring to Figure 1 The power grid dispatching device 100 includes a disconnection identification resistor 110, a disconnection switch unit 120 and a plurality of power regulating switch units 130. The disconnection identification resistor 110 is connected in parallel with the disconnection switch unit 120, and one end of the disconnection switch unit 120 is grounded.

[0029] The disconnection identification resistor 110 is a resistor built into the power grid dispatching device 100 for identifying whether the power grid dispatching device 100 is disconnected. When the disconnection identification resistor 110 is abnormal, such as exceeding a preset value or being damaged, the power grid dispatching device 100 can perform corresponding abnormal control operations. The identification and control process is a conventional technology and will not be described in detail here. The user can operate the power dispatching switch unit of the power grid dispatching device 100 to adjust the grid-connected power of the inverter. The disconnection switch unit 120 is operated and turned on, indicating that the user has the need to disconnect the power grid. The number of power regulating switch units 130 can be two or more. For example, the power grid dispatching device 100 is provided with four power regulating switch units 130, such as Figure 2 K1-K4 shown.

[0030] refer to Figure 1 and Figure 2 In the embodiment of the present application, the interface circuit 200 of the inverter includes a main control chip 210 (U1), a disconnection detection unit 220, a voltage dividing unit 230 and a signal amplifying unit 240.

[0031] The disconnection detection unit 220 is connected to the other end of the disconnection switch unit 120 . The disconnection detection unit 220 is used to detect the disconnection state of the power grid dispatching device 100 and pull down the input voltage of the signal amplification unit 240 when the line is disconnected.

[0032] The voltage divider unit 230 includes a first voltage divider module 231 and a plurality of second voltage divider modules 232 with different resistance values. The plurality of second voltage divider modules 232 are connected in series and then in parallel with the plurality of power regulating switch units 130 one by one. The first parallel node thereof is grounded, the second parallel node thereof is connected to one end of the first voltage divider module 231 and the input end of the signal amplifying unit 240, and the other end of the first voltage divider module 231 is connected to an external power supply.

[0033] The analog input port of the main control chip 210 (U1) is connected to the output end of the signal amplifying unit 240. The main control chip 210 (U1) is used to judge the voltage output by the signal amplifying unit 240 and control the grid-connected power generation or cut off the grid according to the judgment result.

[0034] The interface circuit 200 of the inverter of the embodiment of the present application is provided with a main control chip 210 (U1), a disconnection detection unit 220, a voltage dividing unit 230 and a signal amplifying unit 240. The voltage dividing unit 230 includes a first voltage dividing module 231 and a plurality of second voltage dividing modules 232 with different resistance values. The plurality of second voltage dividing modules 232 are connected in series with the plurality of power regulating switch units 130 in a one-to-one correspondence and then connected in parallel. When a certain power regulating switch unit 130 is operated and turned on, the corresponding second voltage dividing module 232 in series is connected to the first voltage dividing module 231, and the voltage obtained by voltage division with the first voltage dividing module 231 is amplified by the signal amplifying unit 240 and then transmitted to the main control chip 210 (U1). 1), the main control chip 210 (U1) judges the voltage and controls the output of the corresponding grid-connected power generation, and has a power scheduling function; and the disconnection detection unit 220 is connected to the other end of the disconnection switch unit 120, which can detect the disconnection state of the external power grid scheduling equipment 100 and pull down the input voltage of the signal amplification unit 240 when the disconnection is detected. The voltage is amplified by the signal amplification unit 240 and transmitted to the main control chip 210 (U1). The main control chip 210 (U1) cuts off the power grid based on the voltage input by the analog input port. Therefore, the present application can enable the inverter to have the functions of power scheduling and disconnection detection of the power grid scheduling equipment 100 at the same time.

[0035] The main control chip 210 (U1) in the present application only needs one analog input port to realize power dispatching, and can perform disconnection detection and forced disconnection of the power grid dispatching device 100, thereby saving the analog input port resources of the main control chip 210 (U1).

[0036] Among them, the main control chip 210 (U1) is preset with multiple different voltage values. The main control chip 210 (U1) judges the voltage output by the signal amplification unit 240, and performs corresponding grid-connected power generation control according to the corresponding voltage value. For example, when the power grid is cut off, the corresponding grid-connected power generation power of different levels is output.

[0037] refer to Figure 1 and Figure 2 In an optional embodiment of the present application, the line break detection unit 220 includes a first switch tube Q1, a second switch tube Q2, a first voltage regulator tube ZD1, a second voltage regulator tube ZD2, a first pull-up module 221 and a second pull-up module 222, the driving end of the first switch tube Q1 is connected to the negative electrode of the first voltage regulator tube ZD1, the first end of the first switch tube Q1 is connected to the external power supply, the second end of the first switch tube Q1 is connected to the positive electrode of the second voltage regulator tube ZD2 and one end of the second pull-up module 222, the first end of the second switch tube Q2 is grounded, the second end of the second switch tube Q2 is connected to the input end of the signal amplification unit 240, the positive electrode of the first voltage regulator tube ZD1 is connected to the negative electrode of the second voltage regulator tube ZD2 and one end of the first pull-up module 221, the other end of the first pull-up module 221 is connected to the external power supply, and the other end of the second pull-up module 222 is connected to the driving end of the second switch tube Q2.

[0038] By setting the first switch tube Q1, the second switch tube Q2, the first voltage regulator tube ZD1, the second voltage regulator tube ZD2, the first pull-up module 221 and the second pull-up module 222, when the power grid dispatching device 100 is disconnected or the resistance of the disconnection identification resistor 110 is greater than the preset value, Figure 2 The voltage at the REF_GEN point will be pulled up through the first pull-up module 221 and the external power supply. If the voltage at the REF_GEN point exceeds the sum of the breakdown voltage of the second voltage regulator tube ZD2 and the junction voltage of the second switch tube Q2, the second switch tube Q2 will be turned on, and the input voltage of the signal amplification unit 240 will be pulled down to zero volts, and the main control chip 210 (U1) will control the inverter to disconnect from the power grid.

[0039] When the disconnection switch unit 120 is operated and turned on, the voltage at the REF_GEN point in the figure is pulled to zero volts, which is less than the sum of the breakdown voltage of the first voltage regulator tube ZD1 and the junction voltage of the first switch tube Q1, and the first switch tube Q1 is turned on, and then the second pull-up module 222 pulls up the driving end of the second switch tube Q2, so that the second switch tube Q2 is also turned on, and the input voltage of the signal amplification unit 240 is pulled down to zero volts, and the main control chip 210 (U1) controls the inverter to disconnect from the power grid.

[0040] When the grid dispatching device 100 is not connected, Figure 2 The voltage at the REF_GEN point will be pulled up through the first pull-up module 221 and the external power supply. If the voltage at the REF_GEN point exceeds the sum of the breakdown voltage of the second voltage regulator tube ZD2 and the junction voltage of the second switch tube Q2, the second switch tube Q2 will be turned on, and the input voltage of the signal amplification unit 240 will be pulled down to zero volts, and the main control chip 210 (U1) will control the inverter to disconnect from the power grid.

[0041] When the resistance of the disconnection identification resistor 110 is normal and the disconnection switch unit 120 is in the disconnected state, the voltage at the REF_GEN point does not exceed the sum of the breakdown voltage of the second voltage regulator tube ZD2 and the junction voltage of the second switch tube Q2, the first switch tube Q1 and the second switch tube Q2 are both in the cut-off state, the input voltage of the signal amplifying unit 240 will not be pulled down, and the main control chip 210 (U1) will not cut off the control of the power grid.

[0042] The present application implements disconnection detection of the power grid dispatching device 100 with a relatively simple circuit structure, which is beneficial to reducing the volume occupied by the circuit, miniaturizing the inverter, and reducing the cost.

[0043] Optionally, the first switch tube Q1 adopts an NPN transistor, the base of the NPN transistor serves as the driving end of the first switch tube Q1, the emitter serves as the first end of the first switch tube Q1, and the collector serves as the second end of the first switch tube Q1. Alternatively, the first switch tube Q1 adopts a PMOS tube, the gate of the PMOS tube serves as the driving end of the first switch tube Q1, the source serves as the first end of the first switch tube Q1, and the drain serves as the second end of the first switch tube Q1.

[0044] The second switch tube Q2 adopts an NPN transistor, the base of the NPN transistor serves as the driving end of the second switch tube Q2, the emitter serves as the first end of the second switch tube Q2, and the collector serves as the second end of the second switch tube Q2. Alternatively, the second switch tube Q2 adopts an NMOS tube, the gate of the NMOS tube serves as the driving end of the second switch tube Q2, the source serves as the first end of the second switch tube Q2, and the drain serves as the second end of the second switch tube Q2.

[0045] Optionally, the first pull-up module 221 includes a first pull-up resistor R1, one end of which is connected to an external power supply, and the other end is connected to one end of the disconnection switch unit 120, the positive electrode of the first voltage regulator tube ZD1, and the negative electrode of the second voltage regulator tube ZD2. The second pull-up module 222 includes a second pull-up resistor R2, one end of which is connected to the positive electrode of the second voltage regulator tube ZD2 and the second end of the first switch tube Q1, and the other end is connected to the driving end of the second switch tube Q2.

[0046] When the disconnection switch unit 120 is disconnected or the resistance of the disconnection identification resistor 110 is greater than the preset value, the first pull-up resistor R1 and the external power supply can pull up the voltage at the REF_GEN point, thereby turning on the second switch tube Q2. When the first switch tube Q1 is turned on, the second pull-up resistor R2 can pull up the driving terminal voltage of the second switch tube Q2, turn on the second switch tube Q2, and then pull down the input terminal voltage of the signal amplification unit 240. The first pull-up resistor R1 is used as the first pull-up module 221, and the second pull-up resistor R2 is used as the second pull-up module 222, so that the circuit structure is simple, the circuit is simplified, and the cost is low.

[0047] In other embodiments, the first pull-up module 221 and the second pull-up module 222 may both use two or more resistors connected in series or in parallel to achieve voltage pull-up.

[0048] refer to Figure 1 and Figure 2 In an optional embodiment of the present application, the line break detection unit 220 also includes a first resistor R3 and a second resistor R4, the first resistor R3 is connected in series between the negative electrode of the first voltage regulator tube ZD1 and the driving end of the first switch tube Q1, and the second resistor R4 is connected in series between the positive electrode of the first voltage regulator tube ZD1 and the negative electrode of the second voltage regulator tube ZD2.

[0049] The first resistor R3 has a current limiting function to prevent excessive current from damaging the first switch tube Q1 and ensure stable operation of the circuit. The second resistor R4 also has a current limiting function to prevent excessive current from damaging the second switch tube Q2 and ensure stable operation of the circuit.

[0050] refer to Figure 1 and Figure 2 In an optional embodiment of the present application, the interface circuit 200 of the inverter also includes a signal isolation unit 250, the input end of the signal isolation unit 250 is connected to the connection node between the first voltage divider module 231 and the second voltage divider module 232, and the output end is connected to the input end of the signal amplification unit 240.

[0051] By providing the signal isolation unit 250, electrical isolation can be provided to isolate external signals from the internal power supply of the inverter, isolate the interference of external signals on the internal circuit of the inverter, and improve the stability and reliability of the circuit operation.

[0052] Optionally, the signal isolation unit 250 includes a third resistor R5 and an isolation linear optocoupler U2, the third resistor R5 is connected in series between the connection node between the first voltage divider module 231 and the second voltage divider module 232 and the input end of the isolation linear optocoupler U2, and the output end of the isolation linear optocoupler U2 is connected to the input end of the signal amplification unit 240.

[0053] The isolated linear optocoupler U2 is an electronic component used to isolate the signal transmission between two circuits. It is usually composed of a light emitting diode and a photosensitive diode, and the signal is transmitted between the two through an optical path. When the electrical signal at the input end acts on the light emitting diode, the light emitting diode will emit a light signal, which will be received by the photosensitive diode and converted into an electrical signal and output to another circuit. The isolated linear optocoupler U2 specifically adopts an isolated linear optocoupler U2 with 1:1 transmission.

[0054] The third resistor R5 can play a role in current limiting to prevent excessive current from damaging the isolation linear optocoupler U2.

[0055] By providing the third resistor R5 and the isolation linear optocoupler U2, the external signal and the internal power supply can be isolated with a relatively simple circuit structure, and the volume occupied by the circuit can be reduced, which is conducive to the miniaturization of the inverter.

[0056] refer to Figure 1 and Figure 2 In an optional embodiment of the present application, the signal amplification unit 240 includes an operational amplifier U3, a fourth resistor R6, a fifth resistor R7, a sixth resistor R8 and a seventh resistor R9, the fourth resistor R6 is connected in series between the positive electrode of the output end of the isolation linear optocoupler U2 and the non-inverting input end of the operational amplifier U3, the fifth resistor R7 is connected in series between the negative electrode of the output end of the isolation linear optocoupler U2 and the inverting input end of the operational amplifier U3, the sixth resistor R8 is connected in series between the non-inverting input end and the ground end of the operational amplifier U3, and the seventh resistor R9 is connected in series between the output end and the inverting input end of the operational amplifier U3.

[0057] By setting the operational amplifier U3, the fourth resistor R6, the fifth resistor R7, the sixth resistor R8 and the seventh resistor R9, a differential operational amplifier circuit is formed, which can amplify the differential part of the input signal, that is, the difference between the two input signals, and suppress the common mode part, that is, the common part of the two input signals, which helps to improve the anti-interference ability of the signal.

[0058] Optionally, the signal amplifying unit 240 further includes a first capacitor C1 and a second capacitor C2, the first capacitor C1 is connected in parallel with the sixth resistor R8, and the second capacitor C2 is connected in parallel with the seventh resistor R9.

[0059] By arranging the first capacitor C1 and the sixth resistor R8 in parallel, and the second capacitor C2 and the seventh resistor R9 in parallel, the bandwidth and the attenuation factor of the input signal can be improved.

[0060] refer to Figure 1 and Figure 2 In an optional embodiment of the present application, the first voltage-dividing module 231 includes a first voltage-dividing resistor R10, the second voltage-dividing module 232 includes a second voltage-dividing resistor, and multiple second voltage-dividing resistors are connected in series and then in parallel with multiple power regulating switch units 130 in a one-to-one correspondence. The first parallel node is grounded, and the second parallel node is connected to one end of the first voltage-dividing resistor R10 and the input end of the signal isolation unit 250. The other end of the first voltage-dividing resistor R10 is connected to an external power supply, and the resistance values ​​of the multiple second voltage-dividing resistors are different.

[0061] The first voltage-dividing resistor R10 is used as the first voltage-dividing module 231, and the second voltage-dividing resistor is used as the second voltage-dividing module 232. When a certain power regulating switch unit 130 is closed, the corresponding second voltage-dividing resistor connected in series will be connected in series with the first voltage-dividing resistor R10, and the series node is connected to the input end of the signal isolation unit 250. Since the resistance value of the second voltage-dividing resistor connected in series with each power regulating unit is different, when the user performs power scheduling, each time one of the power regulating units is switched on, the corresponding voltage point input to the input end of the signal isolation unit 250 is different. The main control chip 210 (U1) can control the output of the corresponding grid-connected power according to different voltage points to achieve power scheduling. For example, four power regulating units are set, such as Figure 2 K1-K4 shown in the figure correspond to four second voltage-dividing resistors R111, R112, R113, and R114; the disconnection switch unit 120 is as follows Figure 2 When K0 is closed, the input voltage of the signal isolation unit 250 input terminal is 0; when K1 is closed, the input voltage of the signal isolation unit 250 input terminal is Defined as V1; when K2 is closed, the input voltage of the signal isolation unit 250 is Defined as V2; when K3 is closed, the input voltage of the input terminal of the signal isolation unit 250 is Defined as V3; when K4 is closed, the input voltage of the input terminal of the signal isolation unit 250 is Defined as V4. The control logic of the main control chip 210 (U1) corresponding to these four voltage points can be: when the input voltage is 0, the inverter is controlled to disconnect from the grid; when the input voltage is V1, the inverter is controlled not to output power; when the input voltage is V2, the grid-connected power output of the inverter is controlled not to exceed 25%; when the input voltage is V3, the grid-connected power output of the inverter is controlled not to exceed 75%; when the input voltage is V4, the inverter is controlled to output the maximum grid-connected power.

[0062] The first voltage-dividing resistor R10 is used as the first voltage-dividing module 231, and the second voltage-dividing resistor is used as the second voltage-dividing module 232. The circuit structure of the entire voltage-dividing unit 230 is relatively simple and the cost is low. In other embodiments, the first voltage-dividing module 231 and the second voltage-dividing module 232 can also be composed of multiple resistors connected in series or in parallel.

[0063] The embodiment of the present application further provides an inverter, which includes the inverter interface circuit 200 as described above.

[0064] The interface circuit in the inverter of the embodiment of the present application is provided with a main control chip 210 (U1), a disconnection detection unit 220, a voltage dividing unit 230 and a signal amplifying unit 240. The voltage dividing unit 230 includes a first voltage dividing module 231 and a plurality of second voltage dividing modules 232 with different resistance values. The plurality of second voltage dividing modules 232 are connected in series with the plurality of power regulating switch units 130 in a one-to-one correspondence and then connected in parallel. When a certain power regulating switch unit 130 is operated and turned on, the corresponding second voltage dividing module 232 connected in series is connected to the first voltage dividing module 231, and the voltage obtained by voltage division with the first voltage dividing module 231 is amplified by the signal amplifying unit 240 and then transmitted to the main control chip 210 (U1). , the main control chip 210 (U1) judges the voltage and controls the output of the corresponding grid-connected power generation, and has a power scheduling function; and the disconnection detection unit 220 is connected to the other end of the disconnection switch unit 120, which can detect the disconnection state of the external power grid scheduling equipment 100 and pull down the input voltage of the signal amplification unit 240 when the disconnection is detected. The voltage is amplified by the signal amplification unit 240 and transmitted to the main control chip 210 (U1). The main control chip 210 (U1) cuts off the power grid based on the voltage input by the analog input port. Therefore, the present application can enable the inverter to have the functions of power scheduling and disconnection detection of the power grid scheduling equipment 100 at the same time.

[0065] It should be understood that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. For those skilled in the art, the technical solutions described in the above embodiments can be modified, or some of the technical features therein can be replaced by equivalents; and all these modifications and replacements should fall within the scope of protection of the claims attached to the present invention.

Claims

1. An interface circuit of an inverter, characterized in that: Used to access external power grid dispatching equipment, the power grid dispatching equipment includes a disconnection identification resistor, a disconnection switch unit and a plurality of power regulating switch units, the disconnection identification resistor is connected in parallel with the disconnection switch unit, one end of the disconnection switch unit is grounded, the interface circuit of the inverter includes a main control chip, a disconnection detection unit, a voltage dividing unit and a signal amplification unit, wherein, The disconnection detection unit is connected to the other end of the disconnection switch unit, and is used to detect the disconnection state of the power grid dispatching device and pull down the input terminal voltage of the signal amplification unit when the line is disconnected; The voltage dividing unit includes a first voltage dividing module and a plurality of second voltage dividing modules with different resistance values, wherein the plurality of second voltage dividing modules are connected in series with the plurality of power regulating switch units one by one and then connected in parallel, wherein the first parallel node is grounded, the second parallel node is connected to one end of the first voltage dividing module and the input end of the signal amplifying unit, and the other end of the first voltage dividing module is connected to an external power supply; The analog input port of the main control chip is connected to the output end of the signal amplifying unit. The main control chip is used to judge the voltage output by the signal amplifying unit and control the grid-connected power generation or cut off the grid according to the judgment result.

2. The interface circuit of the inverter according to claim 1, characterized in that: The line break detection unit includes a first switch tube, a second switch tube, a first voltage regulator tube, a second voltage regulator tube, a first pull-up module and a second pull-up module, the driving end of the first switch tube is connected to the negative electrode of the first voltage regulator tube, the first end of the first switch tube is connected to an external power supply, the second end of the first switch tube is connected to the positive electrode of the second voltage regulator tube and one end of the second pull-up module, the first end of the second switch tube is grounded, the second end of the second switch tube is connected to the input end of the signal amplification unit, the positive electrode of the first voltage regulator tube is connected to the negative electrode of the second voltage regulator tube and one end of the first pull-up module, the other end of the first pull-up module is connected to the external power supply, and the other end of the second pull-up module is connected to the driving end of the second switch tube.

3. The interface circuit of the inverter according to claim 2, characterized in that: The disconnection detection unit also includes a first resistor and a second resistor, wherein the first resistor is connected in series between the cathode of the first voltage regulator tube and the driving end of the first switch tube, and the second resistor is connected in series between the anode of the first voltage regulator tube and the cathode of the second voltage regulator tube.

4. The interface circuit of the inverter according to any one of claims 1 to 3, characterized in that: The interface circuit of the inverter further includes a signal isolation unit, an input end of the signal isolation unit is connected to a connection node between the first voltage dividing module and the second voltage dividing module, and an output end of the signal isolation unit is connected to an input end of the signal amplification unit.

5. The interface circuit of the inverter according to claim 4, characterized in that: The signal isolation unit includes a third resistor and an isolated linear optocoupler. The third resistor is connected in series between the connection node between the first voltage divider module and the second voltage divider module and the input end of the isolated linear optocoupler. The output end of the isolated linear optocoupler is connected to the input end of the signal amplification unit.

6. The interface circuit of the inverter according to claim 5, characterized in that: The signal amplification unit includes an operational amplifier, a fourth resistor, a fifth resistor, a sixth resistor and a seventh resistor. The fourth resistor is connected in series between the positive electrode of the output end of the isolated linear optocoupler and the non-inverting input end of the operational amplifier, the fifth resistor is connected in series between the negative electrode of the output end of the isolated linear optocoupler and the inverting input end of the operational amplifier, the sixth resistor is connected in series between the non-inverting input end and the ground end of the operational amplifier, and the seventh resistor is connected in series between the output end and the inverting input end of the operational amplifier.

7. The interface circuit of the inverter according to claim 6, characterized in that: The signal amplifying unit further includes a first capacitor and a second capacitor, the first capacitor is connected in parallel with the sixth resistor, and the second capacitor is connected in parallel with the seventh resistor.

8. The interface circuit of the inverter according to claim 4, characterized in that: The first voltage-dividing module includes a first voltage-dividing resistor, and the second voltage-dividing module includes a second voltage-dividing resistor. Multiple second voltage-dividing resistors are connected in series and then in parallel with multiple power regulating switch units in a one-to-one correspondence. The first parallel node is grounded, and the second parallel node is connected to one end of the first voltage-dividing resistor and the input end of the signal isolation unit. The other end of the first voltage-dividing resistor is connected to an external power supply, and the resistance values ​​of the multiple second voltage-dividing resistors are different.

9. The interface circuit of the inverter according to claim 2, characterized in that: The first pull-up module includes a first pull-up resistor, one end of which is connected to an external power supply, and the other end is connected to one end of the disconnection switch unit, the positive electrode of the first voltage regulator tube, and the negative electrode of the second voltage regulator tube. The second pull-up module includes a second pull-up resistor, one end of which is connected to the positive electrode of the second voltage regulator tube and the second end of the first switch tube, and the other end is connected to the driving end of the second switch tube.

10. An inverter, characterized in that: An interface circuit comprising the inverter as claimed in any one of claims 1 to 9.

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