LED chip connecting structure and lamp bead
By introducing a jumper piece and a second chip into the LED chip connection structure and connecting it in parallel with the first chip to form a mixed structure, the problem of low space utilization in the light emitting region in the prior art is solved, and the purpose of improving light efficiency is achieved.
Patent Information
- Application Number
- CN202411870516.1
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-12-17
- Publication Date
- 2025-03-18
AI Technical Summary
When the existing LED chip connection structure improves the luminous efficiency, it is difficult to make full use of the luminous area, resulting in waste of space and low light efficiency.
By introducing a jumper piece and a second chip into the LED chip connection structure and connecting it in parallel with the first chip, a mixing structure is formed, and a second chip is added to improve the space utilization of the light emitting region.
While ensuring that the original design voltage remains unchanged, the space utilization of the light emitting area is improved, thereby improving the light efficiency of LED products.
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Figure CN119653954A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of LED products, and in particular to an LED chip connection structure and lamp beads. Background Art
[0002] Luminous efficiency, referred to as light efficiency, is the ratio of the luminous flux emitted by a light source to the power consumed. It is the most important technical parameter for evaluating the power efficiency of a light source. One of the means to improve light efficiency is to increase the number of chips and reduce the current passing through a single chip to improve light efficiency. The conventional way to increase chips is to connect a group of chips in series in parallel by reducing the spacing between chips. However, due to the limitation of the size of the light-emitting surface area and the limitation of the chip arrangement method (i.e., the need to ensure that the design voltage remains unchanged), it is not enough to connect a group of chips in series in parallel by reducing the chip spacing, resulting in the inability to fully utilize the light-emitting surface area, which will cause a waste of space. Summary of the invention
[0003] In view of this, the present application provides an LED chip connection structure and lamp beads, which can improve the space utilization rate of the light-emitting area and achieve the purpose of improving the lighting effect.
[0004] In order to achieve the above objectives, this application provides the following technical solutions:
[0005] An LED chip connection structure, comprising:
[0006] a substrate having a light emitting region;
[0007] A plurality of chip groups are connected in parallel and arranged in the light-emitting area; each of the chip groups has a plurality of first chips connected in series in sequence;
[0008] At least one of the chipsets has a jumper and a second chip, the second chip is connected in parallel with the first chip, and the second chip and the first chip are electrically connected via the jumper.
[0009] Optionally, the first chip located at the end of the chipset is connected in parallel with the second chip, the first end of the first chip and the first end of the second chip are electrically connected through the jumper, and the second end of the first chip and the second end of the second chip are electrically connected to the same conductive electrode on the substrate.
[0010] Optionally, two adjacent chips in the plurality of chipsets both have the second chip, and the second chip in one of the chipsets is far away from the second chip in another of the chipsets.
[0011] Optionally, the multiple chipsets include a first chipset, a second chipset, a third chipset, a fourth chipset and a fifth chipset arranged in sequence, the first chipset, the second chipset, the fourth chipset and the fifth chipset all have the second chip, the second chip in the first chipset is far away from the second chip in the second chipset, the second chip in the fourth chipset is far away from the second chip in the fifth chipset, and the second chip in the second chipset is far away from the second chip in the fourth chipset.
[0012] Optionally, the second chips are distributed centrally and symmetrically with respect to the light emitting area, and / or the first chip connected in parallel with the second chip is distributed centrally and symmetrically with respect to the light emitting area.
[0013] Optionally, in the same chipset, n second chips are sequentially connected in series and connected in parallel with the n first chips sequentially connected in series; n is an integer greater than or equal to 2.
[0014] Optionally, each of the chipsets has the second chip, and the number of the second chips in different chipsets is the same.
[0015] Optionally, the jumper component is configured as a jumper chip, and the first chip and the second chip are electrically connected to solder joints of the jumper chip via leads, so that the first chip and the second chip are electrically connected.
[0016] Optionally, the jumper chip has a first solder point, a second solder point, a third solder point and a fourth solder point, the first solder point and the third solder point are electrically connected to the inside of the jumper chip, the second solder point and the fourth solder point are electrically connected to the inside of the jumper chip, and the third solder point is electrically connected to the fourth solder point through a lead; the second chip is electrically connected to the first solder point through a lead, and two adjacent first chips in the chipset are electrically connected to any two of the second solder point, the third solder point and the fourth solder point through a lead.
[0017] A lamp bead comprises the LED chip connection structure as described in any one of the above items.
[0018] The LED chip connection structure and lamp beads provided by the present application include a second chip and a jumper in at least one chipset among a plurality of chipsets, and the second chip is connected in parallel with the first chip. When the second chip is connected in parallel with the first chip, the end of the second chip and the end of the first chip are electrically connected to the jumper through a lead, so that the end of the second chip is electrically connected to the end of the first chip, and the jumper is arranged in the light-emitting area on the substrate to provide a connection position for the lead to facilitate the parallel connection of the first chip and the second chip. In this way, by adding a jumper in the chipset, the first chip and the second chip in the chipset can be connected to form a mixed structure, and while ensuring that the original design voltage remains unchanged, a second chip can be added in the light-emitting area, and the chips can be more fully distributed in the light-emitting area, thereby improving the space utilization of the light-emitting area and achieving the purpose of improving the light efficiency. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.
[0020] Figure 1 Schematic diagram of LED chip connection structure shown in some embodiments;
[0021] Figure 2 A circuit connection diagram of multiple chipsets shown for some embodiments;
[0022] Figure 3 for Figure 1 An enlarged diagram of the connection between the first chip and the second chip;
[0023] Figure 4 It is a schematic diagram of chip connection in the prior art;
[0024] Figure 5 This is a circuit diagram of chip connection in the prior art.
[0025] In the figure: 1, substrate; 2, first chip; 3, second chip; 4, jumper chip; 11, positive electrode; 12, negative electrode; 10, first chip group; 20, second chip group; 30, third chip group; 40, fourth chip group; 50, fifth chip group. DETAILED DESCRIPTION
[0026] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0027] like Figure 1-Figure 3 As shown, the embodiment of the present application provides an LED chip connection structure, including a substrate 1 and a light-emitting chip arranged on the substrate 1, a light-emitting area and a conductive electrode are arranged on the substrate 1, and the light-emitting area is used to install and fix the light-emitting chip, for example, a plurality of light-emitting chips are arranged and arranged in the light-emitting area. The conductive electrode has a positive electrode 11 and a negative electrode 12, which are used to supply power to the light-emitting chip in the light-emitting area, for example, the positive electrode 11 and the negative electrode 12 are respectively located at the edges of the light-emitting area.
[0028] The light-emitting chip in the light-emitting area is composed of a plurality of chip groups, and the plurality of chip groups are arranged in the light-emitting area for emitting light in the light-emitting area. For example, the number of chip groups can be set to four, five or six, depending on the space of the light-emitting area on the substrate 1 and the design voltage. Each chip group includes a plurality of first chips 2 connected in series in sequence, and both ends of each chip group are electrically connected to the positive electrode 11 and the negative electrode 12, respectively, so that the plurality of chip groups are arranged in parallel. Specifically, the number of first chips 2 in each chip group is consistent, so that the voltage of each chip is consistent.
[0029] Among the above-mentioned multiple chipsets, at least one chipset includes a second chip 3 and a jumper, and the second chip 3 is connected in parallel with the first chip 2, for example, the second chip 3 is connected in parallel with any one of the first chips 2 in the chipset. When the second chip 3 is connected in parallel with the first chip 2, the end of the second chip 3 and the end of the first chip 2 are both electrically connected to the jumper through leads, so that the end of the second chip 3 is electrically connected to the end of the first chip 2, and the jumper is arranged in the light-emitting area on the substrate 1, and is used to provide a connection position for the leads, so as to facilitate the parallel connection of the first chip 2 and the second chip 3.
[0030] like Figure 4 and Figure 5 As shown, only a plurality of first chips 2 are arranged in the light-emitting area on the substrate 1, and the space utilization rate of the light-emitting area is 43.11%. In this solution, the light-emitting area on the substrate 1 is provided with a first chip 2 and a second chip 3, and the second chip 3 is connected in parallel to the first chip 2 to form a mixed circuit structure, so that the space utilization rate of the light-emitting area is increased to 46.25%, which is 3.14% higher than that of the prior art.
[0031] In this way, by adding a jumper component in the chipset, the first chip 2 and the second chip 3 in the chipset can be connected to form a mixed structure. While ensuring that the original design voltage remains unchanged, the second chip 3 can be added to the light-emitting area, and the chips can be distributed to a greater extent in the light-emitting area, thereby improving the space utilization of the light-emitting area and achieving the purpose of improving the lighting effect.
[0032] It should be noted that the electrode area on the light-emitting chip is small, and generally only one lead can be welded, that is, the electrode area of the light-emitting chip is small and two leads cannot be led out at the same time. In the above-mentioned chip set, after the electrode area of one first chip 2 is connected to another first chip 2 through a lead, it cannot be connected to the second chip 3 again through a lead. In this solution, by setting a jumper, the lead on the light-emitting chip can be connected to the jumper, and the series and parallel connection of multiple leads can be realized through the jumper.
[0033] In some embodiments, the jumper is configured as a jumper chip 4, and at least one solder joint is provided on the jumper chip 4, for example, two, three or four solder joints are provided on the jumper chip 4. When connected, the leads at the ends of the first chip 2 and the leads at the ends of the second chip 3 are both connected to the solder joints of the jumper chip 4. Since the solder joints on the jumper chip 4 are mutually conductive, the ends of the first chip 2 and the ends of the second chip 3 can be electrically connected, thereby realizing the parallel connection of the first chip 2 and the second chip 3.
[0034] like Figure 3 As shown, the jumper chip 4 is provided with four solder joints, namely the first solder joint a, the second solder joint b, the third solder joint c and the fourth solder joint d, wherein the jumper chip 4 is provided with a conduction circuit inside so that the first solder joint a and the third solder joint c are conducted inside the jumper chip 4, and the second solder joint b and the fourth solder joint d are conducted inside the jumper chip 4. When connected, the third solder joint c is electrically connected to the fourth solder joint d through a lead, the end of the second chip 3 is electrically connected to the first solder joint a through a lead, and the ends of the two adjacent first chips 2 in the chipset are electrically connected to any two of the second solder joint b, the third solder joint c and the fourth solder joint d (preferably the second solder joint b and the third solder joint c) through a lead. In this way, by connecting different leads to different solder joints on the jumper chip 4, it is convenient to process and manufacture, which is conducive to improving the stability of the circuit. Specifically, the jumper chip 4 can be set as a chip of the S-12DZAUT model in the prior art, or it can be set as a chip of other forms.
[0035] In addition, the jumper can also be set as a pad, which is fixed to the light-emitting area on the substrate 1. Since the size of the solder joint on the pad is relatively large, it is convenient for multiple leads to be welded and connected.
[0036] In some embodiments, the first chip 2 and the second chip 3 are arranged in parallel and are located at the ends of the chipset, which may be located at one end of the chipset or at both ends of the chipset. When connected, the first end of the first chip 2 and the first end of the second chip 3 are electrically connected to the jumper through leads, so that the first end of the first chip 2 and the first end of the second chip 3 are electrically connected. At the same time, the second end of the first chip 2 and the second end of the second chip 3 are electrically connected to the same conductive electrode (such as the positive electrode 11 or the negative electrode 12) of the substrate 1 through leads, thereby realizing the parallel connection of the first chip 2 and the second chip 3. In this way, by arranging the first chip 2 and the second chip 3 connected in parallel at the ends of the chipset, only one jumper is needed to connect the first chip 2 and the second chip 3 in parallel, which can reduce the number of jumpers used, which is conducive to improving the space utilization rate of the light-emitting area on the substrate 1.
[0037] In some preferred schemes, among the multiple chipsets, at least two adjacent chipsets have a second chip 3. For example, there are five chipsets, four of which have a second chip 3, and the middle chipset does not have a second chip 3. In the above-mentioned two adjacent chipsets, the second chip 3 in one chipset is far away from the second chip 3 in the other chipset. In this way, the second chips 3 in different chipsets can be arranged at different positions in the light-emitting area to avoid the aggregation of multiple second chips 3 and affect the color coordinates of the LED product. Moreover, it is also beneficial to add second chips 3 at different positions in the light-emitting area to further improve the space utilization of the light-emitting area.
[0038] Specifically, the second chip 3 is only set at one end of the chipset. For example, in two adjacent chipsets, the second chip 3 of one chipset is set at the first end, and the second chip 3 of the other chipset is set at the second end, so that the second chips 3 in different chipsets are located at different ends of the chipsets.
[0039] like Figure 1-2As shown, the plurality of chipsets include a first chipset 10, a second chipset 20, a third chipset 30, a fourth chipset 40 and a fifth chipset 50 arranged in sequence, that is, the first chipset 10 and the second chipset 20 are located on one side of the third chipset 30, and the fourth chipset 40 and the fifth chipset 50 are located on the other side of the third chipset 30. Among them, the third chipset 30 does not have a second chip 3, the first chipset 10, the second chipset 20, the fourth chipset 40 and the fifth chipset 50 all have a second chip 3, the second chip 3 in the first chipset 10 is far away from the second chip 3 in the second chipset 20, the second chip 3 in the fourth chipset 40 is far away from the second chip 3 in the fifth chipset 50, and the second chip 3 in the second chipset 20 is far away from the second chip 3 in the fourth chipset 40. For example, the second chip 3 of the first chipset 10 is located at the left end, the second chip 3 of the second chipset 20 is located at the right end, the second chip 3 of the fourth chipset 40 is located at the left end, and the second chip 3 of the fifth chipset 50 is located at the right end. In this way, by arranging the second chips 3 at different positions in the light-emitting area, it is avoided that a plurality of second chips 3 are aggregated to affect the color coordinates of the LED product.
[0040] In other preferred schemes, each chipset has a second chip 3, and the number of second chips 3 in different chipsets is the same. In this way, each chipset has the same number of chips and the same series connection method, which can make the voltage and current in the circuit formed by multiple chipsets have better consistency, which is beneficial to improving the stability of the circuit.
[0041] In other solutions, among the multiple chip groups, one of any two adjacent chip groups has the second chip 3 and the other does not have the second chip 3, and the second chips 3 in different chip groups may be arranged at different positions in the light-emitting area.
[0042] In some embodiments, the parallel first chip 2 and the second chip 3 are centrally symmetrically distributed relative to the light-emitting area. After the first chip 2 is connected in parallel with the second chip 3, the current passing through the second chip 3 and the first chip 2 connected in parallel therewith is half the current passing through the first chip 2 without the second chip 3 connected in parallel. The brightness of the former is lower than that of the latter. By centrally symmetrically distributing the parallel first chip 2 and the second chip 3, the influence on the light spot and color coordinates can be reduced, and the lighting efficiency can be improved while ensuring the original design effect.
[0043] In combination with the above embodiment, the same chipset may have one second chip 3 or multiple second chips 3. When the same chipset has n second chips 3, the n second chips 3 are sequentially arranged in series and simultaneously connected in parallel with the n first chips 2. Where n is an integer greater than or equal to 2, and the number of second chips 3 in the same chipset is less than the number of first chips 2. For example, the chipset has 11 first chips 2 and 2 second chips 3, and the 2 second chips 3 are connected in series and in parallel with the 2 first chips 2 at the end of the chipset.
[0044] The embodiment of the present application provides a lamp bead, including the LED chip connection structure in the above embodiment. In this way, by adding a jumper in the chipset, the first chip 2 and the second chip 3 in the chipset can be connected to form a mixed structure, and while ensuring that the original design voltage remains unchanged, the second chip 3 can be added to the light-emitting area, and the chips can be more fully distributed in the light-emitting area, thereby improving the space utilization of the light-emitting area and achieving the purpose of improving the light efficiency.
[0045] The basic principles of the present application are described above in conjunction with specific embodiments. However, it should be noted that the advantages, strengths, effects, etc. mentioned in the present application are only examples and not limitations, and it cannot be considered that these advantages, strengths, effects, etc. are required by each embodiment of the present application. In addition, the specific details disclosed above are only for the purpose of illustration and ease of understanding, not for limitation, and the above details do not limit the present application to being implemented by adopting the above specific details.
[0046] The block diagrams of the devices, apparatuses, equipment, and systems involved in this application are only illustrative examples and are not intended to require or imply that they must be connected, arranged, and configured in the manner shown in the block diagram. As will be appreciated by those skilled in the art, these devices, apparatuses, equipment, and systems can be connected, arranged, and configured in any manner. Words such as "including", "comprising", "having", etc. are open words, referring to "including but not limited to", and can be used interchangeably with them. The words "or" and "and" used here refer to the words "and / or" and can be used interchangeably with them, unless the context clearly indicates otherwise. The words "such as" used here refer to the phrase "such as but not limited to", and can be used interchangeably with them.
[0047] It should also be noted that in the apparatus, device and method of the present application, each component or each step can be decomposed and / or recombined. Such decomposition and / or recombination should be regarded as equivalent solutions of the present application.
[0048] The above description of the disclosed aspects is provided to enable any person skilled in the art to make or use the present application. Various modifications to these aspects will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other aspects without departing from the scope of the present application. Therefore, the present application is not intended to be limited to the aspects shown herein, but rather to the widest scope consistent with the principles and novel features disclosed herein.
[0049] It should be understood that the qualifiers "first", "second", "third", "fourth", "fifth" and "sixth" used in the description of the embodiments of the present application are only used to more clearly explain the technical solutions and cannot be used to limit the scope of protection of the present application.
[0050] The above description has been given for the purpose of illustration and description. In addition, this description is not intended to limit the embodiments of the present application to the forms disclosed herein. Although multiple example aspects and embodiments have been discussed above, those skilled in the art will recognize certain variations, modifications, changes, additions and sub-combinations thereof.
Claims
1. An LED chip connection structure, characterized in that: include: a substrate having a light emitting region; A plurality of chip groups are connected in parallel and arranged in the light emitting area; Each of the chipsets has a plurality of first chips connected in series in sequence; At least one of the chipsets has a jumper and a second chip, the second chip is connected in parallel with the first chip, and the second chip and the first chip are electrically connected via the jumper.
2. The LED chip connection structure according to claim 1, characterized in that: The first chip and the second chip at the end of the chipset are connected in parallel, the first end of the first chip and the first end of the second chip are electrically connected through the jumper, and the second end of the first chip and the second end of the second chip are electrically connected to the same conductive electrode on the substrate.
3. The LED chip connection structure according to claim 2, characterized in that: Two adjacent chips in the plurality of chipsets each have the second chip, and the second chip in one of the chipsets is far away from the second chip in another of the chipsets.
4. The LED chip connection structure according to claim 2, characterized in that: The multiple chipsets include a first chipset, a second chipset, a third chipset, a fourth chipset and a fifth chipset arranged in sequence, the first chipset, the second chipset, the fourth chipset and the fifth chipset all have the second chip, the second chip in the first chipset is far away from the second chip in the second chipset, the second chip in the fourth chipset is far away from the second chip in the fifth chipset, and the second chip in the second chipset is far away from the second chip in the fourth chipset.
5. The LED chip connection structure according to claim 1, characterized in that: The second chips are distributed centrally and symmetrically with respect to the light emitting area; and / or the first chip connected in parallel with the second chip is distributed centrally and symmetrically with respect to the light emitting area.
6. The LED chip connection structure according to claim 1, characterized in that: In the same chipset, n second chips are arranged in series in sequence and connected in parallel with the n first chips arranged in series in sequence; n is an integer greater than or equal to 2.
7. The LED chip connection structure according to claim 1, characterized in that: Each of the chipsets has the second chip, and the number of the second chips in different chipsets is the same.
8. The LED chip connection structure according to any one of claims 1 to 7, characterized in that: The jumper component is configured as a jumper chip, and the first chip and the second chip are electrically connected to solder joints of the jumper chip via leads, so that the first chip and the second chip are electrically connected.
9. The LED chip connection structure according to claim 8, characterized in that: The jumper chip has a first solder point, a second solder point, a third solder point and a fourth solder point. The first solder point and the third solder point are electrically connected to the inside of the jumper chip, the second solder point and the fourth solder point are electrically connected to the inside of the jumper chip, and the third solder point is electrically connected to the fourth solder point through a lead; the second chip is electrically connected to the first solder point through a lead, and two adjacent first chips in the chipset are electrically connected to any two of the second solder point, the third solder point and the fourth solder point through a lead.
10. A lamp bead, characterized in that: The invention comprises the LED chip connection structure according to any one of claims 1 to 9.