Method and equipment for depositing thin film on bent wafer

By adjusting the process parameters in the PECVD process, reducing the deposition rate and extending the process time, the problem of large differences in film thickness on the curved wafer is solved, and film deposition with uniform thickness is achieved, ensuring the stability and processing efficiency of film characteristics.

CN119663246APending Publication Date: 2025-03-21GEKKO SEMICON (SHANGHAI) CO LTD
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Patent Information

Application Number
CN202311220192.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2023-09-20
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

When depositing films on curved wafers, the thickness difference is large, which brings trouble to the subsequent etching process. The prior art adjusts the curvature of the wafer by adjusting the stress of the front metal film and the dielectric film, but the adjustment ability is limited and affects other characteristics of the film.

Method used

By adjusting the process parameters in the PECVD process, the deposition rate is reduced and the process time is extended, so that each area of ​​the bent wafer has enough time to conduct heat radiation and heat conduction with the heating disk, improving temperature uniformity, and thus reducing the difference in film thickness.

Benefits of technology

It realizes the deposit of a film of uniform thickness on the curved wafer without changing the stress of the front layer of the film, ensuring that the various characteristics of the film meet the process requirements, and improving the yield of processing and the efficiency of flow-through processing.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a method for depositing a thin film on a curved wafer, the wafer has a first surface, the first surface has a plurality of deep trench isolation structures, the curvature of the wafer is greater than a set curvature threshold, and the method comprises the following steps: transferring the wafer into a heating chamber for preheating; transferring the wafer into a deposition chamber, and adjusting process parameters to reduce the deposition rate; and process gas is input into the deposition chamber, based on the adjusted process parameters, a first thin film layer with the preset thickness is deposited and formed on the first surface through a plasma enhanced chemical vapor deposition process, and the deposition rate of the first thin film layer ranges from 1A / S to 40 A / S. The invention further provides equipment for depositing the thin film on the bent wafer. According to the method, the uniformity of the thin film deposited on the bent wafer can be greatly improved, and the thin film meeting the process requirement can be obtained on the surface of the bent wafer under the condition that various characteristics of the front-layer thin film are not changed.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and in particular to a method and a device for depositing a thin film on a curved wafer. Background Art

[0002] As people's demand for low-power consumption and high-resolution image sensors continues to increase, the high integration and miniaturization of CMOS image sensors (CIS CMOS image sensors) have become an inevitable trend, which also means that the pixel units in CMOS image sensors are more densely distributed. The deep trench isolation (BDTI) technology of back-illuminated image sensors helps solve the crosstalk problem caused by the increased density of pixel units in back-illuminated (BSI) CMOS image sensors and helps improve noise performance.

[0003] However, the introduction of deep trench isolation structures has brought new problems. As the density of pixel units in back-illuminated BSI CMOS image sensors increases, the number of deep trench isolation structures that need to be introduced will inevitably increase, resulting in an increase in the curvature of the wafer. When the curvature of the wafer exceeds a certain range, the thin film deposited on the curved wafer shows a large thickness difference, which brings great trouble to the subsequent etching process.

[0004] In order to solve the problem of large differences in film thickness on the surface of the wafer due to the large curvature of the wafer, the existing solution is mainly to reduce the stress of the front metal film and / or dielectric film, thereby reducing the contribution of the metal film and / or dielectric film to the curvature of the wafer, thereby adjusting the curvature of the wafer.

[0005] However, the above solution has limited ability to adjust the curvature of the wafer, and when changing the stress of the front film, other properties of the front film, such as reflectivity, refractive index, and electrical properties, will also change accordingly. How to provide a method and equipment for depositing a uniform thin film on a curved wafer while ensuring that the various properties of the film meet the process requirements has always been a challenge for process engineers. Summary of the invention

[0006] The purpose of the present invention is to provide a method and device for depositing a thin film on a curved wafer, which is used in a PECVD (Plasma Enhanced Chemical Vapor Deposition) process, and can greatly reduce the thickness difference of the thin film deposited on the curved wafer without adjusting the stress of the front film. While ensuring that the various properties of the front film remain unchanged, a thin film that meets the process requirements is obtained on the curved wafer surface.

[0007] In order to achieve the above object, the present invention provides a method for depositing a thin film on a curved wafer, wherein the wafer has a first surface, the first surface has a plurality of deep trench isolation structures, and the curvature of the wafer is greater than a set curvature threshold, the method comprising:

[0008] transferring the wafer into a heating chamber for preheating;

[0009] The wafer is introduced into a deposition chamber, and process parameters are adjusted to reduce a deposition rate. Process gas is input into the deposition chamber, and based on the adjusted process parameters, a first thin film layer with a preset thickness is deposited on the first surface through a plasma enhanced chemical vapor deposition process, and the deposition rate of the first thin film layer is 1A / S to 40A / S.

[0010] Optionally, the wafer may be uniformly preheated by inputting an inert gas having a preset temperature into the heating chamber.

[0011] Optionally, a heating plate for supporting the wafer is provided in the deposition chamber; the edge area of ​​the wafer does not contact the heating plate; and the curvature threshold is greater than or equal to positive 200 microns.

[0012] Optionally, the first thin film layer is a silicon oxide thin film layer, and the preset thickness is 200A to 3000A.

[0013] Optionally, the plasma enhanced chemical vapor deposition process has a process duration of 15s to 500s.

[0014] Optionally, the process parameters include process temperature; the adjusted process temperature is 200°C to 600°C.

[0015] Optionally, the process parameters include the gas pressure in the deposition chamber, and the adjusted gas pressure is 3 Torr to 15 Torr.

[0016] Optionally, the process gas includes: ethyl silicate gas, helium gas, and oxygen gas; the process parameters include any one or more of ethyl silicate gas flow rate, helium gas flow rate, and oxygen gas flow rate; the adjusted ethyl silicate gas flow rate is 1500sccm~10000sccm; the adjusted helium gas flow rate is 1500sccm~10000sccm; the adjusted oxygen gas flow rate is 1500sccm~10000sccm.

[0017] Optionally, the process gas is input into the deposition chamber through a gas dispersion plate; the gas dispersion plate serves as the upper electrode of the deposition chamber; the process parameters include: any one or two of the high-frequency RF power and the low-frequency RF power applied to the upper electrode; the adjusted high-frequency RF power is 400W to 1000W; the adjusted low-frequency RF power is 60W to 300W.

[0018] Optionally, the process parameters include a distance between the gas dispersion plate and the heating plate; the adjusted distance is 100 mil to 700 mil.

[0019] Optionally, the preset temperature is 200°C to 600°C.

[0020] Optionally, the gas pressure of the inert gas is 3 Torr to 15 Torr.

[0021] Optionally, the gas flow rate of the inert gas is 1500 sccm to 10000 sccm.

[0022] Optionally, the inert gas is helium.

[0023] Optionally, the preheating time of the wafer is 15s to 300s.

[0024] Optionally, the aspect ratio of the deep trench isolation structure is greater than 50:1.

[0025] The present invention also provides a device for depositing a thin film on a curved wafer, which is used to implement the method according to the present invention, comprising:

[0026] a deposition chamber having a gas dispersion plate disposed therein;

[0027] A plurality of process gas sources, all of which are connected to the gas dispersion plate through gas paths;

[0028] A plurality of first flow valves are respectively connected by gas circuits and arranged between the plurality of process gas sources and the gas dispersion plate;

[0029] at least one radio frequency power source applied to the gas dispersion plate;

[0030] An input device for inputting adjusted plasma enhanced chemical vapor deposition process parameters to reduce the deposition rate;

[0031] Based on the adjusted process parameters, the controller adjusts any one or more of the valve opening of the first flow valve, the power of the RF power source, the distance between the gas dispersion plate and the heating disk, and the duration of the PECVD process.

[0032] Optionally, the device for depositing a thin film on a curved wafer further comprises:

[0033] A heating chamber for preheating the wafer prior to a plasma enhanced chemical vapor deposition process;

[0034] an inert gas source, used for providing an inert gas having a preset temperature into the heating chamber;

[0035] A second flow valve, the gas path of which is connected and arranged between the inert gas source and the heating chamber;

[0036] The input device is also used to input the preheating time of the wafer and the gas flow rate of the inert gas; the controller adjusts the valve opening of the second flow valve based on the preheating time and the gas flow rate.

[0037] Compared with the prior art, the method and device for depositing a thin film on a curved wafer of the present invention have the following beneficial effects:

[0038] 1) The present invention reduces the deposition rate of the thin film on the curved wafer surface and prolongs the process time of thin film deposition by adjusting the process parameters of plasma chemical vapor deposition. Therefore, each area of ​​the curved wafer has enough time to radiate and conduct heat with the heating plate, effectively improving the phenomenon of uneven heating of each area of ​​the curved wafer, greatly improving the thickness uniformity of the thin film deposited on the curved wafer surface, and ensuring the yield rate of curved wafer processing.

[0039] 2) The present invention also transfers the curved wafer into the heating chamber for preheating before the curved wafer is transferred into the deposition chamber, thereby further improving the uniformity of the temperature of each region of the curved wafer during the PECVD process, thereby improving the uniformity of the thickness of the thin film deposited on the surface of the curved wafer. Since the preheating of the curved wafer is performed in the heating chamber, it will not occupy the use time of the deposition chamber, and the heating chamber and the deposition chamber can process different curved wafers at the same time (that is, the heating chamber and the PECVD chamber can work at the same time), which greatly improves the efficiency of wafer flow processing.

[0040] 3) The present invention does not need to change the stress of the front film. On the premise that the various properties of the front film meet the process requirements, a silicon oxide film with uniform thickness can be obtained on the surface of a wafer with a deep trench isolation structure (aspect ratio greater than 50:1). It can be effectively used to generate a BMG (Back Metal Grid) mask layer for a back-illuminated CMOS image sensor, meeting the actual needs of wafer processing. BRIEF DESCRIPTION OF THE DRAWINGS

[0041] In order to more clearly illustrate the technical solution of the present invention, the following briefly introduces the drawings required for the description. Obviously, the drawings described below are an embodiment of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work:

[0042] Figure 1 is a schematic diagram of a PECVD device;

[0043] Figure 2 A schematic diagram of a deep trench isolation structure on a wafer surface;

[0044] Figure 3 For Figure 2 Schematic diagram of the BMG mask layer deposited on the wafer surface shown;

[0045] Figure 4 is a schematic diagram of a first thin film layer deposited on a curved wafer in an embodiment of the present invention;

[0046] Figure 5 is a flow chart of a method for depositing a thin film on a curved wafer in an embodiment of the present invention;

[0047] Figure 6 Schematic diagram of an apparatus for depositing a thin film on a curved wafer in an embodiment of the present invention. DETAILED DESCRIPTION

[0048] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0049] It should be understood that when used in this specification and the appended claims, the term "comprising" indicates the presence of described features, integers, steps, operations, elements and / or components, but does not exclude the presence or addition of one or more other features, integers, steps, operations, elements, components and / or groups thereof.

[0050] It should also be understood that the terms used in this application specification are only for the purpose of describing specific embodiments and are not intended to limit the application. As used in this application specification and the appended claims, unless the context clearly indicates otherwise, the singular forms "a", "an" and "the" are intended to include plural forms.

[0051] It should be further understood that the term “and / or” used in the specification and appended claims refers to any combination and all possible combinations of one or more of the associated listed items, and includes these combinations.

[0052] As used in this specification and the appended claims, the term "if" may be interpreted as "when" or "upon" or "in response to determining" or "in response to detecting," depending on the context. Similarly, the phrases "if it is determined" or "if [described condition or event] is detected" may be interpreted as meaning "upon determination" or "in response to determining" or "upon detection of [described condition or event]" or "in response to detecting [described condition or event]," depending on the context.

[0053] In addition, in the description of the present application, the terms "first", "second", "third", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0054] Figure 1 A PECVD device 1 is shown. Figure 1 The PECVD apparatus 1 shown includes a deposition chamber 10 .

[0055] The deposition chamber 10 is used to perform a PECVD process to generate a desired thin film on the surface of a wafer. The deposition chamber 10 is substantially cylindrical, and a sidewall 101 of the deposition chamber 10 is also provided with a wafer transfer port 109 for moving a wafer W in and out. A gas dispersion plate 105 is provided on the top of the deposition chamber 10, and process gases from a plurality of process gas sources 107 are input into the deposition chamber 10 from the gas dispersion plate 105. A plurality of first flow valves are respectively connected between the plurality of process gas sources 107 and the gas dispersion plate 105, and are used to adjust the flow rate and flow rate of the corresponding process gas.

[0056] A heating plate 102 for carrying the wafer W is provided below the gas dispersion plate 105. A heating element is usually provided inside the heating plate 102 to heat the wafer W during the PECVD process to improve the quality of the thin film deposited on the wafer surface. The heating plate 102 is arranged on top of a rotating shaft 106, and the rotating shaft 106 rotates around its own central axis so that the process gas reaching the wafer surface is fully mixed.

[0057] The area between the gas dispersion plate 105 and the heating disk 102 is the processing area A, which will form high-frequency energy to ignite and maintain plasma. The gas dispersion plate 105 serves as an upper electrode and the heating disk 102 serves as a lower electrode. One or more RF power sources 103 can be independently applied to the heating disk 102 and / or the gas dispersion plate 105, thereby generating a large electric field inside the deposition chamber 10. Most of the electric field is contained in the processing area A, which accelerates a small amount of electrons present inside the deposition chamber 10, causing them to collide with gas molecules of the input process gas, thereby generating plasma in the deposition chamber 10.

[0058] Plasma contains a large number of high-energy electrons, which can provide the activation energy required for the chemical vapor deposition (CVD) process. The collision of high-energy electrons with gas molecules can promote the decomposition, combination, excitation and ionization of gas molecules, generating various highly active chemical groups. The chemical groups react with the wafer W to generate the required thin film on the surface of the wafer. The PECVD process significantly reduces the temperature range of the CVD process, allowing the CVD process that originally required high temperature (usually greater than 1000°C) to be implemented at low temperatures.

[0059] like Figure 1 As shown, the device 1 is connected to an external exhaust device (such as a vacuum pump, not shown in the figure) to extract the used process gas and by-product gas out of the processing area A during the process and establish an appropriate pressure in the processing area A through gas flow.

[0060] Figure 2 FIG. 4 is a cross-sectional view of a wafer W used for producing back-illuminated CMOS image sensors. Figure 2 The wafer W in the embodiment has a first surface, and the first surface has a plurality of deep trench isolation structures. Figure 2 As shown, the deep trench isolation structure includes the following layers stacked in order from bottom to top: a high dielectric material layer High-K, a buffer oxide layer 130 , and a metal layer 140 .

[0061] The high dielectric material layer High-K can passivate and repair defects on the sidewalls and bottom surfaces of deep trenches, thereby improving the performance of the formed image sensor. The buffer oxide layer 130 includes: a silicon oxide film layer 130a, a silicon nitride film layer 130b, and a silicon oxide film layer 130c stacked in sequence from bottom to top. The buffer oxide layer 130 reduces the optical crosstalk when the image sensor is working. The metal layer 140 can be a tungsten nitride layer or a tungsten layer, and the conductive material 150 (including at least one of titanium nitride, titanium, and aluminum) is filled in each groove of the metal layer 140. The metal layer 140 and the conductive material 150 serve as interconnect structures between devices and are not described in detail here.

[0062] The increase in deep trench isolation structures has led to Figure 2 The curvature of the wafer in the embodiment is relatively large, and the shape is similar to a bowl. Next, we need to send the wafer W into the deposition chamber 10 of the PECVD device 1 to continue growing the BMG mask layer 160 on the first surface. Figure 3 As shown, the BMG mask layer 160 includes a silicon oxide film layer 160 a , a silicon nitride film layer 160 b , and a silicon oxide film layer 160 c stacked in sequence from bottom to top.

[0063] The wafer W includes a disk-shaped central region and an edge region surrounding the central region. Figure 2 When the wafer W is placed on the heating plate 102 to deposit the silicon oxide film layer 160a, the central area is in direct contact with the heating plate 102, and the edge area is warped due to the excessive curvature of the wafer W and cannot directly contact the heating plate 102. The process feature of the silicon oxide film layer 160a is high-rate deposition, and its process time is approximately 4s. The short process time results in that the various areas of the curved wafer W do not have enough time to fully transfer heat or radiate heat with the heating plate 102. Therefore, during the deposition of the silicon oxide film layer 160a, the temperature distribution of various areas of the wafer W is not uniform (the temperature of the central area is high, and the temperature of the edge area is low).

[0064] The temperature of the wafer W determines the rate of material deposition on the wafer W. The silicon oxide film layer 160a has the characteristics that the lower the temperature, the faster the deposition rate, and the higher the temperature, the slower the deposition rate. Therefore, after the deposition process of the silicon oxide film layer 160a is completed, its thickness distribution on the curved wafer W is as follows: and along the radial direction of the curved wafer W, from the inside to the outside, the thickness of the silicon oxide film layer 160a gradually increases. The difference in thickness between the thinnest and thickest parts is in the range of 200-300A. The large thickness difference brings great trouble to the subsequent etching process (after the BMG mask layer 160 is deposited).

[0065] The present invention provides a method and device for depositing a thin film on a curved wafer, by 1) preheating each region of the curved wafer W uniformly before depositing the silicon oxide thin film layer 160a; 2) changing the original PECVD process parameters to increase the process time for depositing the silicon oxide thin film layer 160a, so that each region of the curved wafer W can have more time to conduct heat transfer with the heating plate 102. Finally, in the process, the consistency of the temperature of each region of the curved wafer W is greatly improved, thereby improving the consistency of the thickness of the deposited silicon oxide thin film layer 160a.

[0066] Embodiment 1

[0067] This embodiment provides a method for depositing a thin film on a curved wafer. The curved wafer W has a Figure 2In this embodiment, the first surface of the wafer W has a plurality of deep trench isolation structures with an aspect ratio greater than 50:1, and the curvature of the wafer W is greater than or equal to positive 200 microns.

[0068] like Figure 5 As shown, the method for depositing a thin film on a curved wafer includes:

[0069] Step S1, transferring the wafer W into a heating chamber for preheating.

[0070] In the present invention, uniform preheating of wafer W is achieved by inputting an inert gas with a preset temperature into the heating chamber. The inert gas in this embodiment is helium (which has excellent thermal conductivity), the gas pressure of the inert gas is 3Torr to 15Torr, the gas flow rate is 1500sccm to 10000sccm, and the preset temperature is 200℃ to 600℃. The preheating time of wafer W is 15s to 300s. In a preferred embodiment, the gas pressure of the inert gas is 9Torr, the gas flow rate is 5000sccm to 10000sccm, and the preset temperature is 400℃. The preheating time of wafer W is 60s to 300s.

[0071] Before the wafer W is sent into the deposition chamber, the temperature of each area of ​​the wafer W can be improved by preheating the wafer W, which is beneficial to improving the thickness consistency of the thin film deposited in the subsequent PECVD process. After the pressure of the inert gas is increased to 3Torr to 15Torr, the concentration of helium in the heating chamber increases, which is more conducive to improving the thermal conductivity of helium to the wafer W. In a preferred embodiment, the preset temperature of the inert gas is approximately the same as the process temperature in the subsequent PECVD process.

[0072] Step S2, the wafer W is introduced into the deposition chamber, and the process parameters are adjusted to reduce the deposition rate; a process gas is introduced into the deposition chamber, and based on the adjusted process parameters, a first thin film layer 260a (such as a first thin film layer 260a having a preset thickness) is deposited on the first surface by a plasma enhanced chemical vapor deposition process. Figure 4 As shown), the deposition rate of the first thin film layer 260a is 1A / S to 40A / S.

[0073] In this embodiment, the first film layer 260a is a silicon oxide film layer, and the preset thickness of the first film layer 260a is 200A to 3000A. In a preferred embodiment, the preset thickness of the first film layer 260a is 600A.

[0074] The wafer W is transferred from the heating chamber to the deposition chamber through the wafer transfer port. The deposition chamber also includes a shielding plate (not shown in the figure). When the shielding plate is in an open state, the wafer W can be transferred between the heating chamber and the deposition chamber. When the shielding plate is in a closed state, it blocks the wafer transfer port. (This is a prior art and will not be described in detail here).

[0075] Due to the large curvature of wafer W, when wafer W is placed on the heating plate in the deposition chamber, the edge area of ​​wafer W does not contact the heating plate, so the heating effect of the heating plate on the center area and edge area of ​​wafer W is inconsistent. Based on the process parameters in the prior art, the deposition time of the first film layer 260a is usually only about 4s. The edge area of ​​wafer W does not have enough time to transfer heat with the heating plate, which affects the uniformity of the thickness of the first film layer 260a.

[0076] The present invention reduces the deposition rate of the first film layer 260a on the curved wafer surface and prolongs the deposition process time of the first film layer 260a (15s to 500s in this embodiment) by adjusting the process parameters of plasma chemical vapor deposition. Therefore, each area of ​​the wafer W has enough time to radiate heat and conduct heat with the heating plate, which effectively improves the phenomenon of uneven heating of each area of ​​the curved wafer W, greatly improves the thickness uniformity of the first film layer 260a, and ensures the yield rate of the curved wafer W processing. And because the preheating of the wafer W is carried out in the heating chamber, it will not occupy the use time of the deposition chamber. The heating chamber and the deposition chamber can process different curved wafers W at the same time, which greatly improves the efficiency of the wafer W flow processing.

[0077] The process parameters in this embodiment include: process temperature, gas pressure in the deposition chamber, high-frequency RF power and low-frequency RF power applied to the gas dispersion plate 105, the distance d between the gas dispersion plate 105 and the heating disk, and at least one of the flow rate of the process gas. It is easy to understand that when the power of the RF power is lower and the distance is smaller, the concentration of the plasma in the processing area of ​​the deposition chamber is lower, and the deposition rate of the first thin film layer 260a is slower. The smaller the flow rate of the process gas, the lower the gas pressure in the deposition chamber, the smaller the concentration of the process gas in the deposition chamber, the fewer free radicals are generated, and the deposition rate of the first thin film layer 260a is also slower.

[0078] In this embodiment, the adjusted process temperature is 200°C to 600°C (preferably 400°C). The adjusted gas pressure in the deposition chamber is 3Torr to 15Torr (preferably 5Torr). The adjusted high-frequency RF power is 400W to 1000W (preferably 769W); the adjusted low-frequency RF power is 60W to 300W (preferably 180W). Optionally, the process parameters include the distance between the gas dispersion plate 105 and the heating disk; the adjusted distance is 100mil to 700mil (preferably 290mil).

[0079] The process gas in this embodiment includes: ethyl silicate gas, helium gas, and oxygen gas. The adjusted process parameters include at least one of the ethyl silicate gas flow rate, the helium gas flow rate, and the oxygen gas flow rate. The adjusted ethyl silicate gas flow rate is 1500sccm to 10000sccm (preferably 5250sccm); the adjusted helium gas flow rate is 1500sccm to 10000sccm (preferably 5250sccm); the adjusted oxygen gas flow rate is 1500sccm to 10000sccm (preferably 4200sccm).

[0080] For a wafer W with a curvature of positive 270 microns, the experimental results show that the thickness difference of the deposited first film layer 260a is 47A when only the wafer W is preheated without changing the original PECVD process parameters. The thickness difference of the deposited first film layer 260a is 75A when only the process parameters are changed without preheating the wafer W. Combining preheating the wafer W with changing the PECVD process parameters, the thickness difference of the deposited first film layer 260a is 30A.

[0081] The present invention does not need to change the stress of the front film. On the premise that various properties of the front film meet the process requirements, a silicon oxide film with uniform thickness can be obtained on the surface of a wafer with a deep trench isolation structure. The present invention can be effectively used to generate a BMG mask layer for a back-illuminated CMOS image sensor, thus meeting the actual needs of wafer processing.

[0082] The present invention provides an apparatus 2 for depositing a thin film on a curved wafer, such as Figure 1 As shown, the device 2 includes: a deposition chamber 20, multiple process gas sources 207, multiple first flow valves 208, at least one RF power source, a heating chamber 30, an inert gas source 307, a second flow valve 308, an input device 410, and a controller 420.

[0083] The heating chamber 30 is used to preheat the wafer W before the plasma enhanced chemical vapor deposition process. The inert gas source 307 is used to provide an inert gas with a preset temperature into the heating chamber 30. The second flow valve 308 is connected between the inert gas source 307 and the heating chamber 30, and the flow rate and flow of the inert gas are controlled by adjusting the valve opening of the second flow valve 308.

[0084] A gas dispersion plate 205 and a heating plate 202 are provided inside the deposition chamber 20. The heating plate 202 is arranged on the top of the rotating shaft, and a driving device (not shown in the figure) drives the heating plate 202 and the rotating shaft 206 to move up and down in an integrated manner and rotate around the central axis of the rotating shaft 206. A plurality of heating elements 2021 are provided inside the heating plate 202, and the heating elements 2021 convert the electric energy provided by the external heating power supply (not shown in the figure) into heat energy, and heat the wafer W placed on the heating plate 202.

[0085] A radio frequency power source (including a high frequency radio frequency power source 2031 and a low frequency radio frequency power source 2032 ) is applied to the gas dispersion plate 205 to generate plasma in the deposition chamber 20 .

[0086] The plurality of process gas sources 207 are all connected to the gas dispersion plate 205. The plurality of first flow valves 208 are respectively connected between the plurality of process gas sources 207 and the gas dispersion plate 205 to control the flow rate and flow rate of the process gas provided by the corresponding process gas source 207 to the deposition chamber 20.

[0087] The input device 410 is used to input the preheating time of the wafer W, the gas flow rate of the inert gas, and the adjusted PECVD process parameters.

[0088] The controller 420 is connected to the input device 410 by communication, and is connected to the first flow valve 208, the second flow valve 308, the RF power source, the heating power source, and the driving device by signals. The controller 420 adjusts the valve opening of the second flow valve 308 based on the input preheating time and the gas flow rate of the inert gas. The controller 420 also adjusts any one or more of the valve opening of the first flow valve 208, the power of the high-frequency RF power source 2031, the power of the low-frequency RF power source 2032, the heating power of the heating element 2021, the distance between the gas dispersion plate 205 and the heating disk 202, and the PECVD process time based on the adjusted process parameters.

[0089] It should be understood that the size of the serial numbers of the steps in the above embodiments does not mean the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present application.

[0090] The above is only a specific embodiment of the present invention, but the protection scope of the present invention is not limited thereto. Any technician familiar with the technical field can easily think of various equivalent modifications or replacements within the technical scope disclosed by the present invention, and these modifications or replacements should be included in the protection scope of the present invention. Therefore, the protection scope of the present invention shall be based on the protection scope of the claims.

Claims

1. A method for depositing a thin film on a curved wafer, wherein the wafer has a first surface, the first surface has a plurality of deep trench isolation structures, characterized in that: The curvature of the wafer is greater than a set curvature threshold, and the method includes: transferring the wafer into a heating chamber for preheating; The wafer is introduced into a deposition chamber, and process parameters are adjusted to reduce a deposition rate. Process gas is input into the deposition chamber, and based on the adjusted process parameters, a first thin film layer with a preset thickness is deposited on the first surface through a plasma enhanced chemical vapor deposition process, and the deposition rate of the first thin film layer is 1A / S to 40A / S.

2. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The wafer is uniformly preheated by inputting an inert gas with a preset temperature into the heating chamber.

3. The method for depositing a thin film on a curved wafer according to claim 1, wherein: A heating plate for carrying the wafer is provided in the deposition chamber; the edge area of ​​the wafer does not contact the heating plate; and the curvature threshold is greater than or equal to positive 200 microns.

4. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The first film layer is a silicon oxide film layer, and the preset thickness is 200A to 3000A.

5. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The process duration of the plasma enhanced chemical vapor deposition process is 15s to 500s.

6. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The process parameters include process temperature; the adjusted process temperature is 200°C to 600°C.

7. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The process parameters include the gas pressure in the deposition chamber, and the adjusted gas pressure is 3 Torr to 15 Torr.

8. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The process gas includes: ethyl silicate gas, helium gas, and oxygen gas; the process parameters include any one or more of ethyl silicate gas flow rate, helium gas flow rate, and oxygen gas flow rate; the adjusted ethyl silicate gas flow rate is 1500sccm to 10000sccm; the adjusted helium gas flow rate is 1500sccm to 10000sccm; the adjusted oxygen gas flow rate is 1500sccm to 10000sccm.

9. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The process gas is input into the deposition chamber through a gas dispersion plate; the gas dispersion plate serves as the upper electrode of the deposition chamber; the process parameters include: any one or two of the high-frequency RF power and the low-frequency RF power applied to the upper electrode; the adjusted high-frequency RF power is 400W to 1000W; the adjusted low-frequency RF power is 60W to 300W.

10. The method for depositing a thin film on a curved wafer according to claim 9, wherein: The process parameters include the distance between the gas dispersion plate and the heating plate; the adjusted distance is 100 mil to 700 mil.

11. The method for depositing a thin film on a curved wafer according to claim 2, wherein: The preset temperature is 200°C to 600°C.

12. The method for depositing a thin film on a curved wafer according to claim 2, wherein: The gas pressure of the inert gas is 3 Torr to 15 Torr.

13. The method for depositing a thin film on a curved wafer according to claim 2, wherein: The gas flow rate of the inert gas is 1500 sccm to 10000 sccm.

14. The method for depositing a thin film on a curved wafer according to claim 2, wherein: The inert gas is helium.

15. The method for depositing a thin film on a curved wafer according to claim 2, wherein: The preheating time of the wafer is 15s to 300s.

16. The method for depositing a thin film on a curved wafer according to claim 1, wherein: The depth-to-width ratio of the deep trench isolation structure is greater than 50:

1.

17. An apparatus for depositing a thin film on a curved wafer, used to implement the method according to any one of claims 1 to 16, characterized in that: include: a deposition chamber having a gas dispersion plate disposed therein; A plurality of process gas sources, all of which are connected to the gas dispersion plate through gas paths; A plurality of first flow valves are respectively connected by gas circuits and arranged between the plurality of process gas sources and the gas dispersion plate; at least one radio frequency power source applied to the gas dispersion plate; An input device for inputting adjusted plasma enhanced chemical vapor deposition process parameters to reduce the deposition rate; Based on the adjusted process parameters, the controller adjusts any one or more of the valve opening of the first flow valve, the power of the RF power source, the distance between the gas dispersion plate and the heating disk, and the duration of the PECVD process.

18. The apparatus for depositing a thin film on a curved wafer according to claim 17, wherein: Also includes: A heating chamber for preheating the wafer prior to a plasma enhanced chemical vapor deposition process; an inert gas source, used for providing an inert gas having a preset temperature into the heating chamber; A second flow valve, the gas path of which is connected and arranged between the inert gas source and the heating chamber; The input device is also used to input the preheating time of the wafer and the gas flow rate of the inert gas; The controller adjusts the valve opening of the second flow valve based on the preheating time and the air flow rate.