Method and system for calibrating diffraction angle

The challenge of reproducing the same diffraction effect in different wafers is solved by measuring the crystal orientation of the bare wafer and calibrating the inclination angle of the SEM scan beam, achieving the stability of reliable scanning and image contrast of the patterned wafer.

CN119666903APending Publication Date: 2025-03-21APPL MATERIALS ISRAEL LTD
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Patent Information

Application Number
CN202411234919.7
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-09-19
Filing Date
2024-09-04
Publication Date
2025-03-21

AI Technical Summary

Technical Problem

When imaging a patterned wafer based on a single crystal substrate with backscattered electrons (BSE), changes in tilt angle lead to inconsistencies in image contrast and pattern waveform shapes, resulting in challenging reproducing the same diffraction effect in different wafers.

Method used

By measuring the crystal orientation of the bare wafer and calibrating the inclination angle of the SEM scan beam, ensuring reliable diffraction pattern comparison and calibration on the patterned wafer. The specific steps include scanning the bare wafer with a BSE tool to generate a calibration pattern, selecting a suitable tilt angle to scan the patterned wafer, and correcting the tilt angle of the electron beam to match the expected diffraction pattern.

Benefits of technology

Reliable scanning and image contrast stability of patterned wafers is achieved, eliminating the need for repeated scanning of reference samples, and ensuring scanning accuracy of over 0.1 degrees.

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Abstract

A method and system for calibrating a tilt angle of an electron beam of a backscatter scanning electron microscope is disclosed, the method comprising: scanning a bare wafer at a plurality of electron beam tilt angles and azimuth angles, thereby obtaining a calibration map representing a crystal orientation of the bare wafer; selecting a tilt angle based on the calibration map and defining an expected diffraction pattern associated with the tilt angle; scanning the patterned wafer at the selected tilt angle; comparing a diffraction pattern of an image obtained from the scanning of the patterned wafer at the selected tilt angle with an expected diffraction pattern; a tilt angle of an electron beam of the BSEM tool is corrected such that a diffraction pattern of an image obtained during scanning of the patterned wafer will align with an expected diffraction pattern.
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Description

Technical Field

[0001] The present disclosure generally relates to methods and systems for calibrating a scanning electron microscope (SEM) tilt angle, and in particular to methods and systems for calibrating a scanning electron microscope (SEM) tilt angle based on an electron channeling pattern. Background Art

[0002] When imaging patterned wafers based on single crystal substrates (e.g., silicon) with backscattered electrons (BSE), electron diffraction contributes to the image contrast, depending on the angle of the tilted beam. Thus, the image contrast resulting from diffraction affects the material contrast of the image and, therefore, the shape of the pattern waveform. Due to the high sensitivity to changes in the tilt angle, it is challenging to reproduce the same diffraction effect in different wafers.

[0003] Therefore, there remains a need for methods and systems that can predict diffraction patterns as a function of tilt angle to enable reliable metrology of pattern features of patterned wafers. Summary of the invention

[0004] The present disclosure relates to a method and system for calibrating SEM electron diffraction angles by measuring the crystal orientation of a bare (unpatterned) wafer with an accuracy of better than 0.1 degrees and then calibrating the tilt angle of the SEM scanning beam relative to the measured crystal orientation.

[0005] Advantageously, the methods and systems disclosed herein enable reliable comparison of BSE images between two wafer samples while balancing the contribution of diffraction to image contrast.

[0006] As another advantage, by interpreting the diffraction level as a function of the bare wafer tilt angle, a reference set of contrast tilts can be derived and used for subsequent scans of patterned wafers having the same crystal structure, thereby eliminating the need to repeatedly scan reference samples.

[0007] Additionally, the methods and systems disclosed herein allow calibration of the tilt angle of the scanned beam relative to the intrinsic crystal orientation, thereby ensuring a scanning accuracy of better than 0.1 degrees.

[0008] According to some embodiments, a method for calibrating a tilt angle of an electron beam of a backscatter scanning electron (BSE) tool is provided, the method comprising the following steps:

[0009] a) scanning a bare wafer, such as but not limited to a bare silicon wafer, with a BSE tool at a plurality of electron beam tilt angles and azimuth angles, such that each image obtained spans a different tilt angle or tilt angle range (e.g., 2 degrees per image) over a predetermined azimuth angle range (e.g., from 0 degrees to 2 degrees), thereby obtaining a calibration map representing the crystal orientation of the bare wafer;

[0010] b) selecting a tilt angle based on a calibration map and defining an expected diffraction pattern associated with the tilt angle;

[0011] c) scanning a patterned wafer at a selected tilt angle using a BSE tool, wherein the patterned wafer has the same material (e.g., silicon) as the bare wafer;

[0012] d) comparing the diffraction pattern of the image obtained from scanning the patterned wafer at the selected tilt angle to the expected diffraction pattern; and

[0013] e) Correcting the tilt angle of the electron beam of the BSE tool so that the diffraction pattern of the image obtained during the scan of the patterned wafer will align with the expected diffraction pattern.

[0014] According to some embodiments, the method further comprises step f): scanning one or more additional patterned wafers at the corrected tilt angle.

[0015] As used herein, the terms wafer, "wafer," "slice," and "substrate" are used interchangeably and refer to a thin slice of semiconductor, such as crystalline silicon (c-Si) used to fabricate integrated circuits and / or solar cells.

[0016] According to some embodiments, the term "selecting" refers to choosing a tilt angle for obtaining a desired diffraction pattern. According to some embodiments, the selecting comprises selecting a tilt angle that provides an optimal image contrast.

[0017] As used herein, the term "expected diffraction pattern" refers to a diffraction pattern that is repeatedly obtained when a bare wafer (of the same material) is scanned at a selected tilt angle.

[0018] According to some embodiments, the plurality of tilt angles vary by approximately 1 degree between scans.

[0019] According to some embodiments, the predetermined azimuth angle range is approximately 2 degrees.

[0020] According to some embodiments, the tilt angle range around the desired tilt angle is from ± about 2 degrees to about 5 degrees of the selected tilt angle.

[0021] According to some embodiments, the aligning includes superimposing an image obtained during scanning of the patterned wafer at a selected tilt angle onto an image obtained during scanning of the bare wafer such that a diffraction pattern obtained during scanning of the patterned wafer is aligned with an expected diffraction pattern.

[0022] According to some embodiments, the method further comprises performing metrology analysis on the obtained patterned wafer image.

[0023] According to some embodiments, the calibration map is a Kikuchi map.

[0024] According to some embodiments, a method for improved scanning of a patterned wafer using a backscatter scanning electron microscope (BSE) tool is provided, the method comprising the steps of:

[0025] a. scanning the patterned wafer at a selected tilt angle to obtain a diffraction pattern;

[0026] b. comparing the diffraction pattern with an image having an expected diffraction pattern; wherein the expected diffraction pattern is a diffraction pattern obtained when scanning a bare wafer at a selected tilt angle; and

[0027] c. Correct the tilt angle of the electron beam of the BSEM tool so that the diffraction pattern of the image obtained during the scan of the patterned wafer is aligned with the expected diffraction pattern.

[0028] According to some embodiments, the method further comprises step d): scanning one or more additional patterned wafers at the corrected tilt angle.

[0029] According to some embodiments, the aligning includes superimposing an image obtained during scanning of the patterned wafer at a selected tilt angle onto an image obtained during scanning of the bare wafer such that a diffraction pattern obtained during scanning of the patterned wafer is aligned with an expected diffraction pattern.

[0030] According to some embodiments, the method further comprises performing metrology analysis on the obtained patterned wafer image.

[0031] According to some embodiments, there is provided a system for calibrating a tilt angle of a backscattered electron beam to optimize a diffraction angle, the system comprising:

[0032] BSE tool, the BSE tool is configured to:

[0033] a. scanning the bare wafer at multiple electron beam tilt angles and azimuth angles, thereby obtaining multiple images, each image spanning a different tilt angle or tilt angle range over a predetermined azimuth angle range, and

[0034] b. scanning the patterned wafer over a selected tilt angle range using a BSEM tool; and

[0035] A processing unit, wherein the processing unit is configured to:

[0036] a. receiving a plurality of images obtained during scanning of a bare wafer;

[0037] b. Generate a calibration map representing the crystal structure of the bare wafer;

[0038] c. selecting a tilt angle based on a calibration map and defining an expected diffraction pattern associated with the tilt angle;

[0039] d. Obtaining an image from scanning the patterned wafer at a selected tilt angle;

[0040] e. comparing the diffraction pattern of the image of the patterned wafer with the expected diffraction pattern;

[0041] f. determining a corrected tilt angle suitable for scanning the patterned wafer, wherein the determining comprises aligning the diffraction pattern of the patterned wafer with the expected diffraction pattern, and

[0042] g. Instruct the BSE tool to change the tilt angle of the electron beam to the corrected tilt angle.

[0043] According to some embodiments, the BSE tool is further configured to scan additional patterned wafers at the corrected tilt angle.

[0044] According to some embodiments, the processing unit is further configured to perform metrology analysis on an additional patterned wafer based on scanning the additional patterned wafer at the corrected tilt angle.

[0045] Certain embodiments of the present disclosure may include some, all, or none of the above advantages. One or more other technical advantages will be apparent to those skilled in the art from the drawings, descriptions, and claims included herein. In addition, although specific advantages have been listed above, various embodiments may include all, some, or none of the listed advantages.

[0046] Unless otherwise defined, all technical and / or scientific terms used herein have the same meaning as commonly understood by those of ordinary skill in the art to which the present disclosure belongs. In the event of a conflict, the patent specification including definitions shall prevail. As used herein, the indefinite articles "a" and "an" mean "at least one" or "one or more" unless the context clearly indicates otherwise.

[0047] Unless otherwise specifically noted, as will be apparent from the present disclosure, it should be understood that, according to some embodiments, terms such as "process," "calculate," "compute," "determine," "estimate," "evaluate," "measure," and the like may refer to actions and / or processes of a computer or computing system or similar electronic computing device that manipulate and / or transform data represented as physical (e.g., electronic) quantities within registers and / or memories of the computing system into other data similarly represented as physical quantities within the computing system's memories, registers, or other such information storage, transmission, or display devices.

[0048] Embodiments of the present disclosure may include devices for performing the operations herein. The devices may be specially constructed for the desired purpose or may include (multiple) general-purpose computers selectively activated or reconfigured by a computer program stored in the computer. Such a computer program may be stored in a computer-readable storage medium, such as, but not limited to, any type of disk, including a floppy disk, an optical disk, a CD-ROM, a magneto-optical disk, a read-only memory (ROM), a random access memory (RAM), an electrically programmable read-only memory (EPROM), an electrically erasable programmable read-only memory (EEPROM), a magnetic or optical card, a flash memory, a solid-state drive (SSD), or any other type of medium suitable for storing electronic instructions and capable of being coupled to a computer system bus.

[0049] The process and display presented herein are not inherently related to any specific computer or other device. Various general purpose systems can be used together with the program according to the teaching of this article, or it can be proved that it is convenient to construct a more dedicated device to perform (multiple) desired methods. (Multiple) desired structures of a variety of these systems appear from the following description. In addition, each embodiment of the present disclosure is described without reference to any specific programming language. It should be understood that various programming languages ​​can be used to implement the teachings of the present disclosure described herein.

[0050] Various aspects of the present disclosure may be described in the general context of computer-executable instructions (such as program modules) executed by a computer. Generally speaking, program modules include routines, programs, objects, components, data structures, etc. that perform specific tasks or implement specific abstract data types. The disclosed embodiments may also be practiced in a distributed computing environment in which tasks are performed by remote processing devices linked through a communication network. In a distributed computing environment, program modules may be located in local and remote computer storage media including memory storage devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0051] Some embodiments of the present disclosure are described herein with reference to the accompanying drawings. The description together with the accompanying drawings makes it clear to those skilled in the art how to practice some embodiments. The accompanying drawings are used for illustrative purposes and are not intended to show the structural details of the embodiments in more detail than is necessary for a basic understanding of the present disclosure. For the sake of clarity, some objects depicted in the drawings are not drawn to scale. In addition, two different objects in the same figure may be drawn at different scales. In particular, the scales of some objects may be greatly exaggerated compared to other objects in the same figure.

[0052] In the attached picture:

[0053] Figure 1 is a flow chart of a method disclosed herein for calibrating a BSEM electron beam angle according to some embodiments;

[0054] Figure 2 shows an exemplary Kikuchi line plot obtained over the entire tilt range for an exemplary bare silicon wafer;

[0055] Figure 3A shows the obtained results when scanning a bare wafer over a range of selected tilt angles. Figure 1 Segment of an image of , where the (red) cross indicates the exact position of the selected tilt angle;

[0056] Figure 3B shows the diffraction pattern obtained when scanning a patterned wafer at a selected tilt angle, where the blue cross indicates the selected tilt angle and the red cross indicates the precise position of the image. Figure 3A Align with the red cross in the image;

[0057] Figure 4 depicts a computerized system for calibrating tilt angle according to some embodiments;

[0058] Figure 5A schematically illustrates a cross-sectional side view of a wafer incident with an electron beam at an oblique angle θ1 according to some embodiments;

[0059] Figure 5B schematically illustrates a cross-sectional side view of a wafer incident with an electron beam at a tilt angle θ2 according to some embodiments; and

[0060] Figure 5C Schematically illustrates a cross-sectional side view of a wafer incident with an electron beam at a tilt angle θ3 in accordance with some embodiments. DETAILED DESCRIPTION

[0061] The principles, uses and implementations of the teachings herein may be better understood with reference to the attached description and drawings. After careful reading of the description and drawings herein, those skilled in the art will be able to implement the teachings herein without undue effort or experimentation. In the drawings, the same reference numerals always represent the same parts.

[0062] As used herein, the term "backscatter scanning electron microscopy" or "BSEM" refers to the measurement of backscattered electrons (BSE) produced by scattering a primary electron beam. When the primary beam strikes the surface of a sample, the incident electrons may interact with the nuclei of atoms and the trajectory of the incident electrons may be deflected. Typically, heavier elements may deflect incident electrons more strongly than lighter elements because the nuclei of heavier elements are larger. Therefore, heavy elements (such as silver with atomic number Z=47) appear bright in SEM images compared to light elements (such as silicon with atomic number Z=14) because more backscattered electrons are emitted from the sample surface.

[0063] As used herein, the terms "diffraction pattern" and "electron channeling pattern" may be used interchangeably and refer to signal changes caused by changes in the angle between the incident beam and the sample lattice.

[0064] As used herein, the term "Kikuchi lines" refers to lines formed by the diffraction pattern of backscattered electrons. The main features of their geometry can be derived from both the relative angles of electron beam tilt and crystal plane orientation, as well as the electron beam energy.

[0065] Reference now Figure 1 , Figure 1 A flow chart of a method 100 disclosed herein for calibrating a BSEM electron beam angle is shown, according to some embodiments.

[0066] In step 110, substantially as follows Figure 2 As shown, a bare wafer is scanned over the entire angular range of tilt angles using a BSEM tool, and a Kikuchi map of the Si crystal of the bare wafer is generated. Each image spans a tilt variation of approximately 1 square degree. A line graph is obtained, and this graph is used to translate the pattern in the Kikuchi line and the angle of the incident beam relative to the crystal. The entire graph consists of multiple SEM images (56 here) stitched together, each of which scans a range of approximately 1 degree tilt and 2 degrees azimuth. Here, the imaging mode is: 30kev, 13nA, 1.28μm pixel size, NA=1mRad, however other imaging modes are also applicable and are therefore covered in the present disclosure. Sample: bare Si wafer. The image is filtered to remove small frequencies and denoise the image. It is assumed that the crystal structure of all bare silicon wafers is essentially the same.

[0067] In step 120, the patterned wafer test sample is imaged at a selected tilt angle (here the tilt angle is 31 degrees with an accuracy of 1 degree) in the same imaging mode used in step 110. The scan obtained is as follows: Figure 3B shown.

[0068] In step 130, the segment of the Kikuchi diagram around the selected tilt angle ( Figure 3A ) is compared with an image obtained when scanning the patterned test sample at the selected tilt angle. According to some embodiments, the comparison includes aligning the test sample image with the segment of the Kikuchi diagram so that the position of the selected tilt angle (here the tilt angle is 31 degrees) is overlaid, that is, the blue cross is aligned with the red cross.

[0069] In step 140, the tilt angle resulting from the alignment is determined (here 32.7 degrees).

[0070] In step 150, the tilt angle of the BSEM electron beam is corrected by 1.7 degrees to substantially cancel the effect of the diffraction pattern on image contrast caused by the selected tilt angle.

[0071] Reference now Figure 4 , Figure 4 A computerized system 400 for calibrating a tilt angle to depth profile a sample (eg, a patterned wafer and / or a semiconductor structure in or on the patterned wafer) is depicted. As will be apparent from the description of the system 400, the system 400 may be used to implement the method 100.

[0072] System 400 includes an electron beam source 402 (e.g., an electron gun), an electron sensor 404, a processing circuit system 406 (also referred to as "computer hardware"), and a controller 408. According to some embodiments, system 400 may further include an electron optics 412 configured to direct and / or focus the electron beam generated by electron beam source 402 and / or to direct electrons scattered from the sample (e.g., onto electron sensor 404) as a result of irradiating the sample with the electron beam. According to some embodiments, as Figure 4 As depicted, electron beam source 402, electron sensor 404, electron optics 412, and controller 408 may constitute components of SEM 420. According to some embodiments, system 400 may further include stage 424 (e.g., xyz stage) configured to accommodate (inspected) wafer 40. Note that wafer 40 does not form part of system 400.

[0073] Dashed lines between elements indicate a functional or communicative relationship between the elements.

[0074] An electron beam 405 generated by an electron beam source 402 is shown incident on a sample 40. As a result of the tilt angle of the electron beam 405 on the sample 40 and the penetration of the electron beam 405 into the sample 40, backscattered electrons and secondary electrons return from the wafer 40. Arrows 415 indicate backscattered electrons and secondary electrons scattered from the sample 40 in the direction of the electron sensor 404. According to some embodiments, the electron sensor 404 may be configured to sense electrons that return at 180° relative to the incident direction of the electron beam 405. Arrows 415a (from arrows 415) indicate electrons that return at 180° relative to the incident direction of the electron beam 405.

[0075] According to some embodiments, the electronic sensor 404 is a BSE detector, i.e., configured to sense backscattered electrons returning from the wafer 40. According to some embodiments, the electronic sensor 404 may be a BSE image detector, which is configured to obtain a BSE image. The electronic sensor 404 is configured to directly or optionally (and as Figure 44 (depicted) is relayed indirectly to processing circuitry 406 via controller 408. According to some embodiments, in addition to electronic sensor 404, system 400 may include additional electronic sensors (eg, a second BSE detector).

[0076] According to some embodiments, the electron optical device 412 may include (multiple) electrostatic lenses and (multiple) magnetic deflectors, which can be used to guide and manipulate the electron beam generated by the electron beam source 402 and / or guide at least backscattered electrons generated due to the penetration of the electron beam into the chip 400 onto the electron sensor 404.

[0077] According to some embodiments, the electron optics 412 may include an energy filter (not shown) configured to transmit electrons having energies above a threshold energy through the energy filter onto the electron sensor 404. More specifically, only electrons having energies above the energy threshold pass through the energy filter and reach the electron sensor 404, thereby ensuring that substantially only electrons elastically scattered off matter in the sample are sensed by the electron sensor 404.

[0078] According to some embodiments, SEM 420 and stage 424 may be housed within a vacuum chamber 430 .

[0079] The controller 408 may be functionally associated with the electron beam source 402, and optionally with the stage 424. More particularly, the controller 408 is configured to control and synchronize the operation and functionality of the components of the system 400 listed above.

[0080] Processing circuit system 406 includes one or more processors (i.e., processor(s) 440), and optionally includes RAM and / or non-volatile memory components (not shown). Processor(s) 440 are configured to execute software instructions stored in the non-volatile memory components. The BSEM electron beam angle is calibrated by processing one or more sets of measured electron intensities (e.g., measured by electron sensor 404) of an inspected sample (e.g., wafer 40) by executing the software instructions, substantially as described herein.

[0081] According to some embodiments, the electron beam source 402 may be configured to allow for multiple tilt angles and optionally multiple azimuth angles relative to the sample 40 (eg, FIG. 5A to FIG. 5C ) to project an electron beam, thereby allowing the generation of a Kikuchi diagram substantially as disclosed herein.

[0082] According to some embodiments, the electron sensor 404 (or one or more components of the electron sensor 404) can be translated laterally and / or vertically, thereby allowing the collection angle to be controlled (i.e., sensing backscattered electrons returning from the sample 40 at a desired return angle). According to some embodiments, backscattered electrons generated by electron beams of different landing energies can be sensed at different return angles, respectively.

[0083] According to some embodiments, the electronic sensor 404 may include a plurality of electronic sensors configured to sense backscattered electrons at each of a plurality of return angles (equivalently, scattering angles). For example, a first electronic sensor (e.g., a first BSE detector) may be positioned to measure backscattered electrons returned at a scattering angle of about 180°, while a second electronic sensor (e.g., a second BSE detector) may be positioned to measure backscattered electrons returned at a scattering angle of about 170°, about 160°, or about 150°.

[0084] Reference now FIG. 5A to FIG. 5C , FIG. 5A to FIG. 5C A cross-sectional side view of a wafer 50 incident with an electron beam 505a at an inclined angle θ1 is schematically illustrated. A SEM 502 and a stage 520 on which the wafer 50 is placed are further illustrated. The SEM 502 includes an electron gun 512, an electron sensor 514, a compound lens 518 configured to focus the electron beam 505a on the wafer 50, a scanner module (not shown) configured to deflect the electron beam 505a so that it can be scanned on the surface of the sample, and an electron optical device (not shown) such as a magnetic deflector that is optionally configured to controllably set the projection direction of the electron beam 505a.

[0085] In operation, the electron gun 512 generates an electron beam 501 a that is incident on the wafer 50 at any one of a plurality of tilt angles.

[0086] During calibration, and as described above with reference to method 100, a Kikuchi plot may be generated based on scanning a bare wafer sample scanned at multiple tilt angles (preferably varying by about 1 degree), where tilt angle θ1 ( Figure 5A ), tilt angle θ2 (θ2>θ1—— Figure 5B ) and the inclination angle θ3 (θ3>θ2—— Figure 5C ).

[0087] Once the map is obtained, the patterned wafer can be scanned at a selected tilt angle, and the obtained diffraction pattern can be compared to the diffraction pattern obtained from scanning a bare wafer at the selected tilt angle and the selected tilt angle ±1 degree. Based on the alignment of the pattern, the tilt angle of the electron beam 501a generated by the electron gun 512 can be adjusted, thereby reducing the effect of diffraction on the increase in material contrast when scanning the patterned wafer.

[0088] In the description and claims of this application, the words "including" and "having" and their respective forms are not limited to the members of the list with which the words can be associated.

[0089] As used herein, the term "substantially" may be used to specify that a first characteristic, quantity, or parameter is close to or equal to a second or target characteristic, quantity, or parameter. For example, a first object and a second object may be referred to as having "substantially the same length" when the length of the first object measures at least 80% (or some other predetermined predefined threshold percentage) and no more than 120% (or some other predetermined predefined threshold percentage) of the length of the second object. In particular, the situation where the first object and the second object have the same length is also included in the statement that the first object and the second object have "substantially the same length."

[0090] As used herein, the term "about" may be used to specify a value of a quantity or parameter (e.g., the length of an element) as being within a continuous range of values ​​close to (and including) a given (stated) value. According to some embodiments, "about" may specify a value of a parameter that is between 80% and 120% of a given value. For example, the statement "the length of the element is approximately equal to 1 m" is equivalent to the statement "the length of the element is between 0.8 m and 1.2 m". According to some embodiments, "about" may specify a value of a parameter that is between 90% and 110% of a given value. According to some embodiments, "about" may specify a value of a parameter that is between 95% and 105% of a given value.

[0091] As used herein, according to some embodiments, the terms "substantially" and "about" are interchangeable.

[0092] It should be understood that, for the sake of clarity, certain features of the present disclosure described in the context of separate embodiments may also be provided in combination in a single embodiment. Conversely, for the sake of brevity, various features of the present disclosure described in the context of a single embodiment may also be provided separately or in any suitable subcombination or suitably provided in any other described embodiment of the present disclosure. Unless so expressly provided, features described in the context of an embodiment are not considered essential features of that embodiment.

[0093] Although the operations of the disclosed methods according to some embodiments can be described in a specific order, the methods of the present disclosure may include some or all of the described operations performed in a different order. The methods of the present disclosure may include some or all of the described operations. No specific operation in the disclosed method is considered to be the basic operation of this method unless explicitly specified.

[0094] Although the present disclosure is described in conjunction with the specific embodiments of the present disclosure, it is apparent that there may be many substitutions, modifications and variations that are apparent to those skilled in the art. Therefore, the present disclosure includes all of these substitutions, modifications and variations that fall within the scope of the appended claims. It should be understood that the present disclosure is not necessarily limited to the details of the construction and arrangement of the components and / or methods set forth herein in its application. Other embodiments may be practiced, and embodiments may be performed in various ways.

[0095] The wording and terminology used herein are for descriptive purposes and should not be considered as limiting. The citation or identification of any reference in this application should not be construed as an admission that such reference can be used as prior art for the present disclosure. The section headings used herein are for ease of understanding the specification and should not be construed as necessary limitations.

Claims

1. A method for calibrating the tilt angle of an electron beam of a backscatter scanning electron microscope (BSEM) tool, the method comprising: Scanning a bare wafer at a plurality of electron beam tilt angles and azimuth angles using the BSEM tool such that each image obtained spans a different tilt angle or tilt angle range over a predetermined azimuth angle range, thereby obtaining a calibration map representing the crystal orientation of the bare wafer; selecting a tilt angle based on the calibration map and defining an expected diffraction pattern associated with the tilt angle; scanning the patterned wafer at the selected tilt angle using the BSEM tool; comparing a diffraction pattern of an image obtained from the scan of the patterned wafer at the selected tilt angle to the expected diffraction pattern; and The tilt angle of the electron beam of the BSEM tool is corrected so that the diffraction pattern of the image obtained during a scan of the patterned wafer will align with the expected diffraction pattern.

2. The method of claim 1, further comprising scanning one or more additional patterned wafers at the corrected tilt angle.

3. The method of claim 1, wherein the plurality of tilt angles vary by approximately 1 degree between scans. The method of claim 1 , wherein the predetermined azimuth angle range is approximately 2 degrees.

5. The method of claim 1, wherein the range of tilt angles around a desired tilt angle includes the selected tilt angle ± about 2 degrees to about 5 degrees.

6. The method of claim 1 , wherein the comparing and the correcting include superimposing the image obtained during scanning of the patterned wafer at the selected tilt angle onto the image obtained during scanning of the bare wafer such that the diffraction pattern obtained during scanning of the patterned wafer is aligned with the expected diffraction pattern.

7. The method of claim 1, further comprising performing metrology analysis on the obtained patterned wafer image. The method of claim 1 , wherein the calibration map is a Kikuchi map.

9. A method for improved scanning of a patterned wafer with a backscatter scanning electron microscope (BSEM) tool, the method comprising: scanning the patterned wafer at a selected tilt angle, thereby obtaining a diffraction pattern; comparing the diffraction pattern to an image having an expected diffraction pattern; wherein the expected diffraction pattern is a diffraction pattern obtained when scanning a bare wafer at the selected tilt angle; as well as The tilt angle of the electron beam of the BSEM tool is corrected so that the diffraction pattern of the image obtained during a scan of the patterned wafer is aligned with the expected diffraction pattern.

10. The method of claim 9, further comprising scanning one or more additional patterned wafers at the corrected tilt angle.

11. The method of claim 9, wherein the comparing and the correcting include superimposing the image obtained during scanning of the patterned wafer at the selected tilt angle onto the image obtained during scanning of the bare wafer such that the diffraction pattern obtained during scanning of the patterned wafer is aligned with the expected diffraction pattern.

12. The method of claim 9, further comprising performing metrology analysis on the obtained patterned wafer image.

13. A system for calibrating the tilt angle of an electron beam of a backscatter scanning electron microscope (BSEM) tool for optimizing the diffraction angle, the BSEM tool being configured to: scanning the bare wafer at a plurality of electron beam tilt angles and azimuth angles, thereby obtaining a plurality of images, each image spanning a different tilt angle or tilt angle range over a predetermined azimuth angle range, and scanning the patterned wafer over a selected tilt angle range using the BSEM tool; and Wherein the system for calibrating the tilt angle of an electron beam of a BSEM tool comprises: A processing unit, wherein the processing unit is configured to: receiving the plurality of images obtained during scanning of the bare wafer, generating a calibration map representing the crystal structure of the bare wafer, selecting a tilt angle based on the calibration map and defining an expected diffraction pattern associated with the tilt angle, obtaining an image from said scanning of said patterned wafer at said selected tilt angle, comparing the diffraction pattern of the image of the patterned wafer to the expected diffraction pattern, determining a corrected tilt angle suitable for scanning the patterned wafer, wherein the determining comprises aligning the diffraction pattern of the patterned wafer with the expected diffraction pattern, and The BSEM tool is instructed to change the tilt angle of the electron beam to the corrected tilt angle.

14. The system of claim 13, wherein the BSEM tool is further configured to scan an additional patterned wafer at the corrected tilt angle.

15. The system of claim 13, wherein the processing unit is further configured to perform a metrology analysis on the additional patterned wafer based on the scanning of the additional patterned wafer at the corrected tilt angle.

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