Resource allocation method and device, electronic equipment and storage medium

Abstract

The invention provides a resource allocation method and device, electronic equipment and a storage medium, the method is applied to a many-core system, the many-core system comprises a plurality of processing cores, each processing core comprises multiple types of hardware resources, and the method comprises the following steps: constructing a resource map according to the hardware resources of the many-core system; according to the execution process of a target task, the target task is divided into a plurality of task stages based on the resource demand change, and the resource demand of each task stage for different types of hardware resources is different; according to the resource demand quantity of each task stage, the resource map corresponding to the hardware resources is divided, the resource group allocated to each task stage is determined, and the resource group comprises multiple types of hardware resources, so that different types of resource allocation can be performed according to the resource demand quantity of different task stages, and the resource allocation efficiency is improved. Resource allocation is more flexible, and the resource utilization rate is improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a resource allocation method and device, an electronic device, and a storage medium. Background Art

[0002] With the continuous development of semiconductor technology and computer technology, the performance and integration of many-core chips are constantly improving. Many-core chips can be applied in more fields and play an important role. In order to improve the performance of many-core chips, the resource allocation of tasks can be further optimized. In related technologies, the storage resources and computing resources of each processing core in the many-core chip are usually bound together. When allocating resources, resources are allocated to tasks in units of cores. However, different tasks have different requirements for storage resources and computing resources, which reduces the flexibility and utilization of resource allocation and limits the performance of many-core chips. Summary of the invention

[0003] The present disclosure provides a resource allocation method and device, an electronic device, and a storage medium.

[0004] In a first aspect, the present disclosure provides a resource allocation method, which is applied to a many-core system, wherein the many-core system includes a plurality of processing cores, each of which includes a plurality of types of hardware resources, and the method includes:

[0005] Constructing a resource map according to the hardware resources of the many-core system;

[0006] According to the execution process of the target task, the target task is divided into multiple task stages based on resource demand changes, and each task stage has different resource requirements for different types of hardware resources;

[0007] According to the resource demand of each task stage, the resource graph corresponding to the hardware resources is divided to determine the resource group allocated to each task stage, and the resource group includes multiple types of hardware resources.

[0008] In a second aspect, the present disclosure provides a resource allocation device, which is applied to a many-core system, wherein the many-core system includes a plurality of processing cores, each of which includes a plurality of types of hardware resources, and the device includes:

[0009] A construction module, configured to construct a resource map according to the hardware resources of the many-core system;

[0010] A task division module is used to divide the target task into multiple task stages based on resource demand changes according to the execution process of the target task, and each task stage has different resource requirements for different types of hardware resources;

[0011] The resource allocation module is used to divide the resource graph corresponding to the hardware resources according to the resource demand of each task stage, and determine the resource group allocated to each task stage, wherein the resource group includes multiple types of hardware resources.

[0012] In a third aspect, the present disclosure provides an electronic device comprising: multiple processing cores; and a data communication device configured to exchange data between the multiple processing cores and external data; wherein one or more instructions are stored in one or more of the processing cores, and one or more of the instructions are executed by one or more of the processing cores, so that one or more of the processing cores can execute the above-mentioned resource allocation method.

[0013] In a fourth aspect, the present disclosure provides a computer-readable storage medium having a computer program stored thereon, wherein the computer program implements the above-mentioned resource allocation method when executed by a processing core.

[0014] The embodiments provided by the present disclosure construct a resource graph based on the hardware resources of the many-core system, and for the target task in the many-core system, divide the target task into multiple task stages according to the resource requirements for different types of hardware resources, so that the resource graph corresponding to the hardware resources is divided according to the resource requirements of each task stage, and the resource group allocated to each task stage is determined. In this way, the hardware resources in the many-core system can be abstracted to construct a resource graph, so that the resource graph can be divided according to the resource requirements of different task stages, the hardware resources of different task stages can be flexibly configured, and the target task can be subdivided into task stages. Different task stages can be allocated corresponding matching resource groups according to changes in resource requirements, which can not only meet the operating requirements of the task stage, but also can flexibly allocate resources in a targeted manner to improve the utilization rate of hardware resources.

[0015] It should be understood that the content described in this section is not intended to identify the key or important features of the embodiments of the present disclosure, nor is it intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The accompanying drawings are used to provide a further understanding of the present disclosure and constitute a part of the specification. Together with the embodiments of the present disclosure, they are used to explain the present disclosure and do not constitute a limitation of the present disclosure. The above and other features and advantages will become more apparent to those skilled in the art by describing detailed example embodiments with reference to the accompanying drawings, in which:

[0017] Figure 1 A flowchart of a resource allocation method provided in an embodiment of the present disclosure;

[0018] Figure 2A schematic diagram of changes in hardware resource requirements for target tasks in an embodiment of the present disclosure;

[0019] Figure 3 is an abstract schematic diagram of a resource group in an embodiment of the present disclosure;

[0020] Figure 4 Schematic diagram of resource groups in a many-core chip in an embodiment of the present disclosure;

[0021] Figure 5 It is a structural schematic diagram of a data communication device in an embodiment of the present disclosure;

[0022] Figure 6 This is a schematic diagram of a connection structure of multiple arbitrators in an embodiment of the present disclosure;

[0023] Figure 7 A schematic diagram of another connection structure of multiple arbitrators in an embodiment of the present disclosure

[0024] Figure 8 A block diagram of a resource allocation device provided in an embodiment of the present disclosure;

[0025] Fig. 9 A block diagram of an electronic device provided in an embodiment of the present disclosure. DETAILED DESCRIPTION

[0026] In order to enable those skilled in the art to better understand the technical solutions of the present disclosure, the exemplary embodiments of the present disclosure are described below in conjunction with the accompanying drawings, including various details of the embodiments of the present disclosure to facilitate understanding, which should be considered as merely exemplary. Therefore, those of ordinary skill in the art should recognize that various changes and modifications can be made to the embodiments described herein without departing from the scope and spirit of the present disclosure. Similarly, for the sake of clarity and conciseness, the description of well-known functions and structures is omitted in the following description.

[0027] In the absence of conflict, the various embodiments of the present disclosure and the various features therein may be combined with each other.

[0028] As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0029] The terms used herein are only used to describe specific embodiments and are not intended to limit the present disclosure. As used herein, the singular forms "a" and "the" are also intended to include plural forms, unless the context clearly indicates otherwise. It will also be understood that when the terms "including" and / or "made of" are used in this specification, the presence of the features, wholes, steps, operations, elements and / or components is specified, but the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups thereof is not excluded. "Connected" or "connected" and similar words are not limited to physical or mechanical connections, but can include electrical connections, whether direct or indirect.

[0030] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art. It will also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and the present disclosure, and will not be interpreted as having an idealized or overly formal meaning unless explicitly defined as such herein.

[0031] The integration and performance of many-core chips are constantly improving. In order to give full play to the advantages of many-core chips, it is very important to optimize task scheduling, resource allocation, etc. In related technologies, the storage resources and computing resources of each processing core in the many-core chip are bound, and resources can only be allocated to tasks on a core basis. However, different tasks may have different requirements for storage resources and computing resources, and resources cannot be flexibly configured, which reduces the performance of many-core chips.

[0032] A many-core system may include one or more many-core chips, and a many-core chip includes multiple processing cores. It can be understood that a many-core system refers to a computer system built using one or more many-core chips, which usually includes hardware parts (such as processors, storage devices, etc.) and software parts (such as operating systems, scheduling strategies, etc.). In practice, a many-core system can be used to more efficiently utilize many-core chips.

[0033] Based on this, the embodiment of the present disclosure provides a resource allocation method, which constructs a resource graph according to the hardware resources of the many-core system, and divides the target task into multiple task stages according to the resource requirements of the task stage for different types of hardware resources. Therefore, according to the resource requirements of each task stage, the resource graph corresponding to the hardware resources is divided, and the resource group allocated to each task stage is determined. In this way, the hardware resources of different task stages can be flexibly configured according to the resource requirements of different task stages, thereby improving the utilization rate of hardware resources.

[0034] The resource allocation method according to the embodiment of the present disclosure can be applied to a many-core system, which includes multiple processing cores, each of which includes multiple types of hardware resources, so as to flexibly configure the hardware resources in each processing core in the many-core system, rather than binding and configuring the hardware resources in the processing cores on a per-core basis. Of course, the resource allocation method in the embodiment of the present disclosure can also be applied to a many-core chip, so as to achieve unified management and flexible configuration of the hardware resources of the processing cores included in a many-core chip.

[0035] Figure 1 A flowchart of a resource allocation method provided by an embodiment of the present disclosure. Figure 1 , the method comprising:

[0036] S100: Construct a resource map according to the hardware resources of the many-core system.

[0037] S110: According to the execution process of the target task, the target task is divided into a plurality of task stages based on resource demand changes, and each task stage has different resource demands for different types of hardware resources.

[0038] Taking multiple types of hardware resources including computing resources and storage resources as an example, for this step S110, the present disclosure provides a possible implementation method, which divides the target task into multiple task stages according to the change in the ratio between the resource demand for computing resources and the resource demand for storage resources during the execution of the target task, wherein the ratio of the resource demand for storage resources and computing resources in each task stage is different.

[0039] During the execution of the target task, the resource requirements for computing resources and storage resources are constantly changing. For example, see Figure 2 As shown in FIG. 1 , it is a schematic diagram of the change in hardware resource requirements of the target task in the embodiment of the present disclosure. Figure 2 As shown in the figure, the ordinate represents the resource demand of computing resources and storage resources, and the abscissa represents the operator in the process of executing the target task. The operator can also be understood as a processing unit used to execute the target task, which can represent the execution process of the target task, such as Figure 2 It can be seen that the storage resources and computing resources required during the execution process are constantly changing, such as Figure 2The solid line curve in the middle represents the change curve of storage resources, and the dotted line curve represents the change curve of computing resources. The target task can be divided into multiple task stages according to the ratio of the resource demand of computing resources to the resource demand of storage computing. For example, the target task can be divided into task stage 1, task stage 2 and task stage 3, wherein the resource demand of storage resources in task stage 1 is greater than the resource demand of computing resources, and for example, if it is a first ratio, the resource demand of storage resources in task stage 2 is less than the resource demand of computing resources. If it is a second ratio, the resource demand of storage resources in task stage 3 is greater than the resource demand of computing resources. If it is a third ratio, the first ratio is greater than the third ratio, which means that compared with task stage 3, task stage 1 requires more storage resources than computing resources.

[0040] S120: Divide the resource graph corresponding to the hardware resources according to the resource demand of each task stage, and determine the resource group allocated to each task stage, where the resource group includes multiple types of hardware resources.

[0041] Exemplarily, the resource requirements of different types of hardware resources corresponding to each task stage have different ratios, and the resource group includes multiple types of hardware resources that meet the required ratios of the corresponding task stage.

[0042] That is to say, in the embodiment of the present disclosure, resource allocation can be performed according to the ratio of different types of hardware resources required in the task stage, for example, Figure 2 In the example, task stage 1 requires more storage resources, and the ratio of storage resources to computing resources is 5:1. For example, each processing core includes storage resources and computing resources. Then, resource requirements that meet storage resources and computing resources can be allocated to task stage 1 from multiple processing cores, and the ratio of allocated storage resources to computing resources is 5:1, that is, the resource group allocated to task stage 1 includes storage resources and computing resources in a ratio of 5:1. In this way, in the embodiment of the present disclosure, resource allocation can be performed in units of computing resources and storage resources from the processing core, realizing finer-grained hardware resource management and allocation. The ratio of computing resources to storage resources in the resource group allocated to each task stage can be different, rather than a bound 1:1 relationship, thereby improving the flexibility of resource allocation and resource utilization.

[0043] For example, different resource groups include different hardware resources, or there are overlapping hardware resources between the hardware resources included in different resource groups. In the embodiment of the present disclosure, the hardware resources between multiple resource groups may overlap, and the overlapping hardware resources can be shared during the calculation process of different task stages.

[0044] In one possible embodiment, hardware resources can be uniformly allocated based on the resource demand of the hardware resources corresponding to the task stage, the available amount of hardware resources included in the processing core, etc., to determine a resource group of overlapping hardware resources. For example, if the storage resources of a storage unit in a processing core are allocated to both task stage 1 and task stage 2, the storage resources of the storage unit can be used during the calculation process of task stage 1 and task stage 2. In this way, the utilization rate of the hardware resources in the processing core can be further improved.

[0045] Furthermore, in the embodiment of the present disclosure, after determining the resource group allocated to each task stage according to the resource demand of each task stage, the allocated resource group may be further optimized by comprehensively considering the system performance, so as to improve the performance of the many-core system on the basis of meeting the resource demand of the task stage, which specifically includes:

[0046] S21: Determine the resource load of each resource group according to the task execution information of each task stage.

[0047] Among them, resource load refers to the demand for resources by tasks running on a multi-core system or device within a certain period of time. The level of resource load will affect the performance and stability of the system. For example, if the resource load is too high, it may cause the system response to slow down, operation delays to increase, and service unavailability. Therefore, it is very important to reasonably evaluate and control the resource load.

[0048] For example, a resource group includes computing resources and storage resources, and the computing load, storage load, and storage access load in the resource group can be determined separately. The computing load represents the amount of computing tasks completed by the resource group within a certain period of time, and can be determined based on the number of computing operations performed by the resource group during the task execution phase; the storage load represents the usage of the entire storage system, and here we can focus on the amount of data required for tasks stored within a certain period of time; the storage access load represents the number of access requests to the storage within a certain period of time.

[0049] Task execution information refers to relevant information during the execution of the task stage, such as the amount of data, the number of storage access requests to the storage resources in the resource group, the number of computing operations on the computing resources in the resource group, etc. For example, these task execution information can be collected during the compilation process of the target task to perform resource load and resource group optimization analysis.

[0050] S22: Obtain the evaluation performance index corresponding to each resource group according to the resource load and task execution information of each resource group, and determine whether there is an evaluation performance index of each resource group that does not meet the performance requirements.

[0051] In the disclosed embodiment, the evaluation performance indicator represents the system performance information when executing the corresponding task stage based on the resource group. For example, the evaluation performance indicator can be the response time of storage access, system power consumption, task calculation time or speed, throughput, etc. Corresponding performance requirements can be set for different evaluation performance indicators, and there is no restriction on this.

[0052] In this way, in the embodiment of the present disclosure, the resource bottleneck of each resource group can be analyzed through the evaluation performance index corresponding to each resource group, and whether it will affect or cause the system performance to decline can be analyzed.

[0053] S23: In the case where there is a first evaluation performance indicator that does not meet the performance requirement, determine a resource allocation amount of hardware resources of the first evaluation performance indicator.

[0054] For this step, specifically, in an embodiment of the present disclosure, in the presence of a first evaluation performance indicator that does not meet the performance requirements, determine the target type of hardware resources in the resource group corresponding to the first evaluation performance indicator, wherein the target type of hardware resources represents the hardware resources that affect the first evaluation performance indicator; and determine the resource allocation amount corresponding to the target type of hardware resources.

[0055] In the disclosed embodiment, when there is a first evaluation performance indicator that does not meet the requirements, the hardware resources of the target type that affect the first evaluation performance indicator can be analyzed, indicating that there is a resource bottleneck in the hardware resources of the target type. In order to improve system performance, the allocation of the hardware resources of the target type can be optimized.

[0056] S24: According to the resource allocation amount of the hardware resources of the first evaluation performance indicator, the resource allocation amounts of the various types of hardware resources in the resource group are adjusted to determine an adjusted resource group.

[0057] In the disclosed embodiment, in order to further control the global system performance, the global bottleneck can also be determined based on each resource group that has a first evaluation performance indicator that does not meet the performance requirements. For example, based on the first evaluation performance indicator that does not meet the performance requirements, the degree of influence of the hardware resources with the first evaluation performance indicator on the system performance can be determined, and the hardware resources with the highest influence level can be screened out as the global bottleneck, that is, the hardware resources that need to be adjusted.

[0058] For example, if the computing bottleneck of the global bottleneck is the computing bottleneck of resource group 1, computing resources other than resource group 1 can be allocated to resource group 1 to reduce the computing bottleneck of the global bottleneck. One possible way is, for example, to adjust adjacent computing resources to resource group 1. For another example, if the storage access bottleneck of the global bottleneck is the storage access bottleneck of resource group 2, computing or storage resources other than resource group 2 can be adjusted to resource group 2 to reduce the storage access bottleneck of the global bottleneck. In this way, by adjusting and optimizing each resource group, the global bottleneck can be reduced, so that the resource group of each task stage can be determined.

[0059] In a possible embodiment, after determining the resource group allocated to each task stage, during the actual execution of the target task, multiple task stages of the target task can be mapped to the hardware resources corresponding to the corresponding resource groups, and the corresponding task stages can be executed based on the hardware resources corresponding to the resource groups.

[0060] In the embodiment of the present disclosure, during the actual execution process, task stages based on different resource groups can be executed in parallel, which can improve processing efficiency.

[0061] In the disclosed embodiment, in a many-core system, a resource graph is constructed based on the hardware resources of the many-core system. Based on the changes in the resource requirements of the target task for different types of hardware resources, the target task can be divided into multiple task stages. Then, according to the resource requirements of each task stage, the resource graph corresponding to the hardware resources is divided to determine the resource group allocated to each task stage. In this way, the hardware resources are abstracted into a resource graph, and the target task is divided into multiple task stages. By dividing the resource graph, a resource group is allocated to each task stage to meet the resource requirements of different task stages, thereby improving the flexibility of resource allocation. In addition, different types of hardware resources are matched with the requirements of the task stages, which can achieve finer-grained hardware resource allocation and improve hardware resource utilization, thereby improving the overall performance of the many-core system.

[0062] The following uses a specific application scenario for illustration. In practice, different tasks usually have different resource requirements for storage resources, computing resources, communication bandwidth, etc. In the disclosed embodiment, the hardware resources in the multi-core system can be managed uniformly, a resource graph can be constructed, and based on the resource graph, the hardware resources can be abstracted into different resource groups. The combinability of multiple types of hardware resources makes it possible to meet the resource requirements for different types of hardware resources.

[0063] Taking various types of hardware resources including computing resources and storage resources as an example, see Figure 3As shown in FIG. 1 , it is an abstract schematic diagram of a resource group in an embodiment of the present disclosure. The computing resources and storage resources of multiple processing cores in a many-core system can be abstracted into a resource graph, and a storage unit and a computing unit are used as units. The storage unit includes storage resources, and the computing unit includes computing resources. Figure 3 As shown, the resource graph includes computing units (such as Figure 3 The solid coil in the Figure 3 dotted circle in the figure).

[0064] Based on the resource graph, the computing units and storage units in the resource graph can be divided into different resource groups, such as Figure 3 As shown, three resource groups are included, each resource group includes computing resources of computing units and storage resources of storage units, resource group 1 includes 5 storage units and 1 computing unit, resource group 2 includes 3 storage units and 3 computing units, and resource group 3 includes 2 storage units and 2 computing units.

[0065] And, if Figure 3 As shown, the storage units or computing units between different resource groups may overlap, for example, resource group 3 and resource group 2 may share storage resources in one storage unit.

[0066] It should be noted that Figure 3 The abstract resource group is only a possible example and does not include all computing units and storage units in the many-core system, nor does it represent the corresponding Figure 2 There are three mission stages in it.

[0067] For example, see Figure 4 As shown in FIG. 1 , a schematic diagram of resource groups in a multi-core chip in an embodiment of the present disclosure is shown. Each processing core includes storage resources and computing resources. Based on the division of abstract resource groups, corresponding to the actual multi-core system, an equivalent resource group for actual hardware resources can be obtained, such as Figure 4 As shown, each processing core includes a computing unit and a storage unit. A resource group is allocated correspondingly according to the resource demand of different task stages of the target task. The resource units and storage units in the allocated resource group are not bound together by processing core, but can be flexibly configured as storage units or computing units, thereby improving resource allocation flexibility and resource utilization.

[0068] Exemplarily, in an embodiment of the present disclosure, resource groups may be divided according to a plurality of task stages divided according to a target task, each task stage having different resource requirements for storage resources and computing resources, and the resource group allocated to each task stage is determined based on the resource requirements of each task stage.

[0069] Exemplarily, in the embodiments of the present disclosure, other methods may be used to initially group the hardware resources in the multi-core system. For example, multiple types of hardware resources may be evenly divided. For example, the resource group corresponding to the task stage may be determined according to the data size of the task stage, with the ability to be stored as the basic condition. Then, based on the resource demand of each task stage, the resource load of each resource group, and resource bottleneck analysis, the initially grouped resource groups may be adjusted and optimized to obtain the final resource groups for each task stage.

[0070] After determining the resource group allocated to each task stage, during the actual execution of the target task, the multiple task stages of the target task can be mapped to the hardware resources corresponding to the corresponding resource groups, and the corresponding task stages can be executed based on the hardware resources corresponding to the resource groups.

[0071] In the disclosed embodiment, the target task can be divided into multiple task stages, and various types of hardware resources in the many-core system can be flexibly allocated according to the resource requirements of different task stages, which can improve the utilization of hardware resources and enhance system performance.

[0072] In the disclosed embodiment, when allocating resources, it is not limited to the hardware resources in one processing core. The resource group of a task stage may include hardware resources located in different processing cores. In this way, during the execution of the task stage, there will be a need to access the hardware resources in the processing core itself and the hardware resources across processing cores. There may also be data communication between different task stages, that is, there is also a need to access the hardware resources in different processing cores.

[0073] In a possible embodiment of the present disclosure, during the execution of the task phase, data communication is performed based on a data communication device of the many-core system.

[0074] The many-core system includes a plurality of processing cores, each of which includes an arbitrator, and the data communication device includes an arbitrator network composed of the arbitrators in the plurality of processing cores. Figure 5 FIG. 1 is a schematic diagram of the structure of a data communication device in an embodiment of the present disclosure. Different arbitrators are connected via a connection unit to achieve data communication. Figure 5 As shown, taking the first arbitrator as an example, the core components in the first processing core include computing components, etc. The first arbitrator can be connected to multiple second arbitrators through a connecting unit. The first arbitrator is located in the first processing core, and the second arbitrator is located in the second processing core, so as to realize data communication between the first processing core and the multiple second processing cores.

[0075] Among them, the first arbitrator in the arbiter network is used to process a first data access request for accessing the first processing core where it is located, and sends a second data access request for accessing the second processing core to the second arbitrator corresponding to the second processing core through a connection unit. The structure of the connection unit is not limited, and it can be a connection port of the first arbitrator, or other additional connection structures can be added.

[0076] Furthermore, in the embodiment of the present disclosure, the processing core includes a storage unit, and the storage unit is connected to the arbiter in the processing core where the storage unit is located, for example, Figure 5 As shown, a processing core may include multiple storage units, and each storage unit corresponds to a global address in the many-core system, and different storage units have different global addresses.

[0077] In the disclosed embodiment, the interconnection structure design of multiple arbitrators can realize not only data transmission within a processing core, but also cross-core data transmission between different processing cores.

[0078] Specifically, the data communication device according to the embodiment of the present disclosure is described below.

[0079] Exemplarily, on the one hand, the first arbitrator is mainly used to process the first data access request within the first processing core, such as Figure 5 As shown, the first arbitrator includes a third arbitration unit and a second input port; the second input port is respectively connected to the computing component in the first processing core and the third arbitration unit; the third arbitration unit is respectively connected to the second input port and the storage unit in the first processing core; the first arbitrator is used to send the first data access request to the corresponding storage unit in the first processing core through the third arbitration unit.

[0080] In the case of multiple first data access requests, the third arbitration unit can coordinate processing based on a preset arbitration strategy to avoid data conflicts without restricting the arbitration strategy, thereby realizing processing of data access requests in the processing core.

[0081] Exemplarily, on the other hand, arbiters between different processing cores are connected via a connection unit to implement the second data access request between the processing cores.

[0082] In one possible embodiment, see Figure 6 FIG. 1 is a schematic diagram of a connection structure of multiple arbitrators in an embodiment of the present disclosure.

[0083] The connection unit of the first arbitrator includes multiple first input ports and multiple first arbitration units; the first input port is connected to the first arbitrator and the first arbitration unit respectively; the first arbitration unit is connected to the first input port and the second arbitrator respectively; the first arbitrator is used to send the second data access request to the first arbitration unit through the first input port, and the first arbitration unit sends the second data access request to the corresponding second arbitrator according to the target access address in the second data access request, and the target access address represents the global address of the target storage unit to be accessed.

[0084] The number of the first input port is at least one, and each first input port is connected to at least one first arbitration unit; the number of the first arbitration units is the same as the number of the connected second arbitrators, and each first arbitration unit is connected to a second arbitrator, such as Figure 6 As shown, three first arbitration units and three second arbitrators are taken as an example, each first arbitration unit is connected to a second arbitrator. It should be noted that the multiple second arbitrators here represent different arbitrators, which are only named as examples to distinguish them from the first arbitrators.

[0085] like Figure 6 As shown, taking the case where there are two first input ports as an example, the first input ports and the first arbitration unit can adopt a fully connected structure, that is, each first input port can be connected to each first arbitration unit. Of course, a non-fully connected structure can also be adopted according to needs, and there is no limitation.

[0086] If the computing component in the first processing core wants to access the storage unit of other processing cores, the computing component in the first processing core sends a second data access request, and the first arbitrator in the first processing core determines that it wants to access the target storage unit in the second processing core based on the target access address in the second data access request, and then sends the second data access request to the first input port through the first arbitrator, and then the first arbitration unit sends it to the corresponding second arbitrator based on the target access address, and then the second arbitrator can send the second data access request to the target storage unit.

[0087] Among them, in the embodiment of the present disclosure, the global addresses of all storage units in the many-core system can be pre-configured, and then the target storage unit to be accessed can be determined according to the target access address in the second data access request, so as to send the second data access request to the second arbitrator corresponding to the target storage unit to be accessed.

[0088] Furthermore, if the first arbitrator in the first processing core is connected to the second arbitrator in the second processing core, and the second arbitrator in the second processing core is connected to the third arbitrator in the third processing core, in this case, if the computing component in the first processing core wants to access the storage unit in the third processing core, the data access request can be sent to the second arbitrator through the first arbitrator, and the second arbitrator forwards the data access request to the third arbitrator to achieve access to the storage unit in the third processing core.

[0089] It should be noted that Figure 6 The connection design is only a possible example and should not limit the embodiments of the present disclosure. For example, the number of first input ports, the connection relationship between the first input port and the first arbitration unit, the number of second arbitrators connected to the first arbitrator, etc. are not limited in the embodiments of the present disclosure.

[0090] Thus, in the embodiment of the present disclosure, the first arbitrator and the second arbitrator are connected through the connection unit design of multiple first input ports and multiple first arbitration units, and more refined data transmission control can be performed through the first input port, and the scalability is also stronger and more flexible.

[0091] In one possible embodiment, see Figure 7 FIG. 1 is a schematic diagram of another connection structure of multiple arbitrators in an embodiment of the present disclosure.

[0092] The first arbitrator includes a plurality of second arbitration units, and the connection unit of the first arbitrator includes a second arbitration unit; the first arbitrator is directly connected to the second arbitrator through the output end of the second arbitration unit, wherein the number of the second arbitration units is the same as the number of the connected second arbitrators, and each second arbitration unit is connected to a second arbitrator; the first arbitrator is used to send the second data access request to the second arbitrator corresponding to the target access address in the second data access request through the second arbitration unit, and the target access address represents the global address of the target storage unit to be accessed.

[0093] like Figure 7 As shown, taking three second arbitration units as an example, each second arbitration unit is connected to a second arbitrator, and the second arbitration unit of the first arbitrator can be directly used as a connection unit to realize the direct connection between the first arbitrator and the second arbitrator. Figure 6 The connection unit shown can save additional connection ports, and the arbitrators are directly connected through the ports of the arbitration unit, thereby reducing costs.

[0094] Exemplarily, in an embodiment of the present disclosure, based on the connection structure of the arbitrator, the arbitrators in multiple processing cores are interconnected to build an arbitrator network, and the arbitrator network can coexist with the existing NoC network, that is, the data communication device in the embodiment of the present disclosure may include an arbitrator network and a NoC network, and the NoC network is used for data access requests between different processing cores.

[0095] Since the arbitrator itself has a limited access range and the arbitrator network does not require complex network protocols, multi-hop routing decisions, etc., the latency is smaller than that of the NoC network. Therefore, the arbitrator network is more suitable for low-latency short-distance data transmission, while the NoC network is more suitable for long-distance flexible data transmission. In addition, the NoC network can also realize more complex data transmission tasks such as dynamic path planning and global load balancing based on multi-hop routing mechanisms.

[0096] Exemplarily, in an embodiment of the present disclosure, the arbitrator network is used to process data access requests that meet a first transmission requirement, and the NoC network is used to process data access requests that meet a second transmission requirement; wherein the transmission parameters in the first transmission requirement include at least a first transmission distance and a first transmission delay, and the transmission parameters in the second transmission requirement include at least a second transmission distance and a second transmission delay, and the first transmission distance is smaller than the second transmission distance, and the first transmission delay is smaller than the second transmission delay.

[0097] Illustratively, in an embodiment of the present disclosure, when data transmission is actually performed in a many-core system, for example, the network used for data of different tasks or different processing cores can be pre-statically configured as an arbitrator network or a NoC network. For another example, the network currently used for data transmission can be determined based on the distance of data transmission, the busyness of network transmission, etc. when the task is running.

[0098] In this way, in the embodiments of the present disclosure, a variety of different communication networks can be provided for application in a multi-core system, so that a more suitable communication network can be used based on different data transmission requirements, which is more flexible and improves data transmission efficiency.

[0099] Furthermore, based on the data communication device in the embodiment of the present disclosure, when performing data communication, the embodiment of the present disclosure provides a data communication method, the method comprising:

[0100] S1: The first arbitrator obtains a target data access request, where the target data access request includes a target access address.

[0101] S2: When the target access address accesses a storage unit in the first processing core where the first arbitrator is located, send a target data access request to the storage unit in the first processing core.

[0102] The target data access request may be received by the first arbitrator from a computing component in the first processing core, and may also be received by the first arbitrator and forwarded from an arbitrator in another processing core.

[0103] S3: When the target access address accesses the storage unit in the second processing core, based on the data communication device, the target data access request is sent to the second arbitrator of the second processing core, so that the second arbitrator sends the target data access request to the storage unit in the second processing core.

[0104] In the disclosed embodiment, an arbitrator network is constructed based on the interconnection of arbiters in the processing cores, so that data transmission in the many-core system can be realized based on the arbitrator network, and higher-speed and low-latency data access can be achieved.

[0105] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not repeat them. It can be understood by those skilled in the art that in the above-mentioned method of the specific implementation method, the specific execution order of each step should be determined according to its function and possible internal logic.

[0106] In addition, the present disclosure also provides a resource allocation device, an electronic device, a computer-readable storage medium, and a computer program product, all of which can be used to implement any resource allocation method provided by the present disclosure. The corresponding technical solutions and descriptions are referred to the corresponding records in the method part and will not be repeated here.

[0107] Figure 8 A block diagram of a resource allocation device provided in an embodiment of the present disclosure.

[0108] Reference Figure 8 The embodiment of the present disclosure provides a resource allocation device, which is applied to a many-core system, wherein the many-core system includes a plurality of processing cores, each of which includes a plurality of types of hardware resources. The resource allocation device includes:

[0109] A construction module 80, configured to construct a resource map according to the hardware resources of the many-core system;

[0110] A task division module 81 is used to divide the target task into multiple task stages based on resource demand changes according to the execution process of the target task, and each task stage has different resource requirements for different types of hardware resources;

[0111] The resource allocation module 82 is used to divide the resource graph corresponding to the hardware resources according to the resource demand of each task stage, and determine the resource group allocated to each task stage, wherein the resource group includes multiple types of hardware resources.

[0112] In a possible embodiment, the multiple types of hardware resources include computing resources and storage resources. When the target task is divided into multiple task stages based on resource demand changes according to the execution process of the target task, the task division module 81 is used to:

[0113] According to the change in the ratio between the resource requirements of computing resources and storage resources during the execution of the target task, the target task is divided into multiple task stages, wherein the ratio of the resource requirements of storage resources and computing resources in each task stage is different.

[0114] In a possible embodiment, different resource groups include different hardware resources, or there are overlapping hardware resources among the hardware resources included in different resource groups.

[0115] In a possible embodiment, the resource requirements of different types of hardware resources corresponding to each task stage have different ratios, and the resource group includes multiple types of hardware resources that meet the required ratios of the corresponding task stage.

[0116] In a possible embodiment, the resource allocation module 82 is further configured to:

[0117] Determining the resource load of each resource group according to the task execution information of each task stage;

[0118] According to the resource load of each resource group and the task execution information, obtaining the evaluation performance index corresponding to each resource group, and determining whether each resource group has an evaluation performance index that does not meet the performance requirements;

[0119] In the case where there is a first evaluation performance indicator that does not meet the performance requirement, determining a resource allocation amount of a hardware resource of the first evaluation performance indicator;

[0120] According to the resource allocation amount of the hardware resource of the first evaluation performance indicator, the resource allocation amounts of the multiple types of hardware resources in the resource group are adjusted to determine an adjusted resource group.

[0121] In a possible embodiment, the evaluation performance indicator corresponding to the resource group represents system performance information when the corresponding task phase is executed based on the resource group, and each evaluation performance indicator sets a corresponding performance requirement;

[0122] When determining the resource allocation amount of the hardware resource of the first evaluation performance indicator in the case where there is a first evaluation performance indicator that does not meet the performance requirement, the resource allocation module 82 is used to:

[0123] In the case where there is a first evaluation performance indicator that does not meet the performance requirement, determining a target type of hardware resource in a resource group corresponding to the first evaluation performance indicator, wherein the target type of hardware resource represents a hardware resource that affects the first evaluation performance indicator;

[0124] Determine the resource allocation amount corresponding to the hardware resource of the target type.

[0125] In a possible embodiment, an operation module 83 is further included, which is used to:

[0126] The multiple task phases of the target task are respectively mapped to the hardware resources corresponding to the corresponding resource groups, and the corresponding task phases are executed based on the hardware resources corresponding to the resource groups.

[0127] In a possible embodiment, the operation module 83 is further used to: perform data communication based on the data communication device of the many-core system during the execution of the task phase;

[0128] The many-core system includes a plurality of processing cores, each of which includes an arbitrator; the data communication device includes an arbitrator network composed of arbitrators in the plurality of processing cores, and different arbitrators are connected via a connection unit to achieve data communication; a first arbitrator in the arbitrator network is used to process a first data access request for accessing a first processing core where the arbitrator is located, and to send a second data access request for accessing a second processing core to a second arbitrator corresponding to the second processing core via the connection unit.

[0129] Fig. 9 A block diagram of an electronic device provided in an embodiment of the present disclosure.

[0130] Reference Fig. 9 An embodiment of the present disclosure provides an electronic device, which includes multiple processing cores 901 and a data communication device 902. The data communication device 902 includes an on-chip network and / or the arbitrator network in the above embodiments, wherein the multiple processing cores 901 are connected to the data communication device 902, and the data communication device 902 is used to exchange data between the multiple processing cores and external data.

[0131] One or more instructions are stored in one or more processing cores 901 , and the one or more instructions are executed by one or more processing cores 901 , so that one or more processing cores 901 can execute the above-mentioned resource allocation method.

[0132] In some embodiments, the electronic device may be a brain-like chip, which can use vectorized computing and needs to load the weight information and other parameters of the neural network model through an external memory such as a double data rate (DDR) synchronous dynamic random access memory. Therefore, the batch processing used in the embodiments of the present disclosure has a higher computing efficiency.

[0133] The embodiment of the present disclosure also provides a computer-readable storage medium on which a computer program is stored, wherein the computer program implements the above-mentioned resource allocation method when executed by a processing core. The computer-readable storage medium may be a volatile or non-volatile computer-readable storage medium.

[0134] The embodiment of the present disclosure also provides a computer program product, including a computer-readable code, or a non-volatile computer-readable storage medium carrying the computer-readable code. When the computer-readable code runs in a processing core of an electronic device, the processing core in the electronic device executes the above-mentioned resource allocation method.

[0135] It will be appreciated by those skilled in the art that all or some of the steps, systems, and functional modules / units in the methods disclosed above may be implemented as software, firmware, hardware, and appropriate combinations thereof. In a hardware implementation, the division between the functional modules / units mentioned in the above description does not necessarily correspond to the division of physical components; for example, a physical component may have multiple functions, or a function or step may be performed by several physical components in cooperation. Some or all physical components may be implemented as software executed by a processor, such as a central processing unit, a digital signal processor, or a microprocessor, or may be implemented as hardware, or may be implemented as an integrated circuit, such as an application-specific integrated circuit. Such software may be distributed on a computer-readable storage medium, which may include a computer storage medium (or a non-transitory medium) and a communication medium (or a temporary medium).

[0136] As is known to those of ordinary skill in the art, the term computer storage media includes volatile and nonvolatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable program instructions, data structures, program modules or other data). Computer storage media include, but are not limited to, random access memory (RAM), read-only memory (ROM), erasable programmable read-only memory (EPROM), static random access memory (SRAM), flash memory or other memory technology, portable compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical disk storage, magnetic cassettes, magnetic tapes, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to store desired information and can be accessed by a computer. In addition, it is known to those of ordinary skill in the art that communication media typically contain computer-readable program instructions, data structures, program modules or other data in a modulated data signal such as a carrier wave or other transmission mechanism, and may include any information delivery medium.

[0137] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0138] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0139] The computer program product described herein may be implemented in hardware, software, or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK), etc.

[0140] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0141] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0142] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0143] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0144] Example embodiments have been disclosed herein, and although specific terms are employed, they are used and should be interpreted only in a general illustrative sense and not for limiting purposes. In some instances, it will be apparent to those skilled in the art that, unless otherwise expressly noted, features, characteristics, and / or elements described in conjunction with a particular embodiment may be used alone or in combination with features, characteristics, and / or elements described in conjunction with other embodiments. Therefore, those skilled in the art will appreciate that various changes in form and detail may be made without departing from the scope of the present disclosure as set forth in the appended claims.

Claims

1. A resource allocation method, characterized in that: Applied to a many-core system, the many-core system includes multiple processing cores, each processing core includes multiple types of hardware resources, the method includes: Constructing a resource map according to the hardware resources of the many-core system; According to the execution process of the target task, the target task is divided into multiple task stages based on resource demand changes, and each task stage has different resource requirements for different types of hardware resources; According to the resource demand of each task stage, the resource graph corresponding to the hardware resources is divided to determine the resource group allocated to each task stage, and the resource group includes multiple types of hardware resources.

2. The resource allocation method according to claim 1, characterized in that: The multiple types of hardware resources include computing resources and storage resources. According to the execution process of the target task, the target task is divided into multiple task stages based on resource demand changes, including: According to the change in the ratio between the resource requirements of computing resources and storage resources during the execution of the target task, the target task is divided into multiple task stages, wherein the ratio of the resource requirements of storage resources and computing resources in each task stage is different.

3. The resource allocation method according to claim 1, characterized in that: Different resource groups include different hardware resources, or the hardware resources included in different resource groups have overlapping hardware resources.

4. The resource allocation method according to claim 1, characterized in that: The resource requirements of different types of hardware resources corresponding to each task stage have different ratios, and the resource group includes multiple types of hardware resources that meet the required ratios of the corresponding task stages.

5. The resource allocation method according to any one of claims 1 to 4, characterized in that: The method further comprises: Determining the resource load of each resource group according to the task execution information of each task stage; According to the resource load of each resource group and the task execution information, obtaining the evaluation performance index corresponding to each resource group, and determining whether each resource group has an evaluation performance index that does not meet the performance requirements; In the case where there is a first evaluation performance indicator that does not meet the performance requirement, determining a resource allocation amount of a hardware resource of the first evaluation performance indicator; According to the resource allocation amount of the hardware resource of the first evaluation performance indicator, the resource allocation amounts of the multiple types of hardware resources in the resource group are adjusted to determine an adjusted resource group.

6. The resource allocation method according to claim 5, characterized in that: The evaluation performance indicator corresponding to the resource group represents system performance information when the corresponding task phase is executed based on the resource group, and each evaluation performance indicator sets a corresponding performance requirement; The determining, when there is a first evaluation performance indicator that does not meet the performance requirement, a resource allocation amount of the hardware resource of the first evaluation performance indicator comprises: In the case where there is a first evaluation performance indicator that does not meet the performance requirement, determining a target type of hardware resource in a resource group corresponding to the first evaluation performance indicator, wherein the target type of hardware resource represents a hardware resource that affects the first evaluation performance indicator; Determine the resource allocation amount corresponding to the hardware resource of the target type.

7. The resource allocation method according to claim 5, characterized in that: The method further comprises: The multiple task phases of the target task are respectively mapped to the hardware resources corresponding to the corresponding resource groups, and the corresponding task phases are executed based on the hardware resources corresponding to the resource groups.

8. The resource allocation method according to claim 7, characterized in that: include: During the execution of the task phase, data communication is performed based on the data communication device of the many-core system; The many-core system includes a plurality of processing cores, each of which includes an arbitrator; the data communication device includes an arbitrator network composed of arbitrators in the plurality of processing cores, and different arbitrators are connected via a connection unit to achieve data communication; a first arbitrator in the arbitrator network is used to process a first data access request for accessing a first processing core where the arbitrator is located, and to send a second data access request for accessing a second processing core to a second arbitrator corresponding to the second processing core via the connection unit.

9. The resource allocation method according to claim 8, characterized in that: The connection unit of the first arbitrator includes a plurality of first input ports and a plurality of first arbitration units; The first input port is connected to the first arbitrator and the first arbitration unit respectively; The first arbitration unit is connected to the first input port and the second arbitrator respectively; The first arbitrator is used to send the second data access request to the first arbitration unit through the first input port, and the first arbitration unit sends the second data access request to the corresponding second arbitrator according to the target access address in the second data access request.

10. The resource allocation method according to claim 9, characterized in that: The number of the first input port is at least one, and each of the first input port is connected to at least one first arbitration unit; The number of the first arbitration units is the same as the number of the connected second arbitrators, and each of the first arbitration units is connected to one second arbitrator.

11. The resource allocation method according to claim 8, characterized in that: The first arbitrator includes a plurality of second arbitration units, and the connection unit of the first arbitrator includes the second arbitration unit; The first arbitrator is directly connected to the second arbitrator through the output end of the second arbitration unit, wherein the number of the second arbitration units is the same as the number of the connected second arbitrators, and each second arbitration unit is connected to a second arbitrator; The first arbitrator is used for sending the second data access request to the second arbitrator corresponding to the target access address in the second data access request through the second arbitration unit.

12. The resource allocation method according to any one of claims 8 to 11, characterized in that: The first arbitrator further includes a third arbitration unit and a second input port; The second input port is connected to the computing component in the first processing core and the third arbitration unit respectively; The third arbitration unit is connected to the second input port and the storage unit in the first processing core respectively; The first arbitrator is used to send the first data access request to a corresponding storage unit in the first processing core through the third arbitration unit.

13. A resource allocation device, characterized in that: Applied to a many-core system, the many-core system includes multiple processing cores, each processing core includes multiple types of hardware resources, the device includes: A construction module, configured to construct a resource map according to the hardware resources of the many-core system; A task division module is used to divide the target task into multiple task stages based on resource demand changes according to the execution process of the target task, and each task stage has different resource requirements for different types of hardware resources; The resource allocation module is used to divide the resource graph corresponding to the hardware resources according to the resource demand of each task stage, and determine the resource group allocated to each task stage, wherein the resource group includes multiple types of hardware resources.

14. An electronic device, characterized in that: include: Multiple processing cores; as well as A data communication device, configured to exchange data between the multiple processing cores and external data; wherein one or more instructions are stored in one or more of the processing cores, and one or more of the instructions are executed by one or more of the processing cores, so that one or more of the processing cores can execute the resource allocation method described in any one of claims 1-12.

15. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processing core, the computer program implements the resource allocation method according to any one of claims 1 to 12.

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